diff options
Diffstat (limited to 'arch/arm/boards/phytec-som-am335x/ram-timings.h')
| -rw-r--r-- | arch/arm/boards/phytec-som-am335x/ram-timings.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boards/phytec-som-am335x/ram-timings.h b/arch/arm/boards/phytec-som-am335x/ram-timings.h index 9576d265e5..4ea654db12 100644 --- a/arch/arm/boards/phytec-som-am335x/ram-timings.h +++ b/arch/arm/boards/phytec-som-am335x/ram-timings.h @@ -45,6 +45,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x26437FDA, .emif_tim3 = 0x501F83FF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C052B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -66,6 +67,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x266B7FDA, .emif_tim3 = 0x501F867F, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C05332, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -87,6 +89,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x26437FDA, .emif_tim3 = 0x501F83FF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C052B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -106,6 +109,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x262F7FDA, .emif_tim3 = 0x501F82BF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C05232, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -125,6 +129,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x266B7FDA, .emif_tim3 = 0x501F867F, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C05332, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30 @@ -144,6 +149,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x266B7FDA, .emif_tim3 = 0x501F867F, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C053B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30 @@ -163,6 +169,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x268F7FDA, .emif_tim3 = 0x501F88BF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C053B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30 @@ -182,6 +189,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x26437FDA, .emif_tim3 = 0x501F83FF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C052B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -203,6 +211,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x266B7FDA, .emif_tim3 = 0x501F867F, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C05332, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -222,6 +231,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x26437FDA, .emif_tim3 = 0x501F83FF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C052B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -241,6 +251,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x268F7FDA, .emif_tim3 = 0x501F88BF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C053B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, |