diff options
Diffstat (limited to 'arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c')
-rw-r--r-- | arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c | 58 |
1 files changed, 12 insertions, 46 deletions
diff --git a/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c b/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c index 24d98fe6c9..711316ae4b 100644 --- a/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c +++ b/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c @@ -2,20 +2,20 @@ #include <asm/barebox-arm.h> #include <common.h> -#include <image-metadata.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <firmware.h> -#include <mach/atf.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <mach/imx8m-ccm-regs.h> -#include <mach/imx8mm-regs.h> -#include <mach/iomux-mx8mm.h> -#include <mach/xload.h> +#include <mach/imx/atf.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/imx8mm-regs.h> +#include <mach/imx/iomux-mx8mm.h> +#include <mach/imx/xload.h> #include <soc/fsl/fsl_udc.h> #include <soc/imx8m/ddr.h> -extern char __dtb_imx8mm_prt8mm_start[]; +extern char __dtb_z_imx8mm_prt8mm_start[]; #define UART_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_DSE_3P3V_45_OHM) @@ -37,11 +37,6 @@ extern struct dram_timing_info prt8mm_dram_timing; static void start_atf(void) { - size_t bl31_size; - const u8 *bl31; - enum bootsource src; - int instance; - /* * If we are in EL3 we are running for the first time and need to * initialize the DRAM and run TF-A (BL31). The TF-A will then jump @@ -52,36 +47,9 @@ static void start_atf(void) imx8mm_early_clock_init(); - imx8mm_ddr_init(&prt8mm_dram_timing); - - imx8mm_get_boot_source(&src, &instance); - switch (src) { - case BOOTSOURCE_MMC: - imx8m_esdhc_load_image(instance, false); - break; - case BOOTSOURCE_SERIAL: - imx8mm_barebox_load_usb((void *)MX8M_ATF_BL33_BASE_ADDR); - break; - default: - printf("Unhandled bootsource BOOTSOURCE_%d\n", src); - hang(); - } - - /* - * On completion the TF-A will jump to MX8M_ATF_BL33_BASE_ADDR - * in EL2. Copy the image there, but replace the PBL part of - * that image with ourselves. On a high assurance boot only the - * currently running code is validated and contains the checksum - * for the piggy data, so we need to ensure that we are running - * the same code in DRAM. - */ - memcpy((void *)MX8MM_ATF_BL33_BASE_ADDR, - __image_start, barebox_pbl_size); - - get_builtin_firmware(imx8mm_bl31_bin, &bl31, &bl31_size); - imx8mm_atf_load_bl31(bl31, bl31_size); + imx8mm_ddr_init(&prt8mm_dram_timing, DRAM_TYPE_LPDDR4); - /* not reached */ + imx8mm_load_and_start_image_via_tfa(); } /* @@ -109,7 +77,7 @@ static __noreturn noinline void prt_prt8mm_start(void) /* * Standard entry we hit once we initialized both DDR and ATF */ - imx8mm_barebox_entry(__dtb_imx8mm_prt8mm_start); + imx8mm_barebox_entry(__dtb_z_imx8mm_prt8mm_start); } ENTRY_FUNCTION(start_prt_prt8mm, r0, r1, r2) @@ -119,7 +87,5 @@ ENTRY_FUNCTION(start_prt_prt8mm, r0, r1, r2) relocate_to_current_adr(); setup_c(); - IMD_USED_OF(imx8mm_prt8mm); - prt_prt8mm_start(); } |