diff options
Diffstat (limited to 'arch/arm/boards')
676 files changed, 18288 insertions, 15857 deletions
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index a0e84c24d7..98eab17af2 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -5,6 +5,7 @@ obj-$(CONFIG_MACH_ADVANTECH_ROM_742X) += advantech-mx6/ obj-$(CONFIG_MACH_AFI_GF) += afi-gf/ obj-$(CONFIG_MACH_ANIMEO_IP) += animeo_ip/ obj-$(CONFIG_MACH_ARCHOSG9) += archosg9/ +obj-$(CONFIG_MACH_AT91RM9200EK) += at91rm9200ek/ obj-$(CONFIG_MACH_AT91SAM9260EK) += at91sam9260ek/ obj-$(CONFIG_MACH_AT91SAM9261EK) += at91sam9261ek/ obj-$(CONFIG_MACH_AT91SAM9263EK) += at91sam9263ek/ @@ -16,9 +17,12 @@ obj-$(CONFIG_MACH_AT91SAM9N12EK) += at91sam9n12ek/ obj-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek/ obj-$(CONFIG_MACH_BEAGLE) += beagle/ obj-$(CONFIG_MACH_BEAGLEBONE) += beaglebone/ +obj-$(CONFIG_MACH_BEAGLEPLAY) += beagleplay/ +obj-$(CONFIG_MACH_CALAO) += calao/ obj-$(CONFIG_MACH_CANON_A1100) += canon-a1100/ obj-$(CONFIG_MACH_CM_FX6) += cm-fx6/ obj-$(CONFIG_MACH_NITROGEN6) += boundarydevices-nitrogen6/ +obj-$(CONFIG_MACH_NOVENA) += novena/ obj-$(CONFIG_MACH_CCMX51) += ccxmx51/ obj-$(CONFIG_MACH_CCMX53) += ccxmx53/ obj-$(CONFIG_MACH_CFA10036) += crystalfontz-cfa10036/ @@ -40,16 +44,9 @@ obj-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += efika-mx-smartbook/ obj-$(CONFIG_MACH_EMBEDSKY_E9) += embedsky-e9/ obj-$(CONFIG_MACH_EMBEST_MARSBOARD) += embest-marsboard/ obj-$(CONFIG_MACH_EMBEST_RIOTBOARD) += embest-riotboard/ -obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += eukrea_cpuimx25/ -obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27/ -obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += eukrea_cpuimx35/ -obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += eukrea_cpuimx51/ obj-$(CONFIG_MACH_ELTEC_HIPERCAM) += eltec-hipercam/ -obj-$(CONFIG_MACH_FREESCALE_MX25_3STACK) += freescale-mx25-3ds/ -obj-$(CONFIG_MACH_FREESCALE_MX35_3STACK) += freescale-mx35-3ds/ obj-y += freescale-mx51-babbage/ obj-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += freescale-mx53-qsb/ -obj-$(CONFIG_MACH_FREESCALE_MX53_SMD) += freescale-mx53-smd/ obj-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += freescale-mx53-vmx53/ obj-$(CONFIG_MACH_FREESCALE_MX7_SABRESD) += freescale-mx7-sabresd/ obj-$(CONFIG_MACH_MEERKAT96) += meerkat96/ @@ -58,17 +55,14 @@ obj-$(CONFIG_MACH_GK802) += gk802/ obj-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += globalscale-guruplug/ obj-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += globalscale-mirabox/ obj-$(CONFIG_MACH_GRINN_LITEBOARD) += grinn-liteboard/ -obj-$(CONFIG_MACH_GUF_CUPID) += guf-cupid/ obj-$(CONFIG_MACH_GUF_SANTARO) += guf-santaro/ obj-$(CONFIG_MACH_GUF_VINCELL) += guf-vincell/ obj-$(CONFIG_MACH_GW_VENTANA) += gateworks-ventana/ obj-$(CONFIG_MACH_HABA_KNX_LITE) += haba-knx/ -obj-$(CONFIG_MACH_IMX21ADS) += freescale-mx21-ads/ obj-$(CONFIG_MACH_IMX233_OLINUXINO) += imx233-olinuxino/ -obj-$(CONFIG_MACH_IMX27ADS) += freescale-mx27-ads/ obj-$(CONFIG_MACH_INNOCOMM_WB15) += innocomm-imx8mm-wb15/ obj-$(CONFIG_MACH_KAMSTRUP_MX7_CONCENTRATOR) += kamstrup-mx7-concentrator/ -obj-$(CONFIG_MACH_KINDLE3) += kindle3/ +obj-$(CONFIG_MACH_KARO_QSXP_ML81) += karo-qsxp-ml81/ obj-$(CONFIG_MACH_KONTRON_SAMX6I) += kontron-samx6i/ obj-$(CONFIG_MACH_LENOVO_IX4_300D) += lenovo-ix4-300d/ obj-$(CONFIG_MACH_LUBBOCK) += lubbock/ @@ -80,7 +74,6 @@ obj-$(CONFIG_MACH_MIOA701) += mioa701/ obj-$(CONFIG_MACH_MX23EVK) += freescale-mx23-evk/ obj-$(CONFIG_MACH_MX28EVK) += freescale-mx28-evk/ obj-$(CONFIG_MACH_MYIRTECH_X335X) += myirtech-x335x/ -obj-$(CONFIG_MACH_NESO) += guf-neso/ obj-$(CONFIG_MACH_NETGEAR_RN104) += netgear-rn104/ obj-$(CONFIG_MACH_NETGEAR_RN2120) += netgear-rn2120/ obj-$(CONFIG_MACH_NOMADIK_8815NHK) += nhk8815/ @@ -91,28 +84,32 @@ obj-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += nxp-imx8mq-evk/ obj-$(CONFIG_MACH_NXP_IMX8MM_EVK) += nxp-imx8mm-evk/ obj-$(CONFIG_MACH_NXP_IMX8MN_EVK) += nxp-imx8mn-evk/ obj-$(CONFIG_MACH_NXP_IMX8MP_EVK) += nxp-imx8mp-evk/ +obj-$(CONFIG_MACH_CONGATEC_QMX8P_SOM) += congatec-qmx8p/ +obj-$(CONFIG_MACH_TQ_MBA8MPXL) += tqma8mpxl/ obj-$(CONFIG_MACH_OMAP343xSDP) += omap343xdsp/ obj-$(CONFIG_MACH_OMAP3EVM) += omap3evm/ obj-$(CONFIG_MACH_PANDA) += panda/ obj-$(CONFIG_MACH_PCA100) += phytec-phycard-imx27/ obj-$(CONFIG_MACH_PCAAL1) += phytec-phycard-omap3/ obj-$(CONFIG_MACH_PCAAXL2) += phytec-phycard-omap4/ -obj-$(CONFIG_MACH_PCM037) += phytec-phycore-imx31/ +obj-$(CONFIG_MACH_PCM027) += phytec-phycore-pxa270/ obj-$(CONFIG_MACH_PCM038) += phytec-phycore-imx27/ -obj-$(CONFIG_MACH_PCM043) += phytec-phycore-imx35/ obj-$(CONFIG_MACH_PCM049) += phytec-phycore-omap4460/ obj-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += phytec-som-am335x/ obj-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += phytec-som-imx6/ obj-$(CONFIG_MACH_PHYTEC_PHYCORE_IMX7) += phytec-phycore-imx7/ obj-$(CONFIG_MACH_PHYTEC_PHYCORE_STM32MP1) += phytec-phycore-stm32mp1/ +obj-$(CONFIG_MACH_PHYTEC_SOM_IMX8MM) += phytec-som-imx8mm/ obj-$(CONFIG_MACH_PHYTEC_SOM_IMX8MQ) += phytec-som-imx8mq/ obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += plathome-openblocks-ax3/ obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += plathome-openblocks-a6/ obj-$(CONFIG_MACH_PM9261) += pm9261/ obj-$(CONFIG_MACH_PM9263) += pm9263/ obj-$(CONFIG_MACH_PM9G45) += pm9g45/ +obj-$(CONFIG_MACH_POLYHEX_DEBIX) += polyhex-debix/ obj-$(CONFIG_MACH_PROTONIC_IMX6) += protonic-imx6/ obj-$(CONFIG_MACH_PROTONIC_IMX8M) += protonic-imx8m/ +obj-$(CONFIG_MACH_PROTONIC_MECSBC) += protonic-mecsbc/ obj-$(CONFIG_MACH_PROTONIC_STM32MP1) += protonic-stm32mp1/ obj-$(CONFIG_MACH_QIL_A9260) += qil-a926x/ obj-$(CONFIG_MACH_QIL_A9G20) += qil-a926x/ @@ -124,13 +121,16 @@ obj-$(CONFIG_MACH_SABRELITE) += freescale-mx6-sabrelite/ obj-$(CONFIG_MACH_SABRESD) += freescale-mx6-sabresd/ obj-$(CONFIG_MACH_AC_SXB) += ac-sxb/ obj-$(CONFIG_MACH_SKOV_IMX6) += skov-imx6/ +obj-$(CONFIG_MACH_SKOV_IMX8MP) += skov-imx8mp/ obj-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += freescale-mx6sx-sabresdb/ obj-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += sama5d27-giantboard/ obj-$(CONFIG_MACH_SAMA5D27_SOM1) += sama5d27-som1/ obj-$(CONFIG_MACH_SAMA5D3XEK) += sama5d3xek/ obj-$(CONFIG_MACH_SAMA5D3_XPLAINED) += sama5d3_xplained/ obj-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += microchip-ksz9477-evb/ +obj-$(CONFIG_MACH_MICROCHIP_SAMA5D3_EDS) += microchip-sama5d3-eds/ obj-$(CONFIG_MACH_SAMA5D4_XPLAINED) += sama5d4_xplained/ +obj-$(CONFIG_MACH_SAMA5D4_WIFX) += sama5d4_wifx/ obj-$(CONFIG_MACH_SAMA5D4EK) += sama5d4ek/ obj-$(CONFIG_MACH_SCB9328) += scb9328/ obj-$(CONFIG_MACH_SEEED_ODYSSEY) += seeed-odyssey/ @@ -175,10 +175,12 @@ obj-$(CONFIG_MACH_VIRT2REAL) += virt2real/ obj-$(CONFIG_MACH_ZEDBOARD) += avnet-zedboard/ obj-$(CONFIG_MACH_ZYLONITE) += zylonite/ obj-$(CONFIG_MACH_VARISCITE_MX6) += variscite-mx6/ +obj-$(CONFIG_MACH_VARISCITE_SOM_MX7) += variscite-som-mx7/ obj-$(CONFIG_MACH_VSCOM_BALTOS) += vscom-baltos/ obj-$(CONFIG_MACH_WARP7) += element14-warp7/ obj-$(CONFIG_MACH_WEBASTO_CCBV2) += webasto-ccbv2/ obj-$(CONFIG_MACH_VF610_TWR) += freescale-vf610-twr/ +obj-$(CONFIG_MACH_XILINX_ZCU102) += xilinx-zcu102/ obj-$(CONFIG_MACH_XILINX_ZCU104) += xilinx-zcu104/ obj-$(CONFIG_MACH_XILINX_ZCU106) += xilinx-zcu106/ obj-$(CONFIG_MACH_ZII_COMMON) += zii-common/ @@ -188,11 +190,18 @@ obj-$(CONFIG_MACH_ZII_IMX8MQ_DEV) += zii-imx8mq-dev/ obj-$(CONFIG_MACH_ZII_VF610_DEV) += zii-vf610-dev/ obj-$(CONFIG_MACH_ZII_IMX7D_DEV) += zii-imx7d-dev/ obj-$(CONFIG_MACH_WAGO_PFC_AM35XX) += wago-pfc-am35xx/ +obj-$(CONFIG_MACH_LS1028ARDB) += ls1028ardb/ obj-$(CONFIG_MACH_LS1046ARDB) += ls1046ardb/ obj-$(CONFIG_MACH_TQMLS1046A) += tqmls1046a/ +obj-$(CONFIG_MACH_LS1021AIOT) += ls1021aiot/ obj-$(CONFIG_MACH_MNT_REFORM) += mnt-reform/ obj-$(CONFIG_MACH_SKOV_ARM9CPU) += skov-arm9cpu/ obj-$(CONFIG_MACH_RK3568_EVB) += rockchip-rk3568-evb/ obj-$(CONFIG_MACH_RK3568_BPI_R2PRO) += rockchip-rk3568-bpi-r2pro/ obj-$(CONFIG_MACH_PINE64_QUARTZ64) += pine64-quartz64/ obj-$(CONFIG_MACH_RADXA_ROCK3) += radxa-rock3/ +obj-$(CONFIG_MACH_RADXA_ROCK5) += radxa-rock5/ +obj-$(CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP) += variscite-dt8mcustomboard-imx8mp/ +obj-$(CONFIG_MACH_RADXA_CM3) += radxa-cm3/ +obj-$(CONFIG_MACH_TQMA93XX) += tqma93xx/ +obj-$(CONFIG_MACH_WOLFVISION_PF5) += wolfvision-pf5/ diff --git a/arch/arm/boards/a9m2410/Makefile b/arch/arm/boards/a9m2410/Makefile deleted file mode 100644 index 6c53eafae2..0000000000 --- a/arch/arm/boards/a9m2410/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -lwl-y += lowlevel_init.o -obj-y += a9m2410.o diff --git a/arch/arm/boards/a9m2410/a9m2410.c b/arch/arm/boards/a9m2410/a9m2410.c deleted file mode 100644 index ef727f664d..0000000000 --- a/arch/arm/boards/a9m2410/a9m2410.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2009 Juergen Beisert, Pengutronix - -#include <common.h> -#include <driver.h> -#include <init.h> -#include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <asm/sections.h> -#include <partition.h> -#include <nand.h> -#include <io.h> -#include <mach/devices-s3c24xx.h> -#include <mach/s3c-iomap.h> -#include <mach/s3c24xx-nand.h> -#include <mach/s3c-generic.h> -#include <mach/s3c-busctl.h> -#include <mach/s3c24xx-gpio.h> - -// {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0}, -static struct s3c24x0_nand_platform_data nand_info = { - .nand_timing = CALC_NFCONF_TIMING(A9M2410_TACLS, A9M2410_TWRPH0, A9M2410_TWRPH1) -}; - -static int a9m2410_mem_init(void) -{ - resource_size_t size; - - /* - * Note: On this card the second SDRAM page is not used - */ - s3c24xx_disable_second_sdram_bank(); - size = s3c24xx_get_memory_size(); - - /* ---------- configure the GPIOs ------------- */ - writel(0x007FFFFF, S3C_GPACON); - writel(0x00000000, S3C_GPCCON); - writel(0x00000000, S3C_GPCUP); - writel(0x00000000, S3C_GPDCON); - writel(0x00000000, S3C_GPDUP); - writel(0xAAAAAAAA, S3C_GPECON); - writel(0x0000E03F, S3C_GPEUP); - writel(0x00000000, S3C_GPBCON); /* all inputs */ - writel(0x00000007, S3C_GPBUP); /* pullup disabled for GPB0..3 */ - writel(0x00009000, S3C_GPFCON); /* GPF7 CLK_INT#, GPF6 Debug-LED */ - writel(0x000000FF, S3C_GPFUP); - writel(readl(S3C_GPGDAT) | 0x0010, S3C_GPGDAT); /* switch off LCD backlight */ - writel(0xFF00A938, S3C_GPGCON); /* switch off USB device */ - writel(0x0000F000, S3C_GPGUP); - writel(readl(S3C_GPHDAT) | 0x100, S3C_GPHDAT); /* switch BOOTINT/GPIO_ON# to high */ - writel(0x000007FF, S3C_GPHUP); - writel(0x0029FAAA, S3C_GPHCON); - /* - * USB port1 normal, USB port0 normal, USB1 pads for device - * PCLK output on CLKOUT0, UPLL CLK output on CLKOUT1, - * 2nd SDRAM bank off (only bank 1 is used) - */ - writel(0x40140, S3C_MISCCR); - - arm_add_mem_device("ram0", S3C_SDRAM_BASE, size); - - return 0; -} -mem_initcall(a9m2410_mem_init); - -static const struct devfs_partition a9m2410_nand0_partitions[] = { - { - .offset = 0, - .size = 0x40000, - .flags = DEVFS_PARTITION_FIXED, - .name = "self_raw", - .bbname = "self0", - }, { - .offset = DEVFS_PARTITION_APPEND, - .size = 0x20000, - .flags = DEVFS_PARTITION_FIXED, - .name = "env_raw", - .bbname = "env0", - }, { - /* sentinel */ - } -}; - -static int a9m2410_devices_init(void) -{ - uint32_t reg; - - /* ----------- configure the access to the outer space ---------- */ - reg = readl(S3C_BWSCON); - - /* CS#1 to access the network controller */ - reg &= ~0xf0; - reg |= 0xe0; - writel(0x1350, S3C_BANKCON1); - - /* CS#2 to the dual 16550 UART */ - reg &= ~0xf00; - reg |= 0x400; - writel(0x0d50, S3C_BANKCON2); - - writel(reg, S3C_BWSCON); - - /* release the reset signal to the network and UART device */ - reg = readl(S3C_MISCCR); - reg |= 0x10000; - writel(reg, S3C_MISCCR); - - /* ----------- the devices the boot loader should work with -------- */ - s3c24xx_add_nand(&nand_info); - /* - * SMSC 91C111 network controller on the baseboard - * connected to CS line 1 and interrupt line - * GPIO3, data width is 32 bit - */ - add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, S3C_CS1_BASE + 0x300, - 16, IORESOURCE_MEM, NULL); - - if (IS_ENABLED(CONFIG_NAND)) - devfs_create_partitions("nand0", a9m2410_nand0_partitions); - - armlinux_set_architecture(MACH_TYPE_A9M2410); - - return 0; -} - -device_initcall(a9m2410_devices_init); - -static int a9m2410_console_init(void) -{ - barebox_set_model("Digi A9M2410"); - barebox_set_hostname("a9m2410"); - - s3c24xx_add_uart1(); - return 0; -} - -console_initcall(a9m2410_console_init); diff --git a/arch/arm/boards/a9m2410/config.h b/arch/arm/boards/a9m2410/config.h deleted file mode 100644 index dbe4bb32cb..0000000000 --- a/arch/arm/boards/a9m2410/config.h +++ /dev/null @@ -1,109 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/** - * @file - * @brief Global defintions for the ARM S3C2410 based a9m2410 CPU card - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/** - * The external clock reference is a 12.0MHz crystal - */ -#define S3C24XX_CLOCK_REFERENCE 12000000 - -/** - * Define the main clock configuration to be used in register CLKDIVN - * - * We must limit the frequency of the connected SDRAMs with the clock ratio - * setup to 1:2:4. This will result into FCLK:HCLK:PCLK = 200Mhz:100MHz:50MHz - */ -#define BOARD_SPECIFIC_CLKDIVN 0x003 - -/** - * Define the MPLL configuration to be used in register MPLLCON - * - * We want the MPLL to run at 202.80MHz - */ -#define BOARD_SPECIFIC_MPLL ((0xA1 << 12) + (3 << 4) + 1) - -/** - * Define the UPLL configuration to be used in register UPLLCON - * - * We want the UPLL to run at 48.0MHz - */ -#define BOARD_SPECIFIC_UPLL ((0x78 << 12) + (2 << 4) + 3) - -/* - * SDRAM configuration for Samsung K4M563233E - * - 2M x 32Bit x 4 Banks Mobile SDRAM - * - 90 pin FBGA - * - CL2@100MHz - */ -/* - * SDRAM uses 32bit width - */ -#define BOARD_SPECIFIC_BWSCON ((0x02 << 24) + (0x02 << 28)) -/* - * 32MiB SDRAM in bank6 - * - MT = 11 (= sync dram type) - * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit columns) - */ -#define BOARD_SPECIFIC_BANKCON6 ((0x3 << 15) + (0x0 << 2) + 0x1) -/* - * No memory in bank7 - */ -#define BOARD_SPECIFIC_BANKCON7 ((0x3 << 15) + (0x0 << 2) + 0x1) -/* - * SDRAM refresh settings - * - REFEN = 1 (= refresh enabled) - * - TREFMD = 0 (= auto refresh) - * - Trp = 00 (= 2 RAS precharge clocks) - * - Tsrc = 01 (= 5 clocks -> row cycle time @100MHz 2+5=7 -> 70ns) - * - Refrsh = 2^11 + 1 - 100 * 15.6 = 2049 - 1560 = 489 - */ -#define BOARD_SPECIFIC_REFRESH ((0x1 << 23) + (0x0 << 22) + (0x0 << 20) + (0x1 << 18) + 489) -/* - * SDRAM banksize - * - BURST_EN = 1 (= burst mode enabled) - * - SCKE_EN = 1 (= SDRAM SCKE enabled) - * - SCLK_EN = 1 (= clock active only during accesses) - * - BK67MAP = 000 (= 32MiB) - */ -#define BOARD_SPECIFIC_BANKSIZE ((1 << 7) + (1 << 5) + (0 << 4) + 0) -/* - * SDRAM mode register bank6 - * CL = 010 (= 2 clocks) - */ -#define BOARD_SPECIFIC_MRSRB6 (0x2 << 4) -/* - * SDRAM mode register bank7 - * CL = 010 (= 2 clocks) - */ -#define BOARD_SPECIFIC_MRSRB7 (0x2 << 4) - -/* - * Flash access timings - * Tacls = 0ns (but 20ns data setup time) - * Twrph0 = 25ns (write) 35ns (read) - * Twrph1 = 10ns (10ns data hold time) - * Read cycle time = 50ns - * - * Assumed HCLK is 100MHz - * Tacls = 1 (-> 20ns) - * Twrph0 = 3 (-> 40ns) - * Twrph1 = 1 (-> 20ns) - * Cycle time = 80ns - */ -#define A9M2410_TACLS 1 -#define A9M2410_TWRPH0 3 -#define A9M2410_TWRPH1 1 - -/* needed in the generic NAND boot code only */ -#ifdef CONFIG_S3C_NAND_BOOT -# define BOARD_DEFAULT_NAND_TIMING CALC_NFCONF_TIMING(A9M2410_TACLS, A9M2410_TWRPH0, A9M2410_TWRPH1) -#endif - -#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/a9m2410/env/bin/_update b/arch/arm/boards/a9m2410/env/bin/_update deleted file mode 100644 index 014bce3512..0000000000 --- a/arch/arm/boards/a9m2410/env/bin/_update +++ /dev/null @@ -1,36 +0,0 @@ -#!/bin/sh - -if [ -z "$part" -o -z "$image" ]; then - echo "define \$part and \$image" - exit 1 -fi - -if [ ! -e "$part" ]; then - echo "Partition $part does not exist" - exit 1 -fi - -if [ $# = 1 ]; then - image=$1 -fi - -if [ x$ip = xdhcp ]; then - dhcp -fi - -ping $eth0.serverip -if [ $? -ne 0 ] ; then - echo "update aborted" - exit 1 -fi - -unprotect $part - -echo -echo "erasing partition $part" -erase $part - -echo -echo "flashing $image to $part" -echo -tftp $image $part diff --git a/arch/arm/boards/a9m2410/env/bin/boot b/arch/arm/boards/a9m2410/env/bin/boot deleted file mode 100644 index 59fa60e4e9..0000000000 --- a/arch/arm/boards/a9m2410/env/bin/boot +++ /dev/null @@ -1,38 +0,0 @@ -#!/bin/sh - -. /env/config - -if [ x$1 = xnand ]; then - root=nand - kernel=nand -fi - -if [ x$1 = xnet ]; then - root=net - kernel=net -fi - -if [ x$ip = xdhcp ]; then - bootargs="$bootargs ip=dhcp" -else - bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::" -fi - -if [ x$root = xnand ]; then - bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2" -else - bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp" -fi - -bootargs="$bootargs mtdparts=\"NAND 32MiB 3,3V 8-bit:$nand_parts\"" - -if [ x$kernel = xnet ]; then - if [ x$ip = xdhcp ]; then - dhcp - fi - tftp $uimage uImage || exit 1 - bootm uImage -else - bootm /dev/nand0.kernel.bb -fi - diff --git a/arch/arm/boards/a9m2410/env/bin/init b/arch/arm/boards/a9m2410/env/bin/init deleted file mode 100644 index dd94ef6be0..0000000000 --- a/arch/arm/boards/a9m2410/env/bin/init +++ /dev/null @@ -1,30 +0,0 @@ -#!/bin/sh - -PATH=/env/bin -export PATH - -. /env/config - -if [ -e /dev/nand0 ]; then - addpart /dev/nand0 $nand_parts -fi - -if [ -z $eth0.ethaddr ]; then - while [ -z $eth0.ethaddr ]; do - readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr - done - echo -a /env/config "eth0.ethaddr=$eth0.ethaddr" -fi - -echo -echo -n "Hit any key to stop autoboot: " -timeout -a $autoboot_timeout -if [ $? != 0 ]; then - echo - echo "type update_kernel [<imagename>] to update kernel into flash" - echo "type update_root [<imagename>] to update rootfs into flash" - echo - exit -fi - -boot diff --git a/arch/arm/boards/a9m2410/env/bin/update_kernel b/arch/arm/boards/a9m2410/env/bin/update_kernel deleted file mode 100644 index c43a55785b..0000000000 --- a/arch/arm/boards/a9m2410/env/bin/update_kernel +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/sh - -. /env/config - -part=/dev/nand0.kernel.bb - -if [ x$1 = x ]; then - image=$uimage -else - image=$1 -fi - -. /env/bin/_update $image diff --git a/arch/arm/boards/a9m2410/env/bin/update_root b/arch/arm/boards/a9m2410/env/bin/update_root deleted file mode 100644 index 34139e5dce..0000000000 --- a/arch/arm/boards/a9m2410/env/bin/update_root +++ /dev/null @@ -1,11 +0,0 @@ -#!/bin/sh - -. /env/config - -if [ x$1 = x ]; then - image=$jffs2 -else - image=$1 -fi - -. /env/bin/_update $image diff --git a/arch/arm/boards/a9m2410/env/config b/arch/arm/boards/a9m2410/env/config deleted file mode 100644 index 2b09318934..0000000000 --- a/arch/arm/boards/a9m2410/env/config +++ /dev/null @@ -1,26 +0,0 @@ -#!/bin/sh - -# can be either 'net' or 'nand'' -kernel=net -root=net - -uimage=uImage-a9m2410 -jffs2=root-a9m2410.jffs2 - -autoboot_timeout=3 - -nfsroot="/nfsexport/OSELAS.BSP-Hesch-TMU-1/platform-FS_A9M2410/root" -bootargs="console=ttySAC0,38400" - -nand_parts="256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)" -rootpart_nand="/dev/mtdblock3" - -# use 'dhcp' to do dhcp in barebox and in kernel -#ip=dhcp - -# or set your networking parameters here -eth0.ipaddr=192.168.42.31 -eth0.netmask=255.255.0.0 -eth0.gateway=192.168.23.1 -eth0.serverip=192.168.23.2 -#eth0.ethaddr= diff --git a/arch/arm/boards/a9m2410/lowlevel_init.S b/arch/arm/boards/a9m2410/lowlevel_init.S deleted file mode 100644 index 4c949b1efa..0000000000 --- a/arch/arm/boards/a9m2410/lowlevel_init.S +++ /dev/null @@ -1,39 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <config.h> -#include <linux/sizes.h> -#include <mach/s3c-iomap.h> -#include <asm/barebox-arm-head.h> - - .section ".text_bare_init.barebox_arm_reset_vector","ax" - -.globl barebox_arm_reset_vector -barebox_arm_reset_vector: - - bl arm_cpu_lowlevel_init - - bl s3c24x0_disable_wd - - /* skip everything here if we are already running from SDRAM */ - cmp pc, #S3C_SDRAM_BASE - blo 1f - cmp pc, #S3C_SDRAM_END - bhs 1f - - b out - -/* we are running from NOR or NAND/SRAM memory. Do further initialisation */ -1: - bl s3c24x0_pll_init - - bl s3c24x0_sdram_init - -#ifdef CONFIG_S3C_NAND_BOOT -/* up to here we are running from the internal SRAM area */ - bl s3c24x0_nand_boot -#endif -out: - mov r0, #S3C_SDRAM_BASE - mov r1, #SZ_32M - mov r2, #0 - b barebox_arm_entry diff --git a/arch/arm/boards/a9m2440/Makefile b/arch/arm/boards/a9m2440/Makefile deleted file mode 100644 index e32c0aca64..0000000000 --- a/arch/arm/boards/a9m2440/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -lwl-y += lowlevel_init.o -obj-y += a9m2440.o -obj-$(CONFIG_MACH_A9M2410DEV) += a9m2410dev.o diff --git a/arch/arm/boards/a9m2440/a9m2410dev.c b/arch/arm/boards/a9m2440/a9m2410dev.c deleted file mode 100644 index 627a8c6158..0000000000 --- a/arch/arm/boards/a9m2440/a9m2410dev.c +++ /dev/null @@ -1,82 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2009 Juergen Beisert - -/** - * @file - * @brief a9m2410dev Baseboad specific initialization routines - * - */ - -#include <common.h> -#include <driver.h> -#include <init.h> -#include <io.h> -#include <mach/s3c-iomap.h> -#include <mach/s3c-busctl.h> -#include <mach/s3c24xx-gpio.h> - -#include "baseboards.h" - -/** - * Initialize the CPU to be able to work with the a9m2410dev evaluation board - */ -int a9m2410dev_devices_init(void) -{ - unsigned int reg; - - /* ---------- configure the GPIOs ------------- */ - writel(0x007FFFFF, S3C_GPACON); - writel(0x00000000, S3C_GPCCON); - writel(0x00000000, S3C_GPCUP); - writel(0x00000000, S3C_GPDCON); - writel(0x00000000, S3C_GPDUP); - writel(0xAAAAAAAA, S3C_GPECON); - writel(0x0000E03F, S3C_GPEUP); - writel(0x00000000, S3C_GPBCON); /* all inputs */ - writel(0x00000007, S3C_GPBUP); /* pullup disabled for GPB0..3 */ - writel(0x00009000, S3C_GPFCON); /* GPF7 CLK_INT#, GPF6 Debug-LED */ - writel(0x000000FF, S3C_GPFUP); - writel(readl(S3C_GPGDAT) | 0x1010, S3C_GPGDAT); /* switch off IDLE_SW#, switch off LCD backlight */ - writel(0x0100A93A, S3C_GPGCON); /* switch on USB device */ - writel(0x0000F000, S3C_GPGUP); - writel(0x0029FAAA, S3C_GPHCON); - - writel((1 << 12) | (0 << 11), S3C_GPJDAT); - writel(0x0016aaaa, S3C_GPJCON); - writel(~((0<<12)| (1<<11)), S3C_GPJUP); - - writel((0 << 12) | (0 << 11), S3C_GPJDAT); - writel(0x0016aaaa, S3C_GPJCON); - writel(0x00001fff, S3C_GPJUP); - - writel(0x00000000, S3C_DSC0); - writel(0x00000000, S3C_DSC1); - - /* - * USB port1 normal, USB port0 normal, USB1 pads for device - * PCLK output on CLKOUT0, UPLL CLK output on CLKOUT1, - */ - writel((readl(S3C_MISCCR) & ~0xFFFF) | 0x0140, S3C_MISCCR); - - /* ----------- configure the access to the outer space ---------- */ - reg = readl(S3C_BWSCON); - - /* CS#1 to access the network controller */ - reg &= ~0xf0; - reg |= 0xe0; - writel(0x1350, S3C_BANKCON1); - - /* CS#2 to the dual 16550 UART */ - reg &= ~0xf00; - reg |= 0x400; - writel(0x0d50, S3C_BANKCON2); - - writel(reg, S3C_BWSCON); - - /* release the reset signal to the network and UART device */ - reg = readl(S3C_MISCCR); - reg |= 0x10000; - writel(reg, S3C_MISCCR); - - return 0; -} diff --git a/arch/arm/boards/a9m2440/a9m2440.c b/arch/arm/boards/a9m2440/a9m2440.c deleted file mode 100644 index de18ea0120..0000000000 --- a/arch/arm/boards/a9m2440/a9m2440.c +++ /dev/null @@ -1,144 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2009 Juergen Beisert, Pengutronix - -#include <common.h> -#include <driver.h> -#include <init.h> -#include <asm/armlinux.h> -#include <asm/sections.h> -#include <generated/mach-types.h> -#include <partition.h> -#include <nand.h> -#include <io.h> -#include <mach/devices-s3c24xx.h> -#include <mach/s3c-iomap.h> -#include <mach/s3c24xx-nand.h> -#include <mach/s3c-generic.h> -#include <mach/s3c-busctl.h> -#include <mach/s3c24xx-gpio.h> - -#include "baseboards.h" - -static struct s3c24x0_nand_platform_data nand_info = { - .nand_timing = CALC_NFCONF_TIMING(A9M2440_TACLS, A9M2440_TWRPH0, A9M2440_TWRPH1) -}; - -static int a9m2440_check_for_ram(uint32_t addr) -{ - uint32_t tmp1, tmp2; - int rc = 0; - - tmp1 = readl(addr); - tmp2 = readl(addr + sizeof(uint32_t)); - - writel(0xaaaaaaaa, addr); - writel(0x55555555, addr + sizeof(uint32_t)); - if ((readl(addr) != 0xaaaaaaaa) || (readl(addr + sizeof(uint32_t)) != 0x55555555)) - rc = 1; /* seems no RAM */ - - writel(0x55555555, addr); - writel(0xaaaaaaaa, addr + sizeof(uint32_t)); - if ((readl(addr) != 0x55555555) || (readl(addr + sizeof(uint32_t)) != 0xaaaaaaaa)) - rc = 1; /* seems no RAM */ - - writel(tmp1, addr); - writel(tmp2, addr + sizeof(uint32_t)); - - return rc; -} - -static int a9m2440_mem_init(void) -{ - /* - * The special SDRAM setup code for this machine will always enable - * both SDRAM banks. But the second SDRAM device may not exists! - * So we must check here, if the second bank is populated to get the - * correct RAM size. - */ - switch (readl(S3C_BANKSIZE) & 0x7) { - case 0: - if (a9m2440_check_for_ram(S3C_SDRAM_BASE + 32 * 1024 * 1024)) - s3c24xx_disable_second_sdram_bank(); - break; - case 1: - if (a9m2440_check_for_ram(S3C_SDRAM_BASE + 64 * 1024 * 1024)) - s3c24xx_disable_second_sdram_bank(); - break; - case 2: - if (a9m2440_check_for_ram(S3C_SDRAM_BASE + 128 * 1024 * 1024)) - s3c24xx_disable_second_sdram_bank(); - break; - case 4: - case 5: - case 6: /* not supported on this machine */ - break; - default: - if (a9m2440_check_for_ram(S3C_SDRAM_BASE + 16 * 1024 * 1024)) - s3c24xx_disable_second_sdram_bank(); - break; - } - - arm_add_mem_device("ram0", S3C_SDRAM_BASE, s3c24xx_get_memory_size()); - - return 0; -} -mem_initcall(a9m2440_mem_init); - -static int a9m2440_devices_init(void) -{ - uint32_t reg; - - /* ----------- configure the access to the outer space ---------- */ - reg = readl(S3C_BWSCON); - - /* CS#5 to access the network controller */ - reg &= ~0x00f00000; - reg |= 0x00d00000; /* 16 bit */ - writel(0x1f4c, S3C_BANKCON5); - - writel(reg, S3C_BWSCON); - -#ifdef CONFIG_MACH_A9M2410DEV - a9m2410dev_devices_init(); -#endif - - /* release the reset signal to external devices */ - reg = readl(S3C_MISCCR); - reg |= 0x10000; - writel(reg, S3C_MISCCR); - - /* ----------- the devices the boot loader should work with -------- */ - s3c24xx_add_nand(&nand_info); - /* - * cs8900 network controller onboard - * Connected to CS line 5 + A24 and interrupt line EINT9, - * data width is 16 bit - */ - add_generic_device("cs8900", DEVICE_ID_DYNAMIC, NULL, - S3C_CS5_BASE + (1 << 24) + 0x300, 16, IORESOURCE_MEM, NULL); - -#ifdef CONFIG_NAND - /* ----------- add some vital partitions -------- */ - devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - - devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); -#endif - armlinux_set_architecture(MACH_TYPE_A9M2440); - - return 0; -} - -device_initcall(a9m2440_devices_init); - -static int a9m2440_console_init(void) -{ - barebox_set_model("Digi A9M2440"); - barebox_set_hostname("a9m2440"); - - s3c24xx_add_uart1(); - return 0; -} - -console_initcall(a9m2440_console_init); diff --git a/arch/arm/boards/a9m2440/baseboards.h b/arch/arm/boards/a9m2440/baseboards.h deleted file mode 100644 index be4ae65e82..0000000000 --- a/arch/arm/boards/a9m2440/baseboards.h +++ /dev/null @@ -1,6 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2009 Juergen Beisert - -#ifdef CONFIG_MACH_A9M2410DEV -extern int a9m2410dev_devices_init(void); -#endif diff --git a/arch/arm/boards/a9m2440/config.h b/arch/arm/boards/a9m2440/config.h deleted file mode 100644 index c22ff53036..0000000000 --- a/arch/arm/boards/a9m2440/config.h +++ /dev/null @@ -1,60 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/** - * @file - * @brief Global defintions for the ARM S3C2440 based a9m2440 CPU card - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/** - * The external clock reference is a 16.9344 MHz crystal - */ -#define S3C24XX_CLOCK_REFERENCE 16934400 - -/** - * Define the main clock configuration to be used in register CLKDIVN - * - * We must limit the frequency of the connected SDRAMs with the clock ratio - * setup to 1:4:8. This will result into FCLK:HCLK:PCLK = 400Mhz:100MHz:50MHz - */ -#define BOARD_SPECIFIC_CLKDIVN 0x05 - -/** - * Define the MPLL configuration to be used in register MPLLCON - * - * We want the MPLL to run at 399.65 MHz - */ -#define BOARD_SPECIFIC_MPLL ((0x6e << 12) + (3 << 4) + 1) - -/** - * Define the UPLL configuration to be used in register UPLLCON - * - * We want the UPLL to run at 47.98 MHz - */ -#define BOARD_SPECIFIC_UPLL ((0x3c << 12) + (4 << 4) + 2) - -/* - * Flash access timings - * Tacls = 0ns (but 20ns data setup time) - * Twrph0 = 25ns (write) 35ns (read) - * Twrph1 = 10ns (10ns data hold time) - * Read cycle time = 50ns - * - * Assumed HCLK is 100MHz - * Tacls = 1 (-> 20ns) - * Twrph0 = 3 (-> 40ns) - * Twrph1 = 1 (-> 20ns) - * Cycle time = 80ns - */ -#define A9M2440_TACLS 1 -#define A9M2440_TWRPH0 3 -#define A9M2440_TWRPH1 1 - -/* needed in the generic NAND boot code only */ -#ifdef CONFIG_S3C_NAND_BOOT -# define BOARD_DEFAULT_NAND_TIMING CALC_NFCONF_TIMING(A9M2440_TACLS, A9M2440_TWRPH0, A9M2440_TWRPH1) -#endif - -#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/a9m2440/env/bin/_update b/arch/arm/boards/a9m2440/env/bin/_update deleted file mode 100644 index b10682ece4..0000000000 --- a/arch/arm/boards/a9m2440/env/bin/_update +++ /dev/null @@ -1,34 +0,0 @@ -#!/bin/sh - -if [ -z "$part" -o -z "$image" ]; then - echo "define \$part and \$image" - exit 1 -fi - -if [ ! -e "$part" ]; then - echo "Partition $part does not exist" - exit 1 -fi - -if [ $# = 1 ]; then - image=$1 -fi - -if [ x$ip = xdhcp ]; then - dhcp -fi - -ping $eth0.serverip -if [ $? -ne 0 ] ; then - echo "update aborted" - exit 1 -fi - -echo -echo "erasing partition $part" -erase $part - -echo -echo "flashing $image to $part" -echo -tftp $image $part diff --git a/arch/arm/boards/a9m2440/env/bin/boot b/arch/arm/boards/a9m2440/env/bin/boot deleted file mode 100644 index 86e22cf9ff..0000000000 --- a/arch/arm/boards/a9m2440/env/bin/boot +++ /dev/null @@ -1,40 +0,0 @@ -#!/bin/sh - -. /env/config - -if [ x$1 = xnand ]; then - root=nand - kernel=nand -fi - -if [ x$1 = xnet ]; then - root=net - kernel=net -fi - -if [ x$root = xnand ]; then - bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2" -fi -if [ x$root = xnet ]; then - bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp" - if [ x$ip = xdhcp ]; then - bootargs="$bootargs ip=dhcp" - else - bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::" - fi -fi - -bootargs="$bootargs mtdparts=\"NAND 32MiB 3,3V 8-bit:$nand_parts\"" - -bootargs="$bootargs cs89x0_media=rj45 cs89x0_mac=$eth0.ethaddr" - -if [ x$kernel = xnet ]; then - if [ x$ip = xdhcp ]; then - dhcp - fi - tftp $uimage uImage || exit 1 - bootm uImage -else - bootm /dev/nand0.kernel.bb -fi - diff --git a/arch/arm/boards/a9m2440/env/bin/init b/arch/arm/boards/a9m2440/env/bin/init deleted file mode 100644 index dd94ef6be0..0000000000 --- a/arch/arm/boards/a9m2440/env/bin/init +++ /dev/null @@ -1,30 +0,0 @@ -#!/bin/sh - -PATH=/env/bin -export PATH - -. /env/config - -if [ -e /dev/nand0 ]; then - addpart /dev/nand0 $nand_parts -fi - -if [ -z $eth0.ethaddr ]; then - while [ -z $eth0.ethaddr ]; do - readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr - done - echo -a /env/config "eth0.ethaddr=$eth0.ethaddr" -fi - -echo -echo -n "Hit any key to stop autoboot: " -timeout -a $autoboot_timeout -if [ $? != 0 ]; then - echo - echo "type update_kernel [<imagename>] to update kernel into flash" - echo "type update_root [<imagename>] to update rootfs into flash" - echo - exit -fi - -boot diff --git a/arch/arm/boards/a9m2440/env/bin/update_kernel b/arch/arm/boards/a9m2440/env/bin/update_kernel deleted file mode 100644 index c43a55785b..0000000000 --- a/arch/arm/boards/a9m2440/env/bin/update_kernel +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/sh - -. /env/config - -part=/dev/nand0.kernel.bb - -if [ x$1 = x ]; then - image=$uimage -else - image=$1 -fi - -. /env/bin/_update $image diff --git a/arch/arm/boards/a9m2440/env/bin/update_root b/arch/arm/boards/a9m2440/env/bin/update_root deleted file mode 100644 index 46cbca5beb..0000000000 --- a/arch/arm/boards/a9m2440/env/bin/update_root +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/sh - -. /env/config - -part=/dev/nand0.root.bb - -if [ x$1 = x ]; then - image=$jffs2 -else - image=$1 -fi - -. /env/bin/_update $image diff --git a/arch/arm/boards/a9m2440/env/config b/arch/arm/boards/a9m2440/env/config deleted file mode 100644 index d1fb01b731..0000000000 --- a/arch/arm/boards/a9m2440/env/config +++ /dev/null @@ -1,26 +0,0 @@ -#!/bin/sh - -# can be either 'net' or 'nand'' -kernel=net -root=net - -uimage=uImage-a9m2440 -jffs2=root-a9m2440.jffs2 - -autoboot_timeout=3 - -nfsroot="/nfsexport/OSELAS.BSP-Hesch-TMU-1/platform-FS_A9M2440/root" -bootargs="console=ttySAC0,38400" - -nand_parts="256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)" -rootpart_nand="/dev/mtdblock3" - -# use 'dhcp' to do dhcp in barebox and in kernel -#ip=dhcp - -# or set your networking parameters here -eth0.ipaddr=192.168.42.32 -eth0.netmask=255.255.0.0 -eth0.gateway=192.168.23.1 -eth0.serverip=192.168.23.2 -#eth0.ethaddr= diff --git a/arch/arm/boards/a9m2440/lowlevel_init.S b/arch/arm/boards/a9m2440/lowlevel_init.S deleted file mode 100644 index 585863f9d4..0000000000 --- a/arch/arm/boards/a9m2440/lowlevel_init.S +++ /dev/null @@ -1,243 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <config.h> -#include <linux/sizes.h> -#include <mach/s3c-iomap.h> -#include <mach/s3c24xx-gpio.h> -#include <asm/barebox-arm-head.h> - - .section ".text_bare_init.barebox_arm_reset_vector","ax" - -/* - * To be able to setup the SDRAM interface correctly, we need some - * external information about the connected SDRAM devices. - * - * When we set GPH8, we can read at GPB: - * Bit 0..1: Memory device size -> 00=16M, 01=64M, 10=32M, 11=128M - * Bit 2: CL setting - * - * Some remarks: The CL setting seems useless. It always signals a CL3 - * requirement, but the SDRAM types I found on the cards are supporting - * CL2 @ 100 MHz. But also these SDRAM types are only support 105 MHz max. - * So, we never need CL3 because we can't run the CPU at 533 MHz (which - * implies an 133 MHz SDRAM clock). - * All devices are connected via 32 bit databus - * - * Note: I was able to check the 32 MiB and 64 MiB configuration only. I didn't - * had access to a 16 MiB nor 128 MiB config. - * - */ - -sdram_init: - /* - * Read the configuration. After reset until any GPIO port is - * configured yet, these pins show external settings, to detect - * the SDRAM size. - */ - ldr r1, =S3C_GPBDAT - ldr r4, [r1] - and r4, r4, #0x3 - - ldr r1, =S3C_MEMCTL_BASE - /* configure both SDRAM areas with 32 bit data bus width */ - ldr r0, =((0x2 << 24) + (0x2 << 28)) - str r0, [r1], #0x1c /* post add register offset for bank6 */ - - /* - * With the configuration we simply need to calculate an offset into - * our table with the predefined SDRAM settings - */ - adr r0, SDRAMDATA - mov r2, #6*4 /* # of bytes per table entry */ - mul r3, r4, r2 - add r0, r0, r3 /* start address of the entry */ - - /* - * store the table entry data into the registers - */ -1: - ldr r3, [r0], #4 - str r3, [r1], #4 - subs r2, r2, #4 - bne 1b - -/* TODO: Check if the second bank is populated, and switch it off if not */ - - mov pc, lr - -/* - * we need 4 sets of memory settings per main CPU clock speed - * - * 400MHz main speed: - * - 16 MiB in the first bank, maybe 16 MiB in the second bank (untested!) - * - 32 MiB in the first bank, maybe 32 MiB in the second bank (CL=2) - * - 64 MiB in the first bank, maybe 64 MiB in the second bank (CL=2) - * - 128 MiB in the first bank, maybe 128 MiB in the second bank (untested!) - * - * Note: SDRAM clock runs at 100MHz - */ - -SDRAMDATA: -/* --------------------------- 16 MiB @ 100MHz --------------------------- */ - /* - * - MT = 11 (= sync dram type) - * - Trcd = 01 (= CL3) - * - SCAN = 00 (= 8 bit columns) - */ - .word ((0x3 << 15) + (0x1 << 2) + (0x0)) - .word ((0x3 << 15) + (0x1 << 2) + (0x0)) - /* - * SDRAM refresh settings - * - REFEN = 1 (= refresh enabled) - * - TREFMD = 0 (= auto refresh) - * - Trp = 00 (= 2 RAS precharge clocks) - * - Tsrc = 11 (= 7 clocks -> row cycle time @100MHz 2+5=7 -> 70ns) - * - Refrsh = 2^11 + 1 - 100 * 15.6 = 2049 - 1560 = FIXME - */ - .word ((0x1 << 23) + (0x0 << 22) + (0x0 << 20) + (0x3 << 18) + 468) - /* - * SDRAM banksize - * - BURST_EN = 0 (= burst mode disabled) - * - SCKE_EN = 1 (= SDRAM SCKE enabled) - * - SCLK_EN = 1 (= clock active only during accesses) - * - BK67MAP = 010 (= 128MiB) FIXME????? - */ - .word ((0 << 7) + (1 << 5) + (1 << 4) + 2) - /* - * SDRAM mode register - * CL = 010 (= 2 clocks) - */ - .word (0x2 << 4) - .word (0x2 << 4) - -/* ------------- one or two banks with 64 MiB @ 100MHz -------------------- */ - - /* - * - MT = 11 (= sync dram type) - * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit columns) - */ - .word ((0x3 << 15) + (0x0 << 2) + (0x1)) - .word ((0x3 << 15) + (0x0 << 2) + (0x1)) - /* - * SDRAM refresh settings - * - REFEN = 1 (= refresh enabled) - * - TREFMD = 0 (= auto refresh) - * - Trp = 00 (= 2 RAS precharge clocks) - * - Tsrc = 01 (= 5 clocks -> row cycle time @100MHz 2+5=7 -> 70ns) - * - Refrsh = 2^11 + 1 - 100 * 15.6 = 2049 - 1560 = 489 - */ - .word ((0x1 << 23) + (0x0 << 22) + (0x0 << 20) + (0x1 << 18) + 489) - /* - * SDRAM banksize - * - BURST_EN = 1 (= burst mode enabled) - * - SCKE_EN = 1 (= SDRAM SCKE enabled) - * - SCLK_EN = 1 (= clock active only during accesses) - * - BK67MAP = 001 (= 64 MiB) - */ - .word ((1 << 7) + (1 << 5) + (1 << 4) + 1) - /* - * SDRAM mode register - * CL = 010 (= 2 clocks) - */ - .word (0x2 << 4) - .word (0x2 << 4) - -/* ------------- one or two banks with 32 MiB @ 100MHz -------------------- */ - - /* - * - MT = 11 (= sync dram type) - * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit columns) - */ - .word ((0x3 << 15) + (0x0 << 2) + (0x1)) - .word ((0x3 << 15) + (0x0 << 2) + (0x1)) - /* - * SDRAM refresh settings - * - REFEN = 1 (= refresh enabled) - * - TREFMD = 0 (= auto refresh) - * - Trp = 00 (= 2 RAS precharge clocks) - * - Tsrc = 01 (= 5 clocks -> row cycle time @100MHz 2+5=7 -> 70ns) - * - Refrsh = 2^11 + 1 - 100 * 15.6 = 2049 - 1560 = 489 - */ - .word ((0x1 << 23) + (0x0 << 22) + (0x0 << 20) + (0x1 << 18) + 489) - /* - * SDRAM banksize - * - BURST_EN = 1 (= burst mode enabled) - * - SCKE_EN = 1 (= SDRAM SCKE enabled) - * - SCLK_EN = 1 (= clock active only during accesses) - * - BK67MAP = 000 (= 32 MiB) - */ - .word ((1 << 7) + (1 << 5) + (1 << 4) + 0) - /* - * SDRAM mode register - * CL = 010 (= 2 clocks) - */ - .word (0x2 << 4) - .word (0x2 << 4) - -/* ------------ one or two banks with 128 MiB @ 100MHz -------------------- */ - - /* - * - MT = 11 (= sync dram type) - * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit columns) - */ - .word ((0x3 << 15) + (0x0 << 2) + (0x1)) - .word ((0x3 << 15) + (0x0 << 2) + (0x1)) - /* - * SDRAM refresh settings - * - REFEN = 1 (= refresh enabled) - * - TREFMD = 0 (= auto refresh) - * - Trp = 00 (= 2 RAS precharge clocks) - * - Tsrc = 01 (= 5 clocks -> row cycle time @100MHz 2+5=7 -> 70ns) - * - Refrsh = 2^11 + 1 - 100 * 7.5 = 2049 - FIXME = 1259 - */ - .word ((0x1 << 23) + (0x0 << 22) + (0x1 << 20) + (0x3 << 18) + 1259) - /* - * SDRAM banksize - * - BURST_EN = 0 (= burst mode disabled) - * - SCKE_EN = 1 (= SDRAM SCKE enabled) - * - SCLK_EN = 1 (= clock active only during accesses) - * - BK67MAP = 010 (= 128MiB) - */ - .word (0x32) - /* - * SDRAM mode register - * CL = 010 (= 2 clocks) - */ - .word (0x2 << 4) - .word (0x2 << 4) - -/* ------------------------------------------------------------------------ */ - -.globl barebox_arm_reset_vector -barebox_arm_reset_vector: - - bl arm_cpu_lowlevel_init - - bl s3c24x0_disable_wd - - /* skip everything here if we are already running from SDRAM */ - cmp pc, #S3C_SDRAM_BASE - blo 1f - cmp pc, #S3C_SDRAM_END - bhs 1f - - b out - -/* we are running from NOR or NAND/SRAM memory. Do further initialisation */ -1: - bl s3c24x0_pll_init - - bl sdram_init - -#ifdef CONFIG_S3C_NAND_BOOT -/* up to here we are running from the internal SRAM area */ - bl s3c24x0_nand_boot -#endif -out: - mov r0, #S3C_SDRAM_BASE - mov r1, #SZ_32M - mov r2, #0 - b barebox_arm_entry diff --git a/arch/arm/boards/ac-sxb/board.c b/arch/arm/boards/ac-sxb/board.c index 3ea40dfb7d..d631bb543a 100644 --- a/arch/arm/boards/ac-sxb/board.c +++ b/arch/arm/boards/ac-sxb/board.c @@ -6,7 +6,7 @@ #include <common.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> static int sxb_coredevices_init(void) { diff --git a/arch/arm/boards/ac-sxb/lowlevel.c b/arch/arm/boards/ac-sxb/lowlevel.c index a910555f9b..713d8ce5f8 100644 --- a/arch/arm/boards/ac-sxb/lowlevel.c +++ b/arch/arm/boards/ac-sxb/lowlevel.c @@ -5,19 +5,20 @@ */ #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <io.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx7-ccm-regs.h> -#include <mach/iomux-mx7.h> -#include <mach/debug_ll.h> +#include <mach/imx/imx7-ccm-regs.h> +#include <mach/imx/iomux-mx7.h> +#include <mach/imx/debug_ll.h> #include <asm/cache.h> -#include <mach/esdctl.h> -#include <mach/xload.h> -#include <mach/imx7-ddr-regs.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/xload.h> +#include <mach/imx/imx7-ddr-regs.h> struct reginit { u32 address; @@ -93,7 +94,7 @@ extern char __dtb_z_ac_sxb_start[]; static inline void setup_uart(void) { - imx7_early_setup_uart_clock(); + imx7_early_setup_uart_clock(1); imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX); diff --git a/arch/arm/boards/advantech-mx6/board.c b/arch/arm/boards/advantech-mx6/board.c index 67149d8994..8261875d63 100644 --- a/arch/arm/boards/advantech-mx6/board.c +++ b/arch/arm/boards/advantech-mx6/board.c @@ -5,7 +5,7 @@ #include <init.h> #include <platform_data/eth-fec.h> #include <bootsource.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> static int ar8035_phy_fixup(struct phy_device *dev) { diff --git a/arch/arm/boards/advantech-mx6/lowlevel.c b/arch/arm/boards/advantech-mx6/lowlevel.c index d762f0e9a7..edd5971c35 100644 --- a/arch/arm/boards/advantech-mx6/lowlevel.c +++ b/arch/arm/boards/advantech-mx6/lowlevel.c @@ -2,13 +2,14 @@ // SPDX-FileCopyrightText: 2018 Christoph Fritz <chf.fritz@googlemail.com> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <image-metadata.h> -#include <mach/generic.h> -#include <mach/esdctl.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/generic.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/iomux-mx6.h> #include <linux/sizes.h> static inline void setup_uart(void) diff --git a/arch/arm/boards/afi-gf/board.c b/arch/arm/boards/afi-gf/board.c index 53d3b67008..66288ca5b7 100644 --- a/arch/arm/boards/afi-gf/board.c +++ b/arch/arm/boards/afi-gf/board.c @@ -8,8 +8,8 @@ #include <envfs.h> #include <bootsource.h> #include <asm/armlinux.h> -#include <mach/bbu.h> -#include <mach/am33xx-generic.h> +#include <mach/omap/bbu.h> +#include <mach/omap/am33xx-generic.h> static int board_console_init(void) { diff --git a/arch/arm/boards/afi-gf/lowlevel.c b/arch/arm/boards/afi-gf/lowlevel.c index 7c94b19c9f..5c38198a36 100644 --- a/arch/arm/boards/afi-gf/lowlevel.c +++ b/arch/arm/boards/afi-gf/lowlevel.c @@ -7,16 +7,17 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <linux/bitops.h> -#include <mach/am33xx-generic.h> -#include <mach/am33xx-silicon.h> -#include <mach/am33xx-clock.h> -#include <mach/emif4.h> -#include <mach/generic.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/am33xx-mux.h> +#include <mach/omap/am33xx-generic.h> +#include <mach/omap/am33xx-silicon.h> +#include <mach/omap/am33xx-clock.h> +#include <mach/omap/emif4.h> +#include <mach/omap/generic.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/am33xx-mux.h> #include <debug_ll.h> +#include <mach/omap/debug_ll.h> /* AM335X EMIF Register values */ #define VTP_CTRL_READY (0x1 << 5) @@ -226,7 +227,7 @@ static noinline int gf_sram_init(void) am33xx_uart_soft_reset((void *)AM33XX_UART2_BASE); am33xx_enable_uart2_pin_mux(); - omap_uart_lowlevel_init((void *)AM33XX_UART2_BASE); + omap_debug_ll_init(); putc_ll('>'); barebox_arm_entry(0x80000000, SZ_256M, fdt); diff --git a/arch/arm/boards/altera-socdk/board.c b/arch/arm/boards/altera-socdk/board.c index 1c91d2a10d..bf0a5664fe 100644 --- a/arch/arm/boards/altera-socdk/board.c +++ b/arch/arm/boards/altera-socdk/board.c @@ -10,7 +10,7 @@ #include <linux/sizes.h> #include <fcntl.h> #include <fs.h> -#include <mach/cyclone5-regs.h> +#include <mach/socfpga/cyclone5-regs.h> static int ksz9021rn_phy_fixup(struct phy_device *dev) { diff --git a/arch/arm/boards/altera-socdk/iocsr_config_cyclone5.c b/arch/arm/boards/altera-socdk/iocsr_config_cyclone5.c index 9777d15dfe..982bef52bf 100644 --- a/arch/arm/boards/altera-socdk/iocsr_config_cyclone5.c +++ b/arch/arm/boards/altera-socdk/iocsr_config_cyclone5.c @@ -27,7 +27,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/cyclone5-scan-manager.h> +#include <mach/socfpga/cyclone5-scan-manager.h> static const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { diff --git a/arch/arm/boards/altera-socdk/lowlevel.c b/arch/arm/boards/altera-socdk/lowlevel.c index 537453b676..1e62ab70e7 100644 --- a/arch/arm/boards/altera-socdk/lowlevel.c +++ b/arch/arm/boards/altera-socdk/lowlevel.c @@ -9,7 +9,7 @@ #include "sequencer_auto_ac_init.c" #include "iocsr_config_cyclone5.c" -#include <mach/lowlevel.h> +#include <mach/socfpga/lowlevel.h> SOCFPGA_C5_ENTRY(start_socfpga_socdk, socfpga_cyclone5_socdk, SZ_1G); SOCFPGA_C5_XLOAD_ENTRY(start_socfpga_socdk_xload, SZ_1G); diff --git a/arch/arm/boards/animeo_ip/init.c b/arch/arm/boards/animeo_ip/init.c index ed0b9b7f87..452e005046 100644 --- a/arch/arm/boards/animeo_ip/init.c +++ b/arch/arm/boards/animeo_ip/init.c @@ -9,24 +9,23 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> #include <linux/clk.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> #include <local_mac_address.h> static bool animeo_ip_is_buco; @@ -56,7 +55,7 @@ static int animeo_ip_get_pio_revision(int gpio, char *name) static void animeo_ip_detect_version(void) { - struct device_d *dev = NULL; + struct device *dev = NULL; char *model, *version; int val; @@ -312,7 +311,7 @@ static int animeo_ip_devices_init(void) device_initcall(animeo_ip_devices_init); -static struct device_d *usart0, *usart1; +static struct device *usart0, *usart1; static void animeo_ip_shutdown_uart(void __iomem *base) { diff --git a/arch/arm/boards/animeo_ip/lowlevel.c b/arch/arm/boards/animeo_ip/lowlevel.c index 7f52f824df..df02e834c3 100644 --- a/arch/arm/boards/animeo_ip/lowlevel.c +++ b/arch/arm/boards/animeo_ip/lowlevel.c @@ -7,14 +7,13 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> -#include <mach/at91sam9_sdramc.h> -#include <mach/at91sam9260.h> -#include <mach/hardware.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_animeo_ip, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/archosg9/board.c b/arch/arm/boards/archosg9/board.c index 597830432b..fbf05a4408 100644 --- a/arch/arm/boards/archosg9/board.c +++ b/arch/arm/boards/archosg9/board.c @@ -4,11 +4,11 @@ #include <clock.h> #include <init.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <mach/devices.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-devices.h> -#include <mach/omap4_rom_usb.h> +#include <asm/mach-types.h> +#include <mach/omap/devices.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-devices.h> +#include <mach/omap/omap4_rom_usb.h> #include <linux/sizes.h> #include <i2c/i2c.h> #include <gpio.h> @@ -33,13 +33,17 @@ static int archosg9_console_init(void) { + int ret; + barebox_set_model("Archos G9"); barebox_set_hostname("g9"); - if (IS_ENABLED(CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT) && - omap4_usbboot_ready()) { - add_generic_device("serial_omap4_usbboot", DEVICE_ID_DYNAMIC - , NULL, 0, 0, 0, NULL); + if (IS_ENABLED(CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT)) { + ret = omap4_usbboot_open(); + if (!ret) { + add_generic_device("serial_omap4_usbboot", DEVICE_ID_DYNAMIC + , NULL, 0, 0, 0, NULL); + } } if (IS_ENABLED(CONFIG_DRIVER_SERIAL_NS16550)) { omap44xx_add_uart1(); diff --git a/arch/arm/boards/archosg9/lowlevel.c b/arch/arm/boards/archosg9/lowlevel.c index f31ef1a7f2..2c3d0e1ee4 100644 --- a/arch/arm/boards/archosg9/lowlevel.c +++ b/arch/arm/boards/archosg9/lowlevel.c @@ -4,12 +4,12 @@ #include <io.h> #include <init.h> #include <linux/sizes.h> -#include <mach/generic.h> -#include <mach/omap4-mux.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-generic.h> -#include <mach/omap4-clock.h> -#include <mach/syslib.h> +#include <mach/omap/generic.h> +#include <mach/omap/omap4-mux.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-generic.h> +#include <mach/omap/omap4-clock.h> +#include <mach/omap/syslib.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include "mux.h" diff --git a/arch/arm/boards/archosg9/mux.c b/arch/arm/boards/archosg9/mux.c index dc85271208..d51ccefba4 100644 --- a/arch/arm/boards/archosg9/mux.c +++ b/arch/arm/boards/archosg9/mux.c @@ -3,9 +3,9 @@ #include <common.h> #include <init.h> #include <io.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-mux.h> -#include <mach/omap4-clock.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-mux.h> +#include <mach/omap/omap4-clock.h> #include "mux.h" static const struct pad_conf_entry core_padconf_array[] = { diff --git a/arch/arm/boards/at91rm9200ek/init.c b/arch/arm/boards/at91rm9200ek/init.c index 8c61a72e0b..49a227805a 100644 --- a/arch/arm/boards/at91rm9200ek/init.c +++ b/arch/arm/boards/at91rm9200ek/init.c @@ -6,18 +6,17 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <gpio.h> #include <fcntl.h> #include <io.h> #include <envfs.h> #include <linux/sizes.h> -#include <mach/hardware.h> -#include <mach/at91_pmc.h> -#include <mach/board.h> -#include <mach/iomux.h> +#include <mach/at91/hardware.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/board.h> +#include <mach/at91/iomux.h> #include <spi/spi.h> static struct macb_platform_data ether_pdata = { diff --git a/arch/arm/boards/at91rm9200ek/lowlevel.c b/arch/arm/boards/at91rm9200ek/lowlevel.c index b132ccc084..f412de7d4a 100644 --- a/arch/arm/boards/at91rm9200ek/lowlevel.c +++ b/arch/arm/boards/at91rm9200ek/lowlevel.c @@ -7,21 +7,22 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> -#include <mach/at91rm9200_mc.h> -#include <mach/at91rm9200.h> -#include <mach/at91_pio.h> -#include <mach/at91_pmc.h> -#include <mach/hardware.h> +#include <mach/at91/at91rm9200_mc.h> +#include <mach/at91/at91rm9200.h> +#include <mach/at91/at91_pio.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/hardware.h> + +#include "config.h" void static inline access_sdram(void) { writel(0x00000000, AT91_CHIPSELECT_1); } -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_at91rm9200ek, r0, r1, r2) { u32 r; int i; diff --git a/arch/arm/boards/at91sam9260ek/init.c b/arch/arm/boards/at91sam9260ek/init.c index 92526c072a..eab3649883 100644 --- a/arch/arm/boards/at91sam9260ek/init.c +++ b/arch/arm/boards/at91sam9260ek/init.c @@ -6,16 +6,16 @@ #include <envfs.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <nand.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> #include <linux/sizes.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91_rstc.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_rstc.h> #include <linux/clk.h> /* diff --git a/arch/arm/boards/at91sam9260ek/lowlevel.c b/arch/arm/boards/at91sam9260ek/lowlevel.c index 7f52f824df..c574e4aeb0 100644 --- a/arch/arm/boards/at91sam9260ek/lowlevel.c +++ b/arch/arm/boards/at91sam9260ek/lowlevel.c @@ -7,14 +7,24 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> -#include <mach/at91sam9_sdramc.h> -#include <mach/at91sam9260.h> -#include <mach/hardware.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_at91sam9260ek, r0, r1, r2) +{ + arm_cpu_lowlevel_init(); + + arm_setup_stack(AT91SAM9260_SRAM_BASE + AT91SAM9260_SRAM_SIZE); + + barebox_arm_entry(AT91_CHIPSELECT_1, + at91_get_sdram_size(IOMEM(AT91SAM9260_BASE_SDRAMC)), + NULL); +} + +AT91_ENTRY_FUNCTION(start_at91sam9g20ek, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/at91sam9261ek/init.c b/arch/arm/boards/at91sam9261ek/init.c index 3904cbf9ca..da305fe9ed 100644 --- a/arch/arm/boards/at91sam9261ek/init.c +++ b/arch/arm/boards/at91sam9261ek/init.c @@ -7,21 +7,20 @@ #include <envfs.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/at91_pmc.h> -#include <mach/board.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/board.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91sam9_smc.h> #include <platform_data/eth-dm9000.h> #include <gpio_keys.h> #include <readkey.h> diff --git a/arch/arm/boards/at91sam9261ek/lowlevel_init.c b/arch/arm/boards/at91sam9261ek/lowlevel_init.c index bb9b905c65..55393567ea 100644 --- a/arch/arm/boards/at91sam9261ek/lowlevel_init.c +++ b/arch/arm/boards/at91sam9261ek/lowlevel_init.c @@ -4,10 +4,9 @@ * Under GPLv2 */ -#include <asm/barebox-arm.h> - -#include <mach/at91sam926x_board_init.h> -#include <mach/at91sam9261_matrix.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam926x_board_init.h> +#include <mach/at91/at91sam9261_matrix.h> #define MASTER_CLOCK 200 @@ -117,7 +116,16 @@ static void __bare_init at91sam9261ek_init(void) NULL); } -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_at91sam9261ek, r0, r1, r2) +{ + arm_cpu_lowlevel_init(); + + arm_setup_stack(AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE); + + at91sam9261ek_init(); +} + +AT91_ENTRY_FUNCTION(start_at91sam9g10ek, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/at91sam9263ek/init.c b/arch/arm/boards/at91sam9263ek/init.c index bf2f1e8f9a..6b618e9d00 100644 --- a/arch/arm/boards/at91sam9263ek/init.c +++ b/arch/arm/boards/at91sam9263ek/init.c @@ -8,20 +8,19 @@ #include <envfs.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> -#include <mach/at91_pmc.h> -#include <mach/board.h> -#include <mach/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/board.h> +#include <mach/at91/iomux.h> #include <gpio.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/at91sam9_smc.h> static struct atmel_nand_data nand_pdata = { .ale = 21, diff --git a/arch/arm/boards/at91sam9263ek/lowlevel_init.c b/arch/arm/boards/at91sam9263ek/lowlevel_init.c index 0bf0e0fb4e..aea772c743 100644 --- a/arch/arm/boards/at91sam9263ek/lowlevel_init.c +++ b/arch/arm/boards/at91sam9263ek/lowlevel_init.c @@ -6,10 +6,9 @@ #include <linux/sizes.h> -#include <asm/barebox-arm.h> - -#include <mach/at91sam926x_board_init.h> -#include <mach/at91sam9263_matrix.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam926x_board_init.h> +#include <mach/at91/at91sam9263_matrix.h> #define MASTER_PLL_MUL 171 #define MASTER_PLL_DIV 14 @@ -117,7 +116,7 @@ static void __bare_init at91sam9263ek_init(void *fdt) extern char __dtb_z_at91sam9263ek_start[]; -ENTRY_FUNCTION(start_at91sam9263ek, r0, r1, r2) +AT91_ENTRY_FUNCTION(start_at91sam9263ek, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/at91sam9263ek/of_init.c b/arch/arm/boards/at91sam9263ek/of_init.c index 92301c80d6..7bdc6cc0f0 100644 --- a/arch/arm/boards/at91sam9263ek/of_init.c +++ b/arch/arm/boards/at91sam9263ek/of_init.c @@ -7,11 +7,11 @@ #include <gpio.h> #include <io.h> -#include <mach/at91sam9263_matrix.h> -#include <mach/at91sam9_smc.h> -#include <mach/at91_rtt.h> -#include <mach/hardware.h> -#include <mach/iomux.h> +#include <mach/at91/at91sam9263_matrix.h> +#include <mach/at91/at91sam9_smc.h> +#include <mach/at91/at91_rtt.h> +#include <mach/at91/hardware.h> +#include <mach/at91/iomux.h> static int add_smc_devices(void) { diff --git a/arch/arm/boards/at91sam9m10g45ek/init.c b/arch/arm/boards/at91sam9m10g45ek/init.c index dcb8f9b17f..821228c2e1 100644 --- a/arch/arm/boards/at91sam9m10g45ek/init.c +++ b/arch/arm/boards/at91sam9m10g45ek/init.c @@ -10,20 +10,19 @@ #include <envfs.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/at91_pmc.h> -#include <mach/board.h> -#include <mach/iomux.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/board.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio_keys.h> #include <readkey.h> #include <spi/spi.h> diff --git a/arch/arm/boards/at91sam9m10g45ek/lowlevel.c b/arch/arm/boards/at91sam9m10g45ek/lowlevel.c index 755e7ec029..a24b26e5cb 100644 --- a/arch/arm/boards/at91sam9m10g45ek/lowlevel.c +++ b/arch/arm/boards/at91sam9m10g45ek/lowlevel.c @@ -7,13 +7,11 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/hardware.h> +#include <mach/at91/at91_ddrsdrc.h> -#include <mach/hardware.h> -#include <mach/at91_ddrsdrc.h> - -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_at91sam9m10g45ek, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/at91sam9m10ihd/hw_version.c b/arch/arm/boards/at91sam9m10ihd/hw_version.c index 1387c13718..0b8b7cc884 100644 --- a/arch/arm/boards/at91sam9m10ihd/hw_version.c +++ b/arch/arm/boards/at91sam9m10ihd/hw_version.c @@ -133,7 +133,7 @@ static void at91sam9m10ihd_devices_detect_one(const char *name) struct one_wire_info info; struct board_info* binfo; struct vendor_info* vinfo; - struct device_d *dev = NULL; + struct device *dev = NULL; char str[16]; u8 vendor_id = 0; diff --git a/arch/arm/boards/at91sam9m10ihd/init.c b/arch/arm/boards/at91sam9m10ihd/init.c index e629900d5a..763dffb6ce 100644 --- a/arch/arm/boards/at91sam9m10ihd/init.c +++ b/arch/arm/boards/at91sam9m10ihd/init.c @@ -10,20 +10,19 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/board.h> +#include <mach/at91/board.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91sam9_smc.h> #include <input/qt1070.h> #include <readkey.h> #include <linux/w1-gpio.h> diff --git a/arch/arm/boards/at91sam9m10ihd/lowlevel.c b/arch/arm/boards/at91sam9m10ihd/lowlevel.c index 817c7548c9..7eba24f3e4 100644 --- a/arch/arm/boards/at91sam9m10ihd/lowlevel.c +++ b/arch/arm/boards/at91sam9m10ihd/lowlevel.c @@ -7,14 +7,12 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91_ddrsdrc.h> +#include <mach/at91/at91sam9g45.h> +#include <mach/at91/hardware.h> -#include <mach/at91_ddrsdrc.h> -#include <mach/at91sam9g45.h> -#include <mach/hardware.h> - -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_at91sam9m10ihd, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/at91sam9n12ek/init.c b/arch/arm/boards/at91sam9n12ek/init.c index edc45819b2..4503e96af9 100644 --- a/arch/arm/boards/at91sam9n12ek/init.c +++ b/arch/arm/boards/at91sam9n12ek/init.c @@ -6,24 +6,23 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> -#include <mach/at91sam9x5_matrix.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> +#include <mach/at91/at91sam9x5_matrix.h> #include <input/qt1070.h> #include <readkey.h> #include <spi/spi.h> diff --git a/arch/arm/boards/at91sam9n12ek/lowlevel.c b/arch/arm/boards/at91sam9n12ek/lowlevel.c index 4353555d0d..4b981fd49f 100644 --- a/arch/arm/boards/at91sam9n12ek/lowlevel.c +++ b/arch/arm/boards/at91sam9n12ek/lowlevel.c @@ -7,13 +7,11 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91_ddrsdrc.h> +#include <mach/at91/hardware.h> -#include <mach/at91_ddrsdrc.h> -#include <mach/hardware.h> - -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_at91sam9n12ek, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/at91sam9x5ek/hw_version.c b/arch/arm/boards/at91sam9x5ek/hw_version.c index 4038f42ec2..1224f4753c 100644 --- a/arch/arm/boards/at91sam9x5ek/hw_version.c +++ b/arch/arm/boards/at91sam9x5ek/hw_version.c @@ -149,7 +149,7 @@ static void at91sam9x5ek_devices_detect_one(const char *name) struct one_wire_info info; struct board_info* binfo; struct vendor_info* vinfo; - struct device_d *dev = NULL; + struct device *dev = NULL; char str[16]; u8 vendor_id = 0; diff --git a/arch/arm/boards/at91sam9x5ek/init.c b/arch/arm/boards/at91sam9x5ek/init.c index a1c80bf441..c3d0f2ce89 100644 --- a/arch/arm/boards/at91sam9x5ek/init.c +++ b/arch/arm/boards/at91sam9x5ek/init.c @@ -6,23 +6,22 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> -#include <mach/at91sam9x5_matrix.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> +#include <mach/at91/at91sam9x5_matrix.h> #include <input/qt1070.h> #include <readkey.h> #include <linux/w1-gpio.h> diff --git a/arch/arm/boards/at91sam9x5ek/lowlevel.c b/arch/arm/boards/at91sam9x5ek/lowlevel.c index 3d266161ec..5dbac307ac 100644 --- a/arch/arm/boards/at91sam9x5ek/lowlevel.c +++ b/arch/arm/boards/at91sam9x5ek/lowlevel.c @@ -2,15 +2,14 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/at91_ddrsdrc.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/at91_ddrsdrc.h> +#include <mach/at91/barebox-arm.h> #include <io.h> #include <debug_ll.h> extern char __dtb_z_at91sam9x5ek_start[]; -ENTRY_FUNCTION(start_at91sam9x5ek, r0, r1, r2) +AT91_ENTRY_FUNCTION(start_at91sam9x5ek, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/avnet-zedboard/board.c b/arch/arm/boards/avnet-zedboard/board.c index b8396d1996..15332189ca 100644 --- a/arch/arm/boards/avnet-zedboard/board.c +++ b/arch/arm/boards/avnet-zedboard/board.c @@ -4,9 +4,9 @@ #include <asm/armlinux.h> #include <common.h> #include <environment.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <init.h> -#include <mach/zynq7000-regs.h> +#include <mach/zynq/zynq7000-regs.h> #include <linux/sizes.h> diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c b/arch/arm/boards/avnet-zedboard/lowlevel.c index f7bdceb42a..6e5a17d7ef 100644 --- a/arch/arm/boards/avnet-zedboard/lowlevel.c +++ b/arch/arm/boards/avnet-zedboard/lowlevel.c @@ -5,8 +5,8 @@ #include <io.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> -#include <mach/init.h> -#include <mach/zynq7000-regs.h> +#include <mach/zynq/init.h> +#include <mach/zynq/zynq7000-regs.h> #include <serial/cadence.h> #define DCI_DONE (1 << 13) @@ -14,7 +14,7 @@ #define PLL_DDR_LOCK (1 << 1) #define PLL_IO_LOCK (1 << 2) -extern char __dtb_zynq_zed_start[]; +extern char __dtb_z_zynq_zed_start[]; static void avnet_zedboard_ps7_init(void) { @@ -289,7 +289,7 @@ static void avnet_zedboard_pbl_console_init(void) ENTRY_FUNCTION(start_avnet_zedboard, r0, r1, r2) { - void *fdt = __dtb_zynq_zed_start + get_runtime_offset(); + void *fdt = __dtb_z_zynq_zed_start + get_runtime_offset(); /* MIO_07 in GPIO Mode 3.3V VIO, can be uncomented because it is the default value */ writel(0x0000DF0D, ZYNQ_SLCR_UNLOCK); diff --git a/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg b/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg index 3f8808d3d7..c6a96aec7b 100644 --- a/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg +++ b/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg @@ -1,4 +1,4 @@ -#include <mach/zynq7000-header-regs.h> +#include <zynq/zynq7000-header-regs.h> wm 32 ZYNQ_SLCR_UNLOCK 0x0000DF0D wm 32 ZYNQ_CLK_621_TRUE 0x00000001 @@ -21,4 +21,4 @@ wm 32 ZYNQ_IO_PLL_CTRL 0x0001E000 wm 32 ZYNQ_SDIO_CLK_CTRL 0x00000a03 /* stop */ -wm 32 0xFFFFFFFF 0x00000000
\ No newline at end of file +wm 32 0xFFFFFFFF 0x00000000 diff --git a/arch/arm/boards/beagle/board.c b/arch/arm/boards/beagle/board.c index 7caac5727f..f9d7f74288 100644 --- a/arch/arm/boards/beagle/board.c +++ b/arch/arm/boards/beagle/board.c @@ -11,14 +11,14 @@ #include <filetype.h> #include <envfs.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <mach/gpmc.h> -#include <mach/gpmc_nand.h> -#include <mach/ehci.h> -#include <mach/omap3-devices.h> +#include <asm/mach-types.h> +#include <mach/omap/gpmc.h> +#include <mach/omap/gpmc_nand.h> +#include <mach/omap/ehci.h> +#include <mach/omap/omap3-devices.h> #include <i2c/i2c.h> #include <linux/err.h> -#include <usb/ehci.h> +#include <linux/usb/ehci.h> #include <asm/barebox-arm.h> #ifdef CONFIG_DRIVER_SERIAL_NS16550 diff --git a/arch/arm/boards/beagle/lowlevel.c b/arch/arm/boards/beagle/lowlevel.c index 683ab552f4..e4610722f6 100644 --- a/arch/arm/boards/beagle/lowlevel.c +++ b/arch/arm/boards/beagle/lowlevel.c @@ -1,20 +1,21 @@ // SPDX-License-Identifier: GPL-2.0-only #include <init.h> +#include <mach/omap/debug_ll.h> #include <debug_ll.h> #include <io.h> #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/control.h> -#include <mach/generic.h> -#include <mach/omap3-silicon.h> -#include <mach/omap3-generic.h> -#include <mach/omap3-mux.h> -#include <mach/sdrc.h> -#include <mach/syslib.h> -#include <mach/sys_info.h> -#include <generated/mach-types.h> +#include <mach/omap/control.h> +#include <mach/omap/generic.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/omap3-generic.h> +#include <mach/omap/omap3-mux.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/syslib.h> +#include <mach/omap/sys_info.h> +#include <asm/mach-types.h> /** * @brief Do the pin muxing required for Board operation. @@ -196,7 +197,7 @@ static noinline int beagle_board_init(void) mux_config(); - omap_uart_lowlevel_init((void *)OMAP3_UART3_BASE); + omap_debug_ll_init(); /* Dont reconfigure SDRAM while running in SDRAM! */ if (!in_sdram) diff --git a/arch/arm/boards/beaglebone/beaglebone.h b/arch/arm/boards/beaglebone/beaglebone.h index 9f1f906699..c95936a84f 100644 --- a/arch/arm/boards/beaglebone/beaglebone.h +++ b/arch/arm/boards/beaglebone/beaglebone.h @@ -3,7 +3,7 @@ #ifndef __BOARD_BEAGLEBONE_H #define __BOARD_BEAGLEBONE_H -#include <mach/am33xx-generic.h> +#include <mach/omap/am33xx-generic.h> static inline int is_beaglebone_black(void) { diff --git a/arch/arm/boards/beaglebone/board.c b/arch/arm/boards/beaglebone/board.c index 6d2144f95b..43e2d81f38 100644 --- a/arch/arm/boards/beaglebone/board.c +++ b/arch/arm/boards/beaglebone/board.c @@ -17,13 +17,13 @@ #include <net.h> #include <bootsource.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <mach/am33xx-silicon.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/gpmc.h> +#include <asm/mach-types.h> +#include <mach/omap/am33xx-silicon.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/gpmc.h> #include <linux/err.h> -#include <mach/bbu.h> +#include <mach/omap/bbu.h> #include "beaglebone.h" diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c index ebec4b5419..5dc49dfaaf 100644 --- a/arch/arm/boards/beaglebone/lowlevel.c +++ b/arch/arm/boards/beaglebone/lowlevel.c @@ -5,16 +5,17 @@ #include <io.h> #include <linux/string.h> #include <debug_ll.h> +#include <mach/omap/debug_ll.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/am33xx-silicon.h> -#include <mach/am33xx-clock.h> -#include <mach/generic.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/am33xx-mux.h> -#include <mach/am33xx-generic.h> +#include <mach/omap/am33xx-silicon.h> +#include <mach/omap/am33xx-clock.h> +#include <mach/omap/generic.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/am33xx-mux.h> +#include <mach/omap/am33xx-generic.h> #include "beaglebone.h" @@ -132,7 +133,7 @@ static noinline int beaglebone_sram_init(void) am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE); am33xx_enable_uart0_pin_mux(); - omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE); + omap_debug_ll_init(); putc_ll('>'); barebox_arm_entry(0x80000000, sdram_size, fdt); diff --git a/arch/arm/boards/beagleplay/Makefile b/arch/arm/boards/beagleplay/Makefile new file mode 100644 index 0000000000..69935cc168 --- /dev/null +++ b/arch/arm/boards/beagleplay/Makefile @@ -0,0 +1 @@ +pbl-y += lowlevel.o entry.o diff --git a/arch/arm/boards/beagleplay/entry.S b/arch/arm/boards/beagleplay/entry.S new file mode 100644 index 0000000000..6e4c7196f3 --- /dev/null +++ b/arch/arm/boards/beagleplay/entry.S @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <linux/linkage.h> +#include <asm/barebox-arm64.h> +#include <asm/image.h> + +#define IMAGE_FLAGS \ + (ARM64_IMAGE_FLAG_PAGE_SIZE_4K << ARM64_IMAGE_FLAG_PAGE_SIZE_SHIFT) | \ + (ARM64_IMAGE_FLAG_PHYS_BASE << ARM64_IMAGE_FLAG_PHYS_BASE_SHIFT) + +.section .text_head_entry_start_beagleplay +ENTRY("start_beagleplay") + adr x1, 0 /* code0 */ + b 2f /* code1 */ + .xword 0x80000 /* Image load offset */ + .xword _barebox_image_size /* Effective Image size */ + .xword IMAGE_FLAGS /* Kernel flags */ + .xword 0 /* reserved */ + .xword 0 /* reserved */ + .xword 0 /* reserved */ + .ascii ARM64_IMAGE_MAGIC /* magic number */ + .int 0 /* reserved (PE-COFF offset) */ + .asciz "barebox" /* unused for now */ +2: + mov sp, x1 + /* Stack now grows into the 0x80000 image load offset specified + * above. This is more than enough until FDT /memory is decoded. + */ + b beagleplay +ENTRY_PROC_END(start_beagleplay) diff --git a/arch/arm/boards/beagleplay/lowlevel.c b/arch/arm/boards/beagleplay/lowlevel.c new file mode 100644 index 0000000000..9d76dbd0a2 --- /dev/null +++ b/arch/arm/boards/beagleplay/lowlevel.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <common.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <debug_ll.h> +#include <pbl.h> + +/* Called from assembly */ +void beagleplay(void); + +static noinline void beagleplay_continue(void) +{ + unsigned long membase, memsize; + extern char __dtb_k3_am625_beagleplay_start[]; + + fdt_find_mem(__dtb_k3_am625_beagleplay_start, &membase, &memsize); + + barebox_arm_entry(membase, memsize, __dtb_k3_am625_beagleplay_start); +} + +void beagleplay(void) +{ + putc_ll('>'); + + arm_cpu_lowlevel_init(); + + relocate_to_current_adr(); + + setup_c(); + + beagleplay_continue(); +} diff --git a/arch/arm/boards/boundarydevices-nitrogen6/Makefile b/arch/arm/boards/boundarydevices-nitrogen6/Makefile index b365c8eab0..da63d2625f 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6/Makefile +++ b/arch/arm/boards/boundarydevices-nitrogen6/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += board.o +obj-y += board.o lwl-y += lowlevel.o diff --git a/arch/arm/boards/boundarydevices-nitrogen6/board.c b/arch/arm/boards/boundarydevices-nitrogen6/board.c index dc2d5aa41c..a57cef4fbe 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6/board.c +++ b/arch/arm/boards/boundarydevices-nitrogen6/board.c @@ -4,10 +4,10 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <linux/phy.h> #include <linux/micrel_phy.h> -#include <mach/imx6.h> +#include <mach/imx/imx6.h> static int nitrogen6x_devices_init(void) { diff --git a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6dl-1g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6dl-1g.imxcfg index 8282d4140c..8aa14f3080 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6dl-1g.imxcfg +++ b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6dl-1g.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> #include "ram-base.imxcfg" #include "800mhz_4x128mx16.imxcfg" diff --git a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6dl-2g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6dl-2g.imxcfg index 9ef9b5789f..5544c25e36 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6dl-2g.imxcfg +++ b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6dl-2g.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> #include "ram-base.imxcfg" #include "800mhz_4x256mx16.imxcfg" diff --git a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6q-1g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6q-1g.imxcfg index 5c5af546a7..4cde5c0818 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6q-1g.imxcfg +++ b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6q-1g.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> #include "ram-base.imxcfg" #include "1066mhz_4x128mx16.imxcfg" diff --git a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6q-2g.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6q-2g.imxcfg index 58b9dc7468..4b38b1bfc9 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6q-2g.imxcfg +++ b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6q-2g.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> #include "ram-base.imxcfg" #include "1066mhz_4x256mx16.imxcfg" diff --git a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6qp-max.imxcfg b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6qp-max.imxcfg index 4ab0a653bd..2d43222530 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6qp-max.imxcfg +++ b/arch/arm/boards/boundarydevices-nitrogen6/flash-header-nitrogen6qp-max.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> #include "ram-base.imxcfg" #include "1066mhz_4x512mx16-qp.imxcfg" diff --git a/arch/arm/boards/boundarydevices-nitrogen6/lowlevel.c b/arch/arm/boards/boundarydevices-nitrogen6/lowlevel.c index 9312a1d4aa..8ab5116d8e 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6/lowlevel.c +++ b/arch/arm/boards/boundarydevices-nitrogen6/lowlevel.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> -#include <mach/generic.h> -#include <mach/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/esdctl.h> #include <asm/barebox-arm.h> extern char __dtb_imx6q_nitrogen6x_start[]; diff --git a/arch/arm/boards/friendlyarm-tiny210/Makefile b/arch/arm/boards/calao/Makefile index d026a7ed47..da63d2625f 100644 --- a/arch/arm/boards/friendlyarm-tiny210/Makefile +++ b/arch/arm/boards/calao/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += tiny210.o +obj-y += board.o lwl-y += lowlevel.o diff --git a/arch/arm/boards/calao/board.c b/arch/arm/boards/calao/board.c new file mode 100644 index 0000000000..cc369c4cf1 --- /dev/null +++ b/arch/arm/boards/calao/board.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include <deep-probe.h> +#include <of.h> + +static const struct of_device_id calao_of_match[] = { + { .compatible = "calao,tny-a9260" }, + { .compatible = "calao,tny-a9g20" }, + { .compatible = "calao,usb-a9260" }, + { .compatible = "calao,usb-a9g20" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(calao_of_match); diff --git a/arch/arm/boards/calao/lowlevel.c b/arch/arm/boards/calao/lowlevel.c new file mode 100644 index 0000000000..2a081a97a4 --- /dev/null +++ b/arch/arm/boards/calao/lowlevel.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <common.h> +#include <init.h> +#include <debug_ll.h> +#include <asm/reloc.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> + +static void dbgu_init(void) +{ + /* pinmux/clocks/uart already configured by first stage */ + putc_ll('>'); +} + +#define CALAO_ENTRY_2ND(entrypoint, dtbname) \ +AT91_ENTRY_FUNCTION(entrypoint, r0, r1, r2) { \ + extern char __dtb_z_##dtbname##_start[]; \ + arm_cpu_lowlevel_init(); \ + arm_setup_stack(AT91SAM9260_SRAM_END); \ + dbgu_init(); \ + at91sam9260_barebox_entry(runtime_address(__dtb_z_##dtbname##_start)); \ +} + +CALAO_ENTRY_2ND(start_tny_a9260, tny_a9260); +CALAO_ENTRY_2ND(start_tny_a9g20, tny_a9g20); +CALAO_ENTRY_2ND(start_usb_a9260, usb_a9260); +CALAO_ENTRY_2ND(start_usb_a9g20, usb_a9g20); diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c index cbf06e6cd6..4ea71fe26b 100644 --- a/arch/arm/boards/ccxmx51/ccxmx51.c +++ b/arch/arm/boards/ccxmx51/ccxmx51.c @@ -16,12 +16,12 @@ #include <mfd/mc13xxx.h> #include <mfd/mc13892.h> -#include <mach/bbu.h> -#include <mach/esdctl.h> -#include <mach/iim.h> -#include <mach/imx5.h> -#include <mach/imx51-regs.h> -#include <mach/revision.h> +#include <mach/imx/bbu.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/iim.h> +#include <mach/imx/imx5.h> +#include <mach/imx/imx51-regs.h> +#include <mach/imx/revision.h> static const struct ccxmx_ident { char *id_string; @@ -189,11 +189,15 @@ static int ccxmx51_board_fixup(struct device_node *root, void *unused) if (!ccxmx_id->eth0) ccxmx51_disable_device(root, "ethernet@83fec000"); - if (!ccxmx_id->eth1) + if (!ccxmx_id->eth1) { ccxmx51_disable_device(root, "lan9221@5,0"); + ccxmx51_disable_device(root, "ethernet@5,0"); + } - if (!ccxmx_id->wless) + if (!ccxmx_id->wless) { ccxmx51_disable_device(root, "esdhc@70008000"); + ccxmx51_disable_device(root, "mmc@70008000"); + } serial = basprintf("%08x%08x", 0, boardserial); of_set_property(root, "serial-number", serial, strlen(serial) + 1, 1); diff --git a/arch/arm/boards/ccxmx51/lowlevel.c b/arch/arm/boards/ccxmx51/lowlevel.c index 49bc7bfe32..b0881f9c5b 100644 --- a/arch/arm/boards/ccxmx51/lowlevel.c +++ b/arch/arm/boards/ccxmx51/lowlevel.c @@ -3,13 +3,14 @@ #include <common.h> #include <debug_ll.h> -#include <mach/clock-imx51_53.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <mach/iomux-mx51.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/clock-imx51_53.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/iomux-mx51.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> -#include <mach/imx51-regs.h> +#include <mach/imx/imx51-regs.h> static inline void setup_uart(void) { diff --git a/arch/arm/boards/ccxmx53/board.c b/arch/arm/boards/ccxmx53/board.c index b0faf8d280..26654193ad 100644 --- a/arch/arm/boards/ccxmx53/board.c +++ b/arch/arm/boards/ccxmx53/board.c @@ -9,14 +9,14 @@ #include <i2c/i2c.h> #include <gpio.h> -#include <generated/mach-types.h> -#include <mach/imx5.h> -#include <mach/generic.h> -#include <mach/imx53-regs.h> -#include <mach/esdctl.h> +#include <asm/mach-types.h> +#include <mach/imx/imx5.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/esdctl.h> #include <asm/armlinux.h> -#include <mach/bbu.h> -#include <mach/iim.h> +#include <mach/imx/bbu.h> +#include <mach/imx/iim.h> struct ccwmx53_ident { diff --git a/arch/arm/boards/ccxmx53/lowlevel.c b/arch/arm/boards/ccxmx53/lowlevel.c index 5833ad4739..74fde99337 100644 --- a/arch/arm/boards/ccxmx53/lowlevel.c +++ b/arch/arm/boards/ccxmx53/lowlevel.c @@ -5,9 +5,9 @@ #include <common.h> #include <linux/sizes.h> #include <io.h> -#include <mach/imx53-regs.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> #include <image-metadata.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/chumby_falconwing/falconwing.c b/arch/arm/boards/chumby_falconwing/falconwing.c index 82b9415e80..9221590455 100644 --- a/arch/arm/boards/chumby_falconwing/falconwing.c +++ b/arch/arm/boards/chumby_falconwing/falconwing.c @@ -9,18 +9,17 @@ #include <errno.h> #include <mci.h> #include <linux/sizes.h> -#include <usb/ehci.h> +#include <linux/usb/ehci.h> #include <asm/armlinux.h> #include <asm/barebox-arm.h> #include <io.h> #include <asm/mmu.h> -#include <generated/mach-types.h> -#include <mach/imx-regs.h> -#include <mach/clock.h> -#include <mach/mci.h> -#include <mach/fb.h> -#include <mach/usb.h> -#include <mach/iomux.h> +#include <asm/mach-types.h> +#include <mach/mxs/imx-regs.h> +#include <mach/mxs/mci.h> +#include <mach/mxs/fb.h> +#include <mach/mxs/usb.h> +#include <mach/mxs/iomux.h> static struct mxs_mci_platform_data mci_pdata = { .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED, diff --git a/arch/arm/boards/chumby_falconwing/lowlevel.c b/arch/arm/boards/chumby_falconwing/lowlevel.c index 091dd19552..fdda6ba5f2 100644 --- a/arch/arm/boards/chumby_falconwing/lowlevel.c +++ b/arch/arm/boards/chumby_falconwing/lowlevel.c @@ -4,11 +4,25 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx23-regs.h> -#include <generated/mach-types.h> +#include <mach/mxs/imx23-regs.h> +#include <asm/mach-types.h> + +static noinline void continue_imx_entry(size_t size) +{ + static struct barebox_arm_boarddata boarddata = { + .magic = BAREBOX_ARM_BOARDDATA_MAGIC, + .machine = MACH_TYPE_CHUMBY, + }; + + barebox_arm_entry(IMX_MEMORY_BASE, size, &boarddata); +} ENTRY_FUNCTION(start_chumby_falconwing, r0, r1, r2) { arm_cpu_lowlevel_init(); - barebox_arm_entry(IMX_MEMORY_BASE, SZ_64M, (void *)MACH_TYPE_CHUMBY); + + relocate_to_current_adr(); + setup_c(); + + continue_imx_entry(SZ_64M); } diff --git a/arch/arm/boards/clep7212/lowlevel.c b/arch/arm/boards/clep7212/lowlevel.c index 09f2762fac..ba402cecea 100644 --- a/arch/arm/boards/clep7212/lowlevel.c +++ b/arch/arm/boards/clep7212/lowlevel.c @@ -4,7 +4,7 @@ #include <common.h> #include <asm/barebox-arm.h> #include <linux/sizes.h> -#include <mach/clps711x.h> +#include <mach/clps711x/clps711x.h> extern char __dtb_ep7212_clep7212_start[]; diff --git a/arch/arm/boards/cm-fx6/board.c b/arch/arm/boards/cm-fx6/board.c index 5a1110860f..c70989476b 100644 --- a/arch/arm/boards/cm-fx6/board.c +++ b/arch/arm/boards/cm-fx6/board.c @@ -4,13 +4,13 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/imx6-regs.h> -#include <mach/bbu.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/bbu.h> #include <asm/armlinux.h> #include <linux/phy.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <linux/sizes.h> -#include <mach/imx6.h> +#include <mach/imx/imx6.h> #include <net.h> static int phy_fixup(struct phy_device *phydev) diff --git a/arch/arm/boards/cm-fx6/lowlevel.c b/arch/arm/boards/cm-fx6/lowlevel.c index 27c15f5412..029586294f 100644 --- a/arch/arm/boards/cm-fx6/lowlevel.c +++ b/arch/arm/boards/cm-fx6/lowlevel.c @@ -4,16 +4,17 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <io.h> -#include <mach/imx6-mmdc.h> -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6.h> -#include <mach/xload.h> -#include <mach/esdctl.h> +#include <mach/imx/imx6-mmdc.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6.h> +#include <mach/imx/xload.h> +#include <mach/imx/esdctl.h> #include <serial/imx-uart.h> enum ddr_config { @@ -334,7 +335,7 @@ static noinline void cm_fx6_start(void) ENTRY_FUNCTION(start_imx6_cm_fx6, r0, r1, r2) { - arm_cpu_lowlevel_init(); + imx6_cpu_lowlevel_init(); relocate_to_current_adr(); setup_c(); @@ -361,7 +362,7 @@ static noinline void utilite_start(void) ENTRY_FUNCTION(start_imx6_utilite, r0, r1, r2) { - arm_cpu_lowlevel_init(); + imx6_cpu_lowlevel_init(); relocate_to_current_adr(); setup_c(); diff --git a/arch/arm/boards/congatec-qmx8p/Makefile b/arch/arm/boards/congatec-qmx8p/Makefile new file mode 100644 index 0000000000..b3ae72be3e --- /dev/null +++ b/arch/arm/boards/congatec-qmx8p/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += board.o +lwl-y += lowlevel.o lpddr4-timing.o diff --git a/arch/arm/boards/congatec-qmx8p/board.c b/arch/arm/boards/congatec-qmx8p/board.c new file mode 100644 index 0000000000..fcec2a17c4 --- /dev/null +++ b/arch/arm/boards/congatec-qmx8p/board.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 +// SPDX-FileCopyrightText: 2023 Juergen Borleis, Pengutronix +// SPDX-FileCopyrightText: 2023 Johannes Zink, Pengutronix + +#include <asm/memory.h> +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <init.h> +#include <linux/phy.h> +#include <linux/sizes.h> +#include <mach/imx/bbu.h> +#include <mach/imx/generic.h> +#include <mach/imx/iomux-mx8mp.h> +#include <gpio.h> +#include <envfs.h> + +/* Phy regulator handling in Linux is broken for the MX8 EQOs, as the + * 'phy-regulators' properties are not handed down properly, so this is + * currently not set in the kernel DT. + * As a workaround, enable the regulator manually via GPIO. */ +#define EQOS_PWR_PIN IMX_GPIO_NR(1, 5) /* ENET_PWREN# */ +static void setup_ethernet_phy(void) +{ + u32 val; + + of_device_ensure_probed_by_alias("gpio0"); + + if (gpio_direction_output(EQOS_PWR_PIN, 0)) { + pr_err("eqos phy power: failed to request pin\n"); + return; + } + + /* the phy needs roughly 200ms delay after power-on */ + mdelay(200); + + /* Enable RGMII TX clk output */ + val = readl(MX8MP_IOMUXC_GPR_BASE_ADDR + MX8MP_IOMUXC_GPR1); + val |= MX8MP_IOMUXC_GPR1_ENET1_RGMII_EN; + writel(val, MX8MP_IOMUXC_GPR_BASE_ADDR + MX8MP_IOMUXC_GPR1); +} + +static int congatec_qmx8p_probe(struct device *dev) +{ + setup_ethernet_phy(); + + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", + "/dev/m25p0.boot", BBU_HANDLER_FLAG_DEFAULT); + + return 0; +} + +static const struct of_device_id congatec_qmx8p_of_match[] = { + { .compatible = "congatec,qmx8p" }, + { /* Sentinel */ } +}; +BAREBOX_DEEP_PROBE_ENABLE(congatec_qmx8p_of_match); + +static struct driver congatec_qmx8p_som_driver = { + .name = "som-congatec-qmx8p", + .probe = congatec_qmx8p_probe, + .of_compatible = congatec_qmx8p_of_match, +}; +coredevice_platform_driver(congatec_qmx8p_som_driver); diff --git a/arch/arm/boards/congatec-qmx8p/flash-header-congatec-qmx8p.imxcfg b/arch/arm/boards/congatec-qmx8p/flash-header-congatec-qmx8p.imxcfg new file mode 100644 index 0000000000..70c57768eb --- /dev/null +++ b/arch/arm/boards/congatec-qmx8p/flash-header-congatec-qmx8p.imxcfg @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +soc imx8mp + +loadaddr 0x920000 +max_load_size 0x3f000 +ivtofs 0x0 + +flexspi_ivtofs 0x0 +flexspi_fcfbofs 0x400 diff --git a/arch/arm/boards/congatec-qmx8p/lowlevel.c b/arch/arm/boards/congatec-qmx8p/lowlevel.c new file mode 100644 index 0000000000..1889b9bb33 --- /dev/null +++ b/arch/arm/boards/congatec-qmx8p/lowlevel.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0 +// SPDX-FileCopyrightText: 2023 Pengutronix + +#include <common.h> +#include <debug_ll.h> +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> +#include <asm/cache.h> +#include <asm/mmu.h> +#include <asm/sections.h> +#include <image-metadata.h> +#include <mach/imx/atf.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/iomux-mx8mp.h> +#include <mach/imx/imx8mp-regs.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/xload.h> +#include <mfd/pca9450.h> +#include <pbl/i2c.h> +#include <pbl/pmic.h> +#include <soc/fsl/fsl_udc.h> +#include <soc/imx8m/ddr.h> + +extern char __dtb_z_imx8mp_koenigbauer_alphajet_start[]; + +#define UART_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_FSEL) +/* + * SoC UART 1 is the standard console on the KB base board + */ +static void setup_uart(void) +{ + void __iomem *uart = IOMEM(MX8M_UART1_BASE_ADDR); + + imx8m_early_setup_uart_clock(); + + imx8mp_setup_pad(MX8MP_PAD_UART1_TXD__UART1_DCE_TX | UART_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_UART1_RXD__UART1_DCE_RX | UART_PAD_CTRL); + imx8m_uart_setup(uart); + + pbl_set_putc(imx_uart_putc, uart); + + putc_ll('>'); +} + +#define I2C_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_HYS | \ + MX8MP_PAD_CTL_PUE | \ + MX8MP_PAD_CTL_PE) + +static struct pmic_config pca9450_cfg[] = { + /* BUCKxOUT_DVS0/1 control BUCK123 output */ + { PCA9450_BUCK123_DVS, 0x29 }, + /* + * increase VDD_SOC to typical value 0.95V before first + * DRAM access, set DVS1 to 0.85v for suspend. + * Enable DVS control through PMIC_STBY_REQ and + * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) + */ + { PCA9450_BUCK1OUT_DVS0, 0x1C }, + { PCA9450_BUCK1OUT_DVS1, 0x14 }, + { PCA9450_BUCK1CTRL, 0x59 }, + /* Kernel uses OD/OD freq for SOC */ + /* To avoid timing risk from SOC to ARM, increase + * VDD_ARM to OD voltage 0.95v + */ + { PCA9450_BUCK2OUT_DVS0, 0x1C }, + /* set WDOG_B_CFG to cold reset */ + { PCA9450_RESET_CTRL, 0xA1 }, +}; + +static void power_init_board(void) +{ + struct pbl_i2c *i2c; + + imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL); + + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); + + i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR)); + + pmic_configure(i2c, 0x25, pca9450_cfg, ARRAY_SIZE(pca9450_cfg)); +} + +extern struct dram_timing_info dram_timing_4g; + +static void start_tfa(void) +{ + /* + * If we are in EL3 we are running for the first time and need to + * initialize the DRAM and run TF-A (BL31). The TF-A will then jump + * to DRAM in EL2. + */ + if (current_el() != 3) + return; + + imx8mp_early_clock_init(); + power_init_board(); + + imx8mp_ddr_init(&dram_timing_4g, DRAM_TYPE_LPDDR4); + + imx8mp_load_and_start_image_via_tfa(); +} + +static __noreturn noinline void congatec_qmx8p_start(char dtb[]) +{ + setup_uart(); + + start_tfa(); + + /* + * Standard entry we hit once we initialized both DDR and ATF + */ + imx8mp_barebox_entry(dtb); +} + +ENTRY_FUNCTION(start_koenigbauer_alphajet, r0, r1, r2) +{ + imx8mp_cpu_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + congatec_qmx8p_start(__dtb_z_imx8mp_koenigbauer_alphajet_start); +} diff --git a/arch/arm/boards/congatec-qmx8p/lpddr4-timing.c b/arch/arm/boards/congatec-qmx8p/lpddr4-timing.c new file mode 100644 index 0000000000..6d10b530ba --- /dev/null +++ b/arch/arm/boards/congatec-qmx8p/lpddr4-timing.c @@ -0,0 +1,1832 @@ +// SPDX-License-Identifier: GPL-2.0+ +// SPDX-FileCopyrightText: 2019 NXP + +#include <common.h> +#include <soc/imx8m/ddr.h> + +static struct dram_cfg_param ddr_ddrc_cfg_4g[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0xa3080020 }, + { 0x3d400020, 0x1322 }, + { 0x3d400024, 0x1e84800 }, + { 0x3d400064, 0x3d0118 }, + { 0x3d400070, 0x61027f10 }, + { 0x3d400074, 0x7b0 }, + { 0x3d4000d0, 0xc00307a3 }, + { 0x3d4000d4, 0xc50000 }, + { 0x3d4000dc, 0xf4003f }, + { 0x3d4000e0, 0x330000 }, + { 0x3d4000e8, 0x660048 }, + { 0x3d4000ec, 0x160048 }, + { 0x3d400100, 0x2028112a }, + { 0x3d400104, 0x8083f }, + { 0x3d40010c, 0xe0e000 }, + { 0x3d400110, 0x12040a12 }, + { 0x3d400114, 0x2050f0f }, + { 0x3d400118, 0x1010009 }, + { 0x3d40011c, 0x501 }, + { 0x3d400130, 0x20800 }, + { 0x3d400134, 0xe100002 }, + { 0x3d400138, 0x120 }, + { 0x3d400144, 0xc80064 }, + { 0x3d400180, 0x3e8001e }, + { 0x3d400184, 0x3207a12 }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x49f820e }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x1f0e }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0xdf00e4 }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x11 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x1 }, + { 0x3d4000f4, 0xc99 }, + { 0x3d400108, 0x9121c1c }, + { 0x3d400200, 0x17 }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, + { 0x3d400250, 0x1705 }, + { 0x3d400254, 0x2c }, + { 0x3d40025c, 0x4000030 }, + { 0x3d400264, 0x900093e7 }, + { 0x3d40026c, 0x2005574 }, + { 0x3d400400, 0x111 }, + { 0x3d400404, 0x72ff }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x2100e07 }, + { 0x3d400498, 0x620096 }, + { 0x3d40049c, 0x1100e07 }, + { 0x3d4004a0, 0xc8012c }, + { 0x3d402020, 0x1020 }, + { 0x3d402024, 0x30d400 }, + { 0x3d402050, 0x20d000 }, + { 0x3d402064, 0x6001c }, + { 0x3d4020dc, 0x840000 }, + { 0x3d4020e0, 0x330000 }, + { 0x3d4020e8, 0x660048 }, + { 0x3d4020ec, 0x160048 }, + { 0x3d402100, 0xa040105 }, + { 0x3d402104, 0x30407 }, + { 0x3d402108, 0x203060b }, + { 0x3d40210c, 0x505000 }, + { 0x3d402110, 0x2040202 }, + { 0x3d402114, 0x2030202 }, + { 0x3d402118, 0x1010004 }, + { 0x3d40211c, 0x301 }, + { 0x3d402130, 0x20300 }, + { 0x3d402134, 0xa100002 }, + { 0x3d402138, 0x1d }, + { 0x3d402144, 0x14000a }, + { 0x3d402180, 0x640004 }, + { 0x3d402190, 0x3818200 }, + { 0x3d402194, 0x80303 }, + { 0x3d4021b4, 0x100 }, + { 0x3d4020f4, 0xc99 }, + { 0x3d403020, 0x1020 }, + { 0x3d403024, 0xc3500 }, + { 0x3d403050, 0x20d000 }, + { 0x3d403064, 0x30007 }, + { 0x3d4030dc, 0x840000 }, + { 0x3d4030e0, 0x330000 }, + { 0x3d4030e8, 0x660048 }, + { 0x3d4030ec, 0x160048 }, + { 0x3d403100, 0xa010102 }, + { 0x3d403104, 0x30404 }, + { 0x3d403108, 0x203060b }, + { 0x3d40310c, 0x505000 }, + { 0x3d403110, 0x2040202 }, + { 0x3d403114, 0x2030202 }, + { 0x3d403118, 0x1010004 }, + { 0x3d40311c, 0x301 }, + { 0x3d403130, 0x20300 }, + { 0x3d403134, 0xa100002 }, + { 0x3d403138, 0x8 }, + { 0x3d403144, 0x50003 }, + { 0x3d403180, 0x190004 }, + { 0x3d403190, 0x3818200 }, + { 0x3d403194, 0x80303 }, + { 0x3d4031b4, 0x100 }, + { 0x3d4030f4, 0xc99 }, + { 0x3d400028, 0x0 }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x0 }, + { 0x100a1, 0x1 }, + { 0x100a2, 0x2 }, + { 0x100a3, 0x3 }, + { 0x100a4, 0x4 }, + { 0x100a5, 0x5 }, + { 0x100a6, 0x6 }, + { 0x100a7, 0x7 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x1 }, + { 0x110a2, 0x3 }, + { 0x110a3, 0x4 }, + { 0x110a4, 0x5 }, + { 0x110a5, 0x2 }, + { 0x110a6, 0x7 }, + { 0x110a7, 0x6 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x1 }, + { 0x120a2, 0x3 }, + { 0x120a3, 0x2 }, + { 0x120a4, 0x5 }, + { 0x120a5, 0x4 }, + { 0x120a6, 0x7 }, + { 0x120a7, 0x6 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x1 }, + { 0x130a2, 0x2 }, + { 0x130a3, 0x3 }, + { 0x130a4, 0x4 }, + { 0x130a5, 0x5 }, + { 0x130a6, 0x6 }, + { 0x130a7, 0x7 }, + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + { 0x11005f, 0x1ff }, + { 0x11015f, 0x1ff }, + { 0x11105f, 0x1ff }, + { 0x11115f, 0x1ff }, + { 0x11205f, 0x1ff }, + { 0x11215f, 0x1ff }, + { 0x11305f, 0x1ff }, + { 0x11315f, 0x1ff }, + { 0x21005f, 0x1ff }, + { 0x21015f, 0x1ff }, + { 0x21105f, 0x1ff }, + { 0x21115f, 0x1ff }, + { 0x21205f, 0x1ff }, + { 0x21215f, 0x1ff }, + { 0x21305f, 0x1ff }, + { 0x21315f, 0x1ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + { 0x200c5, 0x18 }, + { 0x1200c5, 0x7 }, + { 0x2200c5, 0x7 }, + { 0x2002e, 0x2 }, + { 0x12002e, 0x2 }, + { 0x22002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x20024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x120024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x220024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x20056, 0x3 }, + { 0x120056, 0x3 }, + { 0x220056, 0x3 }, + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x1204d, 0xe00 }, + { 0x1214d, 0xe00 }, + { 0x1304d, 0xe00 }, + { 0x1314d, 0xe00 }, + { 0x11004d, 0xe00 }, + { 0x11014d, 0xe00 }, + { 0x11104d, 0xe00 }, + { 0x11114d, 0xe00 }, + { 0x11204d, 0xe00 }, + { 0x11214d, 0xe00 }, + { 0x11304d, 0xe00 }, + { 0x11314d, 0xe00 }, + { 0x21004d, 0xe00 }, + { 0x21014d, 0xe00 }, + { 0x21104d, 0xe00 }, + { 0x21114d, 0xe00 }, + { 0x21204d, 0xe00 }, + { 0x21214d, 0xe00 }, + { 0x21304d, 0xe00 }, + { 0x21314d, 0xe00 }, + { 0x10049, 0xeba }, + { 0x10149, 0xeba }, + { 0x11049, 0xeba }, + { 0x11149, 0xeba }, + { 0x12049, 0xeba }, + { 0x12149, 0xeba }, + { 0x13049, 0xeba }, + { 0x13149, 0xeba }, + { 0x110049, 0xeba }, + { 0x110149, 0xeba }, + { 0x111049, 0xeba }, + { 0x111149, 0xeba }, + { 0x112049, 0xeba }, + { 0x112149, 0xeba }, + { 0x113049, 0xeba }, + { 0x113149, 0xeba }, + { 0x210049, 0xeba }, + { 0x210149, 0xeba }, + { 0x211049, 0xeba }, + { 0x211149, 0xeba }, + { 0x212049, 0xeba }, + { 0x212149, 0xeba }, + { 0x213049, 0xeba }, + { 0x213149, 0xeba }, + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x3e8 }, + { 0x120008, 0x64 }, + { 0x220008, 0x19 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x104 }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + { 0x1200b2, 0x104 }, + { 0x110043, 0x5a1 }, + { 0x110143, 0x5a1 }, + { 0x111043, 0x5a1 }, + { 0x111143, 0x5a1 }, + { 0x112043, 0x5a1 }, + { 0x112143, 0x5a1 }, + { 0x113043, 0x5a1 }, + { 0x113143, 0x5a1 }, + { 0x2200b2, 0x104 }, + { 0x210043, 0x5a1 }, + { 0x210143, 0x5a1 }, + { 0x211043, 0x5a1 }, + { 0x211143, 0x5a1 }, + { 0x212043, 0x5a1 }, + { 0x212143, 0x5a1 }, + { 0x213043, 0x5a1 }, + { 0x213143, 0x5a1 }, + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + { 0x20019, 0x1 }, + { 0x120019, 0x1 }, + { 0x220019, 0x1 }, + { 0x200f0, 0x660 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5665 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x12002d, 0x0 }, + { 0x22002d, 0x0 }, + { 0x2007d, 0x212 }, + { 0x12007d, 0x212 }, + { 0x22007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x12007c, 0x61 }, + { 0x22007c, 0x61 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x1204a, 0x500 }, + { 0x1304a, 0x500 }, + { 0x2002c, 0x0 }, +}; + +/* ddr phy trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { + { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, + { 0x200cb, 0x0 }, + { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, + { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, + { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, + { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, + { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, + { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, + { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, + { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, + { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, + { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, + { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, + { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, + { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, + { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, + { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, + { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, + { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, + { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, + { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, + { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, + { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, + { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, + { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, + { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, + { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, + { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, + { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, + { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, + { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, + { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, + { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, + { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, + { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, + { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, + { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, + { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, + { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, + { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, + { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, + { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, + { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, + { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, + { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, + { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, + { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, + { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, + { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, + { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, + { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, + { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, + { 0x10168, 0x0 }, + { 0x10268, 0x0 }, + { 0x10368, 0x0 }, + { 0x10468, 0x0 }, + { 0x10568, 0x0 }, + { 0x10668, 0x0 }, + { 0x10768, 0x0 }, + { 0x10868, 0x0 }, + { 0x11068, 0x0 }, + { 0x11168, 0x0 }, + { 0x11268, 0x0 }, + { 0x11368, 0x0 }, + { 0x11468, 0x0 }, + { 0x11568, 0x0 }, + { 0x11668, 0x0 }, + { 0x11768, 0x0 }, + { 0x11868, 0x0 }, + { 0x12068, 0x0 }, + { 0x12168, 0x0 }, + { 0x12268, 0x0 }, + { 0x12368, 0x0 }, + { 0x12468, 0x0 }, + { 0x12568, 0x0 }, + { 0x12668, 0x0 }, + { 0x12768, 0x0 }, + { 0x12868, 0x0 }, + { 0x13068, 0x0 }, + { 0x13168, 0x0 }, + { 0x13268, 0x0 }, + { 0x13368, 0x0 }, + { 0x13468, 0x0 }, + { 0x13568, 0x0 }, + { 0x13668, 0x0 }, + { 0x13768, 0x0 }, + { 0x13868, 0x0 }, + { 0x10069, 0x0 }, + { 0x10169, 0x0 }, + { 0x10269, 0x0 }, + { 0x10369, 0x0 }, + { 0x10469, 0x0 }, + { 0x10569, 0x0 }, + { 0x10669, 0x0 }, + { 0x10769, 0x0 }, + { 0x10869, 0x0 }, + { 0x11069, 0x0 }, + { 0x11169, 0x0 }, + { 0x11269, 0x0 }, + { 0x11369, 0x0 }, + { 0x11469, 0x0 }, + { 0x11569, 0x0 }, + { 0x11669, 0x0 }, + { 0x11769, 0x0 }, + { 0x11869, 0x0 }, + { 0x12069, 0x0 }, + { 0x12169, 0x0 }, + { 0x12269, 0x0 }, + { 0x12369, 0x0 }, + { 0x12469, 0x0 }, + { 0x12569, 0x0 }, + { 0x12669, 0x0 }, + { 0x12769, 0x0 }, + { 0x12869, 0x0 }, + { 0x13069, 0x0 }, + { 0x13169, 0x0 }, + { 0x13269, 0x0 }, + { 0x13369, 0x0 }, + { 0x13469, 0x0 }, + { 0x13569, 0x0 }, + { 0x13669, 0x0 }, + { 0x13769, 0x0 }, + { 0x13869, 0x0 }, + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, + { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, + { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, + { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, + { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, + { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, + { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, + { 0x1318c, 0x0 }, + { 0x11318c, 0x0 }, + { 0x21318c, 0x0 }, + { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, + { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, + { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, + { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, + { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, + { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, + { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, + { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, + { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, + { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, + { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, + { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, + { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, + { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, + { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, + { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, + { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, + { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, + { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, + { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, + { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, + { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, + { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, + { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, + { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, + { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, + { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, + { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, + { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, + { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, + { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, + { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, + { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, + { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, + { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, + { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, + { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, + { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, + { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, + { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, + { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, + { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, + { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, + { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, + { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, + { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, + { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, + { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, + { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, + { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, + { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, + { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, + { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, + { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, + { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, + { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, + { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, + { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, + { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, + { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, + { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, + { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, + { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, + { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, + { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, + { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, + { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, + { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, + { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, + { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, + { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, + { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, + { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, + { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, + { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, + { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, + { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, + { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, + { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, + { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, + { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, + { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, + { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, + { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, + { 0x20072, 0x0 }, + { 0x20073, 0x0 }, + { 0x20074, 0x0 }, + { 0x100aa, 0x0 }, + { 0x110aa, 0x0 }, + { 0x120aa, 0x0 }, + { 0x130aa, 0x0 }, + { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, + { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, + { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, + { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, + { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, + { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, + { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, + { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, + { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, + { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, + { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, + { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, + { 0x100a4, 0x0 }, + { 0x100a5, 0x0 }, + { 0x100a6, 0x0 }, + { 0x100a7, 0x0 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x0 }, + { 0x110a2, 0x0 }, + { 0x110a3, 0x0 }, + { 0x110a4, 0x0 }, + { 0x110a5, 0x0 }, + { 0x110a6, 0x0 }, + { 0x110a7, 0x0 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x0 }, + { 0x120a2, 0x0 }, + { 0x120a3, 0x0 }, + { 0x120a4, 0x0 }, + { 0x120a5, 0x0 }, + { 0x120a6, 0x0 }, + { 0x120a7, 0x0 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, + { 0x130a4, 0x0 }, + { 0x130a5, 0x0 }, + { 0x130a6, 0x0 }, + { 0x130a7, 0x0 }, + { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, + { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, + { 0x400fd, 0x0 }, + { 0x400c0, 0x0 }, + { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, + { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, + { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, + { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, + { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, + { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, + { 0x10062, 0x0 }, + { 0x10162, 0x0 }, + { 0x10262, 0x0 }, + { 0x10362, 0x0 }, + { 0x10462, 0x0 }, + { 0x10562, 0x0 }, + { 0x10662, 0x0 }, + { 0x10762, 0x0 }, + { 0x10862, 0x0 }, + { 0x11062, 0x0 }, + { 0x11162, 0x0 }, + { 0x11262, 0x0 }, + { 0x11362, 0x0 }, + { 0x11462, 0x0 }, + { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, + { 0x12062, 0x0 }, + { 0x12162, 0x0 }, + { 0x12262, 0x0 }, + { 0x12362, 0x0 }, + { 0x12462, 0x0 }, + { 0x12562, 0x0 }, + { 0x12662, 0x0 }, + { 0x12762, 0x0 }, + { 0x12862, 0x0 }, + { 0x13062, 0x0 }, + { 0x13162, 0x0 }, + { 0x13262, 0x0 }, + { 0x13362, 0x0 }, + { 0x13462, 0x0 }, + { 0x13562, 0x0 }, + { 0x13662, 0x0 }, + { 0x13762, 0x0 }, + { 0x13862, 0x0 }, + { 0x20077, 0x0 }, + { 0x10001, 0x0 }, + { 0x11001, 0x0 }, + { 0x12001, 0x0 }, + { 0x13001, 0x0 }, + { 0x10040, 0x0 }, + { 0x10140, 0x0 }, + { 0x10240, 0x0 }, + { 0x10340, 0x0 }, + { 0x10440, 0x0 }, + { 0x10540, 0x0 }, + { 0x10640, 0x0 }, + { 0x10740, 0x0 }, + { 0x10840, 0x0 }, + { 0x10030, 0x0 }, + { 0x10130, 0x0 }, + { 0x10230, 0x0 }, + { 0x10330, 0x0 }, + { 0x10430, 0x0 }, + { 0x10530, 0x0 }, + { 0x10630, 0x0 }, + { 0x10730, 0x0 }, + { 0x10830, 0x0 }, + { 0x11040, 0x0 }, + { 0x11140, 0x0 }, + { 0x11240, 0x0 }, + { 0x11340, 0x0 }, + { 0x11440, 0x0 }, + { 0x11540, 0x0 }, + { 0x11640, 0x0 }, + { 0x11740, 0x0 }, + { 0x11840, 0x0 }, + { 0x11030, 0x0 }, + { 0x11130, 0x0 }, + { 0x11230, 0x0 }, + { 0x11330, 0x0 }, + { 0x11430, 0x0 }, + { 0x11530, 0x0 }, + { 0x11630, 0x0 }, + { 0x11730, 0x0 }, + { 0x11830, 0x0 }, + { 0x12040, 0x0 }, + { 0x12140, 0x0 }, + { 0x12240, 0x0 }, + { 0x12340, 0x0 }, + { 0x12440, 0x0 }, + { 0x12540, 0x0 }, + { 0x12640, 0x0 }, + { 0x12740, 0x0 }, + { 0x12840, 0x0 }, + { 0x12030, 0x0 }, + { 0x12130, 0x0 }, + { 0x12230, 0x0 }, + { 0x12330, 0x0 }, + { 0x12430, 0x0 }, + { 0x12530, 0x0 }, + { 0x12630, 0x0 }, + { 0x12730, 0x0 }, + { 0x12830, 0x0 }, + { 0x13040, 0x0 }, + { 0x13140, 0x0 }, + { 0x13240, 0x0 }, + { 0x13340, 0x0 }, + { 0x13440, 0x0 }, + { 0x13540, 0x0 }, + { 0x13640, 0x0 }, + { 0x13740, 0x0 }, + { 0x13840, 0x0 }, + { 0x13030, 0x0 }, + { 0x13130, 0x0 }, + { 0x13230, 0x0 }, + { 0x13330, 0x0 }, + { 0x13430, 0x0 }, + { 0x13530, 0x0 }, + { 0x13630, 0x0 }, + { 0x13730, 0x0 }, + { 0x13830, 0x0 }, +}; + +static struct dram_cfg_param ddr_fsp0_cfg_4g[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x333f }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x333f }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_cfg_param ddr_fsp1_cfg_4g[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_cfg_param ddr_fsp2_cfg_4g[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_cfg_param ddr_fsp0_2d_cfg_4g[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x310 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x333f }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x333f }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x633 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x633 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x633 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x633 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x633 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x633 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xb }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x1 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a4, 0x0 }, + { 0x900a5, 0x790 }, + { 0x900a6, 0x11a }, + { 0x900a7, 0x8 }, + { 0x900a8, 0x7aa }, + { 0x900a9, 0x2a }, + { 0x900aa, 0x10 }, + { 0x900ab, 0x7b2 }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x0 }, + { 0x900ae, 0x7c8 }, + { 0x900af, 0x109 }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x10 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x1 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xd }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x8 }, + { 0x90159, 0xe8 }, + { 0x9015a, 0x109 }, + { 0x9015b, 0x0 }, + { 0x9015c, 0x8140 }, + { 0x9015d, 0x10c }, + { 0x9015e, 0x10 }, + { 0x9015f, 0x8138 }, + { 0x90160, 0x104 }, + { 0x90161, 0x8 }, + { 0x90162, 0x448 }, + { 0x90163, 0x109 }, + { 0x90164, 0xf }, + { 0x90165, 0x7c0 }, + { 0x90166, 0x109 }, + { 0x90167, 0x0 }, + { 0x90168, 0xe8 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x47 }, + { 0x9016b, 0x630 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x8 }, + { 0x9016e, 0x618 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0xe0 }, + { 0x90172, 0x109 }, + { 0x90173, 0x0 }, + { 0x90174, 0x7c8 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x8140 }, + { 0x90178, 0x10c }, + { 0x90179, 0x0 }, + { 0x9017a, 0x478 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x1 }, + { 0x9017e, 0x8 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x4 }, + { 0x90181, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x29 }, + { 0x90026, 0x68 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x7d }, + { 0x2000c, 0xfa }, + { 0x2000d, 0x9c4 }, + { 0x2000e, 0x2c }, + { 0x12000b, 0xc }, + { 0x12000c, 0x19 }, + { 0x12000d, 0xfa }, + { 0x12000e, 0x10 }, + { 0x22000b, 0x3 }, + { 0x22000c, 0x6 }, + { 0x22000d, 0x3e }, + { 0x22000e, 0x10 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x140080, 0xe0 }, + { 0x140081, 0x12 }, + { 0x140082, 0xe0 }, + { 0x140083, 0x12 }, + { 0x140084, 0xe0 }, + { 0x140085, 0x12 }, + { 0x240080, 0xe0 }, + { 0x240081, 0x12 }, + { 0x240082, 0xe0 }, + { 0x240083, 0x12 }, + { 0x240084, 0xe0 }, + { 0x240085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 } +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg_4g[] = { + { + /* P0 4000mts 1D */ + .drate = 4000, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg_4g, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg_4g), + }, { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg_4g, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg_4g), + }, { + /* P2 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg_4g, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg_4g), + }, { + /* P0 4000mts 2D */ + .drate = 4000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg_4g, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg_4g), + }, +}; + +struct dram_timing_info dram_timing_4g = { + .ddrc_cfg = ddr_ddrc_cfg_4g, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg_4g), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg_4g, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg_4g), + .ddrphy_trained_csr = ddr_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 4000, 400, 100, }, +}; diff --git a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c index 5a951d1abf..dd6d62b165 100644 --- a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c +++ b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c @@ -19,18 +19,17 @@ #include <i2c/i2c-gpio.h> #include <i2c/at24.h> -#include <mach/clock.h> -#include <mach/imx-regs.h> -#include <mach/iomux.h> -#include <mach/mci.h> +#include <mach/mxs/imx-regs.h> +#include <mach/mxs/iomux.h> +#include <mach/mxs/mci.h> #include <asm/armlinux.h> #include <asm/mmu.h> #include <asm/barebox-arm.h> -#include <mach/fb.h> +#include <mach/mxs/fb.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include "hwdetect.h" diff --git a/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c b/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c index 92b42aa893..447ef0dc66 100644 --- a/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c +++ b/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c @@ -4,11 +4,25 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx28-regs.h> -#include <generated/mach-types.h> +#include <mach/mxs/imx28-regs.h> +#include <asm/mach-types.h> + +static noinline void continue_imx_entry(size_t size) +{ + static struct barebox_arm_boarddata boarddata = { + .magic = BAREBOX_ARM_BOARDDATA_MAGIC, + .machine = MACH_TYPE_CFA10036, + }; + + barebox_arm_entry(IMX_MEMORY_BASE, size, &boarddata); +} ENTRY_FUNCTION(start_cfa10036, r0, r1, r2) { arm_cpu_lowlevel_init(); - barebox_arm_entry(IMX_MEMORY_BASE, SZ_128M, (void *)MACH_TYPE_CFA10036); + + relocate_to_current_adr(); + setup_c(); + + continue_imx_entry(SZ_128M); } diff --git a/arch/arm/boards/datamodul-edm-qmx6/board.c b/arch/arm/boards/datamodul-edm-qmx6/board.c index 5a24ca0806..93abce33af 100644 --- a/arch/arm/boards/datamodul-edm-qmx6/board.c +++ b/arch/arm/boards/datamodul-edm-qmx6/board.c @@ -1,10 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-or-later // SPDX-FileCopyrightText: 2012 Steffen Trumtrar, Pengutronix -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <environment.h> #include <bootsource.h> -#include <partition.h> #include <common.h> #include <envfs.h> #include <linux/sizes.h> @@ -12,18 +11,19 @@ #include <gpio.h> #include <of.h> +#include <linux/mdio.h> +#include <linux/phy.h> #include <linux/micrel_phy.h> #include <mfd/stmpe-i2c.h> #include <asm/armlinux.h> #include <asm/io.h> -#include <mach/devices-imx6.h> -#include <mach/imx6-regs.h> -#include <mach/iomux-mx6.h> -#include <mach/generic.h> -#include <mach/imx6.h> -#include <mach/bbu.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/iomux-mx6.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6.h> +#include <mach/imx/bbu.h> #define RQ7_GPIO_ENET_PHYADD2 IMX_GPIO_NR(6, 30) #define RQ7_GPIO_ENET_MODE0 IMX_GPIO_NR(6, 25) @@ -49,9 +49,9 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev) * min rx data delay, max rx/tx clock delay, * min rx/tx control delay */ - phy_write_mmd_indirect(dev, 4, 2, 0); - phy_write_mmd_indirect(dev, 5, 2, 0); - phy_write_mmd_indirect(dev, 8, 2, 0x03ff); + phy_write_mmd(dev, MDIO_MMD_WIS, 4, 0); + phy_write_mmd(dev, MDIO_MMD_WIS, 5, 0); + phy_write_mmd(dev, MDIO_MMD_WIS, 8, 0x03ff); return 0; } diff --git a/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c b/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c index 8ac9317cb0..9566e492e3 100644 --- a/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c +++ b/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c @@ -9,8 +9,8 @@ #include <asm/mmu.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx6-mmdc.h> -#include <mach/generic.h> +#include <mach/imx/imx6-mmdc.h> +#include <mach/imx/generic.h> static void sdram_init(void) { diff --git a/arch/arm/boards/dfi-fs700-m60/board.c b/arch/arm/boards/dfi-fs700-m60/board.c index 99e36da2ec..a0cdc5b93a 100644 --- a/arch/arm/boards/dfi-fs700-m60/board.c +++ b/arch/arm/boards/dfi-fs700-m60/board.c @@ -3,7 +3,7 @@ #define pr_fmt(fmt) "dfi-fs700-m60: " fmt -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <environment.h> #include <bootsource.h> #include <globalvar.h> @@ -20,9 +20,9 @@ #include <asm/mmu.h> #include <asm/io.h> -#include <mach/imx6-regs.h> -#include <mach/generic.h> -#include <mach/bbu.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/generic.h> +#include <mach/imx/bbu.h> /* * This board can have 512MiB, 1GiB or 2GiB of SDRAM. The actual amount of SDRAM diff --git a/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg index 9f82165066..8eec14b014 100644 --- a/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg +++ b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x27800000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_DRAM_SDQS5 0x00000030 wm 32 MX6_IOM_DRAM_DQM5 0x00020030 diff --git a/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-nanya.imxcfg b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-nanya.imxcfg index ccb3e68487..9573459bd5 100644 --- a/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-nanya.imxcfg +++ b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q-nanya.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x27800000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000C0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg index 5b8bc26257..b6318e8812 100644 --- a/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg +++ b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x17800000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000c0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/dfi-fs700-m60/lowlevel.c b/arch/arm/boards/dfi-fs700-m60/lowlevel.c index d898cb5c1e..1ca0d6f090 100644 --- a/arch/arm/boards/dfi-fs700-m60/lowlevel.c +++ b/arch/arm/boards/dfi-fs700-m60/lowlevel.c @@ -8,8 +8,8 @@ #include <asm/mmu.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx6-regs.h> -#include <mach/generic.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/generic.h> #include <debug_ll.h> diff --git a/arch/arm/boards/digi-ccimx6ulsom/board.c b/arch/arm/boards/digi-ccimx6ulsom/board.c index b4fcc17e09..ef6828c02c 100644 --- a/arch/arm/boards/digi-ccimx6ulsom/board.c +++ b/arch/arm/boards/digi-ccimx6ulsom/board.c @@ -3,8 +3,8 @@ #include <common.h> #include <init.h> -#include <mach/generic.h> -#include <mach/bbu.h> +#include <mach/imx/generic.h> +#include <mach/imx/bbu.h> static int digi_ccimx6ulsbcpro_device_init(void) { diff --git a/arch/arm/boards/digi-ccimx6ulsom/lowlevel.c b/arch/arm/boards/digi-ccimx6ulsom/lowlevel.c index ba562a501f..08651f0779 100644 --- a/arch/arm/boards/digi-ccimx6ulsom/lowlevel.c +++ b/arch/arm/boards/digi-ccimx6ulsom/lowlevel.c @@ -1,9 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm.h> -#include <mach/esdctl.h> +#include <mach/imx/esdctl.h> #include <asm/cache.h> diff --git a/arch/arm/boards/dss11/init.c b/arch/arm/boards/dss11/init.c index 6ce986fc39..41c2b10972 100644 --- a/arch/arm/boards/dss11/init.c +++ b/arch/arm/boards/dss11/init.c @@ -7,20 +7,19 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <asm/io.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/mtd/rawnand.h> #include <linux/mtd/nand.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91_rstc.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_rstc.h> #include <linux/clk.h> static struct atmel_nand_data nand_pdata = { diff --git a/arch/arm/boards/dss11/lowlevel.c b/arch/arm/boards/dss11/lowlevel.c index 7f52f824df..be2675369c 100644 --- a/arch/arm/boards/dss11/lowlevel.c +++ b/arch/arm/boards/dss11/lowlevel.c @@ -7,14 +7,12 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> -#include <mach/at91sam9_sdramc.h> -#include <mach/at91sam9260.h> -#include <mach/hardware.h> - -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_dss11, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/duckbill/board.c b/arch/arm/boards/duckbill/board.c index dd22c81566..edb9320f0e 100644 --- a/arch/arm/boards/duckbill/board.c +++ b/arch/arm/boards/duckbill/board.c @@ -11,14 +11,13 @@ #include <io.h> #include <net.h> -#include <mach/clock.h> -#include <mach/imx-regs.h> -#include <mach/iomux-imx28.h> -#include <mach/iomux.h> -#include <mach/ocotp.h> -#include <mach/devices.h> -#include <mach/usb.h> -#include <usb/fsl_usb2.h> +#include <mach/mxs/imx-regs.h> +#include <mach/mxs/iomux-imx28.h> +#include <mach/mxs/iomux.h> +#include <mach/mxs/ocotp.h> +#include <mach/mxs/devices.h> +#include <mach/mxs/usb.h> +#include <linux/usb/fsl_usb2.h> #include <asm/armlinux.h> #include <asm/mmu.h> diff --git a/arch/arm/boards/duckbill/lowlevel.c b/arch/arm/boards/duckbill/lowlevel.c index 0f76d9c938..71862ec4b7 100644 --- a/arch/arm/boards/duckbill/lowlevel.c +++ b/arch/arm/boards/duckbill/lowlevel.c @@ -7,11 +7,11 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx28-regs.h> -#include <mach/init.h> +#include <mach/mxs/imx28-regs.h> +#include <mach/mxs/init.h> #include <io.h> #include <debug_ll.h> -#include <mach/iomux.h> +#include <mach/mxs/iomux.h> #include <stmp-device.h> extern char __dtb_imx28_duckbill_start[]; diff --git a/arch/arm/boards/ebv-socrates/board.c b/arch/arm/boards/ebv-socrates/board.c index c2a8edac98..79085a5bb5 100644 --- a/arch/arm/boards/ebv-socrates/board.c +++ b/arch/arm/boards/ebv-socrates/board.c @@ -13,7 +13,7 @@ #include <linux/sizes.h> #include <fcntl.h> #include <fs.h> -#include <mach/cyclone5-regs.h> +#include <mach/socfpga/cyclone5-regs.h> static int phy_fixup(struct phy_device *dev) { diff --git a/arch/arm/boards/ebv-socrates/iocsr_config_cyclone5.c b/arch/arm/boards/ebv-socrates/iocsr_config_cyclone5.c index 9a814cba79..a769ff5366 100644 --- a/arch/arm/boards/ebv-socrates/iocsr_config_cyclone5.c +++ b/arch/arm/boards/ebv-socrates/iocsr_config_cyclone5.c @@ -27,7 +27,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/cyclone5-scan-manager.h> +#include <mach/socfpga/cyclone5-scan-manager.h> static const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { 0x00000000, diff --git a/arch/arm/boards/ebv-socrates/lowlevel.c b/arch/arm/boards/ebv-socrates/lowlevel.c index 1f5b835df2..56b0f43a33 100644 --- a/arch/arm/boards/ebv-socrates/lowlevel.c +++ b/arch/arm/boards/ebv-socrates/lowlevel.c @@ -9,7 +9,7 @@ #include "sequencer_auto_ac_init.c" #include "iocsr_config_cyclone5.c" -#include <mach/lowlevel.h> +#include <mach/socfpga/lowlevel.h> static inline void ledon(void) { diff --git a/arch/arm/boards/edb93xx/edb93xx.c b/arch/arm/boards/edb93xx/edb93xx.c index 4b5db60216..a3fb14822a 100644 --- a/arch/arm/boards/edb93xx/edb93xx.c +++ b/arch/arm/boards/edb93xx/edb93xx.c @@ -6,12 +6,11 @@ #include <environment.h> #include <fs.h> #include <init.h> -#include <partition.h> #include <asm/armlinux.h> #include <io.h> #include <malloc.h> -#include <generated/mach-types.h> -#include <mach/ep93xx-regs.h> +#include <asm/mach-types.h> +#include <mach/ep93xx/ep93xx-regs.h> #include <platform_data/eth-ep93xx.h> #include "edb93xx.h" diff --git a/arch/arm/boards/edb93xx/flash_cfg.c b/arch/arm/boards/edb93xx/flash_cfg.c index 8400db69de..2c471c7721 100644 --- a/arch/arm/boards/edb93xx/flash_cfg.c +++ b/arch/arm/boards/edb93xx/flash_cfg.c @@ -4,7 +4,7 @@ /* Flash setup for Cirrus edb93xx boards */ #include <common.h> -#include <mach/ep93xx-regs.h> +#include <mach/ep93xx/ep93xx-regs.h> #include <io.h> #define SMC_BCR6_VALUE (2 << SMC_BCR_IDCY_SHIFT | 5 << SMC_BCR_WST1_SHIFT | \ diff --git a/arch/arm/boards/edb93xx/pll_cfg.h b/arch/arm/boards/edb93xx/pll_cfg.h index b3258b5f7e..662c92337a 100644 --- a/arch/arm/boards/edb93xx/pll_cfg.h +++ b/arch/arm/boards/edb93xx/pll_cfg.h @@ -4,7 +4,7 @@ /* PLL register values for Cirrus edb93xx boards */ #include <config.h> -#include <mach/ep93xx-regs.h> +#include <mach/ep93xx/ep93xx-regs.h> #if defined(CONFIG_MACH_EDB9301) /* diff --git a/arch/arm/boards/edb93xx/sdram_cfg.h b/arch/arm/boards/edb93xx/sdram_cfg.h index e1f78443e4..ddb9e442ed 100644 --- a/arch/arm/boards/edb93xx/sdram_cfg.h +++ b/arch/arm/boards/edb93xx/sdram_cfg.h @@ -3,7 +3,7 @@ // SPDX-FileCopyrightText: 2006 Dominic Rath <Dominic.Rath@gmx.de> #include <config.h> -#include <mach/ep93xx-regs.h> +#include <mach/ep93xx/ep93xx-regs.h> #define SDRAM_BASE_ADDR CONFIG_EP93XX_SDRAM_BANK0_BASE diff --git a/arch/arm/boards/efika-mx-smartbook/board.c b/arch/arm/boards/efika-mx-smartbook/board.c index bf58eff718..5101e3a558 100644 --- a/arch/arm/boards/efika-mx-smartbook/board.c +++ b/arch/arm/boards/efika-mx-smartbook/board.c @@ -3,7 +3,6 @@ #include <environment.h> #include <bootsource.h> -#include <partition.h> #include <common.h> #include <envfs.h> #include <fcntl.h> @@ -20,13 +19,12 @@ #include <asm/armlinux.h> -#include <mach/devices-imx51.h> -#include <mach/imx51-regs.h> -#include <mach/iomux-mx51.h> -#include <mach/revision.h> -#include <mach/generic.h> -#include <mach/imx5.h> -#include <mach/bbu.h> +#include <mach/imx/imx51-regs.h> +#include <mach/imx/iomux-mx51.h> +#include <mach/imx/revision.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx5.h> +#include <mach/imx/bbu.h> #define GPIO_BACKLIGHT_POWER IMX_GPIO_NR(4, 12) #define GPIO_BACKLIGHT_PWM IMX_GPIO_NR(1, 2) diff --git a/arch/arm/boards/efika-mx-smartbook/lowlevel.c b/arch/arm/boards/efika-mx-smartbook/lowlevel.c index 5375578c94..cf2f145e74 100644 --- a/arch/arm/boards/efika-mx-smartbook/lowlevel.c +++ b/arch/arm/boards/efika-mx-smartbook/lowlevel.c @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx5.h> +#include <mach/imx/imx5.h> extern char __dtb_imx51_genesi_efika_sb_start[]; diff --git a/arch/arm/boards/element14-warp7/board.c b/arch/arm/boards/element14-warp7/board.c index 9427b467d0..0013421df0 100644 --- a/arch/arm/boards/element14-warp7/board.c +++ b/arch/arm/boards/element14-warp7/board.c @@ -4,11 +4,10 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> -#include <mach/generic.h> +#include <asm/mach-types.h> +#include <mach/imx/generic.h> #include <linux/sizes.h> static int warp7_devices_init(void) diff --git a/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg b/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg index 798f2cbcb0..c17321ad3a 100644 --- a/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg +++ b/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg @@ -13,7 +13,7 @@ soc imx7 loadaddr 0x80000000 ivtofs 0x400 -#include <mach/imx7-ddr-regs.h> +#include <mach/imx/imx7-ddr-regs.h> wm 32 0x30340004 0x4F400005 diff --git a/arch/arm/boards/element14-warp7/lowlevel.c b/arch/arm/boards/element14-warp7/lowlevel.c index 94b7eb598b..c6ddfea5a4 100644 --- a/arch/arm/boards/element14-warp7/lowlevel.c +++ b/arch/arm/boards/element14-warp7/lowlevel.c @@ -4,11 +4,12 @@ #include <io.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/debug_ll.h> +#include <mach/imx/debug_ll.h> #include <asm/cache.h> +#include <mach/imx/debug_ll.h> extern char __dtb_imx7s_warp_start[]; diff --git a/arch/arm/boards/eltec-hipercam/board.c b/arch/arm/boards/eltec-hipercam/board.c index e192c4c2f5..b8ad17992c 100644 --- a/arch/arm/boards/eltec-hipercam/board.c +++ b/arch/arm/boards/eltec-hipercam/board.c @@ -4,7 +4,7 @@ #include <common.h> #include <init.h> #include <bbu.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> static int hipercam_init(void) { diff --git a/arch/arm/boards/eltec-hipercam/flash-header-eltec-hipercam.imxcfg b/arch/arm/boards/eltec-hipercam/flash-header-eltec-hipercam.imxcfg index e53f1c107f..3a96910708 100644 --- a/arch/arm/boards/eltec-hipercam/flash-header-eltec-hipercam.imxcfg +++ b/arch/arm/boards/eltec-hipercam/flash-header-eltec-hipercam.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x10000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 wm 32 MX6_IOM_DRAM_SDQS1 0x00000030 diff --git a/arch/arm/boards/eltec-hipercam/lowlevel.c b/arch/arm/boards/eltec-hipercam/lowlevel.c index 7baed55706..154c0e58f5 100644 --- a/arch/arm/boards/eltec-hipercam/lowlevel.c +++ b/arch/arm/boards/eltec-hipercam/lowlevel.c @@ -5,11 +5,12 @@ #include <linux/sizes.h> #include <io.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <asm/sections.h> #include <asm/mmu.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> static void setup_uart(void) { diff --git a/arch/arm/boards/embedsky-e9/board.c b/arch/arm/boards/embedsky-e9/board.c index 0938a6d096..6052805b8a 100644 --- a/arch/arm/boards/embedsky-e9/board.c +++ b/arch/arm/boards/embedsky-e9/board.c @@ -13,26 +13,24 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/imx6-regs.h> +#include <mach/imx/imx6-regs.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <linux/phy.h> #include <asm/io.h> #include <asm/mmu.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <linux/sizes.h> #include <net.h> -#include <mach/imx6.h> -#include <mach/devices-imx6.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/imx6.h> +#include <mach/imx/iomux-mx6.h> #include <spi/spi.h> -#include <mach/spi.h> -#include <mach/usb.h> +#include <mach/imx/spi.h> +#include <mach/imx/usb.h> #include <envfs.h> #include <bootsource.h> #include <bbu.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #define PHY_ID_RTL8211E 0x001cc915 #define PHY_ID_MASK 0xffffffff diff --git a/arch/arm/boards/embedsky-e9/flash-header-e9.imxcfg b/arch/arm/boards/embedsky-e9/flash-header-e9.imxcfg index 474ad3a159..19e0039980 100644 --- a/arch/arm/boards/embedsky-e9/flash-header-e9.imxcfg +++ b/arch/arm/boards/embedsky-e9/flash-header-e9.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x27800000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000c0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/embedsky-e9/lowlevel.c b/arch/arm/boards/embedsky-e9/lowlevel.c index 1cda6e07e2..fddc88df52 100644 --- a/arch/arm/boards/embedsky-e9/lowlevel.c +++ b/arch/arm/boards/embedsky-e9/lowlevel.c @@ -2,7 +2,7 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/embest-marsboard/board.c b/arch/arm/boards/embest-marsboard/board.c index a11b7b6579..1a5e5a8491 100644 --- a/arch/arm/boards/embest-marsboard/board.c +++ b/arch/arm/boards/embest-marsboard/board.c @@ -8,7 +8,8 @@ #include <common.h> #include <init.h> #include <envfs.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> +#include <linux/mdio.h> #include <linux/phy.h> #include <deep-probe.h> @@ -19,13 +20,13 @@ static int ar8035_phy_fixup(struct phy_device *dev) /* Ar803x phy SmartEEE feature cause link status generates glitch, * which cause ethernet link down/up issue, so disable SmartEEE */ - val = phy_read_mmd_indirect(dev, 0x805d, 0x3); + val = phy_read_mmd(dev, MDIO_MMD_PCS, 0x805d); phy_write(dev, MII_MMD_DATA, val & ~(1 << 8)); - val = phy_read_mmd_indirect(dev, 0x4003, 0x3); + val = phy_read_mmd(dev, MDIO_MMD_PCS, 0x4003); phy_write(dev, MII_MMD_DATA, val & ~(1 << 8)); - val = phy_read_mmd_indirect(dev, 0x4007, 0x3); + val = phy_read_mmd(dev, MDIO_MMD_PCS, 0x4007); val &= 0xffe3; val |= 0x18; phy_write(dev, MII_MMD_DATA, val); @@ -33,7 +34,7 @@ static int ar8035_phy_fixup(struct phy_device *dev) return 0; } -static int marsboard_device_init(struct device_d *dev) +static int marsboard_device_init(struct device *dev) { barebox_set_hostname("marsboard"); @@ -53,7 +54,7 @@ static const struct of_device_id marsboard_of_match[] = { }; BAREBOX_DEEP_PROBE_ENABLE(marsboard_of_match); -static struct driver_d marsboard_driver = { +static struct driver marsboard_driver = { .name = "board-mars", .probe = marsboard_device_init, .of_compatible = marsboard_of_match, diff --git a/arch/arm/boards/embest-marsboard/lowlevel.c b/arch/arm/boards/embest-marsboard/lowlevel.c index 9e20a2ec06..84378c00f2 100644 --- a/arch/arm/boards/embest-marsboard/lowlevel.c +++ b/arch/arm/boards/embest-marsboard/lowlevel.c @@ -6,10 +6,11 @@ #include <common.h> #include <io.h> #include <asm/barebox-arm.h> -#include <mach/imx6.h> -#include <mach/esdctl.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/imx6.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/iomux-mx6.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> static inline void setup_uart(void) { diff --git a/arch/arm/boards/embest-riotboard/board.c b/arch/arm/boards/embest-riotboard/board.c index 2e0cc9f0ab..ebaff48388 100644 --- a/arch/arm/boards/embest-riotboard/board.c +++ b/arch/arm/boards/embest-riotboard/board.c @@ -10,59 +10,35 @@ #include <envfs.h> #include <gpio.h> #include <init.h> -#include <mach/generic.h> -#include <mach/imx6-regs.h> -#include <mach/imx6.h> -#include <mach/bbu.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx6.h> +#include <mach/imx/bbu.h> #include <mfd/imx6q-iomuxc-gpr.h> #include <linux/sizes.h> #include <linux/phy.h> +#include <deep-probe.h> -static int ar8035_phy_fixup(struct phy_device *dev) +static int riotboard_probe(struct device *dev) { - u16 val; - - /* Ar803x phy SmartEEE feature cause link status generates glitch, - * which cause ethernet link down/up issue, so disable SmartEEE - */ - phy_write(dev, 0xd, 0x3); - phy_write(dev, 0xe, 0x805d); - phy_write(dev, 0xd, 0x4003); - - val = phy_read(dev, 0xe); - phy_write(dev, 0xe, val & ~(1 << 8)); - - /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ - phy_write(dev, 0xd, 0x7); - phy_write(dev, 0xe, 0x8016); - phy_write(dev, 0xd, 0x4007); - - val = phy_read(dev, 0xe); - val &= 0xffe3; - val |= 0x18; - phy_write(dev, 0xe, val); - - /* introduce tx clock delay */ - phy_write(dev, 0x1d, 0x5); - val = phy_read(dev, 0x1e); - val |= 0x0100; - phy_write(dev, 0x1e, val); - - return 0; -} - -static int riotboard_device_init(void) -{ - if (!of_machine_is_compatible("riot,imx6s-riotboard")) - return 0; - - phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup); - imx6_bbu_internal_mmc_register_handler("emmc", "/dev/mmc3.barebox", BBU_HANDLER_FLAG_DEFAULT); + imx6_bbu_internal_mmc_register_handler("sd", "/dev/mmc2", 0); barebox_set_hostname("riotboard"); return 0; } -device_initcall(riotboard_device_init); + +static const struct of_device_id riotboard_of_match[] = { + { .compatible = "riot,imx6s-riotboard"}, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(riotboard_of_match); + +static struct driver riotboard_board_driver = { + .name = "board-riotboard", + .probe = riotboard_probe, + .of_compatible = DRV_OF_COMPAT(riotboard_of_match), +}; +device_platform_driver(riotboard_board_driver); diff --git a/arch/arm/boards/embest-riotboard/flash-header-embest-riotboard.imxcfg b/arch/arm/boards/embest-riotboard/flash-header-embest-riotboard.imxcfg index a005b500de..5464e2461d 100644 --- a/arch/arm/boards/embest-riotboard/flash-header-embest-riotboard.imxcfg +++ b/arch/arm/boards/embest-riotboard/flash-header-embest-riotboard.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x20000000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000c0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/embest-riotboard/lowlevel.c b/arch/arm/boards/embest-riotboard/lowlevel.c index 4093bf3bba..9ea92f5091 100644 --- a/arch/arm/boards/embest-riotboard/lowlevel.c +++ b/arch/arm/boards/embest-riotboard/lowlevel.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <linux/sizes.h> #include <io.h> @@ -9,7 +10,7 @@ #include <asm/sections.h> #include <asm/cache.h> #include <asm/mmu.h> -#include <mach/imx6.h> +#include <mach/imx/imx6.h> extern char __dtb_imx6s_riotboard_start[]; diff --git a/arch/arm/boards/enclustra-aa1/board.c b/arch/arm/boards/enclustra-aa1/board.c index 6261eb4b83..de886f21aa 100644 --- a/arch/arm/boards/enclustra-aa1/board.c +++ b/arch/arm/boards/enclustra-aa1/board.c @@ -4,7 +4,7 @@ #include <init.h> #include <io.h> #include <bbu.h> -#include <mach/arria10-system-manager.h> +#include <mach/socfpga/arria10-system-manager.h> static int aa1_init(void) { diff --git a/arch/arm/boards/enclustra-aa1/lowlevel.c b/arch/arm/boards/enclustra-aa1/lowlevel.c index 901adc4640..ba4d562e5f 100644 --- a/arch/arm/boards/enclustra-aa1/lowlevel.c +++ b/arch/arm/boards/enclustra-aa1/lowlevel.c @@ -10,17 +10,17 @@ #include <asm/unaligned.h> #include <debug_ll.h> #include <pbl.h> -#include <mach/arria10-sdram.h> -#include <mach/arria10-regs.h> -#include <mach/arria10-reset-manager.h> -#include <mach/arria10-clock-manager.h> -#include <mach/arria10-pinmux.h> -#include <mach/arria10-fpga.h> -#include <mach/init.h> +#include <mach/socfpga/arria10-sdram.h> +#include <mach/socfpga/arria10-regs.h> +#include <mach/socfpga/arria10-reset-manager.h> +#include <mach/socfpga/arria10-clock-manager.h> +#include <mach/socfpga/arria10-pinmux.h> +#include <mach/socfpga/arria10-fpga.h> +#include <mach/socfpga/init.h> #include "pll-config-arria10.c" #include "pinmux-config-arria10.c" -#include <mach/generic.h> -#include <mach/init.h> +#include <mach/socfpga/generic.h> +#include <mach/socfpga/init.h> #define BAREBOX_PART 0 // the bitstream is located in the second partition in the partition table diff --git a/arch/arm/boards/enclustra-aa1/pinmux-config-arria10.c b/arch/arm/boards/enclustra-aa1/pinmux-config-arria10.c index 3e250dbf6f..fea88e3336 100644 --- a/arch/arm/boards/enclustra-aa1/pinmux-config-arria10.c +++ b/arch/arm/boards/enclustra-aa1/pinmux-config-arria10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only -#include <mach/arria10-pinmux.h> +#include <mach/socfpga/arria10-pinmux.h> static uint32_t pinmux[] = { [arria10_pinmux_shared_io_q3_7] = 0, diff --git a/arch/arm/boards/enclustra-aa1/pll-config-arria10.c b/arch/arm/boards/enclustra-aa1/pll-config-arria10.c index 41aad354bc..8178550d7d 100644 --- a/arch/arm/boards/enclustra-aa1/pll-config-arria10.c +++ b/arch/arm/boards/enclustra-aa1/pll-config-arria10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only -#include <mach/arria10-clock-manager.h> +#include <mach/socfpga/arria10-clock-manager.h> static struct arria10_mainpll_cfg mainpll_cfg = { .cntr15clk_cnt = 900, diff --git a/arch/arm/boards/eukrea_cpuimx25/Makefile b/arch/arm/boards/eukrea_cpuimx25/Makefile deleted file mode 100644 index 1d2171fbdc..0000000000 --- a/arch/arm/boards/eukrea_cpuimx25/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2010 Eric Bénard <eric@eukrea.com>, Eukrea Electromatique - -obj-y += eukrea_cpuimx25.o -lwl-y += lowlevel.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-eukrea_cpuimx25 diff --git a/arch/arm/boards/eukrea_cpuimx25/defaultenv-eukrea_cpuimx25/bin/init_board b/arch/arm/boards/eukrea_cpuimx25/defaultenv-eukrea_cpuimx25/bin/init_board deleted file mode 100644 index 8f4151c357..0000000000 --- a/arch/arm/boards/eukrea_cpuimx25/defaultenv-eukrea_cpuimx25/bin/init_board +++ /dev/null @@ -1,41 +0,0 @@ -#!/bin/sh - -if [ -f /env/logo.bmp ]; then - splash /env/logo.bmp - fb0.enable=1 -elif [ -f /env/logo.bmp.lzo ]; then - uncompress /env/logo.bmp.lzo /logo.bmp - splash /logo.bmp - fb0.enable=1 -fi - -if [ ! -z $use_dfu ]; then - gpio_get_value 82 - if [ $? -eq 0 ]; then - gpio_set_value 83 0 - usbserial - timeout -s -a 2 - gpio_get_value 82 - if [ $? -eq 0 ]; then - usbserial -d - dfu -V 0x1234 -P 0x1234 /dev/nand0.barebox.bb(barebox)sr,/dev/nand0.kernel.bb(kernel)r,/dev/nand0.root.bb(root)r - gpio_get_value 82 - if [ $? -eq 0 ]; then - usbserial - autoboot_timeout=60 - else - reset - fi - else - autoboot_timeout=28 - fi - fi -fi - -if [ -z $eth0.ethaddr ]; then - while [ -z $eth0.ethaddr ]; do - readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr - done - echo -a /env/config "eth0.ethaddr=$eth0.ethaddr" - saveenv -fi diff --git a/arch/arm/boards/eukrea_cpuimx25/defaultenv-eukrea_cpuimx25/config b/arch/arm/boards/eukrea_cpuimx25/defaultenv-eukrea_cpuimx25/config deleted file mode 100644 index da19677574..0000000000 --- a/arch/arm/boards/eukrea_cpuimx25/defaultenv-eukrea_cpuimx25/config +++ /dev/null @@ -1,47 +0,0 @@ -#!/bin/sh - -# otg port mode : can be 'host' or 'device' -otg_mode="device" -# video : can be CMO-QVGA, URT-WVGA, DVI-VGA or DVI-SVGA -video="CMO-QVGA" - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=none - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'nfs', 'tftp' or 'nand' -kernel_loc=nand -# can be either 'net', 'nand' or 'initrd' -rootfs_loc=nand - -# rootfs -rootfs_type=ubifs -rootfsimage=${global.hostname}/rootfs.$rootfs_type - -# kernel -kernelimage=${global.hostname}/uImage-${global.hostname}.bin - -# barebox and it's env -bareboximage=${global.hostname}/barebox-${global.hostname}.bin -bareboxenvimage=${global.hostname}/bareboxenv-${global.hostname}.bin - -nfsroot="$eth0.serverip:/srv/nfs/${global.hostname}" - -autoboot_timeout=1 - -bootargs="console=ttymxc0,115200 otg_mode=$otg_mode video=imxfb:$video" - -nand_parts="256k(barebox)ro,128k(bareboxenv),3M(kernel),-(root)" -rootfs_mtdblock_nand=3 -nand_device="mxc_nand" -ubiroot="${global.hostname}-rootfs" -device_type="nand" - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c deleted file mode 100644 index 494b89f53f..0000000000 --- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c +++ /dev/null @@ -1,219 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2009 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix -// SPDX-FileCopyrightText: 2010 Eric Bénard <eric@eukrea.com>, Eukrea Electromatique - -#include <common.h> -#include <init.h> -#include <driver.h> -#include <gpio.h> -#include <environment.h> -#include <mach/imx25-regs.h> -#include <asm/armlinux.h> -#include <asm/barebox-arm.h> -#include <asm/sections.h> -#include <io.h> -#include <asm/mmu.h> -#include <led.h> -#include <envfs.h> - -#include <partition.h> -#include <generated/mach-types.h> -#include <mach/imx-nand.h> -#include <mach/imxfb.h> -#include <mach/iim.h> -#include <platform_data/eth-fec.h> -#include <nand.h> -#include <mach/iomux-mx25.h> -#include <i2c/i2c.h> -#include <usb/fsl_usb2.h> -#include <mach/usb.h> -#include <mach/devices-imx25.h> -#include <asm/barebox-arm-head.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_RMII, - .phy_addr = 0, -}; - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, -}; - -static struct fb_videomode imxfb_mode = { - .name = "CMO-QVGA", - .refresh = 60, - .xres = 320, - .yres = 240, - .pixclock = KHZ2PICOS(6500), - .hsync_len = 30, - .left_margin = 38, - .right_margin = 20, - .vsync_len = 3, - .upper_margin = 15, - .lower_margin = 4, -}; - -static struct imx_fb_platform_data eukrea_cpuimx25_fb_data = { - .mode = &imxfb_mode, - .num_modes = 1, - .pwmr = 0x00A903FF, - .lscr1 = 0x00120300, - .dmacr = 0x80040060, - .pcr = 0xCAD08B80, - .bpp = 16, -}; - -struct gpio_led led0 = { - .gpio = 2 * 32 + 19, - .active_low = 1, -}; - -static iomux_v3_cfg_t eukrea_cpuimx25_pads[] = { - MX25_PAD_FEC_MDC__FEC_MDC, - MX25_PAD_FEC_MDIO__FEC_MDIO, - MX25_PAD_FEC_RDATA0__FEC_RDATA0, - MX25_PAD_FEC_RDATA1__FEC_RDATA1, - MX25_PAD_FEC_RX_DV__FEC_RX_DV, - MX25_PAD_FEC_TDATA0__FEC_TDATA0, - MX25_PAD_FEC_TDATA1__FEC_TDATA1, - MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, - MX25_PAD_FEC_TX_EN__FEC_TX_EN, - /* UART1 */ - MX25_PAD_UART1_RXD__UART1_RXD, - MX25_PAD_UART1_TXD__UART1_TXD, - MX25_PAD_UART1_RTS__UART1_RTS, - MX25_PAD_UART1_CTS__UART1_CTS, - /* LCDC */ - MX25_PAD_LD0__LD0, - MX25_PAD_LD1__LD1, - MX25_PAD_LD2__LD2, - MX25_PAD_LD3__LD3, - MX25_PAD_LD4__LD4, - MX25_PAD_LD5__LD5, - MX25_PAD_LD6__LD6, - MX25_PAD_LD7__LD7, - MX25_PAD_LD8__LD8, - MX25_PAD_LD9__LD9, - MX25_PAD_LD10__LD10, - MX25_PAD_LD11__LD11, - MX25_PAD_LD12__LD12, - MX25_PAD_LD13__LD13, - MX25_PAD_LD14__LD14, - MX25_PAD_LD15__LD15, - MX25_PAD_GPIO_E__LD16, - MX25_PAD_GPIO_F__LD17, - MX25_PAD_LSCLK__LSCLK, - MX25_PAD_OE_ACD__OE_ACD, - MX25_PAD_VSYNC__VSYNC, - MX25_PAD_HSYNC__HSYNC, - /* BACKLIGHT CONTROL */ - MX25_PAD_PWM__GPIO_1_26, - /* I2C */ - MX25_PAD_I2C1_CLK__I2C1_CLK, - MX25_PAD_I2C1_DAT__I2C1_DAT, - /* SDCard */ - MX25_PAD_SD1_CLK__SD1_CLK, - MX25_PAD_SD1_CMD__SD1_CMD, - MX25_PAD_SD1_DATA0__SD1_DATA0, - MX25_PAD_SD1_DATA1__SD1_DATA1, - MX25_PAD_SD1_DATA2__SD1_DATA2, - MX25_PAD_SD1_DATA3__SD1_DATA3, - /* LED */ - MX25_PAD_POWER_FAIL__GPIO_3_19, - /* SWITCH */ - MX25_PAD_VSTBY_ACK__GPIO_3_18, -}; - -#ifdef CONFIG_USB -#ifndef CONFIG_USB_GADGET -struct imxusb_platformdata otg_pdata = { - .flags = MXC_EHCI_INTERFACE_DIFF_UNI, - .mode = USB_DR_MODE_HOST, - .phymode = USBPHY_INTERFACE_MODE_UTMI, -}; -#endif - -struct imxusb_platformdata hs_pdata = { - .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN, - .mode = USB_DR_MODE_HOST, -}; -#endif - -#ifdef CONFIG_USB_GADGET -static struct fsl_usb2_platform_data usb_pdata = { - .operating_mode = FSL_USB2_DR_DEVICE, - .phy_mode = FSL_USB2_PHY_UTMI, -}; -#endif - -static int eukrea_cpuimx25_devices_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads, - ARRAY_SIZE(eukrea_cpuimx25_pads)); - - led_gpio_register(&led0); - - imx25_iim_register_fec_ethaddr(); - imx25_add_fec(&fec_info); - - nand_info.width = 1; - imx25_add_nand(&nand_info); - - devfs_add_partition("nand0", 0x00000, 0x40000, - DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - - devfs_add_partition("nand0", 0x40000, 0x20000, - DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); - - /* enable LCD */ - gpio_direction_output(26, 1); - gpio_set_value(26, 1); - - /* LED : default OFF */ - gpio_direction_output(2 * 32 + 19, 1); - - /* Switch : input */ - gpio_direction_input(2 * 32 + 18); - - imx25_add_fb(&eukrea_cpuimx25_fb_data); - -#ifdef CONFIG_USB_GADGET - /* Workaround ENGcm09152 */ - writel(readl(MX25_USB_OTG_BASE_ADDR + 0x608) | (1 << 23), MX25_USB_OTG_BASE_ADDR + 0x608); - add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, MX25_USB_OTG_BASE_ADDR, 0x200, - IORESOURCE_MEM, &usb_pdata); -#endif - -#ifdef CONFIG_USB -#ifndef CONFIG_USB_GADGET - imx_add_usb((void *)MX25_USB_OTG_BASE_ADDR, 0, &otg_pdata); -#endif - imx_add_usb((void *)MX25_USB_HS_BASE_ADDR, 1, &hs_pdata); -#endif - - imx25_add_mmc0(NULL); - imx25_add_i2c0(NULL); - - armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX25SD); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_eukrea_cpuimx25); - - return 0; -} - -device_initcall(eukrea_cpuimx25_devices_init); - -static int eukrea_cpuimx25_console_init(void) -{ - barebox_set_model("Eukrea CPUIMX25"); - barebox_set_hostname("eukrea-cpuimx25"); - - imx25_add_uart0(); - return 0; -} - -console_initcall(eukrea_cpuimx25_console_init); diff --git a/arch/arm/boards/eukrea_cpuimx25/flash-header.imxcfg b/arch/arm/boards/eukrea_cpuimx25/flash-header.imxcfg deleted file mode 100644 index 00417ddded..0000000000 --- a/arch/arm/boards/eukrea_cpuimx25/flash-header.imxcfg +++ /dev/null @@ -1,19 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -soc imx25 -loadaddr 0x80000000 -ivtofs 0x400 - -wm 32 0xb8001008 0x00000000 -wm 32 0xb8001010 0x00000004 -wm 32 0xb8001000 0x92100000 -wm 8 0x80000400 0x12344321 -wm 32 0xb8001000 0xa2100000 -wm 32 0x80000000 0x12344321 -wm 32 0x80000000 0x12344321 -wm 32 0xb8001000 0xb2100000 -wm 8 0x80000033 0xda -wm 8 0x81000000 0xff -wm 32 0xb8001000 0x82216080 -wm 32 0xb8001004 0x00295729 -wm 32 0x53f80008 0x20034000 diff --git a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c b/arch/arm/boards/eukrea_cpuimx25/lowlevel.c deleted file mode 100644 index 93cd64d90f..0000000000 --- a/arch/arm/boards/eukrea_cpuimx25/lowlevel.c +++ /dev/null @@ -1,122 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix -// SPDX-FileCopyrightText: 2010 Eric Bénard <eric@eukrea.com>, Eukrea Electromatique - -#include <common.h> -#include <init.h> -#include <mach/imx25-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> -#include <io.h> -#include <mach/imx-nand.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <asm/sections.h> -#include <asm-generic/memory_layout.h> -#include <asm/system.h> - -void __bare_init __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - uint32_t r; - register uint32_t loops = 0x20000; - - arm_cpu_lowlevel_init(); - - arm_setup_stack(MX25_IRAM_BASE_ADDR + MX25_IRAM_SIZE); - - /* restart the MPLL and wait until it's stable */ - writel(readl(MX25_CCM_BASE_ADDR + MX25_CCM_CCTL) | (1 << 27), - MX25_CCM_BASE_ADDR + MX25_CCM_CCTL); - while (readl(MX25_CCM_BASE_ADDR + MX25_CCM_CCTL) & (1 << 27)) {}; - - /* Configure dividers and ARM clock source - * ARM @ 400 MHz - * AHB @ 133 MHz - */ - writel(0x20034000, MX25_CCM_BASE_ADDR + MX25_CCM_CCTL); - - /* Enable UART1 / FEC / */ -/* writel(0x1FFFFFFF, MX25_CCM_BASE_ADDR + CCM_CGCR0); - writel(0xFFFFFFFF, MX25_CCM_BASE_ADDR + CCM_CGCR1); - writel(0x000FDFFF, MX25_CCM_BASE_ADDR + CCM_CGCR2);*/ - - /* AIPS setup - Only setup MPROTx registers. The PACR default values are good. - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - writel(0x77777777, 0x43f00000); - writel(0x77777777, 0x43f00004); - writel(0x77777777, 0x53f00000); - writel(0x77777777, 0x53f00004); - - /* MAX (Multi-Layer AHB Crossbar Switch) setup - * MPR - priority for MX25 is (SDHC2/SDMA)>USBOTG>RTIC>IAHB>DAHB - */ - writel(0x00002143, 0x43f04000); - writel(0x00002143, 0x43f04100); - writel(0x00002143, 0x43f04200); - writel(0x00002143, 0x43f04300); - writel(0x00002143, 0x43f04400); - /* SGPCR - always park on last master */ - writel(0x10, 0x43f04010); - writel(0x10, 0x43f04110); - writel(0x10, 0x43f04210); - writel(0x10, 0x43f04310); - writel(0x10, 0x43f04410); - /* MGPCR - restore default values */ - writel(0x0, 0x43f04800); - writel(0x0, 0x43f04900); - writel(0x0, 0x43f04a00); - writel(0x0, 0x43f04b00); - writel(0x0, 0x43f04c00); - - /* Configure M3IF registers - * M3IF Control Register (M3IFCTL) for MX25 - * MRRP[0] = LCDC on priority list (1 << 0) = 0x00000001 - * MRRP[1] = MAX1 not on priority list (0 << 1) = 0x00000000 - * MRRP[2] = MAX0 not on priority list (0 << 2) = 0x00000000 - * MRRP[3] = USB HOST not on priority list (0 << 3) = 0x00000000 - * MRRP[4] = SDMA not on priority list (0 << 4) = 0x00000000 - * MRRP[5] = SD/ATA/FEC not on priority list (0 << 5) = 0x00000000 - * MRRP[6] = SCMFBC not on priority list (0 << 6) = 0x00000000 - * MRRP[7] = CSI not on priority list (0 << 7) = 0x00000000 - * ---------- - * 0x00000001 - */ - writel(0x1, 0xb8003000); - - /* Speed up NAND controller by adjusting the NFC divider */ - r = readl(MX25_CCM_BASE_ADDR + MX25_CCM_PCDR2); - r &= ~0xf; - r |= 0x1; - writel(r, MX25_CCM_BASE_ADDR + MX25_CCM_PCDR2); - - /* Skip SDRAM initialization if we run from RAM */ - r = get_pc(); - if (r > 0x80000000 && r < 0x90000000) - goto out; - - /* Init Mobile DDR */ - writel(0x0000000E, MX25_ESDCTL_BASE_ADDR + IMX_ESDMISC); - writel(0x00000004, MX25_ESDCTL_BASE_ADDR + IMX_ESDMISC); - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); - - writel(0x0029572B, MX25_ESDCTL_BASE_ADDR + IMX_ESDCFG0); - writel(0x92210000, MX25_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX25_CSD0_BASE_ADDR + 0x400); - writel(0xA2210000, MX25_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX25_CSD0_BASE_ADDR); - writeb(0xda, MX25_CSD0_BASE_ADDR); - writel(0xB2210000, MX25_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX25_CSD0_BASE_ADDR + 0x33); - writeb(0xda, MX25_CSD0_BASE_ADDR + 0x1000000); - writel(0x82216080, MX25_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - - if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND)) - imx25_barebox_boot_nand_external(); - -out: - imx25_barebox_entry(NULL); -} diff --git a/arch/arm/boards/eukrea_cpuimx27/Makefile b/arch/arm/boards/eukrea_cpuimx27/Makefile deleted file mode 100644 index 6b6de4e87d..0000000000 --- a/arch/arm/boards/eukrea_cpuimx27/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -lwl-y += lowlevel_init.o -obj-y += eukrea_cpuimx27.o diff --git a/arch/arm/boards/eukrea_cpuimx27/env/bin/_update b/arch/arm/boards/eukrea_cpuimx27/env/bin/_update deleted file mode 100644 index 014bce3512..0000000000 --- a/arch/arm/boards/eukrea_cpuimx27/env/bin/_update +++ /dev/null @@ -1,36 +0,0 @@ -#!/bin/sh - -if [ -z "$part" -o -z "$image" ]; then - echo "define \$part and \$image" - exit 1 -fi - -if [ ! -e "$part" ]; then - echo "Partition $part does not exist" - exit 1 -fi - -if [ $# = 1 ]; then - image=$1 -fi - -if [ x$ip = xdhcp ]; then - dhcp -fi - -ping $eth0.serverip -if [ $? -ne 0 ] ; then - echo "update aborted" - exit 1 -fi - -unprotect $part - -echo -echo "erasing partition $part" -erase $part - -echo -echo "flashing $image to $part" -echo -tftp $image $part diff --git a/arch/arm/boards/eukrea_cpuimx27/env/bin/boot b/arch/arm/boards/eukrea_cpuimx27/env/bin/boot deleted file mode 100644 index 0e1c80a932..0000000000 --- a/arch/arm/boards/eukrea_cpuimx27/env/bin/boot +++ /dev/null @@ -1,53 +0,0 @@ -#!/bin/sh - -. /env/config - -if [ x$1 = xnand ]; then - root=nand - kernel=nand -fi - -if [ x$1 = xnet ]; then - root=net - kernel=net -fi - -if [ x$1 = xnor ]; then - root=nor - kernel=nor -fi - -if [ x$root = xnet ]; then - if [ x$ip = xdhcp ]; then - bootargs="$bootargs ip=dhcp" - else - bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::" - fi -else - bootargs="$bootargs ip=off" -fi - -if [ x$rootfstype = xubifs ]; then - bootargs="$bootargs root=ubi0:$ubiroot ubi.mtd=$rootpartnum rootfstype=ubifs" -else - if [ x$root = xnand ]; then - bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2" - elif [ x$root = xnor ]; then - bootargs="$bootargs root=$rootpart_nor rootfstype=jffs2" - fi -fi - -bootargs="$bootargs mtdparts=physmap-flash.0:$nor_parts;mxc_nand:$nand_parts" - -if [ $kernel = net ]; then - if [ x$ip = xdhcp ]; then - dhcp - fi - tftp $uimage uImage || exit 1 - bootm uImage -elif [ $kernel = nor ]; then - bootm /dev/nor0.kernel -else - bootm /dev/nand0.kernel.bb -fi - diff --git a/arch/arm/boards/eukrea_cpuimx27/env/bin/init b/arch/arm/boards/eukrea_cpuimx27/env/bin/init deleted file mode 100644 index e3c109135a..0000000000 --- a/arch/arm/boards/eukrea_cpuimx27/env/bin/init +++ /dev/null @@ -1,43 +0,0 @@ -#!/bin/sh - -PATH=/env/bin -export PATH - -. /env/config -if [ -e /dev/nor0 ]; then - addpart /dev/nor0 $nor_parts -fi - -if [ -e /dev/nand0 ]; then - addpart /dev/nand0 $nand_parts -fi - -if [ -f /env/logo.bmp ]; then - splash /env/logo.bmp - fb0.enable=1 -elif [ -f /env/logo.bmp.lzo ]; then - uncompress /env/logo.bmp.lzo /logo.bmp - splash /logo.bmp - fb0.enable=1 -fi - -if [ -z $eth0.ethaddr ]; then - while [ -z $eth0.ethaddr ]; do - readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr - done - echo -a /env/config "eth0.ethaddr=$eth0.ethaddr" - saveenv -fi - -echo -echo -n "Hit any key to stop autoboot: " -timeout -a $autoboot_timeout -if [ $? != 0 ]; then - echo - echo "type update_kernel nand|nor [<imagename>] to update kernel into flash" - echo "type update_root nand|nor [<imagename>] to update rootfs into flash" - echo - exit -fi - -boot diff --git a/arch/arm/boards/eukrea_cpuimx27/env/bin/update_kernel b/arch/arm/boards/eukrea_cpuimx27/env/bin/update_kernel deleted file mode 100644 index 05c822d860..0000000000 --- a/arch/arm/boards/eukrea_cpuimx27/env/bin/update_kernel +++ /dev/null @@ -1,15 +0,0 @@ -#!/bin/sh - -. /env/config - -image=$uimage -if [ x$1 = xnand ]; then - part=/dev/nand0.kernel.bb -elif [ x$1 = xnor ]; then - part=/dev/nor0.kernel -else - echo "usage: $0 nor|nand [imagename]" - exit 1 -fi - -. /env/bin/_update $2 diff --git a/arch/arm/boards/eukrea_cpuimx27/env/bin/update_root b/arch/arm/boards/eukrea_cpuimx27/env/bin/update_root deleted file mode 100644 index eaf36ebcea..0000000000 --- a/arch/arm/boards/eukrea_cpuimx27/env/bin/update_root +++ /dev/null @@ -1,16 +0,0 @@ -#!/bin/sh - -. /env/config - -image=$uimage -if [ x$1 = xnand ]; then - part=/dev/nand0.root.bb -elif [ x$1 = xnor ]; then - part=/dev/nor0.root -else - echo "usage: $0 nor|nand [imagename]" - exit 1 -fi - -. /env/bin/_update $2 - diff --git a/arch/arm/boards/eukrea_cpuimx27/env/config b/arch/arm/boards/eukrea_cpuimx27/env/config deleted file mode 100644 index 7f5600339f..0000000000 --- a/arch/arm/boards/eukrea_cpuimx27/env/config +++ /dev/null @@ -1,36 +0,0 @@ -#!/bin/sh - -# can be either 'net', 'nor' or 'nand'' -kernel=nor -root=nor -rootfstype=ubifs - -basedir=cpuimx27 -uimage=$basedir/uImage -rootfs=$basedir/rootfs - -autoboot_timeout=1 - -# DVI-SVGA DVI-VGA CMO-QVGA -video="CMO-QVGA" -bootargs="console=ttymxc0,115200 fec_mac=$eth0.ethaddr video=mxcfb:$video" - -nor_parts="256k(barebox)ro,128k(bareboxenv),2432k(kernel),-(root)" -rootpart_nor="/dev/mtdblock3" - -nand_parts="-(nand)" -rootpart_nand="" - -rootpartnum=3 -ubiroot="eukrea-cpuimx27-rootfs" - -nfsroot="" - -# use 'dhcp' to do dhcp in barebox and in kernel -ip=dhcp - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d diff --git a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c deleted file mode 100644 index e8ac0cc8fa..0000000000 --- a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c +++ /dev/null @@ -1,241 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/* - * Copyright (C) 2009 Eric Benard, Eukrea Electromatique - * Based on pcm038.c which is : - * Copyright (C) 2007 Sascha Hauer, Pengutronix - */ - -#include <common.h> -#include <errno.h> -#include <net.h> -#include <init.h> -#include <environment.h> -#include <mach/imx27-regs.h> -#include <notifier.h> -#include <gpio.h> -#include <asm/armlinux.h> -#include <asm/sections.h> -#include <asm/barebox-arm.h> -#include <generated/mach-types.h> -#include <partition.h> -#include <fs.h> -#include <fcntl.h> -#include <nand.h> -#include <command.h> -#include <io.h> -#include <mach/imx-nand.h> -#include <mach/imx-pll.h> -#include <mach/weim.h> -#include <mach/imxfb.h> -#include <platform_data/serial-ns16550.h> -#include <asm/mmu.h> -#include <i2c/i2c.h> -#include <mfd/lp3972.h> -#include <mach/iomux-mx27.h> -#include <mach/devices-imx27.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_MII, - .phy_addr = 1, -}; - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, - .flash_bbt = 1, -}; - -#ifdef CONFIG_DRIVER_SERIAL_NS16550 -static struct NS16550_plat quad_uart_serial_plat = { - .clock = 14745600, - .shift = 1, -}; - -#ifdef CONFIG_EUKREA_CPUIMX27_QUART1 -#define QUART_OFFSET 0x200000 -#elif defined CONFIG_EUKREA_CPUIMX27_QUART2 -#define QUART_OFFSET 0x400000 -#elif defined CONFIG_EUKREA_CPUIMX27_QUART3 -#define QUART_OFFSET 0x800000 -#elif defined CONFIG_EUKREA_CPUIMX27_QUART4 -#define QUART_OFFSET 0x1000000 -#endif -#endif - -static struct i2c_board_info i2c_devices[] = { - { - I2C_BOARD_INFO("lp3972", 0x34), - }, -}; - -#ifdef CONFIG_DRIVER_VIDEO_IMX -static struct fb_videomode imxfb_mode = { - .name = "CMO-QVGA", - .refresh = 60, - .xres = 320, - .yres = 240, - .pixclock = 156000, - .hsync_len = 30, - .left_margin = 38, - .right_margin = 20, - .vsync_len = 3, - .upper_margin = 15, - .lower_margin = 4, -}; - -static struct imx_fb_platform_data eukrea_cpuimx27_fb_data = { - .mode = &imxfb_mode, - .num_modes = 1, - .pwmr = 0x00A903FF, - .lscr1 = 0x00120300, - .dmacr = 0x00020010, - .pcr = 0xFAD08B80, - .bpp = 16, -}; -#endif - -static int eukrea_cpuimx27_devices_init(void) -{ - char *envdev = "no"; - int i; - - unsigned int mode[] = { - PD0_AIN_FEC_TXD0, - PD1_AIN_FEC_TXD1, - PD2_AIN_FEC_TXD2, - PD3_AIN_FEC_TXD3, - PD4_AOUT_FEC_RX_ER, - PD5_AOUT_FEC_RXD1, - PD6_AOUT_FEC_RXD2, - PD7_AOUT_FEC_RXD3, - PD8_AF_FEC_MDIO, - PD9_AIN_FEC_MDC | GPIO_PUEN, - PD10_AOUT_FEC_CRS, - PD11_AOUT_FEC_TX_CLK, - PD12_AOUT_FEC_RXD0, - PD13_AOUT_FEC_RX_DV, - PD14_AOUT_FEC_RX_CLK, - PD15_AOUT_FEC_COL, - PD16_AIN_FEC_TX_ER, - PF23_AIN_FEC_TX_EN, - PD17_PF_I2C_DATA, - PD18_PF_I2C_CLK, -#ifdef CONFIG_DRIVER_SERIAL_IMX - PE12_PF_UART1_TXD, - PE13_PF_UART1_RXD, - PE14_PF_UART1_CTS, - PE15_PF_UART1_RTS, -#endif -#ifdef CONFIG_DRIVER_VIDEO_IMX - PA5_PF_LSCLK, - PA6_PF_LD0, - PA7_PF_LD1, - PA8_PF_LD2, - PA9_PF_LD3, - PA10_PF_LD4, - PA11_PF_LD5, - PA12_PF_LD6, - PA13_PF_LD7, - PA14_PF_LD8, - PA15_PF_LD9, - PA16_PF_LD10, - PA17_PF_LD11, - PA18_PF_LD12, - PA19_PF_LD13, - PA20_PF_LD14, - PA21_PF_LD15, - PA22_PF_LD16, - PA23_PF_LD17, - PA28_PF_HSYNC, - PA29_PF_VSYNC, - PA31_PF_OE_ACD, - GPIO_PORTE | 5 | GPIO_GPIO | GPIO_OUT, - GPIO_PORTA | 25 | GPIO_GPIO | GPIO_OUT, -#endif - }; - - /* configure 16 bit nor flash on cs0 */ - imx27_setup_weimcs(0, 0x00008F03, 0xA0330D01, 0x002208C0); - - /* initialize gpios */ - for (i = 0; i < ARRAY_SIZE(mode); i++) - imx27_gpio_mode(mode[i]); - - add_cfi_flash_device(DEVICE_ID_DYNAMIC, 0xC0000000, 32 * 1024 * 1024, 0); -#ifdef CONFIG_EUKREA_CPUIMX27_NOR_64MB - add_cfi_flash_device(DEVICE_ID_DYNAMIC, 0xC2000000, 32 * 1024 * 1024, 0); -#endif - imx27_add_nand(&nand_info); - - i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); - imx27_add_i2c0(NULL); - - devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); - devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); - protect_file("/dev/env0", 1); - envdev = "NOR"; - - printf("Using environment in %s Flash\n", envdev); - -#ifdef CONFIG_DRIVER_VIDEO_IMX - imx_add_fb((void *)0x10021000, &eukrea_cpuimx27_fb_data); - gpio_direction_output(GPIO_PORTE | 5, 0); - gpio_set_value(GPIO_PORTE | 5, 1); - gpio_direction_output(GPIO_PORTA | 25, 0); - gpio_set_value(GPIO_PORTA | 25, 1); -#endif - - armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX27); - - return 0; -} - -device_initcall(eukrea_cpuimx27_devices_init); - -static int eukrea_cpuimx27_console_init(void) -{ - uint32_t val; - - barebox_set_model("Eukrea CPUIMX27"); - barebox_set_hostname("eukrea-cpuimx27"); - -#ifdef CONFIG_DRIVER_SERIAL_IMX - imx27_add_uart0(); -#endif - /* configure 8 bit UART on cs3 */ - val = readl(MX27_SYSCTRL_BASE_ADDR + MX27_FMCR); - val &= ~0x2; - writel(val, MX27_SYSCTRL_BASE_ADDR + MX27_FMCR); - - imx27_setup_weimcs(3, 0x0000D603, 0x0D1D0D01, 0x00D20000); -#ifdef CONFIG_DRIVER_SERIAL_NS16550 - add_ns16550_device(DEVICE_ID_DYNAMIC, MX27_CS3_BASE_ADDR + QUART_OFFSET, 0xf, - IORESOURCE_MEM | IORESOURCE_MEM_16BIT, - &quad_uart_serial_plat); -#endif - return 0; -} - -console_initcall(eukrea_cpuimx27_console_init); - -static int eukrea_cpuimx27_late_init(void) -{ -#ifdef CONFIG_MFD_LP3972 - struct i2c_client *client; - u8 reg[1]; -#endif - console_flush(); - imx27_add_fec(&fec_info); - -#ifdef CONFIG_MFD_LP3972 - client = lp3972_get_client(); - if (!client) - return -ENODEV; - reg[0] = 0xa0; - i2c_write_reg(client, 0x39, reg, sizeof(reg)); -#endif - return 0; -} - -late_initcall(eukrea_cpuimx27_late_init); diff --git a/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S b/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S deleted file mode 100644 index 13e906eea4..0000000000 --- a/arch/arm/boards/eukrea_cpuimx27/lowlevel_init.S +++ /dev/null @@ -1,136 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <config.h> -#include <asm-generic/memory_layout.h> -#include <mach/imx27-regs.h> -#include <mach/esdctl.h> -#include <asm/barebox-arm-head.h> - -#define writel(val, reg) \ - ldr r0, =reg; \ - ldr r1, =val; \ - str r1, [r0]; - -#if defined CONFIG_EUKREA_CPUIMX27_SDRAM_256MB -#define ROWS0 ESDCTL0_ROW14 -#define CFG0 0x0029572D -#elif defined CONFIG_EUKREA_CPUIMX27_SDRAM_128MB -#define ROWS0 ESDCTL0_ROW13 -#define CFG0 0x00095728 -#endif - -#define ESDCTL0_VAL (ESDCTL0_SDE | ROWS0 | ESDCTL0_COL10) - -.macro sdram_init - /* - * DDR on CSD0 - */ - /* Enable DDR SDRAM operation */ - writel(0x0000000C, MX27_ESDCTL_BASE_ADDR + IMX_ESDMISC) - - /* Set the driving strength */ - writel(0x55555555, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(3)) - writel(0x55555555, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(5)) - writel(0x55555555, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(6)) - writel(0x00005005, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(7)) - writel(0x15555555, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(8)) - - /* Initial reset */ - writel(0x00000004, MX27_ESDCTL_BASE_ADDR + IMX_ESDMISC) - writel(CFG0, MX27_ESDCTL_BASE_ADDR + IMX_ESDCFG0) - - /* precharge CSD0 all banks */ - writel(ESDCTL0_VAL | ESDCTL0_SMODE_PRECHARGE, - MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0) - writel(0x00000000, 0xA0000F00) /* CSD0 precharge address (A10 = 1) */ - writel(ESDCTL0_VAL | ESDCTL0_SMODE_AUTO_REFRESH, - MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0) - - ldr r0, =0xa0000f00 - mov r1, #0 - mov r2, #8 -1: - str r1, [r0] - subs r2, #1 - bne 1b - - writel(ESDCTL0_VAL | ESDCTL0_SMODE_LOAD_MODE, - MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0) - ldr r0, =0xA0000033 - mov r1, #0xda - strb r1, [r0] -#if defined CONFIG_EUKREA_CPUIMX27_SDRAM_256MB - ldr r0, =0xA2000000 -#elif defined CONFIG_EUKREA_CPUIMX27_SDRAM_128MB - ldr r0, =0xA1000000 -#endif - mov r1, #0xff - strb r1, [r0] - writel(ESDCTL0_VAL | ESDCTL0_DSIZ_31_0 | ESDCTL0_REF4 | - ESDCTL0_BL | ESDCTL0_SMODE_NORMAL, - MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0) -.endm - - .section ".text_bare_init","ax" - -.globl barebox_arm_reset_vector -barebox_arm_reset_vector: - - bl arm_cpu_lowlevel_init - - ldr sp, =MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE - 4; - - /* ahb lite ip interface */ - writel(0x20040304, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR0) - writel(0xDFFBFCFB, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR1) - writel(0x00000000, MX27_AIPI_BASE_ADDR + MX27_AIPI2_PSR0) - writel(0xFFFFFFFF, MX27_AIPI_BASE_ADDR + MX27_AIPI2_PSR1) - - /* disable mpll/spll */ - ldr r0, =MX27_CCM_BASE_ADDR + MX27_CSCR - ldr r1, [r0] - bic r1, r1, #0x03 - str r1, [r0] - - /* - * pll clock initialization - see section 3.4.3 of the i.MX27 manual - */ - /* MPLL = 399 MHz */ - writel(0x00331C23, MX27_CCM_BASE_ADDR + MX27_MPCTL0) - /* SPLL = 240 MHz */ - writel(0x040C2403, MX27_CCM_BASE_ADDR + MX27_SPCTL0) - writel(0x33F38107 | MX27_CSCR_MPLL_RESTART | MX27_CSCR_SPLL_RESTART, - MX27_CCM_BASE_ADDR + MX27_CSCR) - - /* add some delay here */ - mov r1, #0x1000 -1: subs r1, r1, #0x1 - bne 1b - - /* clock gating enable */ - writel(0x00050f08, MX27_SYSCTRL_BASE_ADDR + MX27_GPCR) - - /* peripheral clock divider */ - /* FIXME */ - writel(0x130400c3, MX27_CCM_BASE_ADDR + MX27_PCDR0) - /* PERDIV1=08 @133 MHz */ - writel(0x09030208, MX27_CCM_BASE_ADDR + MX27_PCDR1) - /* PERDIV1=04 @266 MHz */ - - /* skip sdram initialization if we run from ram */ - cmp pc, #0xa0000000 - bls 1f - cmp pc, #0xc0000000 - bhi 1f - - b imx27_barebox_entry -1: - sdram_init - -#ifdef CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND - mov r0, #0 - b imx27_barebox_boot_nand_external -#endif /* CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND */ - -ret: - b imx27_barebox_entry diff --git a/arch/arm/boards/eukrea_cpuimx35/Makefile b/arch/arm/boards/eukrea_cpuimx35/Makefile deleted file mode 100644 index f1a8e7a5d6..0000000000 --- a/arch/arm/boards/eukrea_cpuimx35/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Juergen Beisert <jbe@pengutronix.de> - -obj-y += eukrea_cpuimx35.o -lwl-y += lowlevel.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-eukrea_cpuimx35 diff --git a/arch/arm/boards/eukrea_cpuimx35/defaultenv-eukrea_cpuimx35/bin/init_board b/arch/arm/boards/eukrea_cpuimx35/defaultenv-eukrea_cpuimx35/bin/init_board deleted file mode 100644 index 2a07a8425a..0000000000 --- a/arch/arm/boards/eukrea_cpuimx35/defaultenv-eukrea_cpuimx35/bin/init_board +++ /dev/null @@ -1,41 +0,0 @@ -#!/bin/sh - -if [ -f /env/logo.bmp ]; then - splash /env/logo.bmp - fb0.enable=1 - gpio_set_value 1 1 -elif [ -f /env/logo.bmp.lzo ]; then - uncompress /env/logo.bmp.lzo /logo.bmp - splash /logo.bmp - fb0.enable=1 - gpio_set_value 1 1 -fi - -gpio_get_value 89 -if [ $? -eq 0 ]; then - gpio_set_value 93 0 - usbserial - timeout -s -a 2 - gpio_get_value 89 - if [ $? -eq 0 ]; then - usbserial -d - dfu -V 0x1234 -P 0x1234 /dev/nand0.barebox.bb(barebox)sr,/dev/nand0.kernel.bb(kernel)r,/dev/nand0.root.bb(root)r - gpio_get_value 89 - if [ $? -eq 0 ]; then - usbserial - autoboot_timeout=60 - else - reset - fi - else - autoboot_timeout=28 - fi -fi - -if [ -z $eth0.ethaddr ]; then - while [ -z $eth0.ethaddr ]; do - readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr - done - echo -a /env/config "eth0.ethaddr=$eth0.ethaddr" - saveenv -fi diff --git a/arch/arm/boards/eukrea_cpuimx35/defaultenv-eukrea_cpuimx35/config b/arch/arm/boards/eukrea_cpuimx35/defaultenv-eukrea_cpuimx35/config deleted file mode 100644 index 05c4391d35..0000000000 --- a/arch/arm/boards/eukrea_cpuimx35/defaultenv-eukrea_cpuimx35/config +++ /dev/null @@ -1,47 +0,0 @@ -#!/bin/sh - -# otg port mode : can be 'host' or 'device' -otg_mode="device" -# video : can be CMO-QVGA, URT-WVGA, DVI-VGA or DVI-SVGA -video="CMO-QVGA" - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=none - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'nfs', 'tftp' or 'nand' -kernel_loc=nand -# can be either 'net', 'nand' or 'initrd' -rootfs_loc=nand - -# rootfs -rootfs_type=ubifs -rootfsimage=${global.hostname}/rootfs.$rootfs_type - -# kernel -kernelimage=${global.hostname}/uImage-${global.hostname}.bin - -# barebox and it's env -bareboximage=${global.hostname}/barebox-${global.hostname}.bin -bareboxenvimage=${global.hostname}/bareboxenv-${global.hostname}.bin - -nfsroot="$eth0.serverip:/srv/nfs/${global.hostname}" - -autoboot_timeout=1 - -bootargs="console=ttymxc0,115200 otg_mode=$otg_mode video=mx3fb:$video" - -nand_parts="256k(barebox)ro,128k(bareboxenv),3M(kernel),-(root)" -rootfs_mtdblock_nand=3 -nand_device="mxc_nand" -ubiroot="${global.hostname}-rootfs" -device_type="nand" - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c deleted file mode 100644 index 9835452ddf..0000000000 --- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c +++ /dev/null @@ -1,347 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/* - * Copyright (C) 2007 Sascha Hauer, Pengutronix - * 2009 Marc Kleine-Budde, Pengutronix - * (c) 2010 Eukrea Electromatique, Eric Bénard <eric@eukrea.com> - * - * Derived from: - * - * * mx35_3stack.c - board file for uboot-v1 - * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> - * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <command.h> -#include <environment.h> -#include <errno.h> -#include <fcntl.h> -#include <platform_data/eth-fec.h> -#include <fs.h> -#include <init.h> -#include <nand.h> -#include <net.h> -#include <partition.h> -#include <gpio.h> -#include <envfs.h> - -#include <asm/armlinux.h> -#include <io.h> -#include <generated/mach-types.h> -#include <asm/mmu.h> - -#include <mach/imx-nand.h> -#include <mach/imx35-regs.h> -#include <mach/iomux-mx35.h> -#include <mach/iomux-v3.h> -#include <mach/imx-ipu-fb.h> -#include <mach/imx-pll.h> -#include <i2c/i2c.h> -#include <usb/fsl_usb2.h> -#include <mach/usb.h> -#include <mach/devices-imx35.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_MII, - .phy_addr = 0, -}; - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, - .flash_bbt = 1, -}; - -static struct fb_videomode imxfb_mode = { - .name = "CMO_QVGA", - .refresh = 60, - .xres = 320, - .yres = 240, - .pixclock = KHZ2PICOS(7000), - .left_margin = 68, - .right_margin = 20, - .upper_margin = 15, - .lower_margin = 4, - .hsync_len = 30, - .vsync_len = 3, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, -}; - -static void eukrea_cpuimx35_enable_display(int enable) -{ - gpio_direction_output(4, enable); -} - -static struct imx_ipu_fb_platform_data ipu_fb_data = { - .mode = &imxfb_mode, - .num_modes = 1, - .bpp = 16, - .enable = eukrea_cpuimx35_enable_display, -}; - -#ifdef CONFIG_USB -#ifndef CONFIG_USB_GADGET -struct imxusb_platformdata otg_pdata = { - .flags = MXC_EHCI_INTERFACE_DIFF_UNI, - .mode = USB_DR_MODE_HOST, - .phymode = USBPHY_INTERFACE_MODE_UTMI, -}; -#endif - -struct imxusb_platformdata hs_pdata = { - .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN, - .mode = USB_DR_MODE_HOST, -}; -#endif - -#ifdef CONFIG_USB_GADGET -static struct fsl_usb2_platform_data usb_pdata = { - .operating_mode = FSL_USB2_DR_DEVICE, - .phy_mode = FSL_USB2_PHY_UTMI, -}; -#endif - -static int eukrea_cpuimx35_mmu_init(void) -{ - l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000); - - return 0; -} -postmmu_initcall(eukrea_cpuimx35_mmu_init); - -static iomux_v3_cfg_t eukrea_cpuimx35_pads[] = { - MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, - MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, - MX35_PAD_FEC_RX_DV__FEC_RX_DV, - MX35_PAD_FEC_COL__FEC_COL, - MX35_PAD_FEC_RDATA0__FEC_RDATA_0, - MX35_PAD_FEC_TDATA0__FEC_TDATA_0, - MX35_PAD_FEC_TX_EN__FEC_TX_EN, - MX35_PAD_FEC_MDC__FEC_MDC, - MX35_PAD_FEC_MDIO__FEC_MDIO, - MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, - MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, - MX35_PAD_FEC_CRS__FEC_CRS, - MX35_PAD_FEC_RDATA0__FEC_RDATA_0, - MX35_PAD_FEC_TDATA0__FEC_TDATA_0, - MX35_PAD_FEC_RDATA1__FEC_RDATA_1, - MX35_PAD_FEC_TDATA1__FEC_TDATA_1, - MX35_PAD_FEC_RDATA2__FEC_RDATA_2, - MX35_PAD_FEC_TDATA2__FEC_TDATA_2, - MX35_PAD_FEC_RDATA3__FEC_RDATA_3, - MX35_PAD_FEC_TDATA3__FEC_TDATA_3, - - MX35_PAD_RXD1__UART1_RXD_MUX, - MX35_PAD_TXD1__UART1_TXD_MUX, - MX35_PAD_RTS1__UART1_RTS, - MX35_PAD_CTS1__UART1_CTS, - - MX35_PAD_LD23__GPIO3_29, - MX35_PAD_CONTRAST__GPIO1_1, - MX35_PAD_D3_CLS__GPIO1_4, - - MX35_PAD_I2C1_CLK__I2C1_SCL, - MX35_PAD_I2C1_DAT__I2C1_SDA, - - MX35_PAD_SD1_CMD__ESDHC1_CMD, - MX35_PAD_SD1_CLK__ESDHC1_CLK, - MX35_PAD_SD1_DATA0__ESDHC1_DAT0, - MX35_PAD_SD1_DATA1__ESDHC1_DAT1, - MX35_PAD_SD1_DATA2__ESDHC1_DAT2, - MX35_PAD_SD1_DATA3__ESDHC1_DAT3, - - MX35_PAD_LD19__GPIO3_25, -}; - -static int eukrea_cpuimx35_devices_init(void) -{ -#ifdef CONFIG_USB_GADGET - unsigned int tmp; -#endif - mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads, - ARRAY_SIZE(eukrea_cpuimx35_pads)); - - imx35_add_nand(&nand_info); - - devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); - - imx35_add_fec(&fec_info); - imx35_add_fb(&ipu_fb_data); - - imx35_add_i2c0(NULL); - imx35_add_mmc0(NULL); - - /* led default off */ - gpio_direction_output(32 * 2 + 29, 1); - - /* Switch : input */ - gpio_direction_input(32 * 2 + 25); - - /* screen default on to prevent flicker */ - gpio_direction_output(4, 0); - /* backlight default off */ - gpio_direction_output(1, 0); - -#ifdef CONFIG_USB -#ifndef CONFIG_USB_GADGET - imx_add_usb((void *)MX35_USB_OTG_BASE_ADDR, 0, &otg_pdata); -#endif - imx_add_usb((void *)MX35_USB_HS_BASE_ADDR, 1, &hs_pdata); -#endif - -#ifdef CONFIG_USB_GADGET - /* Workaround ENGcm09152 */ - tmp = readl(MX35_USB_OTG_BASE_ADDR + 0x608); - writel(tmp | (1 << 23), MX35_USB_OTG_BASE_ADDR + 0x608); - add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, MX35_USB_OTG_BASE_ADDR, 0x200, - IORESOURCE_MEM, &usb_pdata); -#endif - armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX35SD); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_eukrea_cpuimx35); - - return 0; -} - -device_initcall(eukrea_cpuimx35_devices_init); - -static int eukrea_cpuimx35_console_init(void) -{ - barebox_set_model("Eukrea CPUIMX35"); - barebox_set_hostname("eukrea-cpuimx35"); - - imx35_add_uart0(); - return 0; -} - -console_initcall(eukrea_cpuimx35_console_init); - -static int eukrea_cpuimx35_core_init(void) -{ - u32 reg; - - /* enable clock for I2C1, ESDHC1, USB and FEC */ - reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); - reg |= 0x3 << MX35_CCM_CGR0_ESDHC1_SHIFT; - reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); - reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); - reg |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; - reg |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; - reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); - reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR2); - reg |= 0x3 << MX35_CCM_CGR2_USB_SHIFT; - reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR2); - - /* AIPS setup - Only setup MPROTx registers. The PACR default values are good.*/ - /* - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - writel(0x77777777, MX35_AIPS1_BASE_ADDR); - writel(0x77777777, MX35_AIPS1_BASE_ADDR + 0x4); - writel(0x77777777, MX35_AIPS2_BASE_ADDR); - writel(0x77777777, MX35_AIPS2_BASE_ADDR + 0x4); - - /* - * Clear the on and off peripheral modules Supervisor Protect bit - * for SDMA to access them. Did not change the AIPS control registers - * (offset 0x20) access type - */ - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x4C); - reg = readl(MX35_AIPS1_BASE_ADDR + 0x50); - reg &= 0x00FFFFFF; - writel(reg, MX35_AIPS1_BASE_ADDR + 0x50); - - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x4C); - reg = readl(MX35_AIPS2_BASE_ADDR + 0x50); - reg &= 0x00FFFFFF; - writel(reg, MX35_AIPS2_BASE_ADDR + 0x50); - - /* MAX (Multi-Layer AHB Crossbar Switch) setup */ - - /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ -#define MAX_PARAM1 0x00302154 - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x000); /* for S0 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x100); /* for S1 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x200); /* for S2 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x300); /* for S3 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x400); /* for S4 */ - - /* SGPCR - always park on last master */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x10); /* for S0 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x110); /* for S1 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x210); /* for S2 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x310); /* for S3 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x410); /* for S4 */ - - /* MGPCR - restore default values */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x800); /* for M0 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x900); /* for M1 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xa00); /* for M2 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xb00); /* for M3 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xc00); /* for M4 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xd00); /* for M5 */ - - /* - * M3IF Control Register (M3IFCTL) - * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 - * MRRP[1] = MAX1 not on priority list (0 << 0) = 0x00000000 - * MRRP[2] = L2CC1 not on priority list (0 << 0) = 0x00000000 - * MRRP[3] = USB not on priority list (0 << 0) = 0x00000000 - * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 - * MRRP[5] = GPU not on priority list (0 << 0) = 0x00000000 - * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 - * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 - * ------------ - * 0x00000040 - */ - writel(0x40, MX35_M3IF_BASE_ADDR); - - return 0; -} - -core_initcall(eukrea_cpuimx35_core_init); - -static int do_cpufreq(int argc, char *argv[]) -{ - unsigned long freq; - - if (argc != 2) - return COMMAND_ERROR_USAGE; - - freq = simple_strtoul(argv[1], NULL, 0); - - switch (freq) { - case 399: - writel(MPCTL_PARAM_399, MX35_CCM_BASE_ADDR + MX35_CCM_MPCTL); - break; - case 532: - writel(MPCTL_PARAM_532, MX35_CCM_BASE_ADDR + MX35_CCM_MPCTL); - break; - default: - return COMMAND_ERROR_USAGE; - } - - printf("Switched CPU frequency to %luMHz\n", freq); - - return 0; -} - -BAREBOX_CMD_START(cpufreq) - .cmd = do_cpufreq, - BAREBOX_CMD_DESC("adjust CPU frequency") - BAREBOX_CMD_OPTS("399|532") - BAREBOX_CMD_GROUP(CMD_GRP_HWMANIP) -BAREBOX_CMD_END diff --git a/arch/arm/boards/eukrea_cpuimx35/flash-header.imxcfg b/arch/arm/boards/eukrea_cpuimx35/flash-header.imxcfg deleted file mode 100644 index ad187db742..0000000000 --- a/arch/arm/boards/eukrea_cpuimx35/flash-header.imxcfg +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -soc imx35 -loadaddr 0x80000000 -ivtofs 0x400 - -wm 32 0x53F80004 0x00821000 -wm 32 0x53F80004 0x00821000 -wm 32 0xb8001010 0x00000004 -wm 32 0xB8001010 0x0000000C -wm 32 0xb8001004 0x0009572B -wm 32 0xb8001000 0x92220000 -wm 8 0x80000400 0xda -wm 32 0xb8001000 0xa2220000 -wm 32 0x80000000 0x12344321 -wm 32 0x80000000 0x12344321 -wm 32 0xb8001000 0xb2220000 -wm 8 0x80000033 0xda -wm 8 0x82000000 0xda -wm 32 0xb8001000 0x82224080 -wm 32 0xb8001010 0x00000004 diff --git a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c deleted file mode 100644 index 7970b82136..0000000000 --- a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c +++ /dev/null @@ -1,128 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - -#include <common.h> -#include <init.h> -#include <mach/imx35-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> -#include <asm/cache-l2x0.h> -#include <io.h> -#include <mach/imx-nand.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <asm/sections.h> -#include <asm-generic/memory_layout.h> -#include <asm/system.h> - -void __bare_init __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - uint32_t r, s; - unsigned long ccm_base = MX35_CCM_BASE_ADDR; - register uint32_t loops = 0x20000; - - arm_cpu_lowlevel_init(); - - arm_setup_stack(MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE); - - r = get_cr(); - r |= CR_Z; /* Flow prediction (Z) */ - r |= CR_U; /* unaligned accesses */ - r |= CR_FI; /* Low Int Latency */ - - __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(s)); - s |= 0x7; - __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1" : : "r"(s)); - - set_cr(r); - - r = 0; - __asm__ __volatile__("mcr p15, 0, %0, c15, c2, 4" : : "r"(r)); - - /* - * Branch predicition is now enabled. Flush the BTAC to ensure a valid - * starting point. Don't flush BTAC while it is disabled to avoid - * ARM1136 erratum 408023. - */ - __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 6" : : "r"(r)); - - /* invalidate I cache and D cache */ - __asm__ __volatile__("mcr p15, 0, %0, c7, c7, 0" : : "r"(r)); - - /* invalidate TLBs */ - __asm__ __volatile__("mcr p15, 0, %0, c8, c7, 0" : : "r"(r)); - - /* Drain the write buffer */ - __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" : : "r"(r)); - - /* Also setup the Peripheral Port Remap register inside the core */ - r = 0x40000015; /* start from AIPS 2GB region */ - __asm__ __volatile__("mcr p15, 0, %0, c15, c2, 4" : : "r"(r)); - - /* - * End of ARM1136 init - */ - - writel(0x003F4208, ccm_base + MX35_CCM_CCMR); - - /* Set MPLL , arm clock and ahb clock*/ - writel(MPCTL_PARAM_532, ccm_base + MX35_CCM_MPCTL); - - writel(PPCTL_PARAM_300, ccm_base + MX35_CCM_PPCTL); - writel(0x00001000, ccm_base + MX35_CCM_PDR0); - - r = readl(ccm_base + MX35_CCM_CGR0); - r |= 0x3 << MX35_CCM_CGR0_EPIT1_SHIFT; - writel(r, ccm_base + MX35_CCM_CGR0); - - r = readl(ccm_base + MX35_CCM_CGR1); - r |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; - r |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; - r |= 0x3 << MX35_CCM_CGR1_IOMUX_SHIFT; - writel(r, ccm_base + MX35_CCM_CGR1); - - /* enable watchdog asap */ - r = readl(ccm_base + MX35_CCM_CGR2); - r |= 0x3 << MX35_CCM_CGR2_WDOG_SHIFT; - writel(r, ccm_base + MX35_CCM_CGR2); - - r = readl(MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); - r |= 0x1000; - writel(r, MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); - - /* Skip SDRAM initialization if we run from RAM */ - r = get_pc(); - if (r > 0x80000000 && r < 0x90000000) - goto out; - - /* Init Mobile DDR */ - writel(0x0000000E, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); - writel(0x00000004, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); - - writel(0x0009572B, MX35_ESDCTL_BASE_ADDR + IMX_ESDCFG0); - writel(0x92220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX35_CSD0_BASE_ADDR + 0x400); - writel(0xA2220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX35_CSD0_BASE_ADDR); - writeb(0xda, MX35_CSD0_BASE_ADDR); - writel(0xB2220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX35_CSD0_BASE_ADDR + 0x33); - writeb(0xda, MX35_CSD0_BASE_ADDR + 0x2000000); - writel(0x82228080, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - - if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND)) { - /* Speed up NAND controller by adjusting the NFC divider */ - r = readl(MX35_CCM_BASE_ADDR + MX35_CCM_PDR4); - r &= ~(0xf << 28); - r |= 0x1 << 28; - writel(r, MX35_CCM_BASE_ADDR + MX35_CCM_PDR4); - - imx35_barebox_boot_nand_external(); - } - -out: - imx35_barebox_entry(NULL); -} diff --git a/arch/arm/boards/eukrea_cpuimx51/Makefile b/arch/arm/boards/eukrea_cpuimx51/Makefile deleted file mode 100644 index 77bd4cc87a..0000000000 --- a/arch/arm/boards/eukrea_cpuimx51/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -obj-y += eukrea_cpuimx51.o -lwl-y += lowlevel.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-eukrea_cpuimx51 diff --git a/arch/arm/boards/eukrea_cpuimx51/defaultenv-eukrea_cpuimx51/bin/init_board b/arch/arm/boards/eukrea_cpuimx51/defaultenv-eukrea_cpuimx51/bin/init_board deleted file mode 100644 index 0af65822f1..0000000000 --- a/arch/arm/boards/eukrea_cpuimx51/defaultenv-eukrea_cpuimx51/bin/init_board +++ /dev/null @@ -1,20 +0,0 @@ -#!/bin/sh - -if [ -f /env/logo.bmp ]; then - splash /env/logo.bmp - fb0.enable=1 - gpio_set_value 1 1 -elif [ -f /env/logo.bmp.lzo ]; then - uncompress /env/logo.bmp.lzo /logo.bmp - splash /logo.bmp - fb0.enable=1 - gpio_set_value 1 1 -fi - -if [ -z $eth0.ethaddr ]; then - while [ -z $eth0.ethaddr ]; do - readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr - done - echo -a /env/config "eth0.ethaddr=$eth0.ethaddr" - saveenv -fi diff --git a/arch/arm/boards/eukrea_cpuimx51/defaultenv-eukrea_cpuimx51/config b/arch/arm/boards/eukrea_cpuimx51/defaultenv-eukrea_cpuimx51/config deleted file mode 100644 index 57abc1ee3d..0000000000 --- a/arch/arm/boards/eukrea_cpuimx51/defaultenv-eukrea_cpuimx51/config +++ /dev/null @@ -1,50 +0,0 @@ -#!/bin/sh - -# otg port mode : can be 'host' or 'device' -otg_mode="device" -# video mode : can be 'CMO-QVGA' or 'URT-WVGA' or any modefb mode -# ex : 640x480M-16@60 800x600M-24@60 1024x768M-16@60 -video="CMO-QVGA" -# screen type : can be 'tft' or 'dvi' -screen_type="tft" - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=none - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'nfs', 'tftp' or 'nand' -kernel_loc=nand -# can be either 'net', 'nand' or 'initrd' -rootfs_loc=nand - -# rootfs -rootfs_type=ubifs -rootfsimage=${global.hostname}/rootfs.$rootfs_type - -# kernel -kernelimage=${global.hostname}/uImage-${global.hostname}.bin - -# barebox and it's env -bareboximage=${global.hostname}/barebox-${global.hostname}.bin -bareboxenvimage=${global.hostname}/bareboxenv-${global.hostname}.bin - -nfsroot="$eth0.serverip:/srv/nfs/${global.hostname}" - -autoboot_timeout=1 - -bootargs="console=ttymxc0,115200 otg_mode=$otg_mode video=$video screen_type=$screen_type" - -nand_parts="256k(barebox)ro,128k(bareboxenv),3M(kernel),-(root)" -rootfs_mtdblock_nand=3 -nand_device="mxc_nand" -ubiroot="${global.hostname}-rootfs" -device_type="nand" - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c deleted file mode 100644 index 8d0d4a0e8a..0000000000 --- a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c +++ /dev/null @@ -1,135 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer, Pengutronix -// SPDX-FileCopyrightText: 2011 Eric Bénard <eric@eukrea.com>, Eukrea Electromatique - -#include <common.h> -#include <net.h> -#include <init.h> -#include <environment.h> -#include <mach/imx51-regs.h> -#include <platform_data/eth-fec.h> -#include <gpio.h> -#include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> -#include <fs.h> -#include <envfs.h> -#include <fcntl.h> -#include <nand.h> -#include <spi/spi.h> -#include <io.h> -#include <asm/mmu.h> -#include <mach/imx-nand.h> -#include <mach/spi.h> -#include <mach/generic.h> -#include <mach/imx5.h> -#include <mach/iomux-mx51.h> -#include <mach/devices-imx51.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_MII, -}; - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, - .flash_bbt = 1, -}; - -static iomux_v3_cfg_t eukrea_cpuimx51_pads[] = { - /* UART1 */ - MX51_PAD_UART1_RXD__UART1_RXD, - MX51_PAD_UART1_TXD__UART1_TXD, - MX51_PAD_UART1_RTS__UART1_RTS, - MX51_PAD_UART1_CTS__UART1_CTS, - /* FEC */ - NEW_PAD_CTRL(MX51_PAD_DISP2_DAT1__FEC_RX_ER, MX51_PAD_CTRL_5), - MX51_PAD_DISP2_DAT15__FEC_TDATA0, - MX51_PAD_DISP2_DAT6__FEC_TDATA1, - MX51_PAD_DISP2_DAT7__FEC_TDATA2, - MX51_PAD_DISP2_DAT8__FEC_TDATA3, - MX51_PAD_DISP2_DAT9__FEC_TX_EN, - NEW_PAD_CTRL(MX51_PAD_DISP2_DAT10__FEC_COL, MX51_PAD_CTRL_5), - NEW_PAD_CTRL(MX51_PAD_DISP2_DAT11__FEC_RX_CLK, MX51_PAD_CTRL_5), - NEW_PAD_CTRL(MX51_PAD_DISP2_DAT12__FEC_RX_DV, MX51_PAD_CTRL_5), - MX51_PAD_DISP2_DAT13__FEC_TX_CLK, - MX51_PAD_DI2_PIN4__FEC_CRS, - MX51_PAD_DI2_PIN2__FEC_MDC, - NEW_PAD_CTRL(MX51_PAD_DI2_PIN3__FEC_MDIO, MX51_PAD_CTRL_5), - MX51_PAD_DISP2_DAT14__FEC_RDATA0, - MX51_PAD_DI2_DISP_CLK__FEC_RDATA1, - NEW_PAD_CTRL(MX51_PAD_DI_GP4__FEC_RDATA2, MX51_PAD_CTRL_5), - NEW_PAD_CTRL(MX51_PAD_DISP2_DAT0__FEC_RDATA3, MX51_PAD_CTRL_5), - MX51_PAD_DI_GP3__FEC_TX_ER, - MX51_PAD_EIM_DTACK__GPIO2_31, /* LAN8700 reset pin */ - /* NAND */ - MX51_PAD_NANDF_D7__NANDF_D7, - MX51_PAD_NANDF_D6__NANDF_D6, - MX51_PAD_NANDF_D5__NANDF_D5, - MX51_PAD_NANDF_D4__NANDF_D4, - MX51_PAD_NANDF_D3__NANDF_D3, - MX51_PAD_NANDF_D2__NANDF_D2, - MX51_PAD_NANDF_D1__NANDF_D1, - MX51_PAD_NANDF_D0__NANDF_D0, - MX51_PAD_NANDF_RB0__NANDF_RB0, - MX51_PAD_NANDF_RB1__NANDF_RB1, - MX51_PAD_NANDF_CS0__NANDF_CS0, - MX51_PAD_NANDF_CS1__NANDF_CS1, - /* LCD BL */ - MX51_PAD_DI1_D1_CS__GPIO3_4, -#ifdef CONFIG_MCI_IMX_ESDHC - /* SD 1 */ - MX51_PAD_SD1_CMD__SD1_CMD, - MX51_PAD_SD1_CLK__SD1_CLK, - MX51_PAD_SD1_DATA0__SD1_DATA0, - MX51_PAD_SD1_DATA1__SD1_DATA1, - MX51_PAD_SD1_DATA2__SD1_DATA2, - MX51_PAD_SD1_DATA3__SD1_DATA3, -#endif -}; - -#define GPIO_LAN8700_RESET (1 * 32 + 31) -#define GPIO_LCD_BL (2 * 32 + 4) - -static int eukrea_cpuimx51_devices_init(void) -{ - imx51_add_fec(&fec_info); -#ifdef CONFIG_MCI_IMX_ESDHC - imx51_add_mmc0(NULL); -#endif - imx51_add_nand(&nand_info); - - devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); - - gpio_direction_output(GPIO_LAN8700_RESET, 0); - gpio_set_value(GPIO_LAN8700_RESET, 1); - gpio_direction_output(GPIO_LCD_BL, 0); - - armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX51SD); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_eukrea_cpuimx51); - - return 0; -} - -device_initcall(eukrea_cpuimx51_devices_init); - -static int eukrea_cpuimx51_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads, ARRAY_SIZE(eukrea_cpuimx51_pads)); - - barebox_set_model("Eukrea CPUIMX51"); - barebox_set_hostname("eukrea-cpuimx51"); - - imx51_init_lowlevel(800); - - imx51_add_uart0(); - - return 0; -} - -console_initcall(eukrea_cpuimx51_console_init); diff --git a/arch/arm/boards/eukrea_cpuimx51/flash-header.imxcfg b/arch/arm/boards/eukrea_cpuimx51/flash-header.imxcfg deleted file mode 100644 index 7f9a8773da..0000000000 --- a/arch/arm/boards/eukrea_cpuimx51/flash-header.imxcfg +++ /dev/null @@ -1,61 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -soc imx51 -ivtofs 0x400 -loadaddr 0x90000000 -wm 32 0x73fa88a0 0x00000200 -wm 32 0x73fa850c 0x000020c5 -wm 32 0x73fa8510 0x000020c5 -wm 32 0x73fa883c 0x00000002 -wm 32 0x73fa8848 0x00000002 -wm 32 0x73fa84b8 0x000000e7 -wm 32 0x73fa84bc 0x00000045 -wm 32 0x73fa84c0 0x00000045 -wm 32 0x73fa84c4 0x00000045 -wm 32 0x73fa84c8 0x00000045 -wm 32 0x73fa8820 0x00000000 -wm 32 0x73fa84a4 0x00000003 -wm 32 0x73fa84a8 0x00000003 -wm 32 0x73fa84ac 0x000000e3 -wm 32 0x73fa84b0 0x000000e3 -wm 32 0x73fa84b4 0x000000e3 -wm 32 0x73fa84cc 0x000000e3 -wm 32 0x73fa84d0 0x000000e2 -wm 32 0x73fa882c 0x00000004 -wm 32 0x73fa88a4 0x00000004 -wm 32 0x73fa88ac 0x00000004 -wm 32 0x73fa88b8 0x00000004 -wm 32 0x83fd9000 0x82a20000 -wm 32 0x83fd9008 0x82a20000 -wm 32 0x83fd9010 0x000ad0d0 -wm 32 0x83fd9004 0x3f3584ab -wm 32 0x83fd900c 0x3f3584ab -wm 32 0x83fd9014 0x04008008 -wm 32 0x83fd9014 0x0000801a -wm 32 0x83fd9014 0x0000801b -wm 32 0x83fd9014 0x00448019 -wm 32 0x83fd9014 0x07328018 -wm 32 0x83fd9014 0x04008008 -wm 32 0x83fd9014 0x00008010 -wm 32 0x83fd9014 0x00008010 -wm 32 0x83fd9014 0x06328018 -wm 32 0x83fd9014 0x03808019 -wm 32 0x83fd9014 0x00408019 -wm 32 0x83fd9014 0x00008000 -wm 32 0x83fd9014 0x0400800c -wm 32 0x83fd9014 0x0000801e -wm 32 0x83fd9014 0x0000801f -wm 32 0x83fd9014 0x0000801d -wm 32 0x83fd9014 0x0732801c -wm 32 0x83fd9014 0x0400800c -wm 32 0x83fd9014 0x00008014 -wm 32 0x83fd9014 0x00008014 -wm 32 0x83fd9014 0x0632801c -wm 32 0x83fd9014 0x0380801d -wm 32 0x83fd9014 0x0040801d -wm 32 0x83fd9014 0x00008004 -wm 32 0x83fd9000 0xb2a20000 -wm 32 0x83fd9008 0xb2a20000 -wm 32 0x83fd9010 0x000ad6d0 -wm 32 0x83fd9034 0x90000000 -wm 32 0x83fd9014 0x00000000 diff --git a/arch/arm/boards/eukrea_cpuimx51/lowlevel.c b/arch/arm/boards/eukrea_cpuimx51/lowlevel.c deleted file mode 100644 index cecc3f6c83..0000000000 --- a/arch/arm/boards/eukrea_cpuimx51/lowlevel.c +++ /dev/null @@ -1,13 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only - -#include <common.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <asm/barebox-arm-head.h> - -void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - imx5_cpu_lowlevel_init(); - arm_setup_stack(0x20000000); - imx51_barebox_entry(NULL); -} diff --git a/arch/arm/boards/freescale-mx21-ads/Makefile b/arch/arm/boards/freescale-mx21-ads/Makefile deleted file mode 100644 index 3e809a8c59..0000000000 --- a/arch/arm/boards/freescale-mx21-ads/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -lwl-y += lowlevel_init.o -obj-y += imx21ads.o diff --git a/arch/arm/boards/freescale-mx21-ads/env/bin/init b/arch/arm/boards/freescale-mx21-ads/env/bin/init deleted file mode 100644 index 224a6b40be..0000000000 --- a/arch/arm/boards/freescale-mx21-ads/env/bin/init +++ /dev/null @@ -1 +0,0 @@ -# Dummy Init environment script diff --git a/arch/arm/boards/freescale-mx21-ads/imx21ads.c b/arch/arm/boards/freescale-mx21-ads/imx21ads.c deleted file mode 100644 index 92207b02d3..0000000000 --- a/arch/arm/boards/freescale-mx21-ads/imx21ads.c +++ /dev/null @@ -1,181 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/* - * Copyright (C) 2009 Ivo Clarysse - * - * Based on imx27ads.c, - * Copyright (C) 2007 Sascha Hauer, Pengutronix - */ - -#include <common.h> -#include <net.h> -#include <init.h> -#include <environment.h> -#include <mach/imx21-regs.h> -#include <asm/armlinux.h> -#include <asm/sections.h> -#include <asm/barebox-arm.h> -#include <io.h> -#include <gpio.h> -#include <mach/weim.h> -#include <partition.h> -#include <fs.h> -#include <linux/sizes.h> -#include <fcntl.h> -#include <generated/mach-types.h> -#include <mach/imx-nand.h> -#include <mach/imxfb.h> -#include <mach/iomux-mx21.h> -#include <mach/devices-imx21.h> - -#define MX21ADS_IO_REG 0xCC800000 -#define MX21ADS_IO_LCDON (1 << 9) - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, -}; - -/* Sharp LQ035Q7DB02 QVGA display */ -static struct fb_videomode imx_fb_modedata = { - .name = "Sharp-LQ035Q7", - .refresh = 60, - .xres = 240, - .yres = 320, - .pixclock = 188679, - .left_margin = 6, - .right_margin = 16, - .upper_margin = 8, - .lower_margin = 10, - .hsync_len = 2, - .vsync_len = 1, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, -}; - -static struct imx_fb_platform_data imx_fb_data = { - .mode = &imx_fb_modedata, - .num_modes = 1, - .cmap_greyscale = 0, - .cmap_inverse = 0, - .cmap_static = 0, - .pwmr = 0x00a903ff, - .lscr1 = 0x00120300, - .dmacr = 0x00020008, - .pcr = 0xfb108bc7, - .bpp = 16, -}; - -static int imx21ads_timing_init(void) -{ - u32 temp; - - /* Configure External Interface Module */ - /* CS0: burst flash */ - imx21_setup_eimcs(0, 0x00003E00, 0x00000E01); - - /* CS1: Ethernet controller, external UART, memory-mapped I/O (16-bit) */ - imx21_setup_eimcs(1, 0x00002000, 0x11118501); - - /* CS2-CS5: disable */ - imx21_setup_eimcs(2, 0x0, 0x0); - imx21_setup_eimcs(3, 0x0, 0x0); - imx21_setup_eimcs(4, 0x0, 0x0); - imx21_setup_eimcs(5, 0x0, 0x0); - - temp = readl(MX21_CCM_BASE_ADDR + MX21_PCDR0); - temp &= ~0xF000; - temp |= 0xA000; /* Set NFC divider; 0xA yields 24.18MHz */ - writel(temp, MX21_CCM_BASE_ADDR + MX21_PCDR0); - - return 0; -} - -core_initcall(imx21ads_timing_init); - -static int mx21ads_mem_init(void) -{ - arm_add_mem_device("ram0", 0xc0000000, SZ_64M); - - return 0; -} -mem_initcall(mx21ads_mem_init); - -static int mx21ads_devices_init(void) -{ - int i; - unsigned int mode[] = { - PA5_PF_LSCLK, - PA6_PF_LD0, - PA7_PF_LD1, - PA8_PF_LD2, - PA9_PF_LD3, - PA10_PF_LD4, - PA11_PF_LD5, - PA12_PF_LD6, - PA13_PF_LD7, - PA14_PF_LD8, - PA15_PF_LD9, - PA16_PF_LD10, - PA17_PF_LD11, - PA18_PF_LD12, - PA19_PF_LD13, - PA20_PF_LD14, - PA21_PF_LD15, - PA22_PF_LD16, - PA23_PF_LD17, - PA24_PF_REV, - PA25_PF_CLS, - PA26_PF_PS, - PA27_PF_SPL_SPR, - PA28_PF_HSYNC, - PA29_PF_VSYNC, - PA30_PF_CONTRAST, - PA31_PF_OE_ACD, - PE12_PF_UART1_TXD, - PE13_PF_UART1_RXD, - PE14_PF_UART1_CTS, - PE15_PF_UART1_RTS, - }; - - /* initizalize gpios */ - for (i = 0; i < ARRAY_SIZE(mode); i++) - imx21_gpio_mode(mode[i]); - - add_cfi_flash_device(DEVICE_ID_DYNAMIC, MX21_CS0_BASE_ADDR, - 32 * 1024 * 1024, 0); - imx21_add_nand(&nand_info); - add_generic_device("cs8900", DEVICE_ID_DYNAMIC, NULL, - MX21_CS1_BASE_ADDR, 0x1000, - IORESOURCE_MEM, NULL); - imx21_add_fb(&imx_fb_data); - - armlinux_set_architecture(MACH_TYPE_MX21ADS); - - return 0; -} - -device_initcall(mx21ads_devices_init); - -static int mx21ads_enable_display(void) -{ - u16 tmp; - - tmp = readw(MX21ADS_IO_REG); - tmp |= MX21ADS_IO_LCDON; - writew(tmp, MX21ADS_IO_REG); - return 0; -} - -late_initcall(mx21ads_enable_display); - -static int mx21ads_console_init(void) -{ - barebox_set_model("Freescale i.MX21 ADS"); - barebox_set_hostname("mx21ads"); - - imx21_add_uart0(); - return 0; -} - -console_initcall(mx21ads_console_init); diff --git a/arch/arm/boards/freescale-mx21-ads/lowlevel_init.S b/arch/arm/boards/freescale-mx21-ads/lowlevel_init.S deleted file mode 100644 index 9b6e4bd472..0000000000 --- a/arch/arm/boards/freescale-mx21-ads/lowlevel_init.S +++ /dev/null @@ -1,131 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2010 Jaccon Bastiaansen <jaccon.bastiaansen@gmail.com> - -#include <config.h> -#include <linux/sizes.h> -#include <asm-generic/memory_layout.h> -#include <mach/imx21-regs.h> -#include <asm/barebox-arm-head.h> - - .section ".text_bare_init","ax" - -.globl barebox_arm_reset_vector -barebox_arm_reset_vector: - - bl arm_cpu_lowlevel_init - -/* - * Initialize the AHB-Lite IP Interface (AIPI) module (to enable access to - * on chip peripherals) as described in section 7.2 of rev3 of the i.MX21 - * reference manual. - */ - ldr r0, =MX21_AIPI_BASE_ADDR + MX21_AIPI1_PSR0 - ldr r1, =0x00040304 - str r1, [r0] - ldr r0, =MX21_AIPI_BASE_ADDR + MX21_AIPI1_PSR1 - ldr r1, =0xfffbfcfb - str r1, [r0] - - ldr r0, =MX21_AIPI_BASE_ADDR + MX21_AIPI2_PSR0 - ldr r1, =0x3ffc0000 - str r1, [r0] - ldr r0, =MX21_AIPI_BASE_ADDR + MX21_AIPI2_PSR1 - ldr r1, =0xffffffff - str r1, [r0] - -/* - * Configure CPU core clock (266MHz), peripheral clock (133MHz) and enable - * the clock to peripherals. - */ - ldr r0, =MX21_CCM_BASE_ADDR + MX21_CSCR - ldr r1, =0x17180607 - str r1, [r0] - - ldr r0, =MX21_CCM_BASE_ADDR + MX21_PCCR1 - ldr r1, =0x0e000000 - str r1, [r0] - - -/* - * SDRAM and SDRAM controller configuration - */ - - /* - * CSD1 not required, because the MX21ADS board only contains 64Mbyte. - * CS3 can therefore be made available. - */ - ldr r0, =MX21_SYSCTRL_BASE_ADDR + MX21_FMCR - ldr r1, =0xffffffc9 - str r1, [r0] - - /* Skip SDRAM initialization if we run from RAM */ - cmp pc, #0xc0000000 - bls 1f - cmp pc, #0xc8000000 - bhi 1f - - b ret -1: - - /* Precharge */ - ldr r0, =MX21_X_MEMC_BASE_ADDR + MX21_SDCTL0 - ldr r1, =0x92120300 - str r1, [r0] - ldr r2, =0xc0200000 - ldr r1, [r2] - - bl mem_delay - - /* Auto refresh */ - ldr r1, =0xa2120300 - str r1, [r0] - ldr r2, =0xc0000000 - ldr r1, [r2] - ldr r1, [r2] - ldr r1, [r2] - ldr r1, [r2] - ldr r1, [r2] - ldr r1, [r2] - ldr r1, [r2] - ldr r1, [r2] - - /* Set mode register */ - ldr r1, =0xB2120300 - str r1, [r0] - ldr r1, =0xC0119800 - ldr r2, [r1] - - bl mem_delay - - /* Back to Normal Mode */ - ldr r1, =0x8212F339 - str r1, [r0] - - /* Set NFC_CLK to 24MHz */ - ldr r0, =MX21_CCM_BASE_ADDR + MX21_PCDR0 - ldr r1, =0x6419a007 - str r1, [r0] - -#ifdef CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND - - /* Setup a temporary stack in SRAM */ - ldr sp, =MX21_IRAM_BASE_ADDR + MX21_IRAM_SIZE - 4 - - b imx21_barebox_boot_nand_external -#endif /* CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND */ - -ret: - mov r0, #0xc0000000 - mov r1, #SZ_64M - mov r2, #0 - b barebox_arm_entry - -/* - * spin for a while. we need to wait at least 200 usecs. - */ -mem_delay: - mov r4, #0x4000 -spin: subs r4, r4, #1 - bne spin - mov pc, lr - diff --git a/arch/arm/boards/freescale-mx23-evk/lowlevel.c b/arch/arm/boards/freescale-mx23-evk/lowlevel.c index 62560bbff7..195ade3a7f 100644 --- a/arch/arm/boards/freescale-mx23-evk/lowlevel.c +++ b/arch/arm/boards/freescale-mx23-evk/lowlevel.c @@ -2,13 +2,27 @@ #include <common.h> #include <linux/sizes.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx23-regs.h> +#include <mach/mxs/imx23-regs.h> + +static noinline void continue_imx_entry(size_t size) +{ + static struct barebox_arm_boarddata boarddata = { + .magic = BAREBOX_ARM_BOARDDATA_MAGIC, + .machine = MACH_TYPE_MX23EVK, + }; + + barebox_arm_entry(IMX_MEMORY_BASE, size, &boarddata); +} ENTRY_FUNCTION(start_imx23_evk, r0, r1, r2) { arm_cpu_lowlevel_init(); - barebox_arm_entry(IMX_MEMORY_BASE, SZ_32M, (void *)MACH_TYPE_MX23EVK); + + relocate_to_current_adr(); + setup_c(); + + continue_imx_entry(SZ_32M); } diff --git a/arch/arm/boards/freescale-mx23-evk/mx23-evk.c b/arch/arm/boards/freescale-mx23-evk/mx23-evk.c index b12bb0dd79..d4de99eafb 100644 --- a/arch/arm/boards/freescale-mx23-evk/mx23-evk.c +++ b/arch/arm/boards/freescale-mx23-evk/mx23-evk.c @@ -9,14 +9,13 @@ #include <mci.h> #include <linux/err.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <asm/barebox-arm.h> -#include <mach/imx-regs.h> -#include <mach/clock.h> -#include <mach/mci.h> -#include <usb/fsl_usb2.h> -#include <mach/usb.h> -#include <mach/iomux.h> +#include <mach/mxs/imx-regs.h> +#include <mach/mxs/mci.h> +#include <linux/usb/fsl_usb2.h> +#include <mach/mxs/usb.h> +#include <mach/mxs/iomux.h> static struct mxs_mci_platform_data mci_pdata = { .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED, diff --git a/arch/arm/boards/freescale-mx25-3ds/3stack.c b/arch/arm/boards/freescale-mx25-3ds/3stack.c deleted file mode 100644 index 8707e02a64..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/3stack.c +++ /dev/null @@ -1,211 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2009 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - -#include <common.h> -#include <init.h> -#include <driver.h> -#include <gpio.h> -#include <environment.h> -#include <mach/imx25-regs.h> -#include <asm/armlinux.h> -#include <asm/sections.h> -#include <asm/barebox-arm.h> -#include <io.h> -#include <envfs.h> -#include <partition.h> -#include <generated/mach-types.h> -#include <mach/imx-nand.h> -#include <platform_data/eth-fec.h> -#include <nand.h> -#include <mach/iomux-mx25.h> -#include <mach/generic.h> -#include <mach/iim.h> -#include <linux/err.h> -#include <i2c/i2c.h> -#include <mfd/mc34704.h> -#include <mach/devices-imx25.h> -#include <asm/barebox-arm-head.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_RMII, - .phy_addr = 1, -}; - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, -}; - -#ifdef CONFIG_USB -static void imx25_usb_init(void) -{ - unsigned int tmp; - - /* Host 2 */ - tmp = readl(MX25_USB_OTG_BASE_ADDR + 0x600); - tmp &= ~(3 << 21); - tmp |= (2 << 21) | (1 << 4) | (1 << 5); - writel(tmp, MX25_USB_OTG_BASE_ADDR + 0x600); - - tmp = readl(MX25_USB_OTG_BASE_ADDR + 0x584); - tmp |= 3 << 30; - writel(tmp, MX25_USB_OTG_BASE_ADDR + 0x584); - - /* Set to Host mode */ - tmp = readl(MX25_USB_OTG_BASE_ADDR + 0x5a8); - writel(tmp | 0x3, MX25_USB_OTG_BASE_ADDR + 0x5a8); -} -#endif - -static struct i2c_board_info i2c_devices[] = { - { - I2C_BOARD_INFO("mc34704", 0x54), - }, -}; - -static int imx25_3ds_pmic_init(void) -{ - struct mc34704 *pmic; - - pmic = mc34704_get(); - if (pmic == NULL) - return -EIO; - - return mc34704_reg_write(pmic, 0x2, 0x9); -} - -static int imx25_3ds_fec_init(void) -{ - int ret; - - ret = imx25_3ds_pmic_init(); - if (ret < 0) - return ret; - - /* - * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins. - * Assert FEC_RESET_B, then power up the PHY by asserting - * FEC_ENABLE, at the same time lifting FEC_RESET_B. - * - * FEC_RESET_B: gpio2[3] is ALT 5 mode of pin A17 - * FEC_ENABLE_B: gpio4[8] is ALT 5 mode of pin D12 - */ - writel(0x8, MX25_IOMUXC_BASE_ADDR + 0x0238); /* open drain */ - writel(0x0, MX25_IOMUXC_BASE_ADDR + 0x028C); /* cmos, no pu/pd */ - -#define FEC_ENABLE_GPIO 35 -#define FEC_RESET_B_GPIO 104 - - /* make the pins output */ - gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */ - gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */ - udelay(2); - - /* turn on power & lift reset */ - gpio_set_value(FEC_ENABLE_GPIO, 1); - gpio_set_value(FEC_RESET_B_GPIO, 1); - - return 0; -} -late_initcall(imx25_3ds_fec_init); - -static int imx25_3ds_devices_init(void) -{ -#ifdef CONFIG_USB - /* USB does not work yet. Don't know why. Maybe - * the CPLD has to be initialized. - */ - imx25_usb_init(); - add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX25_USB_OTG_BASE_ADDR + 0x400, NULL); -#endif - - imx25_iim_register_fec_ethaddr(); - imx25_add_fec(&fec_info); - - add_mem_device("sram0", 0x78000000, 128 * 1024, IORESOURCE_MEM_WRITEABLE); - - if (readl(MX25_CCM_BASE_ADDR + MX25_CCM_RCSR) & (1 << 14)) - nand_info.width = 2; - - imx25_add_nand(&nand_info); - - devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - - devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); - - i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); - imx25_add_i2c0(NULL); - - armlinux_set_architecture(MACH_TYPE_MX25_3DS); - armlinux_set_serial(imx_uid()); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_freescale_mx25_3ds); - - return 0; -} - -device_initcall(imx25_3ds_devices_init); - -static iomux_v3_cfg_t imx25_pads[] = { - MX25_PAD_FEC_MDC__FEC_MDC, - MX25_PAD_FEC_MDIO__FEC_MDIO, - MX25_PAD_FEC_RDATA0__FEC_RDATA0, - MX25_PAD_FEC_RDATA1__FEC_RDATA1, - MX25_PAD_FEC_RX_DV__FEC_RX_DV, - MX25_PAD_FEC_TDATA0__FEC_TDATA0, - MX25_PAD_FEC_TDATA1__FEC_TDATA1, - MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, - MX25_PAD_FEC_TX_EN__FEC_TX_EN, - MX25_PAD_POWER_FAIL__POWER_FAIL, - MX25_PAD_A17__GPIO_2_3, - MX25_PAD_D12__GPIO_4_8, - /* UART1 */ - MX25_PAD_UART1_RXD__UART1_RXD, - MX25_PAD_UART1_TXD__UART1_TXD, - MX25_PAD_UART1_RTS__UART1_RTS, - MX25_PAD_UART1_CTS__UART1_CTS, - /* USBH2 */ - MX25_PAD_D9__USBH2_PWR, - MX25_PAD_D8__USBH2_OC, - MX25_PAD_LD0__USBH2_CLK, - MX25_PAD_LD1__USBH2_DIR, - MX25_PAD_LD2__USBH2_STP, - MX25_PAD_LD3__USBH2_NXT, - MX25_PAD_LD4__USBH2_DATA0, - MX25_PAD_LD5__USBH2_DATA1, - MX25_PAD_LD6__USBH2_DATA2, - MX25_PAD_LD7__USBH2_DATA3, - MX25_PAD_HSYNC__USBH2_DATA4, - MX25_PAD_VSYNC__USBH2_DATA5, - MX25_PAD_LSCLK__USBH2_DATA6, - MX25_PAD_OE_ACD__USBH2_DATA7, - /* i2c */ - MX25_PAD_I2C1_CLK__I2C1_CLK, - MX25_PAD_I2C1_DAT__I2C1_DAT, -}; - -static int imx25_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(imx25_pads, ARRAY_SIZE(imx25_pads)); - - writel(0x03010101, 0x53f80024); - - barebox_set_model("Freescale i.MX25 3DS"); - barebox_set_hostname("mx25-3stack"); - - imx25_add_uart0(); - return 0; -} - -console_initcall(imx25_console_init); - -static int imx25_core_setup(void) -{ - writel(0x01010103, MX25_CCM_BASE_ADDR + MX25_CCM_PCDR2); - return 0; - -} -core_initcall(imx25_core_setup); diff --git a/arch/arm/boards/freescale-mx25-3ds/Makefile b/arch/arm/boards/freescale-mx25-3ds/Makefile deleted file mode 100644 index dbb2e77ecb..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Juergen Beisert <jbe@pengutronix.de> - -lwl-y += lowlevel_init.o -obj-y += 3stack.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-freescale-mx25-3ds diff --git a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/_update b/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/_update deleted file mode 100644 index 014bce3512..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/_update +++ /dev/null @@ -1,36 +0,0 @@ -#!/bin/sh - -if [ -z "$part" -o -z "$image" ]; then - echo "define \$part and \$image" - exit 1 -fi - -if [ ! -e "$part" ]; then - echo "Partition $part does not exist" - exit 1 -fi - -if [ $# = 1 ]; then - image=$1 -fi - -if [ x$ip = xdhcp ]; then - dhcp -fi - -ping $eth0.serverip -if [ $? -ne 0 ] ; then - echo "update aborted" - exit 1 -fi - -unprotect $part - -echo -echo "erasing partition $part" -erase $part - -echo -echo "flashing $image to $part" -echo -tftp $image $part diff --git a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/boot b/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/boot deleted file mode 100644 index 7bbff2d1f6..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/boot +++ /dev/null @@ -1,47 +0,0 @@ -#!/bin/sh - -. /env/config - -if [ x$1 = xnand ]; then - root=nand - kernel=nand -fi - -if [ x$1 = xnet ]; then - root=net - kernel=net -fi - -if [ x$1 = xnor ]; then - root=nor - kernel=nor -fi - -if [ x$ip = xdhcp ]; then - bootargs="$bootargs ip=dhcp" -else - bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::" -fi - -if [ x$root = xnand ]; then - bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2" -elif [ x$root = xnor ]; then - bootargs="$bootargs root=$rootpart_nor rootfstype=jffs2" -else - bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp" -fi - -bootargs="$bootargs mtdparts=physmap-flash.0:$nor_parts;mxc_nand:$nand_parts" - -if [ $kernel = net ]; then - if [ x$ip = xdhcp ]; then - dhcp - fi - tftp $uimage uImage || exit 1 - bootm uImage -elif [ $kernel = nor ]; then - bootm /dev/nor0.kernel -else - bootm /dev/nand0.kernel.bb -fi - diff --git a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/init b/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/init deleted file mode 100644 index 8eafa34dc8..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/init +++ /dev/null @@ -1,26 +0,0 @@ -#!/bin/sh - -PATH=/env/bin -export PATH - -. /env/config -if [ -e /dev/nor0 ]; then - addpart /dev/nor0 $nor_parts -fi - -if [ -e /dev/nand0 ]; then - addpart /dev/nand0 $nand_parts -fi - -echo -echo -n "Hit any key to stop autoboot: " -timeout -a $autoboot_timeout -if [ $? != 0 ]; then - echo - echo "type update_kernel nand|nor [<imagename>] to update kernel into flash" - echo "type update_root nand|nor [<imagename>] to update rootfs into flash" - echo - exit -fi - -boot diff --git a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/update_kernel b/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/update_kernel deleted file mode 100644 index 05c822d860..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/update_kernel +++ /dev/null @@ -1,15 +0,0 @@ -#!/bin/sh - -. /env/config - -image=$uimage -if [ x$1 = xnand ]; then - part=/dev/nand0.kernel.bb -elif [ x$1 = xnor ]; then - part=/dev/nor0.kernel -else - echo "usage: $0 nor|nand [imagename]" - exit 1 -fi - -. /env/bin/_update $2 diff --git a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/update_root b/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/update_root deleted file mode 100644 index eaf36ebcea..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/bin/update_root +++ /dev/null @@ -1,16 +0,0 @@ -#!/bin/sh - -. /env/config - -image=$uimage -if [ x$1 = xnand ]; then - part=/dev/nand0.root.bb -elif [ x$1 = xnor ]; then - part=/dev/nor0.root -else - echo "usage: $0 nor|nand [imagename]" - exit 1 -fi - -. /env/bin/_update $2 - diff --git a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/config b/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/config deleted file mode 100644 index 8469935b20..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/defaultenv-freescale-mx25-3ds/config +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh - -# can be either 'net', 'nor' or 'nand'' -kernel=net -root=net - -uimage=uImage-pcm043 -jffs2=root-pcm043.jffs2 - -autoboot_timeout=3 - -nfsroot="/ptx/work/octopus/rsc/svn/oselas/bsp/phytec/phyCORE-i.MX27/OSELAS.BSP-Phytec-phyCORE-i.MX27-trunk/root" -bootargs="console=ttymxc0,115200" - -nor_parts="256k(barebox)ro,128k(bareboxenv),2048k(kernel),-(root)" -rootpart_nor="/dev/mtdblock3" - -nand_parts="256k(barebox)ro,128k(bareboxenv),2048k(kernel),108416k(root),-(kernel1)" -rootpart_nand="/dev/mtdblock7" - -# use 'dhcp' to do dhcp in barebox and in kernel -#ip=dhcp - -# or set your networking parameters here -eth0.ipaddr=192.168.3.11 -eth0.netmask=255.255.255.0 -#eth0.gateway=a.b.c.d -eth0.serverip=192.168.3.10 -#eth0.ethaddr= diff --git a/arch/arm/boards/freescale-mx25-3ds/flash-header.imxcfg b/arch/arm/boards/freescale-mx25-3ds/flash-header.imxcfg deleted file mode 100644 index 9f83d102cb..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/flash-header.imxcfg +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -soc imx25 -loadaddr 0x80000000 -ivtofs 0x400 -wm 32 0xb8002050 0x0000d843 -wm 32 0xb8002054 0x22252521 -wm 32 0xb8002058 0x22220a00 -#if defined CONFIG_FREESCALE_MX25_3STACK_SDRAM_64MB_DDR2 -wm 32 0xb8001004 0x0076e83a -wm 32 0xb8001010 0x00000304 -wm 32 0xb8001000 0x92210000 -wm 32 0x80000f00 0x12344321 -wm 32 0xb8001000 0xb2210000 -wm 8 0x82000000 0xda -wm 8 0x83000000 0xda -wm 8 0x81000400 0xda -wm 8 0x80000333 0xda -wm 32 0xb8001000 0x92210000 -wm 32 0x80000400 0x12344321 -wm 32 0xb8001000 0xa2210000 -wm 32 0x80000000 0x87654321 -wm 32 0x80000000 0x87654321 -wm 32 0xb8001000 0xb2210000 -wm 8 0x80000233 0xda -wm 8 0x81000780 0xda -wm 8 0x81000400 0xda -wm 32 0xb8001000 0x82216080 -#elif defined CONFIG_FREESCALE_MX25_3STACK_SDRAM_128MB_MDDR -wm 32 0xb8001010 0x00000004 -wm 32 0xb8001000 0x92100000 -wm 8 0x80000400 0x21 -wm 32 0xb8001000 0xa2100000 -wm 32 0x80000000 0x12344321 -wm 32 0x80000000 0x12344321 -wm 32 0xb8001000 0xb2100000 -wm 8 0x80000033 0xda -wm 8 0x81000000 0xff -wm 32 0xb8001000 0x82216880 -wm 32 0xb8001004 0x00295729 -#else -#error "Unsupported SDRAM type" -#endif -wm 32 0x53f80008 0x20034000 diff --git a/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S b/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S deleted file mode 100644 index 9be9c1a77b..0000000000 --- a/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S +++ /dev/null @@ -1,213 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - -#include <linux/sizes.h> -#include <asm-generic/memory_layout.h> -#include <mach/imx25-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> -#include <asm/barebox-arm-head.h> - -#define writel(val, reg) \ - ldr r0, =reg; \ - ldr r1, =val; \ - str r1, [r0]; - -#define writeb(val, reg) \ - ldr r0, =reg; \ - ldr r1, =val; \ - strb r1, [r0]; - -/* Assuming 24MHz input clock */ -#define MPCTL_PARAM_532_MX25 \ - (IMX_PLL_PD(1) | IMX_PLL_MFD(0) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) - -.section ".text_bare_init","ax" - -ARM_PPMRR: .word 0x40000015 -L2CACHE_PARAM: .word 0x00030024 -CCM_CCMR_W: .word 0x003F4208 -CCM_PDR0_W: .word 0x00801000 -MPCTL_PARAM_399_W: .word MPCTL_PARAM_399 -MPCTL_PARAM_532_W: .word MPCTL_PARAM_532_MX25 -PPCTL_PARAM_W: .word PPCTL_PARAM_300 -CCM_BASE_ADDR_W: .word MX25_CCM_BASE_ADDR - -.globl barebox_arm_reset_vector -barebox_arm_reset_vector: - bl arm_cpu_lowlevel_init - -#define MX25_CCM_MCR 0x64 - - ldr r0, CCM_BASE_ADDR_W - /* default CLKO to 1/32 of the ARM core */ - ldr r1, [r0, #MX25_CCM_MCR] - bic r1, r1, #0x00F00000 - bic r1, r1, #0x7F000000 - mov r2, #0x5F000000 - add r2, r2, #0x00200000 - orr r1, r1, r2 - str r1, [r0, #MX25_CCM_MCR] - - /* enable all the clocks */ - writel(0x1FFFFFFF, MX25_CCM_BASE_ADDR + MX25_CCM_CGCR0) - writel(0xFFFFFFFF, MX25_CCM_BASE_ADDR + MX25_CCM_CGCR1) - writel(0x000FDFFF, MX25_CCM_BASE_ADDR + MX25_CCM_CGCR2) - writel(0x0000FEFF, MX25_CCM_BASE_ADDR + MX25_CCM_MCR) - - /* Setup a temporary stack in SRAM */ - ldr sp, =MX25_IRAM_BASE_ADDR + MX25_IRAM_SIZE - 4 - - /* Skip SDRAM initialization if we run from RAM */ - cmp pc, #0x80000000 - bls 1f - cmp pc, #0x90000000 - bhi 1f - - b imx25_barebox_entry - -1: - ldr r0, ESDCTL_BASE_W - mov r3, #0x2000 - str r3, [r0, #0x0] - str r3, [r0, #0x8] - - mov r12, #0x00 - mov r2, #0x1 /* mDDR */ - mov r1, #MX25_CSD0_BASE_ADDR - bl setup_sdram_bank -// cmp r3, #0x0 -// orreq r12, r12, #1 -// eorne r2, r2, #0x1 -// blne setup_sdram_bank - - ldr r3, ESDCTL_DELAY5 - str r3, [r0, #0x30] - -#ifdef CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND - - mov r0, #0 - b imx25_barebox_boot_nand_external -#endif /* CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND */ - -ret: - b imx25_barebox_entry - -/* - * r0: control base, r1: ram bank base - * r2: ddr type(0:DDR2, 1:MDDR) r3, r4: working - */ -setup_sdram_bank: - mov r3, #0xE /* 0xA + 0x4 */ - tst r2, #0x1 - orreq r3, r3, #0x300 /* DDR2 */ - str r3, [r0, #0x10] - bic r3, r3, #0x00A - str r3, [r0, #0x10] - beq 2f - - mov r3, #0x20000 -1: subs r3, r3, #1 - bne 1b - -2: adr r4, ESDCTL_CONFIG - tst r2, #0x1 - ldreq r3, [r4, #0x0] - ldrne r3, [r4, #0x4] - cmp r1, #MX25_CSD1_BASE_ADDR - strlo r3, [r0, #0x4] - strhs r3, [r0, #0xC] - - ldr r3, ESDCTL_0x92220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - mov r3, #0xDA - ldr r4, RAM_PARAM1_MDDR - strb r3, [r1, r4] - - tst r2, #0x1 - bne skip_set_mode - - cmp r1, #MX25_CSD1_BASE_ADDR - ldr r3, ESDCTL_0xB2220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - mov r3, #0xDA - ldr r4, RAM_PARAM4_MDDR - strb r3, [r1, r4] - ldr r4, RAM_PARAM5_MDDR - strb r3, [r1, r4] - ldr r4, RAM_PARAM3_MDDR - strb r3, [r1, r4] - ldr r4, RAM_PARAM2_MDDR - strb r3, [r1, r4] - - ldr r3, ESDCTL_0x92220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - mov r3, #0xDA - ldr r4, RAM_PARAM1_MDDR - strb r3, [r1, r4] - -skip_set_mode: - cmp r1, #MX25_CSD1_BASE_ADDR - ldr r3, ESDCTL_0xA2220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - mov r3, #0xDA - strb r3, [r1] - strb r3, [r1] - - ldr r3, ESDCTL_0xB2220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - adr r4, RAM_PARAM6_MDDR - tst r2, #0x1 - ldreq r4, [r4, #0x0] - ldrne r4, [r4, #0x4] - mov r3, #0xDA - strb r3, [r1, r4] - ldreq r4, RAM_PARAM7_MDDR - streqb r3, [r1, r4] - adr r4, RAM_PARAM3_MDDR - ldreq r4, [r4, #0x0] - ldrne r4, [r4, #0x4] - strb r3, [r1, r4] - - cmp r1, #MX25_CSD1_BASE_ADDR - ldr r3, ESDCTL_0x82226080 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - - tst r2, #0x1 - moveq r4, #0x20000 - movne r4, #0x200 -1: subs r4, r4, #1 - bne 1b - - str r3, [r1, #0x100] - ldr r4, [r1, #0x100] - cmp r3, r4 - movne r3, #1 - moveq r3, #0 - - mov pc, lr - -RAM_PARAM1_MDDR: .word 0x00000400 -RAM_PARAM2_MDDR: .word 0x00000333 -RAM_PARAM3_MDDR: .word 0x02000400 - .word 0x02000000 -RAM_PARAM4_MDDR: .word 0x04000000 -RAM_PARAM5_MDDR: .word 0x06000000 -RAM_PARAM6_MDDR: .word 0x00000233 - .word 0x00000033 -RAM_PARAM7_MDDR: .word 0x02000780 -ESDCTL_0x92220000: .word 0x92210000 -ESDCTL_0xA2220000: .word 0xA2210000 -ESDCTL_0xB2220000: .word 0xB2210000 -ESDCTL_0x82226080: .word 0x82216080 -ESDCTL_CONFIG: .word 0x007FFC3F - .word 0x007FFC3F -ESDCTL_DELAY5: .word 0x00F49F00 -ESDCTL_BASE_W: .word MX25_ESDCTL_BASE_ADDR - diff --git a/arch/arm/boards/freescale-mx27-ads/Makefile b/arch/arm/boards/freescale-mx27-ads/Makefile deleted file mode 100644 index 9fd43dd984..0000000000 --- a/arch/arm/boards/freescale-mx27-ads/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -lwl-y += lowlevel_init.o -obj-y += imx27ads.o diff --git a/arch/arm/boards/freescale-mx27-ads/env/bin/_update b/arch/arm/boards/freescale-mx27-ads/env/bin/_update deleted file mode 100644 index 014bce3512..0000000000 --- a/arch/arm/boards/freescale-mx27-ads/env/bin/_update +++ /dev/null @@ -1,36 +0,0 @@ -#!/bin/sh - -if [ -z "$part" -o -z "$image" ]; then - echo "define \$part and \$image" - exit 1 -fi - -if [ ! -e "$part" ]; then - echo "Partition $part does not exist" - exit 1 -fi - -if [ $# = 1 ]; then - image=$1 -fi - -if [ x$ip = xdhcp ]; then - dhcp -fi - -ping $eth0.serverip -if [ $? -ne 0 ] ; then - echo "update aborted" - exit 1 -fi - -unprotect $part - -echo -echo "erasing partition $part" -erase $part - -echo -echo "flashing $image to $part" -echo -tftp $image $part diff --git a/arch/arm/boards/freescale-mx27-ads/env/bin/boot b/arch/arm/boards/freescale-mx27-ads/env/bin/boot deleted file mode 100644 index 3859dc113b..0000000000 --- a/arch/arm/boards/freescale-mx27-ads/env/bin/boot +++ /dev/null @@ -1,38 +0,0 @@ -#!/bin/sh - -. /env/config - -if [ x$1 = xflash ]; then - root=flash - kernel=flash -fi - -if [ x$1 = xnet ]; then - root=net - kernel=net -fi - -if [ x$ip = xdhcp ]; then - bootargs="$bootargs ip=dhcp" -else - bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::" -fi - -if [ x$root = xflash ]; then - bootargs="$bootargs root=$rootpart rootfstype=jffs2" -else - bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp" -fi - -bootargs="$bootargs mtdparts=physmap-flash.0:$mtdparts" - -if [ $kernel = net ]; then - if [ x$ip = xdhcp ]; then - dhcp - fi - tftp $uimage uImage || exit 1 - bootm uImage -else - bootm /dev/nor0.kernel -fi - diff --git a/arch/arm/boards/freescale-mx27-ads/env/bin/init b/arch/arm/boards/freescale-mx27-ads/env/bin/init deleted file mode 100644 index 48e2139f7d..0000000000 --- a/arch/arm/boards/freescale-mx27-ads/env/bin/init +++ /dev/null @@ -1,20 +0,0 @@ -#!/bin/sh - -PATH=/env/bin -export PATH - -. /env/config -addpart /dev/nor0 $mtdparts - -echo -echo -n "Hit any key to stop autoboot: " -timeout -a $autoboot_timeout -if [ $? != 0 ]; then - echo - echo "type update_kernel [<imagename>] to update kernel into flash" - echo "type udate_root [<imagename>] to update rootfs into flash" - echo - exit -fi - -boot
\ No newline at end of file diff --git a/arch/arm/boards/freescale-mx27-ads/env/bin/update_kernel b/arch/arm/boards/freescale-mx27-ads/env/bin/update_kernel deleted file mode 100644 index 1ad95fc5d6..0000000000 --- a/arch/arm/boards/freescale-mx27-ads/env/bin/update_kernel +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -. /env/config - -image=$uimage -part=/dev/nor0.kernel - -. /env/bin/_update $1 diff --git a/arch/arm/boards/freescale-mx27-ads/env/bin/update_root b/arch/arm/boards/freescale-mx27-ads/env/bin/update_root deleted file mode 100644 index b757a5b922..0000000000 --- a/arch/arm/boards/freescale-mx27-ads/env/bin/update_root +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -. /env/config - -image=$jffs2 -part=/dev/nor0.root - -. /env/bin/_update $1 diff --git a/arch/arm/boards/freescale-mx27-ads/env/config b/arch/arm/boards/freescale-mx27-ads/env/config deleted file mode 100644 index f18a86b7c1..0000000000 --- a/arch/arm/boards/freescale-mx27-ads/env/config +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/sh - -# can be either 'net' or 'flash' -kernel=net -root=net - -# use 'dhcp' todo dhcp in barebox and in kernel -ip=dhcp - -eth0.ipaddr=192.168.23.164 -eth0.netmask=255.255.255.0 -eth0.gateway=192.168.23.2 -eth0.serverip=192.168.23.2 - -uimage=uImage-mx27ads -jffs2=root-mx27ads.jffs2 - -autoboot_timeout=3 - -nfsroot="/tmp/imx27ads" -bootargs="console=ttymxc0,115200" - -mtdparts="128k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)" -rootpart="/dev/mtdblock3" - diff --git a/arch/arm/boards/freescale-mx27-ads/imx27ads.c b/arch/arm/boards/freescale-mx27-ads/imx27ads.c deleted file mode 100644 index 670ea2186f..0000000000 --- a/arch/arm/boards/freescale-mx27-ads/imx27ads.c +++ /dev/null @@ -1,111 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer, Pengutronix - -#include <common.h> -#include <net.h> -#include <init.h> -#include <environment.h> -#include <mach/imx27-regs.h> -#include <asm/armlinux.h> -#include <io.h> -#include <platform_data/eth-fec.h> -#include <gpio.h> -#include <mach/weim.h> -#include <partition.h> -#include <fs.h> -#include <fcntl.h> -#include <generated/mach-types.h> -#include <mach/iomux-mx27.h> -#include <mach/devices-imx27.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_MII, - .phy_addr = 1, -}; - -static int imx27ads_timing_init(void) -{ - /* configure cpld on cs4 */ - imx27_setup_weimcs(4, 0x0000DCF6, 0x444A4541, 0x44443302); - - /* configure synchronous mode for - * 16 bit nor flash on cs0 */ - imx27_setup_weimcs(0, 0x0000CC03, 0xa0330D01, 0x00220800); - - writew(0x00f0, 0xc0000000); - writew(0x00aa, 0xc0000aaa); - writew(0x0055, 0xc0000554); - writew(0x00d0, 0xc0000aaa); - writew(0x66ca, 0xc0000aaa); - writew(0x00f0, 0xc0000000); - - imx27_setup_weimcs(0, 0x23524E80, 0x10000D03, 0x00720900); - - /* Select FEC data through data path */ - writew(0x0020, MX27_CS4_BASE_ADDR + 0x10); - - /* Enable CPLD FEC data path */ - writew(0x0010, MX27_CS4_BASE_ADDR + 0x14); - - return 0; -} - -core_initcall(imx27ads_timing_init); - -static int mx27ads_devices_init(void) -{ - int i; - unsigned int mode[] = { - PD0_AIN_FEC_TXD0, - PD1_AIN_FEC_TXD1, - PD2_AIN_FEC_TXD2, - PD3_AIN_FEC_TXD3, - PD4_AOUT_FEC_RX_ER, - PD5_AOUT_FEC_RXD1, - PD6_AOUT_FEC_RXD2, - PD7_AOUT_FEC_RXD3, - PD8_AF_FEC_MDIO, - PD9_AIN_FEC_MDC | GPIO_PUEN, - PD10_AOUT_FEC_CRS, - PD11_AOUT_FEC_TX_CLK, - PD12_AOUT_FEC_RXD0, - PD13_AOUT_FEC_RX_DV, - PD14_AOUT_FEC_RX_CLK, - PD15_AOUT_FEC_COL, - PD16_AIN_FEC_TX_ER, - PF23_AIN_FEC_TX_EN, - PE12_PF_UART1_TXD, - PE13_PF_UART1_RXD, - PE14_PF_UART1_CTS, - PE15_PF_UART1_RTS, - }; - - /* initizalize gpios */ - for (i = 0; i < ARRAY_SIZE(mode); i++) - imx27_gpio_mode(mode[i]); - - add_cfi_flash_device(DEVICE_ID_DYNAMIC, 0xC0000000, 32 * 1024 * 1024, 0); - - imx27_add_fec(&fec_info); - devfs_add_partition("nor0", 0x00000, 0x20000, DEVFS_PARTITION_FIXED, "self0"); - devfs_add_partition("nor0", 0x20000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); - protect_file("/dev/env0", 1); - - armlinux_set_architecture(MACH_TYPE_MX27ADS); - - return 0; -} - -device_initcall(mx27ads_devices_init); - -static int mx27ads_console_init(void) -{ - barebox_set_model("Freescale i.MX27 ADS"); - barebox_set_hostname("mx27ads"); - - imx27_add_uart0(); - return 0; -} - -console_initcall(mx27ads_console_init); - diff --git a/arch/arm/boards/freescale-mx27-ads/lowlevel_init.S b/arch/arm/boards/freescale-mx27-ads/lowlevel_init.S deleted file mode 100644 index bd78ebf9e8..0000000000 --- a/arch/arm/boards/freescale-mx27-ads/lowlevel_init.S +++ /dev/null @@ -1,116 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* - * For clock initialization, see chapter 3 of the "MCIMX27 Multimedia - * Applications Processor Reference Manual, Rev. 0.2". - * - */ - -#include <config.h> -#include <mach/imx27-regs.h> -#include <asm/barebox-arm-head.h> - -#define writel(val, reg) \ - ldr r0, =reg; \ - ldr r1, =val; \ - str r1, [r0]; - -#define CRM_PLL_PCTL_PARAM(pd, fd, fi, fn) (((pd-1)<<26) + ((fd-1)<<16) + (fi<<10) + (fn<<0)) - -.macro sdram_init - /* - * DDR on CSD0 - */ - writel(0x00000008, 0xD8001010) - writel(0x55555555, 0x10027828) - writel(0x55555555, 0x10027830) - writel(0x55555555, 0x10027834) - writel(0x00005005, 0x10027838) - writel(0x15555555, 0x1002783C) - writel(0x00000004, 0xD8001010) - writel(0x006ac73a, 0xD8001004) - writel(0x92100000, 0xD8001000) - writel(0x00000000, 0xA0000F00) - writel(0xA2100000, 0xD8001000) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0xA2200000, 0xD8001000) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0xb2100000, 0xD8001000) - ldr r0, =0xA0000033 - mov r1, #0xda - strb r1, [r0] - ldr r0, =0xA1000000 - mov r1, #0xff - strb r1, [r0] - writel(0x82226080, 0xD8001000) -.endm - -.globl barebox_arm_reset_vector -barebox_arm_reset_vector: - - bl arm_cpu_lowlevel_init - - ldr sp, =MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE - 4; - - /* ahb lite ip interface */ - writel(0x20040304, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR0) - writel(0xDFFBFCFB, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR1) - writel(0x00000000, MX27_AIPI_BASE_ADDR + MX27_AIPI2_PSR0) - writel(0xFFFFFFFF, MX27_AIPI_BASE_ADDR + MX27_AIPI2_PSR1) - - /* disable mpll/spll */ - ldr r0, =MX27_CCM_BASE_ADDR + MX27_CSCR - ldr r1, [r0] - bic r1, r1, #0x03 - str r1, [r0] - - /* - * pll clock initialization - see section 3.4.3 of the i.MX27 manual - * - * FIXME: Using the 399*2 MHz values from table 3-8 doens't work - * with 1.2 V core voltage! Find out if this is - * documented somewhere. - */ - writel(0x00191403, MX27_CCM_BASE_ADDR + MX27_MPCTL0) /* MPLL = 199.5*2 MHz */ - writel(0x040C2403, MX27_CCM_BASE_ADDR + MX27_SPCTL0) /* SPLL = FIXME (needs review) */ - - /* - * ARM clock = (399 MHz / 2) / (ARM divider = 1) = 200 MHz - * AHB clock = (399 MHz / 3) / (AHB divider = 2) = 66.5 MHz - * System clock (HCLK) = 133 MHz - */ - writel(0x33F30307 | MX27_CSCR_MPLL_RESTART | MX27_CSCR_SPLL_RESTART, - MX27_CCM_BASE_ADDR + MX27_CSCR) - - /* add some delay here */ - mov r1, #0x1000 -1: subs r1, r1, #0x1 - bne 1b - - /* clock gating enable */ - writel(0x00050f08, MX27_SYSCTRL_BASE_ADDR + MX27_GPCR) - - /* peripheral clock divider */ - /* FIXME */ - writel(0x23C8F403, MX27_CCM_BASE_ADDR + MX27_PCDR0) - /* PERDIV1=08 @133 MHz */ - /* PERDIV1=04 @266 MHz */ - writel(0x09030913, MX27_CCM_BASE_ADDR + MX27_PCDR1) - /* skip sdram initialization if we run from ram */ - cmp pc, #0xa0000000 - bls 1f - cmp pc, #0xc0000000 - bhi 1f - - b imx27_barebox_entry -1: - sdram_init - - b imx27_barebox_entry - diff --git a/arch/arm/boards/freescale-mx28-evk/board.c b/arch/arm/boards/freescale-mx28-evk/board.c index 92097a2bca..1c5d2da5a6 100644 --- a/arch/arm/boards/freescale-mx28-evk/board.c +++ b/arch/arm/boards/freescale-mx28-evk/board.c @@ -9,7 +9,7 @@ #include <common.h> #include <init.h> #include <net.h> -#include <mach/ocotp.h> +#include <mach/mxs/ocotp.h> static void mx28_evk_get_ethaddr(void) { diff --git a/arch/arm/boards/freescale-mx28-evk/lowlevel.c b/arch/arm/boards/freescale-mx28-evk/lowlevel.c index 7f0bd8a90e..42ac33fbbd 100644 --- a/arch/arm/boards/freescale-mx28-evk/lowlevel.c +++ b/arch/arm/boards/freescale-mx28-evk/lowlevel.c @@ -7,11 +7,11 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx28-regs.h> -#include <mach/init.h> +#include <mach/mxs/imx28-regs.h> +#include <mach/mxs/init.h> #include <io.h> #include <debug_ll.h> -#include <mach/iomux.h> +#include <mach/mxs/iomux.h> #include <stmp-device.h> extern char __dtb_imx28_evk_start[]; diff --git a/arch/arm/boards/freescale-mx35-3ds/3stack.c b/arch/arm/boards/freescale-mx35-3ds/3stack.c deleted file mode 100644 index 5b91c601f8..0000000000 --- a/arch/arm/boards/freescale-mx35-3ds/3stack.c +++ /dev/null @@ -1,455 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/* - * Copyright (C) 2007 Sascha Hauer, Pengutronix - * 2009 Marc Kleine-Budde, Pengutronix - * - * Derived from: - * - * * mx35_3stack.c - board file for uboot-v1 - * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> - * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <environment.h> -#include <errno.h> -#include <fcntl.h> -#include <platform_data/eth-fec.h> -#include <fs.h> -#include <init.h> -#include <nand.h> -#include <net.h> -#include <envfs.h> -#include <linux/sizes.h> -#include <partition.h> -#include <gpio.h> - -#include <asm/armlinux.h> -#include <asm/sections.h> -#include <asm/barebox-arm.h> -#include <io.h> -#include <generated/mach-types.h> - -#include <mach/weim.h> -#include <mach/imx-nand.h> -#include <mach/imx35-regs.h> -#include <mach/iomux-mx35.h> -#include <mach/iomux-v3.h> -#include <mach/imx-ipu-fb.h> -#include <mach/generic.h> -#include <mach/devices-imx35.h> -#include <mach/revision.h> - -#include <i2c/i2c.h> -#include <mfd/mc13xxx.h> -#include <mfd/mc9sdz60.h> - - -/* Board rev for the PDK 3stack */ -#define MX35PDK_BOARD_REV_1 0 -#define MX35PDK_BOARD_REV_2 1 - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_MII, - .phy_addr = 0x1F, -}; - -struct imx_nand_platform_data nand_info = { - .hw_ecc = 1, - .flash_bbt = 1, -}; - -static struct i2c_board_info i2c_devices[] = { - { - I2C_BOARD_INFO("mc13892", 0x08), - }, { - I2C_BOARD_INFO("mc9sdz60", 0x69), - }, -}; - -/* - * Generic display, shipped with the PDK - */ -static struct fb_videomode CTP_CLAA070LC0ACW = { - /* 800x480 @ 60 Hz */ - .name = "CTP-CLAA070LC0ACW", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = KHZ2PICOS(27000), - .left_margin = 50, - .right_margin = 50, /* whole line should have 900 clocks */ - .upper_margin = 10, - .lower_margin = 10, /* whole frame should have 500 lines */ - .hsync_len = 1, /* note: DE only display */ - .vsync_len = 1, /* note: DE only display */ - .sync = FB_SYNC_CLK_IDLE_EN | FB_SYNC_OE_ACT_HIGH, - .vmode = FB_VMODE_NONINTERLACED, -}; - -static struct imx_ipu_fb_platform_data ipu_fb_data = { - .mode = &CTP_CLAA070LC0ACW, - .num_modes = 1, - .bpp = 16, -}; - -/* - * Revision to be passed to kernel. The kernel provided - * by freescale relies on this. - * - * C --> CPU type - * S --> Silicon revision - * B --> Board rev - * - * 31 20 16 12 8 4 0 - * | Cmaj | Cmin | B | Smaj | Smin| - * - * e.g 0x00035120 --> i.MX35, Cpu silicon rev 2.0, Board rev 2 -*/ -static unsigned int imx35_3ds_system_rev = 0x00035000; - -static void set_silicon_rev( int rev) -{ - imx35_3ds_system_rev = imx35_3ds_system_rev | (rev & 0xFF); -} - -static void set_board_rev(int rev) -{ - imx35_3ds_system_rev = (imx35_3ds_system_rev & ~(0xF << 8)) | (rev & 0xF) << 8; -} - -static const struct devfs_partition f3s_nand0_partitions[] = { - { - .offset = 0, - .size = 0x40000, - .flags = DEVFS_PARTITION_FIXED, - .name = "self_raw", - .bbname = "self0", - }, { - .offset = DEVFS_PARTITION_APPEND, /* 0x40000 */ - .size = 0x80000, - .flags = DEVFS_PARTITION_FIXED, - .name = "env_raw", - .bbname = "env0", - }, { - /* sentinel */ - } -}; - -static const struct devfs_partition f3s_nor0_partitions[] = { - { - .offset = 0, - .size = 0x40000, - .flags = DEVFS_PARTITION_FIXED, - .name = "self0", - }, { - .offset = DEVFS_PARTITION_APPEND, /* 0x40000 */ - .size = 0x80000, - .flags = DEVFS_PARTITION_FIXED, - .name = "env0", - }, { - /* sentinel */ - } -}; - -static int f3s_devices_init(void) -{ - uint32_t reg; - - /* CS0: Nor Flash */ - imx35_setup_weimcs(0, 0x0000cf03, 0x10000d03, 0x00720900); - - reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_RCSR); - /* some fuses provide us vital information about connected hardware */ - if (reg & 0x20000000) - nand_info.width = 2; /* 16 bit */ - else - nand_info.width = 1; /* 8 bit */ - - /* - * This platform supports NOR and NAND - */ - imx35_add_nand(&nand_info); - add_cfi_flash_device(DEVICE_ID_DYNAMIC, MX35_CS0_BASE_ADDR, 64 * 1024 * 1024, 0); - - switch ((reg >> 25) & 0x3) { - case 0x01: /* NAND is the source */ - devfs_create_partitions("nand0", f3s_nand0_partitions); - break; - - case 0x00: /* NOR is the source */ - devfs_create_partitions("nor0", f3s_nor0_partitions); - protect_file("/dev/env0", 1); - break; - } - - set_silicon_rev(imx_silicon_revision()); - - i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); - imx35_add_i2c0(NULL); - - imx35_add_fec(&fec_info); - add_generic_device("smc911x", DEVICE_ID_DYNAMIC, NULL, MX35_CS5_BASE_ADDR, MX35_CS5_SIZE, - IORESOURCE_MEM, NULL); - - imx35_add_mmc0(NULL); - - imx35_add_fb(&ipu_fb_data); - - armlinux_set_architecture(MACH_TYPE_MX35_3DS); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_freescale_mx35_3ds); - - return 0; -} - -device_initcall(f3s_devices_init); - -static int f3s_enable_display(void) -{ - /* Enable power to the LCD. (bit 6 hi.) */ - mc9sdz60_set_bits(mc9sdz60_get(), MC9SDZ60_REG_GPIO_1, 0x40, 0x40); - - return 0; -} - -late_initcall(f3s_enable_display); - -static iomux_v3_cfg_t f3s_pads[] = { - MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, - MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, - MX35_PAD_FEC_RX_DV__FEC_RX_DV, - MX35_PAD_FEC_COL__FEC_COL, - MX35_PAD_FEC_RDATA0__FEC_RDATA_0, - MX35_PAD_FEC_TDATA0__FEC_TDATA_0, - MX35_PAD_FEC_TX_EN__FEC_TX_EN, - MX35_PAD_FEC_MDC__FEC_MDC, - MX35_PAD_FEC_MDIO__FEC_MDIO, - MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, - MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, - MX35_PAD_FEC_CRS__FEC_CRS, - MX35_PAD_FEC_RDATA0__FEC_RDATA_0, - MX35_PAD_FEC_TDATA0__FEC_TDATA_0, - MX35_PAD_FEC_RDATA1__FEC_RDATA_1, - MX35_PAD_FEC_TDATA1__FEC_TDATA_1, - MX35_PAD_FEC_RDATA2__FEC_RDATA_2, - MX35_PAD_FEC_TDATA2__FEC_TDATA_2, - MX35_PAD_FEC_RDATA3__FEC_RDATA_3, - MX35_PAD_FEC_TDATA3__FEC_TDATA_3, - - MX35_PAD_RXD1__UART1_RXD_MUX, - MX35_PAD_TXD1__UART1_TXD_MUX, - MX35_PAD_RTS1__UART1_RTS, - MX35_PAD_CTS1__UART1_CTS, - - MX35_PAD_I2C1_CLK__I2C1_SCL, - MX35_PAD_I2C1_DAT__I2C1_SDA, - - MX35_PAD_WDOG_RST__GPIO1_6, - MX35_PAD_COMPARE__GPIO1_5, - - /* Display */ - MX35_PAD_LD0__IPU_DISPB_DAT_0, - MX35_PAD_LD1__IPU_DISPB_DAT_1, - MX35_PAD_LD2__IPU_DISPB_DAT_2, - MX35_PAD_LD3__IPU_DISPB_DAT_3, - MX35_PAD_LD4__IPU_DISPB_DAT_4, - MX35_PAD_LD5__IPU_DISPB_DAT_5, - MX35_PAD_LD6__IPU_DISPB_DAT_6, - MX35_PAD_LD7__IPU_DISPB_DAT_7, - MX35_PAD_LD8__IPU_DISPB_DAT_8, - MX35_PAD_LD9__IPU_DISPB_DAT_9, - MX35_PAD_LD10__IPU_DISPB_DAT_10, - MX35_PAD_LD11__IPU_DISPB_DAT_11, - MX35_PAD_LD12__IPU_DISPB_DAT_12, - MX35_PAD_LD13__IPU_DISPB_DAT_13, - MX35_PAD_LD14__IPU_DISPB_DAT_14, - MX35_PAD_LD15__IPU_DISPB_DAT_15, - MX35_PAD_LD16__IPU_DISPB_DAT_16, - MX35_PAD_LD17__IPU_DISPB_DAT_17, - MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC, - MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK, - MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY, - MX35_PAD_CONTRAST__IPU_DISPB_CONTR, - MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC, - MX35_PAD_D3_REV__IPU_DISPB_D3_REV, - MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS, -}; - -static int f3s_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(f3s_pads, ARRAY_SIZE(f3s_pads)); - - barebox_set_model("Freescale i.MX35 3DS"); - barebox_set_hostname("mx35-3stack"); - - imx35_add_uart0(); - return 0; -} - -console_initcall(f3s_console_init); - -static int f3s_core_init(void) -{ - u32 reg; - - /* CS5: smc9117 */ - imx35_setup_weimcs(5, 0x0000D843, 0x22252521, 0x22220A00); - - /* enable clock for I2C1 and FEC */ - reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); - reg |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; - reg |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; - reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); - - /* AIPS setup - Only setup MPROTx registers. The PACR default values are good.*/ - /* - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - writel(0x77777777, MX35_AIPS1_BASE_ADDR); - writel(0x77777777, MX35_AIPS1_BASE_ADDR + 0x4); - writel(0x77777777, MX35_AIPS2_BASE_ADDR); - writel(0x77777777, MX35_AIPS2_BASE_ADDR + 0x4); - - /* - * Clear the on and off peripheral modules Supervisor Protect bit - * for SDMA to access them. Did not change the AIPS control registers - * (offset 0x20) access type - */ - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x4C); - reg = readl(MX35_AIPS1_BASE_ADDR + 0x50); - reg &= 0x00FFFFFF; - writel(reg, MX35_AIPS1_BASE_ADDR + 0x50); - - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x4C); - reg = readl(MX35_AIPS2_BASE_ADDR + 0x50); - reg &= 0x00FFFFFF; - writel(reg, MX35_AIPS2_BASE_ADDR + 0x50); - - /* MAX (Multi-Layer AHB Crossbar Switch) setup */ - - /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ -#define MAX_PARAM1 0x00302154 - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x000); /* for S0 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x100); /* for S1 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x200); /* for S2 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x300); /* for S3 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x400); /* for S4 */ - - /* SGPCR - always park on last master */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x10); /* for S0 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x110); /* for S1 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x210); /* for S2 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x310); /* for S3 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x410); /* for S4 */ - - /* MGPCR - restore default values */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x800); /* for M0 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x900); /* for M1 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xa00); /* for M2 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xb00); /* for M3 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xc00); /* for M4 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xd00); /* for M5 */ - - return 0; -} - -core_initcall(f3s_core_init); - -static int f3s_get_rev(struct mc13xxx *mc13xxx) -{ - u32 rev; - int err; - - err = mc13xxx_reg_read(mc13xxx, MC13XXX_REG_IDENTIFICATION, &rev); - if (err) - return err; - - if (rev == 0x00ffffff) - return -ENODEV; - - return ((rev >> 6) & 0x7) ? MX35PDK_BOARD_REV_2 : MX35PDK_BOARD_REV_1; -} - -static int f3s_pmic_init_v2(struct mc13xxx *mc13xxx) -{ - int err = 0; - - /* COMPARE pin (GPIO1_5) as output and set high */ - gpio_direction_output( 32*0 + 5 , 1); - - err |= mc13xxx_set_bits(mc13xxx, MC13892_REG_SETTING_0, 0x03, 0x03); - err |= mc13xxx_set_bits(mc13xxx, MC13892_REG_MODE_0, 0x01, 0x01); - if (err) - printf("mc13892 Init sequence failed, the system might not be working!\n"); - - return err; -} - -static int f3s_pmic_init_all(struct mc9sdz60 *mc9sdz60) -{ - int err = 0; - - err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_GPIO_1, 0x04, 0x04); - - err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_RESET_1, 0x80, 0x00); - mdelay(200); - err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_RESET_1, 0x80, 0x80); - - if (err) - dev_err(&mc9sdz60->client->dev, - "Init sequence failed, the system might not be working!\n"); - - return err; -} - -static int f3s_pmic_init(void) -{ - struct mc13xxx *mc13xxx; - struct mc9sdz60 *mc9sdz60; - int rev; - - mc13xxx = mc13xxx_get(); - if (!mc13xxx) { - printf("FAILED to get PMIC handle!\n"); - return 0; - } - - rev = f3s_get_rev(mc13xxx); - switch (rev) { - case MX35PDK_BOARD_REV_1: - break; - case MX35PDK_BOARD_REV_2: - f3s_pmic_init_v2(mc13xxx); - break; - default: - printf("FAILED to identify board revision!\n"); - return 0; - } - - set_board_rev(rev); - printf("i.MX35 PDK CPU board version %d.\n", rev ); - - mc9sdz60 = mc9sdz60_get(); - if (!mc9sdz60) { - printf("FAILED to get mc9sdz60 handle!\n"); - return 0; - } - - f3s_pmic_init_all(mc9sdz60); - - armlinux_set_revision(imx35_3ds_system_rev); - - return 0; -} - -late_initcall(f3s_pmic_init); diff --git a/arch/arm/boards/freescale-mx35-3ds/Makefile b/arch/arm/boards/freescale-mx35-3ds/Makefile deleted file mode 100644 index e33babb4b3..0000000000 --- a/arch/arm/boards/freescale-mx35-3ds/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -obj-y += 3stack.o -lwl-y += lowlevel_init.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-freescale-mx35-3ds diff --git a/arch/arm/boards/freescale-mx35-3ds/board-mx35_3stack.h b/arch/arm/boards/freescale-mx35-3ds/board-mx35_3stack.h deleted file mode 100644 index 9d0d492062..0000000000 --- a/arch/arm/boards/freescale-mx35-3ds/board-mx35_3stack.h +++ /dev/null @@ -1,86 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix -// SPDX-FileCopyrightText: 2008 Freescale Semiconductor, Inc. - -#ifndef __BOARD_MX35_3STACK_H -#define __BOARD_MX35_3STACK_H - -#define UNALIGNED_ACCESS_ENABLE -#define LOW_INT_LATENCY_ENABLE -#define BRANCH_PREDICTION_ENABLE - -#define L2CC_AUX_CTL_CONFIG 0x00030024 - -#define AIPS_MPR_CONFIG 0x77777777 -#define AIPS_OPACR_CONFIG 0x00000000 - -/* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ -#define MAX_MPR_CONFIG 0x00302154 -/* SGPCR - always park on last master */ -#define MAX_SGPCR_CONFIG 0x00000010 -/* MGPCR - restore default values */ -#define MAX_MGPCR_CONFIG 0x00000000 - -/* - * M3IF Control Register (M3IFCTL) - * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 - * MRRP[1] = L2CC1 not on priority list (0 << 0) = 0x00000000 - * MRRP[2] = MBX not on priority list (0 << 0) = 0x00000000 - * MRRP[3] = MAX1 not on priority list (0 << 0) = 0x00000000 - * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 - * MRRP[5] = MPEG4 not on priority list (0 << 0) = 0x00000000 - * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 - * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 - * ------------ - * 0x00000040 - */ -#define M3IF_CONFIG 0x00000040 - -#define DBG_BASE_ADDR WEIM_CTRL_CS5 -#define DBG_CSCR_U_CONFIG 0x0000D843 -#define DBG_CSCR_L_CONFIG 0x22252521 -#define DBG_CSCR_A_CONFIG 0x22220A00 - -#define CCM_CCMR_CONFIG 0x003F4208 -#define CCM_PDR0_CONFIG 0x00821000 - -#define PLL_BRM_OFFSET 31 -#define PLL_PD_OFFSET 26 -#define PLL_MFD_OFFSET 16 -#define PLL_MFI_OFFSET 10 - -#define _PLL_BRM(x) ((x) << PLL_BRM_OFFSET) -#define _PLL_PD(x) (((x) - 1) << PLL_PD_OFFSET) -#define _PLL_MFD(x) (((x) - 1) << PLL_MFD_OFFSET) -#define _PLL_MFI(x) ((x) << PLL_MFI_OFFSET) -#define _PLL_MFN(x) (x) -#define _PLL_SETTING(brm, pd, mfd, mfi, mfn) \ - (_PLL_BRM(brm) | _PLL_PD(pd) | _PLL_MFD(mfd) | _PLL_MFI(mfi) |\ - _PLL_MFN(mfn)) - -#define CCM_MPLL_532_HZ _PLL_SETTING(1, 1, 12, 11, 1) -#define CCM_MPLL_399_HZ _PLL_SETTING(0, 1, 16, 8, 5) -#define CCM_PPLL_300_HZ _PLL_SETTING(0, 1, 4, 6, 1) - -/*MEMORY SETING*/ -#define ESDCTL_0x92220000 0x92220000 -#define ESDCTL_0xA2220000 0xA2220000 -#define ESDCTL_0xB2220000 0xB2220000 -#define ESDCTL_0x82228080 0x82228080 - -#define ESDCTL_PRECHARGE 0x00000400 - -#define ESDCTL_MDDR_CONFIG 0x007FFC3F -#define ESDCTL_MDDR_MR 0x00000033 -#define ESDCTL_MDDR_EMR 0x02000000 - -#define ESDCTL_DDR2_CONFIG 0x007FFC3F -#define ESDCTL_DDR2_EMR2 0x04000000 -#define ESDCTL_DDR2_EMR3 0x06000000 -#define ESDCTL_DDR2_EN_DLL 0x02000400 -#define ESDCTL_DDR2_RESET_DLL 0x00000333 -#define ESDCTL_DDR2_MR 0x00000233 -#define ESDCTL_DDR2_OCD_DEFAULT 0x02000780 - -#define ESDCTL_DELAY_LINE5 0x00F49F00 -#endif /* __BOARD_MX35_3STACK_H */ diff --git a/arch/arm/boards/freescale-mx35-3ds/defaultenv-freescale-mx35-3ds/config b/arch/arm/boards/freescale-mx35-3ds/defaultenv-freescale-mx35-3ds/config deleted file mode 100644 index af2fb6b2bc..0000000000 --- a/arch/arm/boards/freescale-mx35-3ds/defaultenv-freescale-mx35-3ds/config +++ /dev/null @@ -1,51 +0,0 @@ -#!/bin/sh - -eth0.serverip= -user= - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'nfs', 'tftp', 'nor' or 'nand' -kernel_loc=tftp -# can be either 'net', 'nor', 'nand' or 'initrd' -rootfs_loc=net - -# can be either 'jffs2' or 'ubifs' -rootfs_type=ubifs -rootfsimage=root-${global.hostname}.$rootfs_type - -kernelimage=zImage-${global.hostname} -#kernelimage=uImage-${global.hostname} -#kernelimage=Image-${global.hostname} -#kernelimage=Image-${global.hostname}.lzo - -if [ -n $user ]; then - kernelimage="$user"-"$kernelimage" - nfsroot="$eth0.serverip:/home/$user/nfsroot/${global.hostname}" - rootfsimage="$user"-"$rootfsimage" -else - nfsroot="$eth0.serverip:/path/to/nfs/root" -fi - -autoboot_timeout=3 - -bootargs="console=ttymxc0,115200" - -nor_parts="256k(barebox)ro,512k(bareboxenv),4M(kernel),-(root)" -rootfs_mtdblock_nor=3 - -nand_parts="256k(barebox)ro,512k(bareboxenv),4M(kernel),-(root)" -rootfs_mtdblock_nand=7 -nand_device=mxc_nand - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " - diff --git a/arch/arm/boards/freescale-mx35-3ds/flash-header.imxcfg b/arch/arm/boards/freescale-mx35-3ds/flash-header.imxcfg deleted file mode 100644 index a6d16e8ab4..0000000000 --- a/arch/arm/boards/freescale-mx35-3ds/flash-header.imxcfg +++ /dev/null @@ -1,36 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -soc imx35 -loadaddr 0x80000000 -ivtofs 0x400 - -wm 32 0xb8002050 0x0000d843 -wm 32 0xb8002054 0x22252521 -wm 32 0xb8002058 0x22220a00 -wm 32 0xb8001010 0x00000304 -wm 32 0xb8001010 0x0000030c -wm 32 0xb8001004 0x007ffc3f -wm 32 0xb800100c 0x007ffc3f -wm 32 0xb8001000 0x92220000 -wm 32 0xb8001008 0x92220000 -wm 32 0x80000400 0x12345678 -wm 32 0x90000400 0x12345678 -wm 32 0xb8001000 0xa2220000 -wm 32 0xb8001008 0xa2220000 -wm 32 0x80000000 0x87654321 -wm 32 0x90000000 0x87654321 -wm 32 0x80000000 0x87654321 -wm 32 0x90000000 0x87654321 -wm 32 0xb8001000 0xb2220000 -wm 32 0xb8001008 0xb2220000 -wm 8 0x80000233 0xda -wm 8 0x90000233 0xda -wm 8 0x82000780 0xda -wm 8 0x92000780 0xda -wm 8 0x82000400 0xda -wm 8 0x92000400 0xda -wm 32 0xb8001000 0x82226080 -wm 32 0xb8001008 0x82226080 -wm 32 0xb8001004 0x007ffc3f -wm 32 0xb800100c 0x007ffc3f -wm 32 0xb8001010 0x00000304 diff --git a/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S b/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S deleted file mode 100644 index fbc08d8fae..0000000000 --- a/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S +++ /dev/null @@ -1,241 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - -#include <mach/imx35-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> -#include <asm/cache-l2x0.h> -#include <asm-generic/memory_layout.h> -#include <asm/barebox-arm-head.h> - -#include "board-mx35_3stack.h" - -#define CSD0_BASE_ADDR 0x80000000 -#define CSD1_BASE_ADDR 0x90000000 -#define ESDCTL_BASE_ADDR 0xB8001000 - -#define writel(val, reg) \ - ldr r0, =reg; \ - ldr r1, =val; \ - str r1, [r0]; - -#define writeb(val, reg) \ - ldr r0, =reg; \ - ldr r1, =val; \ - strb r1, [r0]; - - .section ".text_bare_init","ax" - -ARM_PPMRR: .word 0x40000015 -L2CACHE_PARAM: .word 0x00030024 -CCM_CCMR_W: .word 0x003F4208 -CCM_PDR0_W: .word 0x00001000 -MPCTL_PARAM_399_W: .word MPCTL_PARAM_399 -MPCTL_PARAM_532_W: .word MPCTL_PARAM_532 -PPCTL_PARAM_W: .word PPCTL_PARAM_300 -CCM_BASE_ADDR_W: .word MX35_CCM_BASE_ADDR - -.globl barebox_arm_reset_vector -barebox_arm_reset_vector: - bl arm_cpu_lowlevel_init - - /* Setup a temporary stack in internal SRAM */ - ldr sp, =MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE - 4 - - mrc 15, 0, r1, c1, c0, 0 - - mrc 15, 0, r0, c1, c0, 1 - orr r0, r0, #7 - mcr 15, 0, r0, c1, c0, 1 - - orr r1, r1, #(1 << 11) /* Flow prediction (Z) */ - orr r1, r1, #(1 << 22) /* unaligned accesses */ - orr r1, r1, #(1 << 21) /* Low Int Latency */ - - mcr 15, 0, r1, c1, c0, 0 - - mov r0, #0 - mcr 15, 0, r0, c15, c2, 4 - - /* - * Branch predicition is now enabled. Flush the BTAC to ensure a valid - * starting point. Don't flush BTAC while it is disabled to avoid - * ARM1136 erratum 408023. - */ - mov r0, #0 - mcr p15, 0, r0, c7, c5, 6 /* flush entire BTAC */ - - mov r0, #0 - mcr 15, 0, r0, c7, c7, 0 /* invalidate I cache and D cache */ - mcr 15, 0, r0, c8, c7, 0 /* invalidate TLBs */ - mcr 15, 0, r0, c7, c10, 4 /* Drain the write buffer */ - - /* Also setup the Peripheral Port Remap register inside the core */ - ldr r0, ARM_PPMRR /* start from AIPS 2GB region */ - mcr p15, 0, r0, c15, c2, 4 - -/* - * End of ARM1136 init - */ - ldr r0, CCM_BASE_ADDR_W - - ldr r2, CCM_CCMR_W - str r2, [r0, #MX35_CCM_CCMR] - - ldr r3, MPCTL_PARAM_532_W /* consumer path*/ - - /* Set MPLL, arm clock and ahb clock */ - str r3, [r0, #MX35_CCM_MPCTL] - - ldr r1, PPCTL_PARAM_W - str r1, [r0, #MX35_CCM_PPCTL] - - ldr r1, CCM_PDR0_W - str r1, [r0, #MX35_CCM_PDR0] - - ldr r1, [r0, #MX35_CCM_CGR0] - orr r1, r1, #0x00300000 - str r1, [r0, #MX35_CCM_CGR0] - - ldr r1, [r0, #MX35_CCM_CGR1] - orr r1, r1, #0x00000C00 - orr r1, r1, #0x00000003 - str r1, [r0, #MX35_CCM_CGR1] - - /* Skip SDRAM initialization if we run from RAM */ - cmp pc, #CSD0_BASE_ADDR - bls 1f - cmp pc, #CSD1_BASE_ADDR - bhi 1f - - b imx35_barebox_entry - -1: - ldr r0, =ESDCTL_BASE_ADDR - mov r3, #0x2000 - str r3, [r0, #0x0] - str r3, [r0, #0x8] - - /* ip(r12) has used to save lr register in upper calling */ - mov fp, lr - - /* setup bank 0 */ - mov r5, #0x00 - mov r2, #0x00 - mov r1, #MX35_CSD0_BASE_ADDR - bl setup_sdram_bank - - /* setup bank 1 */ - mov r5, #0x00 - mov r2, #0x00 - mov r1, #MX35_CSD1_BASE_ADDR - bl setup_sdram_bank - - mov lr, fp - - ldr r3, =ESDCTL_DELAY_LINE5 - str r3, [r0, #0x30] - -#ifdef CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND - mov r0, #0 - b imx35_barebox_boot_nand_external -#endif /* CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND */ - - b imx35_barebox_entry - -/* - * r0: ESDCTL control base, r1: sdram slot base - * r2: DDR type (0: DDR2, 1: MDDR) r3, r4: working base - */ -setup_sdram_bank: - mov r3, #0xE /* 0xA + 0x4 */ - tst r2, #0x1 - orreq r3, r3, #0x300 /* DDR2 */ - str r3, [r0, #0x10] - bic r3, r3, #0x00A - str r3, [r0, #0x10] - beq 2f - - mov r3, #0x20000 -1: subs r3, r3, #1 - bne 1b - -2: tst r2, #0x1 - ldreq r3, =ESDCTL_DDR2_CONFIG - ldrne r3, =ESDCTL_MDDR_CONFIG - cmp r1, #CSD1_BASE_ADDR - strlo r3, [r0, #0x4] - strhs r3, [r0, #0xC] - - ldr r3, =ESDCTL_0x92220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - mov r3, #0xDA - ldr r4, =ESDCTL_PRECHARGE - strb r3, [r1, r4] - - tst r2, #0x1 - bne skip_set_mode - - cmp r1, #CSD1_BASE_ADDR - ldr r3, =ESDCTL_0xB2220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - mov r3, #0xDA - ldr r4, =ESDCTL_DDR2_EMR2 - strb r3, [r1, r4] - ldr r4, =ESDCTL_DDR2_EMR3 - strb r3, [r1, r4] - ldr r4, =ESDCTL_DDR2_EN_DLL - strb r3, [r1, r4] - ldr r4, =ESDCTL_DDR2_RESET_DLL - strb r3, [r1, r4] - - ldr r3, =ESDCTL_0x92220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - mov r3, #0xDA - ldr r4, =ESDCTL_PRECHARGE - strb r3, [r1, r4] - -skip_set_mode: - cmp r1, #CSD1_BASE_ADDR - ldr r3, =ESDCTL_0xA2220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - mov r3, #0xDA - strb r3, [r1] - strb r3, [r1] - - ldr r3, =ESDCTL_0xB2220000 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - tst r2, #0x1 - ldreq r4, =ESDCTL_DDR2_MR - ldrne r4, =ESDCTL_MDDR_MR - mov r3, #0xDA - strb r3, [r1, r4] - ldreq r4, =ESDCTL_DDR2_OCD_DEFAULT - streqb r3, [r1, r4] - ldreq r4, =ESDCTL_DDR2_EN_DLL - ldrne r4, =ESDCTL_MDDR_EMR - strb r3, [r1, r4] - - cmp r1, #CSD1_BASE_ADDR - ldr r3, =ESDCTL_0x82228080 - strlo r3, [r0, #0x0] - strhs r3, [r0, #0x8] - - tst r2, #0x1 - moveq r4, #0x20000 - movne r4, #0x200 -1: subs r4, r4, #1 - bne 1b - - str r3, [r1, #0x100] - ldr r4, [r1, #0x100] - cmp r3, r4 - movne r3, #1 - moveq r3, #0 - - mov pc, lr diff --git a/arch/arm/boards/freescale-mx51-babbage/board.c b/arch/arm/boards/freescale-mx51-babbage/board.c index 330d8e4f52..1d4fb2d8c6 100644 --- a/arch/arm/boards/freescale-mx51-babbage/board.c +++ b/arch/arm/boards/freescale-mx51-babbage/board.c @@ -6,27 +6,25 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/imx51-regs.h> +#include <mach/imx/imx51-regs.h> #include <gpio.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <of.h> #include <fcntl.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <nand.h> #include <notifier.h> #include <spi/spi.h> #include <io.h> #include <asm/mmu.h> -#include <mach/imx5.h> -#include <mach/imx-nand.h> -#include <mach/spi.h> -#include <mach/generic.h> -#include <mach/iomux-mx51.h> -#include <mach/devices-imx51.h> -#include <mach/revision.h> +#include <mach/imx/imx5.h> +#include <mach/imx/imx-nand.h> +#include <mach/imx/spi.h> +#include <mach/imx/generic.h> +#include <mach/imx/iomux-mx51.h> +#include <mach/imx/revision.h> #define MX51_CCM_CACRR 0x10 diff --git a/arch/arm/boards/freescale-mx51-babbage/lowlevel.c b/arch/arm/boards/freescale-mx51-babbage/lowlevel.c index e95324e645..7d219bad78 100644 --- a/arch/arm/boards/freescale-mx51-babbage/lowlevel.c +++ b/arch/arm/boards/freescale-mx51-babbage/lowlevel.c @@ -1,11 +1,12 @@ // SPDX-License-Identifier: GPL-2.0-only #include <debug_ll.h> -#include <mach/clock-imx51_53.h> -#include <mach/iomux-mx51.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/clock-imx51_53.h> +#include <mach/imx/iomux-mx51.h> #include <common.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/freescale-mx51-babbage/power.c b/arch/arm/boards/freescale-mx51-babbage/power.c index ce44f3ae42..48dc74dd77 100644 --- a/arch/arm/boards/freescale-mx51-babbage/power.c +++ b/arch/arm/boards/freescale-mx51-babbage/power.c @@ -5,8 +5,8 @@ #include <common.h> #include <init.h> #include <notifier.h> -#include <mach/revision.h> -#include <mach/imx5.h> +#include <mach/imx/revision.h> +#include <mach/imx/imx5.h> #include <mfd/mc13xxx.h> static void babbage_power_init(struct mc13xxx *mc13xxx) diff --git a/arch/arm/boards/freescale-mx53-qsb/board.c b/arch/arm/boards/freescale-mx53-qsb/board.c index f2cb5c56e7..a8558eafce 100644 --- a/arch/arm/boards/freescale-mx53-qsb/board.c +++ b/arch/arm/boards/freescale-mx53-qsb/board.c @@ -3,7 +3,6 @@ // SPDX-FileCopyrightText: 2011 Marc Kleine-Budde <mkl@pengutronix.de> #include <environment.h> -#include <partition.h> #include <common.h> #include <linux/sizes.h> #include <gpio.h> @@ -18,14 +17,14 @@ #include <asm/armlinux.h> #include <asm/mmu.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> -#include <mach/imx53-regs.h> -#include <mach/revision.h> -#include <mach/generic.h> -#include <mach/imx5.h> -#include <mach/bbu.h> -#include <mach/iim.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/revision.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx5.h> +#include <mach/imx/bbu.h> +#include <mach/imx/iim.h> /* * Revision to be passed to kernel. The kernel provided diff --git a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c index e845fa4a3e..5870f266d2 100644 --- a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c +++ b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c @@ -1,9 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> -#include <mach/imx53-regs.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <image-metadata.h> diff --git a/arch/arm/boards/freescale-mx53-smd/board.c b/arch/arm/boards/freescale-mx53-smd/board.c deleted file mode 100644 index 98d3048dac..0000000000 --- a/arch/arm/boards/freescale-mx53-smd/board.c +++ /dev/null @@ -1,157 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer, Pengutronix -// SPDX-FileCopyrightText: 2011 Marc Kleine-Budde <mkl@pengutronix.de> - -#include <common.h> -#include <environment.h> -#include <fcntl.h> -#include <platform_data/eth-fec.h> -#include <fs.h> -#include <init.h> -#include <nand.h> -#include <net.h> -#include <partition.h> -#include <linux/sizes.h> -#include <gpio.h> -#include <mci.h> -#include <envfs.h> - -#include <generated/mach-types.h> - -#include <mach/imx53-regs.h> -#include <mach/iomux-mx53.h> -#include <mach/devices-imx53.h> -#include <mach/generic.h> -#include <mach/imx-nand.h> -#include <mach/iim.h> -#include <mach/imx5.h> - -#include <asm/armlinux.h> -#include <io.h> -#include <asm/mmu.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_RMII, -}; - -static iomux_v3_cfg_t smd_pads[] = { - /* UART1 */ - MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, - MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, - - /* UART2 */ - MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX, - MX53_PAD_PATA_DMARQ__UART2_TXD_MUX, - - /* UART3 */ - MX53_PAD_PATA_CS_0__UART3_TXD_MUX, - MX53_PAD_PATA_CS_1__UART3_RXD_MUX, - MX53_PAD_PATA_DA_1__UART3_CTS, - MX53_PAD_PATA_DA_2__UART3_RTS, - - /* FEC */ - MX53_PAD_FEC_MDC__FEC_MDC, - MX53_PAD_FEC_MDIO__FEC_MDIO, - MX53_PAD_FEC_REF_CLK__FEC_TX_CLK, - MX53_PAD_FEC_RX_ER__FEC_RX_ER, - MX53_PAD_FEC_CRS_DV__FEC_RX_DV, - MX53_PAD_FEC_RXD1__FEC_RDATA_1, - MX53_PAD_FEC_RXD0__FEC_RDATA_0, - MX53_PAD_FEC_TX_EN__FEC_TX_EN, - MX53_PAD_FEC_TXD1__FEC_TDATA_1, - MX53_PAD_FEC_TXD0__FEC_TDATA_0, - /* FEC_nRST */ - MX53_PAD_PATA_DA_0__GPIO7_6, - - /* SD1 */ - MX53_PAD_SD1_CMD__ESDHC1_CMD, - MX53_PAD_SD1_CLK__ESDHC1_CLK, - MX53_PAD_SD1_DATA0__ESDHC1_DAT0, - MX53_PAD_SD1_DATA1__ESDHC1_DAT1, - MX53_PAD_SD1_DATA2__ESDHC1_DAT2, - MX53_PAD_SD1_DATA3__ESDHC1_DAT3, - /* SD1_CD */ - MX53_PAD_EIM_DA13__GPIO3_13, - /* SD1_WP */ - MX53_PAD_KEY_ROW2__GPIO4_11, - - /* SD3 */ - MX53_PAD_PATA_DATA8__ESDHC3_DAT0, - MX53_PAD_PATA_DATA9__ESDHC3_DAT1, - MX53_PAD_PATA_DATA10__ESDHC3_DAT2, - MX53_PAD_PATA_DATA11__ESDHC3_DAT3, - MX53_PAD_PATA_DATA0__ESDHC3_DAT4, - MX53_PAD_PATA_DATA1__ESDHC3_DAT5, - MX53_PAD_PATA_DATA2__ESDHC3_DAT6, - MX53_PAD_PATA_DATA3__ESDHC3_DAT7, - MX53_PAD_PATA_IORDY__ESDHC3_CLK, - MX53_PAD_PATA_RESET_B__ESDHC3_CMD, -}; - -#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) - -static void smd_fec_reset(void) -{ - gpio_direction_output(SMD_FEC_PHY_RST, 0); - mdelay(1); - gpio_set_value(SMD_FEC_PHY_RST, 1); -} - -#define LOCO_SD1_CD IMX_GPIO_NR(3, 13) -#define LOCO_SD1_WP IMX_GPIO_NR(4, 11) - -static struct esdhc_platform_data loco_sd1_data = { - .cd_gpio = LOCO_SD1_CD, - .wp_gpio = LOCO_SD1_WP, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_GPIO, - .caps = MMC_CAP_4_BIT_DATA, -}; - -static struct esdhc_platform_data loco_sd3_data = { - .wp_type = ESDHC_WP_NONE, - .cd_type = ESDHC_CD_PERMANENT, -}; - -static int smd_devices_init(void) -{ - imx53_iim_register_fec_ethaddr(); - imx53_add_fec(&fec_info); - imx53_add_mmc0(&loco_sd1_data); - imx53_add_mmc2(&loco_sd3_data); - - smd_fec_reset(); - - armlinux_set_architecture(MACH_TYPE_MX53_SMD); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_freescale_mx53_smd); - - return 0; -} -device_initcall(smd_devices_init); - -static int smd_part_init(void) -{ - devfs_add_partition("disk0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); - devfs_add_partition("disk0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); - - return 0; -} -late_initcall(smd_part_init); - -static int smd_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(smd_pads, ARRAY_SIZE(smd_pads)); - - barebox_set_model("Freescale i.MX53 SMD"); - barebox_set_hostname("imx53-smd"); - - imx53_init_lowlevel(1000); - - imx53_add_uart0(); - imx53_add_uart1(); - imx53_add_uart2(); - return 0; -} -console_initcall(smd_console_init); diff --git a/arch/arm/boards/freescale-mx53-smd/defaultenv-freescale-mx53-smd/config b/arch/arm/boards/freescale-mx53-smd/defaultenv-freescale-mx53-smd/config deleted file mode 100644 index 27d2663566..0000000000 --- a/arch/arm/boards/freescale-mx53-smd/defaultenv-freescale-mx53-smd/config +++ /dev/null @@ -1,45 +0,0 @@ -#!/bin/sh - -eth0.serverip= -user= - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'nfs', 'tftp', 'nor' or 'nand' -kernel_loc=tftp -# can be either 'net', 'nor', 'nand' or 'initrd' -rootfs_loc=net - -# can be either 'jffs2' or 'ubifs' -rootfs_type=ubifs -rootfsimage=root-${global.hostname}.$rootfs_type - -kernelimage=zImage-${global.hostname} -#kernelimage=uImage-${global.hostname} -#kernelimage=Image-${global.hostname} -#kernelimage=Image-${global.hostname}.lzo - -if [ -n $user ]; then - kernelimage="$user"-"$kernelimage" - nfsroot="$eth0.serverip:/home/$user/nfsroot/${global.hostname}" - rootfsimage="$user"-"$rootfsimage" -else - nfsroot="$eth0.serverip:/path/to/nfs/root" -fi - -autoboot_timeout=3 - -bootargs="console=ttymxc0,115200" - -disk_parts="256k(barebox)ro,128k(bareboxenv),4M(kernel),-(root)" - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " diff --git a/arch/arm/boards/freescale-mx53-smd/flash-header.imxcfg b/arch/arm/boards/freescale-mx53-smd/flash-header.imxcfg deleted file mode 100644 index e885186c54..0000000000 --- a/arch/arm/boards/freescale-mx53-smd/flash-header.imxcfg +++ /dev/null @@ -1,56 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -loadaddr 0x70000000 -soc imx53 -ivtofs 0x400 -wm 32 0x53fa8554 0x00300000 -wm 32 0x53fa8558 0x00300040 -wm 32 0x53fa8560 0x00300000 -wm 32 0x53fa8564 0x00300040 -wm 32 0x53fa8568 0x00300040 -wm 32 0x53fa8570 0x00300000 -wm 32 0x53fa8574 0x00300000 -wm 32 0x53fa8578 0x00300000 -wm 32 0x53fa857c 0x00300040 -wm 32 0x53fa8580 0x00300040 -wm 32 0x53fa8584 0x00300000 -wm 32 0x53fa8588 0x00300000 -wm 32 0x53fa8590 0x00300040 -wm 32 0x53fa8594 0x00300000 -wm 32 0x53fa86f0 0x00300000 -wm 32 0x53fa86f4 0x00000000 -wm 32 0x53fa86fc 0x00000000 -wm 32 0x53fa8714 0x00000000 -wm 32 0x53fa8718 0x00300000 -wm 32 0x53fa871c 0x00300000 -wm 32 0x53fa8720 0x00300000 -wm 32 0x53fa8724 0x04000000 -wm 32 0x53fa8728 0x00300000 -wm 32 0x53fa872c 0x00300000 -wm 32 0x63fd9088 0x35343535 -wm 32 0x63fd9090 0x4d444c44 -wm 32 0x63fd907c 0x01370138 -wm 32 0x63fd9080 0x013b013c -wm 32 0x63fd9018 0x00011740 -wm 32 0x63fd9000 0xc3190000 -wm 32 0x63fd900c 0x9f5152e3 -wm 32 0x63fd9010 0xb68e8a63 -wm 32 0x63fd9014 0x01ff00db -wm 32 0x63fd902c 0x000026d2 -wm 32 0x63fd9030 0x009f0e21 -wm 32 0x63fd9008 0x12273030 -wm 32 0x63fd9004 0x0002002d -wm 32 0x63fd901c 0x00008032 -wm 32 0x63fd901c 0x00008033 -wm 32 0x63fd901c 0x00028031 -wm 32 0x63fd901c 0x052080b0 -wm 32 0x63fd901c 0x04008040 -wm 32 0x63fd901c 0x0000803a -wm 32 0x63fd901c 0x0000803b -wm 32 0x63fd901c 0x00028039 -wm 32 0x63fd901c 0x05208138 -wm 32 0x63fd901c 0x04008048 -wm 32 0x63fd9020 0x00005800 -wm 32 0x63fd9040 0x04b80003 -wm 32 0x63fd9058 0x00022227 -wm 32 0x63fd901c 0x00000000 diff --git a/arch/arm/boards/freescale-mx53-smd/lowlevel.c b/arch/arm/boards/freescale-mx53-smd/lowlevel.c deleted file mode 100644 index b15025ba18..0000000000 --- a/arch/arm/boards/freescale-mx53-smd/lowlevel.c +++ /dev/null @@ -1,14 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only - -#include <common.h> -#include <mach/imx53-regs.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <asm/barebox-arm-head.h> - -void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - imx5_cpu_lowlevel_init(); - arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE); - imx53_barebox_entry(NULL); -} diff --git a/arch/arm/boards/freescale-mx53-vmx53/board.c b/arch/arm/boards/freescale-mx53-vmx53/board.c index aa93336ca2..496ce2c112 100644 --- a/arch/arm/boards/freescale-mx53-vmx53/board.c +++ b/arch/arm/boards/freescale-mx53-vmx53/board.c @@ -10,10 +10,10 @@ #include <init.h> #include <linux/sizes.h> -#include <generated/mach-types.h> -#include <mach/imx5.h> +#include <asm/mach-types.h> +#include <mach/imx/imx5.h> #include <asm/armlinux.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> static int vmx53_late_init(void) { diff --git a/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c index 58eca49455..4543171ec2 100644 --- a/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c +++ b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/freescale-mx6-sabrelite/board.c b/arch/arm/boards/freescale-mx6-sabrelite/board.c index f6eac4c0f3..fe47743540 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/board.c +++ b/arch/arm/boards/freescale-mx6-sabrelite/board.c @@ -8,27 +8,25 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/imx6-regs.h> +#include <mach/imx/imx6-regs.h> #include <gpio.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <of.h> -#include <partition.h> #include <deep-probe.h> #include <linux/phy.h> #include <asm/io.h> #include <asm/mmu.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <linux/sizes.h> #include <net.h> #include <linux/micrel_phy.h> -#include <mach/imx6.h> -#include <mach/devices-imx6.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/imx6.h> +#include <mach/imx/iomux-mx6.h> #include <spi/spi.h> -#include <mach/spi.h> -#include <mach/usb.h> +#include <mach/imx/spi.h> +#include <mach/imx/usb.h> static iomux_v3_cfg_t sabrelite_enet_gpio_pads[] = { /* Ethernet */ @@ -125,7 +123,7 @@ static void sabrelite_ehci_init(void) gpio_set_value(IMX_GPIO_NR(7, 12), 1); } -static int sabrelite_probe(struct device_d *dev) +static int sabrelite_probe(struct device *dev) { int ret; @@ -160,7 +158,7 @@ static const struct of_device_id sabrelite_match[] = { { /* Sentinel */ }, }; -static struct driver_d sabrelite_driver = { +static struct driver sabrelite_driver = { .name = "physom-imx6", .probe = sabrelite_probe, .of_compatible = sabrelite_match, diff --git a/arch/arm/boards/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg b/arch/arm/boards/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg index af2807134e..7dcaefd697 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg +++ b/arch/arm/boards/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 wm 32 MX6_IOM_DRAM_SDQS1 0x00000030 diff --git a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c index 0d8c51242a..f1ed31ccad 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c +++ b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c @@ -2,13 +2,13 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx6-regs.h> +#include <mach/imx/imx6-regs.h> #include <io.h> -#include <mach/debug_ll.h> -#include <mach/esdctl.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/esdctl.h> #include <asm/cache.h> extern char __dtb_imx6q_sabrelite_start[]; diff --git a/arch/arm/boards/freescale-mx6-sabresd/board.c b/arch/arm/boards/freescale-mx6-sabresd/board.c index 82da8bb1dd..1db52736f9 100644 --- a/arch/arm/boards/freescale-mx6-sabresd/board.c +++ b/arch/arm/boards/freescale-mx6-sabresd/board.c @@ -10,22 +10,20 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/imx6-regs.h> +#include <mach/imx/imx6-regs.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <linux/phy.h> #include <asm/io.h> #include <asm/mmu.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <linux/sizes.h> #include <net.h> -#include <mach/imx6.h> -#include <mach/devices-imx6.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/imx6.h> +#include <mach/imx/iomux-mx6.h> #include <spi/spi.h> -#include <mach/spi.h> -#include <mach/usb.h> +#include <mach/imx/spi.h> +#include <mach/imx/usb.h> #define PHY_ID_AR8031 0x004dd074 #define AR_PHY_ID_MASK 0xffffffff @@ -56,7 +54,8 @@ static int ar8031_phy_fixup(struct phy_device *dev) static int sabresd_devices_init(void) { if (!of_machine_is_compatible("fsl,imx6q-sabresd") && - !of_machine_is_compatible("fsl,imx6qp-sabresd")) + !of_machine_is_compatible("fsl,imx6qp-sabresd") && + !of_machine_is_compatible("fsl,imx6dl-sabresd")) return 0; armlinux_set_architecture(3980); @@ -69,7 +68,8 @@ device_initcall(sabresd_devices_init); static int sabresd_coredevices_init(void) { if (!of_machine_is_compatible("fsl,imx6q-sabresd") && - !of_machine_is_compatible("fsl,imx6qp-sabresd")) + !of_machine_is_compatible("fsl,imx6qp-sabresd") && + !of_machine_is_compatible("fsl,imx6dl-sabresd")) return 0; phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, diff --git a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6dl-sabresd.imxcfg b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6dl-sabresd.imxcfg new file mode 100644 index 0000000000..303b62ce4f --- /dev/null +++ b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6dl-sabresd.imxcfg @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: GPL-2.0-only + +loadaddr 0x10000000 +soc imx6 +ivtofs 0x400 +wm 32 0x020e0774 0x000C0000 +wm 32 0x020e0754 0x00000000 +wm 32 0x020e04ac 0x00000030 +wm 32 0x020e04b0 0x00000030 +wm 32 0x020e0464 0x00000030 +wm 32 0x020e0490 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e0494 0x00000030 +wm 32 0x020e04a0 0x00000000 +wm 32 0x020e04b4 0x00000030 +wm 32 0x020e04b8 0x00000030 +wm 32 0x020e076c 0x00000030 +wm 32 0x020e0750 0x00020000 +wm 32 0x020e04bc 0x00000030 +wm 32 0x020e04c0 0x00000030 +wm 32 0x020e04c4 0x00000030 +wm 32 0x020e04c8 0x00000030 +wm 32 0x020e04cc 0x00000030 +wm 32 0x020e04d0 0x00000030 +wm 32 0x020e04d4 0x00000030 +wm 32 0x020e04d8 0x00000030 +wm 32 0x020e0760 0x00020000 +wm 32 0x020e0764 0x00000030 +wm 32 0x020e0770 0x00000030 +wm 32 0x020e0778 0x00000030 +wm 32 0x020e077c 0x00000030 +wm 32 0x020e0780 0x00000030 +wm 32 0x020e0784 0x00000030 +wm 32 0x020e078c 0x00000030 +wm 32 0x020e0748 0x00000030 +wm 32 0x020e0470 0x00000030 +wm 32 0x020e0474 0x00000030 +wm 32 0x020e0478 0x00000030 +wm 32 0x020e047c 0x00000030 +wm 32 0x020e0480 0x00000030 +wm 32 0x020e0484 0x00000030 +wm 32 0x020e0488 0x00000030 +wm 32 0x020e048c 0x00000030 +wm 32 0x021b0800 0xa1390003 +wm 32 0x021b080c 0x001F001F +wm 32 0x021b0810 0x001F001F +wm 32 0x021b480c 0x001F001F +wm 32 0x021b4810 0x001F001F +wm 32 0x021b083c 0x4220021F +wm 32 0x021b0840 0x0207017E +wm 32 0x021b483c 0x4201020C +wm 32 0x021b4840 0x01660172 +wm 32 0x021b0848 0x4A4D4E4D +wm 32 0x021b4848 0x4A4F5049 +wm 32 0x021b0850 0x3F3C3D31 +wm 32 0x021b4850 0x3238372B +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 +wm 32 0x021b0004 0x0002002D +wm 32 0x021b0008 0x00333030 +wm 32 0x021b000c 0x3F435313 +wm 32 0x021b0010 0xB66E8B63 +wm 32 0x021b0014 0x01FF00DB +wm 32 0x021b0018 0x00001740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x00431023 +wm 32 0x021b0040 0x00000027 +wm 32 0x021b0000 0x831A0000 +wm 32 0x021b001c 0x04008032 +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x00048031 +wm 32 0x021b001c 0x05208030 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0020 0x00005800 +wm 32 0x021b0818 0x00011117 +wm 32 0x021b4818 0x00011117 +wm 32 0x021b0004 0x0002556D +wm 32 0x021b0404 0x00011006 +wm 32 0x021b001c 0x00000000 + +/* set the default clock gate to save power */ +wm 32 0x020c4068 0x00C03F3F +wm 32 0x020c406c 0x0030FC03 +wm 32 0x020c4070 0x0FFFF000 +wm 32 0x020c4074 0x3FF00000 +wm 32 0x020c4078 0x00FFF300 +wm 32 0x020c407c 0x0F0000C3 +wm 32 0x020c4080 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +wm 32 0x020e0010 0xF00000CF + +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +wm 32 0x020e0018 0x007F007F +wm 32 0x020e001c 0x007F007F diff --git a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c index d902dbeafb..7cc08b47d5 100644 --- a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c +++ b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c @@ -1,10 +1,11 @@ // SPDX-License-Identifier: GPL-2.0-only #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/generic.h> +#include <mach/imx/iomux-mx6.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> @@ -53,3 +54,19 @@ ENTRY_FUNCTION(start_imx6qp_sabresd, r0, r1, r2) barebox_arm_entry(0x10000000, SZ_1G, fdt); } + +extern char __dtb_imx6dl_sabresd_start[]; + +ENTRY_FUNCTION(start_imx6dl_sabresd, r0, r1, r2) +{ + void *fdt; + + imx6_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + fdt = __dtb_imx6dl_sabresd_start + get_runtime_offset(); + + barebox_arm_entry(0x10000000, SZ_1G, fdt); +} diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/board.c b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c index 3285e1f290..22163a4864 100644 --- a/arch/arm/boards/freescale-mx6sx-sabresdb/board.c +++ b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c @@ -4,24 +4,23 @@ #define pr_fmt(fmt) "imx6sx-sdb: " fmt #include <environment.h> -#include <partition.h> #include <common.h> #include <linux/sizes.h> +#include <linux/phy.h> #include <gpio.h> #include <init.h> #include <io.h> #include <mfd/imx6q-iomuxc-gpr.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <i2c/i2c.h> #include <asm/armlinux.h> -#include <mach/devices-imx6.h> -#include <mach/imx6-regs.h> -#include <mach/iomux-mx6.h> -#include <mach/generic.h> -#include <mach/imx6.h> -#include <mach/bbu.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/iomux-mx6.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6.h> +#include <mach/imx/bbu.h> #define PFUZE100_DEVICEID 0x0 #define PFUZE100_REVID 0x3 diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c b/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c index d3b58ac1be..721743dadb 100644 --- a/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c +++ b/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c @@ -2,9 +2,10 @@ // SPDX-FileCopyrightText: 2014 Sascha Hauer, Pengutronix #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/freescale-mx7-sabresd/board.c b/arch/arm/boards/freescale-mx7-sabresd/board.c index e41d67017f..03658ddc7c 100644 --- a/arch/arm/boards/freescale-mx7-sabresd/board.c +++ b/arch/arm/boards/freescale-mx7-sabresd/board.c @@ -6,7 +6,7 @@ #include <common.h> #include <init.h> #include <io.h> -#include <mach/imx7-regs.h> +#include <mach/imx/imx7-regs.h> #include <linux/phy.h> #include <mfd/imx7-iomuxc-gpr.h> diff --git a/arch/arm/boards/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg b/arch/arm/boards/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg index 9194b19fe4..0b0780ed9b 100644 --- a/arch/arm/boards/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg +++ b/arch/arm/boards/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg @@ -4,4 +4,4 @@ soc imx7 loadaddr 0x80000000 ivtofs 0x400 -#include <mach/flash-header/imx7d-ddr-sabresd.imxcfg> +#include <mach/imx/flash-header/imx7d-ddr-sabresd.imxcfg> diff --git a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c index a8733d6209..5a7508143e 100644 --- a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c +++ b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c @@ -1,23 +1,24 @@ // SPDX-License-Identifier: GPL-2.0-only #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <io.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx7-ccm-regs.h> -#include <mach/iomux-mx7.h> -#include <mach/debug_ll.h> +#include <mach/imx/imx7-ccm-regs.h> +#include <mach/imx/iomux-mx7.h> +#include <mach/imx/debug_ll.h> #include <asm/cache.h> -#include <mach/esdctl.h> +#include <mach/imx/esdctl.h> extern char __dtb_imx7d_sdb_start[]; static inline void setup_uart(void) { - imx7_early_setup_uart_clock(); + imx7_early_setup_uart_clock(1); imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX); diff --git a/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg index 06d5a40a69..bad742831a 100644 --- a/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg +++ b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg @@ -4,13 +4,13 @@ soc vf610 loadaddr 0x80000000 ivtofs 0x400 -#include <mach/vf610-iomux-regs.h> -#include <mach/vf610-ddrmc-regs.h> +#include <mach/imx/vf610-iomux-regs.h> +#include <mach/imx/vf610-ddrmc-regs.h> -#include <mach/flash-header/vf610-ddr-pll2-400mhz.imxcfg> -#include <mach/flash-header/vf610-iomux-ddr-default.imxcfg> -#include <mach/flash-header/vf610-ddr-cr-default.imxcfg> -#include <mach/flash-header/vf610-ddr-phy-default.imxcfg> +#include <mach/imx/flash-header/vf610-ddr-pll2-400mhz.imxcfg> +#include <mach/imx/flash-header/vf610-iomux-ddr-default.imxcfg> +#include <mach/imx/flash-header/vf610-ddr-cr-default.imxcfg> +#include <mach/imx/flash-header/vf610-ddr-phy-default.imxcfg> wm 32 DDRMC_CR00 DDRMC_CR00_DRAM_CLASS_DDR3_START diff --git a/arch/arm/boards/freescale-vf610-twr/lowlevel.c b/arch/arm/boards/freescale-vf610-twr/lowlevel.c index 9c7fafe4d6..c7714f29a2 100644 --- a/arch/arm/boards/freescale-vf610-twr/lowlevel.c +++ b/arch/arm/boards/freescale-vf610-twr/lowlevel.c @@ -2,14 +2,15 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/esdctl.h> -#include <mach/vf610-regs.h> -#include <mach/clock-vf610.h> -#include <mach/iomux-vf610.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/vf610-regs.h> +#include <mach/imx/clock-vf610.h> +#include <mach/imx/iomux-vf610.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> static inline void setup_uart(void) { diff --git a/arch/arm/boards/friendlyarm-mini2440/Kconfig b/arch/arm/boards/friendlyarm-mini2440/Kconfig deleted file mode 100644 index 1037f7c77d..0000000000 --- a/arch/arm/boards/friendlyarm-mini2440/Kconfig +++ /dev/null @@ -1,35 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -if MACH_MINI2440 - -config MINI2440_VIDEO - bool - select VIDEO - select DRIVER_VIDEO_S3C24XX - -config MINI2440_VIDEO_N35 - bool "Support N35 display (240x320)" - select MINI2440_VIDEO - help - This adds support for NEC 3.5 inch TFT display, - the most common one used with MINI2440 board. - -config MINI2440_VIDEO_A70 - bool "Support A70 display (800x480)" - select MINI2440_VIDEO - help - This adds support for Innolux 7.0 inch TFT display. - -config MINI2440_VIDEO_SVGA - bool "Support SVGA video adapter" - select MINI2440_VIDEO - help - This adds support for MINI2440 SVGA (1024x768) video output adapter. - -config MINI2440_VIDEO_W35 - bool "Support W35 display (320x240)" - select MINI2440_VIDEO - help - This adds support for Sharp 3.5 inch TFT display. - -endif diff --git a/arch/arm/boards/friendlyarm-mini2440/Makefile b/arch/arm/boards/friendlyarm-mini2440/Makefile deleted file mode 100644 index 618828126c..0000000000 --- a/arch/arm/boards/friendlyarm-mini2440/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - - -obj-y += mini2440.o -lwl-y += lowlevel_init.o diff --git a/arch/arm/boards/friendlyarm-mini2440/config.h b/arch/arm/boards/friendlyarm-mini2440/config.h deleted file mode 100644 index 86c78e54f6..0000000000 --- a/arch/arm/boards/friendlyarm-mini2440/config.h +++ /dev/null @@ -1,118 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/** - * @file - * @brief Global defintions for the ARM S3C2440 based mini2440 CPU card - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/** - * The external clock reference is a 12.00 MHz crystal - */ -#define S3C24XX_CLOCK_REFERENCE 12000000 - -/** - * Define the main clock configuration to be used in register CLKDIVN - * - * We must limit the frequency of the connected SDRAMs with the clock ratio - * setup to 1:4:8. This will result into FCLK:HCLK:PCLK = 405Mhz:102MHz:51MHz - */ -#define BOARD_SPECIFIC_CLKDIVN 0x05 - -/** - * Define the MPLL configuration to be used in register MPLLCON - * - * We want the MPLL to run at 405.0 MHz - */ -#define BOARD_SPECIFIC_MPLL ((0x7f << 12) + (2 << 4) + 1) - -/** - * Define the UPLL configuration to be used in register UPLLCON - * - * We want the UPLL to run at 48.0 MHz - */ -#define BOARD_SPECIFIC_UPLL ((0x38 << 12) + (2 << 4) + 2) - -/* - * Flash access timings - * Tacls = 0ns (but 20ns data setup time) - * Twrph0 = 25ns (write) 35ns (read) - * Twrph1 = 10ns (10ns data hold time) - * Read cycle time = 50ns - * - * Assumed HCLK is 100MHz - * Tacls = 1 (-> 20ns) - * Twrph0 = 3 (-> 40ns) - * Twrph1 = 1 (-> 20ns) - * Cycle time = 80ns - */ -#define MINI2440_TACLS 1 -#define MINI2440_TWRPH0 3 -#define MINI2440_TWRPH1 1 - -/* needed in the generic NAND boot code only */ -#ifdef CONFIG_S3C_NAND_BOOT -# define BOARD_DEFAULT_NAND_TIMING \ - CALC_NFCONF_TIMING(MINI2440_TACLS, MINI2440_TWRPH0, MINI2440_TWRPH1) -#endif - -/* - * Needed in the generic SDRAM boot code only - * - * SDRAM configuration - * Two types of SDRAM devices are common on mini2440: - * - Two devices of HY57V561620 to form 64 MiB in bank 6 only - * - http://friendlyarm.net/dl.php?file=HY57V561620.pdf - * - Two devices of MT48LC16M16 to form 64 MiB in bank 6 only - * - http://friendlyarm.net/dl.php?file=MT48LC16M16.pdf - - * Most of the time the CPU is specified for 400 MHz only. As the CPU frequency - * and the SDRAM frequency are fix coupled by 4:1, the SDRAM runs at HCLCK. - * So, we need a 100 MHz timing setup with CL=2 for the SDRAMs. - */ - -/* - * - ST7/WS7/DW7: reserved, this SDRAM bank is not used - * - ST6/WS6/DW6: 32 bit data bus (for SDRAM usage) - * - ST5/WS5/DW5: reserved, to be set by the board init code - * - ST4/WS4/DW4: reserved, to be set by the board init code - * - ST3/WS3/DW3: reserved, to be set by the board init code - * - ST2/WS2/DW2: reserved, to be set by the board init code - * - ST1/WS1/DW1: reserved, to be set by the board init code - * - DW0: not to be changed - */ -#define BOARD_SPECIFIC_BWSCON ((0x3 << 28) | (0x2 << 24) | 0x333330) -/* - * - MT = 11 (= sync dram type) - * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit columns) - */ -#define BOARD_SPECIFIC_BANKCON6 ((0x3 << 15) + (0x0 << 2) + (0x1)) -#define BOARD_SPECIFIC_BANKCON7 0 /* disabled */ -/* - * SDRAM refresh settings - * - REFEN = 1 (= refresh enabled) - * - TREFMD = 0 (= auto refresh) - * - Trp = 00 (= 2 RAS precharge clocks) - * - Tsrc = 01 (= 5 clocks -> row cycle time @100MHz 2+5=7 -> 70ns) - * - Refresh = 2^11 + 1 - 100 * 7.8 = 2049 - 780 = 1269 - */ -#define BOARD_SPECIFIC_REFRESH ((0x1 << 23) + (0x0 << 22) + (0x0 << 20) + (0x1 << 18) + 1269) -/* - * SDRAM banksize - * - BURST_EN = 1 (= burst mode enabled) - * - SCKE_EN = 1 (= SDRAM SCKE enabled) - * - SCLK_EN = 1 (= clock active only during accesses) - * - BK67MAP = 001 (= 64 MiB) - */ -# define BOARD_SPECIFIC_BANKSIZE ((1 << 7) + (1 << 5) + (1 << 4) + 1) -/* - * SDRAM mode register - * CL = 010 (= 2 clocks) - */ -# define BOARD_SPECIFIC_MRSRB6 (0x2 << 4) -# define BOARD_SPECIFIC_MRSRB7 0 /* not used */ - -#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/friendlyarm-mini2440/env/boot/nand b/arch/arm/boards/friendlyarm-mini2440/env/boot/nand deleted file mode 100644 index e0ef904432..0000000000 --- a/arch/arm/boards/friendlyarm-mini2440/env/boot/nand +++ /dev/null @@ -1,4 +0,0 @@ -#!/bin/sh - -global.bootm.image="/dev/nand0.kernel.bb" -global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=nand0.root rootfstype=ubifs" diff --git a/arch/arm/boards/friendlyarm-mini2440/env/config-board b/arch/arm/boards/friendlyarm-mini2440/env/config-board deleted file mode 100644 index 3e07a015b0..0000000000 --- a/arch/arm/boards/friendlyarm-mini2440/env/config-board +++ /dev/null @@ -1,16 +0,0 @@ -#!/bin/sh - -# board defaults, do not change in running system. Change /env/config -# instead - -global.linux.bootargs.console="console=ttySAC0,115200" - -# -# "mini2440" kernel parameter -# 0 .. 9 = screen type -# b = backlight enabled -# t = touch enabled -# c = camera enabled -# Note: can be "minit2440= " if nothing of these components are connected -# -global.linux.bootargs.base="mini2440=6tb" diff --git a/arch/arm/boards/friendlyarm-mini2440/env/init/mtdparts-nand b/arch/arm/boards/friendlyarm-mini2440/env/init/mtdparts-nand deleted file mode 100644 index b51104ad76..0000000000 --- a/arch/arm/boards/friendlyarm-mini2440/env/init/mtdparts-nand +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh - -mtdparts="256k(nand0.barebox),128k(nand0.bareboxenv),1536k(nand0.kernel),-(nand0.root)" -kernelname="nand" - -mtdparts-add -b -d nand0 -k ${kernelname} -p ${mtdparts} diff --git a/arch/arm/boards/friendlyarm-mini2440/lowlevel_init.S b/arch/arm/boards/friendlyarm-mini2440/lowlevel_init.S deleted file mode 100644 index b26efa12b0..0000000000 --- a/arch/arm/boards/friendlyarm-mini2440/lowlevel_init.S +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* - * Low level initialization for the FriendlyARM mini2440 board - */ - -#include <config.h> -#include <linux/sizes.h> -#include <mach/s3c-iomap.h> -#include <asm/barebox-arm-head.h> - - .section ".text_bare_init.barebox_arm_reset_vector","ax" - -/* ------------------------------------------------------------------------ */ - -.globl barebox_arm_reset_vector -barebox_arm_reset_vector: - bl arm_cpu_lowlevel_init - - bl s3c24x0_disable_wd - - /* skip everything here if we are already running from SDRAM */ - cmp pc, #S3C_SDRAM_BASE - blo 1f - cmp pc, #S3C_SDRAM_END - bhs 1f - - b out - -/* we are running from NOR or NAND/SRAM memory. Do further initialisation */ -1: - bl s3c24x0_pll_init - - bl s3c24x0_sdram_init - -#ifdef CONFIG_S3C_NAND_BOOT -/* up to here we are running from the internal SRAM area */ - bl s3c24x0_nand_boot -#endif -out: - mov r0, #S3C_SDRAM_BASE - mov r1, #SZ_32M - mov r2, #0 - b barebox_arm_entry diff --git a/arch/arm/boards/friendlyarm-mini2440/mini2440.c b/arch/arm/boards/friendlyarm-mini2440/mini2440.c deleted file mode 100644 index 413537d247..0000000000 --- a/arch/arm/boards/friendlyarm-mini2440/mini2440.c +++ /dev/null @@ -1,342 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/* - * Copyright (C) 2010 Marek Belisko <marek.belisko@open-nandra.com> - * - * Based on a9m2440.c board init by Juergen Beisert, Pengutronix - */ - -#include <common.h> -#include <driver.h> -#include <init.h> -#include <generated/mach-types.h> -#include <partition.h> -#include <platform_data/eth-dm9000.h> -#include <nand.h> -#include <mci.h> -#include <fb.h> -#include <asm/armlinux.h> -#include <asm/sections.h> -#include <io.h> -#include <gpio.h> -#include <mach/bbu.h> -#include <mach/iomux.h> -#include <mach/s3c-iomap.h> -#include <mach/devices-s3c24xx.h> -#include <mach/s3c24xx-nand.h> -#include <mach/s3c-generic.h> -#include <mach/s3c-mci.h> -#include <mach/s3c24xx-fb.h> -#include <mach/s3c-busctl.h> -#include <mach/s3c24xx-gpio.h> - -static struct s3c24x0_nand_platform_data nand_info = { - .nand_timing = CALC_NFCONF_TIMING(MINI2440_TACLS, MINI2440_TWRPH0, - MINI2440_TWRPH1), - .flash_bbt = 1, /* same as the kernel */ -}; - -/* - * dm9000 network controller onboard - * Connected to CS line 4 and interrupt line EINT7, - * data width is 16 bit - * Area 1: Offset 0x300...0x303 - * Area 2: Offset 0x304...0x307 - */ -static struct dm9000_platform_data dm9000_data = { - .srom = 1, -}; - -static struct s3c_mci_platform_data mci_data = { - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .gpio_detect = 232, /* GPG8_GPIO */ - .detect_invert = 0, -}; - -static struct fb_videomode s3c24x0_fb_modes[] = { -#ifdef CONFIG_MINI2440_VIDEO_N35 - { - .name = "N35", - .refresh = 60, - .xres = 240, - .left_margin = 21, - .right_margin = 38, - .hsync_len = 6, - .yres = 320, - .upper_margin = 4, - .lower_margin = 4, - .vsync_len = 2, - .pixclock = 115913, - .sync = FB_SYNC_USE_PWREN, - .vmode = FB_VMODE_NONINTERLACED, - }, -#endif -#ifdef CONFIG_MINI2440_VIDEO_A70 - { - .name = "A70", - .refresh = 50, - .xres = 800, - .left_margin = 40, - .right_margin = 40, - .hsync_len = 48, - .yres = 480, - .upper_margin = 29, - .lower_margin = 3, - .vsync_len = 3, - .pixclock = 41848, - .sync = FB_SYNC_USE_PWREN | FB_SYNC_DE_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - }, -#endif -#ifdef CONFIG_MINI2440_VIDEO_SVGA - { - .name = "SVGA", - .refresh = 24, - .xres = 1024, - .left_margin = 1, - .right_margin = 2, - .hsync_len = 2, - .yres = 768, - .upper_margin = 200, - .lower_margin = 16, - .vsync_len = 16, - .pixclock = 40492, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | FB_SYNC_DE_HIGH_ACT - /* | FB_SYNC_SWAP_HW */ /* FIXME maybe */ , - .vmode = FB_VMODE_NONINTERLACED, - }, -#endif -#ifdef CONFIG_MINI2440_VIDEO_W35 - { - .name = "W35", - .refresh = 60, - .xres = 320, - .left_margin = 68, - .right_margin = 66, - .hsync_len = 4, - .yres = 240, - .upper_margin = 4, - .lower_margin = 4, - .vsync_len = 9, - .pixclock = 115913, - .sync = FB_SYNC_USE_PWREN | FB_SYNC_CLK_INVERT, - .vmode = FB_VMODE_NONINTERLACED, - }, -#endif -}; - -static struct s3c_fb_platform_data s3c24x0_fb_data = { - .mode_list = s3c24x0_fb_modes, - .mode_cnt = sizeof(s3c24x0_fb_modes) / sizeof(struct fb_videomode), - .bits_per_pixel = 16, - .passive_display = 0, -}; - -static const unsigned pin_usage[] = { - /* address bus, used by NOR, SDRAM */ - GPA1_ADDR16, - GPA2_ADDR17, - GPA3_ADDR18, - GPA4_ADDR19, - GPA5_ADDR20, - GPA6_ADDR21, - GPA7_ADDR22, - - GPA8_ADDR23_GPIO | GPIO_IN, - GPA9_ADDR24, /* BA0 */ - GPA10_ADDR25, /* BA1 */ - GPA11_ADDR26_GPIO | GPIO_IN, /* not connected */ - - /* DM9000 requirements */ - GPA15_NGCS4, - GPF7_EINT7, - - /* de-activate the speaker */ - GPB0_GPIO | GPIO_OUT | GPIO_VAL(0), - - /* SD socket */ - GPE5_SDCLK, - GPE6_SDCMD, - GPE7_SDDAT0, - GPE8_SDDAT1, - GPE9_SDDAT2, - GPE10_SDDAT3, - GPG8_GPIO | GPIO_IN, /* change detection */ - GPH8_GPIO | GPIO_IN, /* write protection sense */ - - /* NAND requirements */ - GPA17_CLE, - GPA18_ALE, - GPA19_NFWE, - GPA20_NFRE, - GPA21_NRSTOUT, - GPA22_NFCE, - - /* Video out */ - GPC0_LEND, - GPC1_VCLK, - GPC2_VLINE, - GPC3_VFRAME, - GPC4_VM, - GPC5_LPCOE, - GPC6_LPCREV, - GPC7_LPCREVB, - GPG4_LCD_PWREN, - - GPC8_VD0, - GPC9_VD1, - GPC10_VD2, - GPC11_VD3, - GPC12_VD4, - GPC13_VD5, - GPC14_VD6, - GPC15_VD7, - GPD0_VD8, - GPD1_VD9, - GPD2_VD10, - GPD3_VD11, - GPD4_VD12, - GPD5_VD13, - GPD6_VD14, - GPD7_VD15, - GPD8_VD16, - GPD9_VD17, - GPD10_VD18, - GPD11_VD19, - GPD12_VD20, - GPD13_VD21, - GPD14_VD22, - GPD15_VD23, - - /* K6 or CON12, pin 6, external pull up */ - GPG11_EINT19 | GPIO_IN, - /* K5 or CON12, pin 5*/ - GPG7_EINT15 | GPIO_IN, - /* K4 or CON12, pin 4 */ - GPG6_EINT14 | GPIO_IN, - /* K3 or CON12, pin 3 */ - GPG5_EINT13 | GPIO_IN, - /* K2 or CON12, pin 2 */ - GPG3_EINT11 | GPIO_IN, - /* K1 or CON12, pin 1, external pull up */ - GPG0_EINT8 | GPIO_IN, - - /* LED 1 1=off */ - GPB5_GPIO | GPIO_OUT | GPIO_VAL(1), - /* LED 2 1=off */ - GPB6_GPIO | GPIO_OUT | GPIO_VAL(1), - /* LED 3 1=off */ - GPB7_GPIO | GPIO_OUT | GPIO_VAL(1), - /* LED 4 1=off */ - GPB8_GPIO | GPIO_OUT | GPIO_VAL(1), - - /* camera interface (ignore it) */ - GPJ0_GPIO | GPIO_IN, - GPJ1_GPIO | GPIO_IN, - GPJ2_GPIO | GPIO_IN, - GPJ3_GPIO | GPIO_IN, - GPJ4_GPIO | GPIO_IN, - GPJ5_GPIO | GPIO_IN, - GPJ6_GPIO | GPIO_IN, - GPJ7_GPIO | GPIO_IN, - GPJ8_GPIO | GPIO_IN, - GPJ9_GPIO | GPIO_IN, - GPJ10_GPIO | GPIO_IN, - GPJ11_GPIO | GPIO_IN, - GPJ12_GPIO | GPIO_IN, - - /* I2C bus */ - GPE14_IICSCL, /* external pull up */ - GPE15_IICSDA, /* external pull up */ - - GPA12_NGCS1, /* CON5, pin 7 */ - GPA13_NGCS2, /* CON5, pin 8 */ - GPA14_NGCS3, /* CON5, pin 9 */ - GPA16_NGCS5, /* CON5, pin 10 */ - - /* UART2 (spare) */ - GPH4_TXD1, - GPH5_RXD1, - - /* UART3 (spare) */ - GPH6_TXD2, - GPH7_RXD2, -}; - -static int mini2440_mem_init(void) -{ - arm_add_mem_device("ram0", S3C_SDRAM_BASE, s3c24xx_get_memory_size()); - - return 0; -} -mem_initcall(mini2440_mem_init); - -static int mini2440_devices_init(void) -{ - uint32_t reg; - int i; - - /* ----------- configure the access to the outer space ---------- */ - for (i = 0; i < ARRAY_SIZE(pin_usage); i++) - s3c_gpio_mode(pin_usage[i]); - - reg = readl(S3C_BWSCON); - - /* CS#4 to access the network controller */ - reg &= ~0x000f0000; - reg |= 0x000d0000; /* 16 bit */ - writel(0x1f4c, S3C_BANKCON4); - - writel(reg, S3C_BWSCON); - - /* release the reset signal to external devices */ - reg = readl(S3C_MISCCR); - reg |= 0x10000; - writel(reg, S3C_MISCCR); - - s3c24xx_add_nand(&nand_info); - - add_dm9000_device(0, S3C_CS4_BASE + 0x300, S3C_CS4_BASE + 0x304, - IORESOURCE_MEM_16BIT, &dm9000_data); -#ifdef CONFIG_NAND - /* ----------- add some vital partitions -------- */ - devfs_del_partition("self_raw"); - devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - - devfs_del_partition("env_raw"); - devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); - - s3c24x0_bbu_nand_register_handler(); -#endif - s3c24xx_add_mci(&mci_data); - s3c24xx_add_fb(&s3c24x0_fb_data); - s3c24xx_add_ohci(); - armlinux_set_architecture(MACH_TYPE_MINI2440); - - return 0; -} - -device_initcall(mini2440_devices_init); - -static int mini2440_console_init(void) -{ - /* - * configure the UART1 right now, as barebox will - * start to send data immediately - */ - s3c_gpio_mode(GPH0_NCTS0); - s3c_gpio_mode(GPH1_NRTS0); - s3c_gpio_mode(GPH2_TXD0); - s3c_gpio_mode(GPH3_RXD0); - - barebox_set_model("Friendlyarm mini2440"); - barebox_set_hostname("mini2440"); - - s3c24xx_add_uart1(); - return 0; -} - -console_initcall(mini2440_console_init); diff --git a/arch/arm/boards/friendlyarm-mini6410/Makefile b/arch/arm/boards/friendlyarm-mini6410/Makefile deleted file mode 100644 index 2e6ea7aa7e..0000000000 --- a/arch/arm/boards/friendlyarm-mini6410/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -obj-y += mini6410.o -lwl-y += lowlevel.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-friendlyarm-mini6410 diff --git a/arch/arm/boards/friendlyarm-mini6410/config.h b/arch/arm/boards/friendlyarm-mini6410/config.h deleted file mode 100644 index 87b6ea4a29..0000000000 --- a/arch/arm/boards/friendlyarm-mini6410/config.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* FriendlyARM Mini6410 specific global settings */ - -#ifndef _MINI6410_CONFIG_H_ -# define _MINI6410_CONFIG_H_ - -#define S3C64XX_CLOCK_REFERENCE 12000000 - -#endif /* _MINI6410_CONFIG_H_ */ diff --git a/arch/arm/boards/friendlyarm-mini6410/defaultenv-friendlyarm-mini6410/config b/arch/arm/boards/friendlyarm-mini6410/defaultenv-friendlyarm-mini6410/config deleted file mode 100644 index 924d7b8cc7..0000000000 --- a/arch/arm/boards/friendlyarm-mini6410/defaultenv-friendlyarm-mini6410/config +++ /dev/null @@ -1,52 +0,0 @@ -#!/bin/sh - -machine=mini6410 -eth0.serverip=a.b.c.d.e -user= - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d.e -#eth0.netmask=a.b.c.d.e -#eth0.gateway=a.b.c.d.e -#eth0.ethaddr= - -# can be either 'nfs', 'tftp' or 'nand' -kernel_loc=tftp -# can be either 'net', 'nand' or 'initrd' -rootfs_loc=net - -# can be either 'jffs2' or 'ubifs' -rootfs_type=ubifs -rootfsimage=root-${machine}.${rootfs_type} - -# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo -kernelimage=zImage-${machine} -#kernelimage=uImage-$machine -#kernelimage=Image-$machine -#kernelimage=Image-$machine.lzo - -if [ -n $user ]; then - kernelimage="${user}"-"${kernelimage}" - nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}" - rootfsimage="${user}"-"${rootfsimage}" -else - nfsroot="${eth0.serverip}:/path/to/nfs/root" -fi - -autoboot_timeout=3 - -# -# "mini6410" kernel parameter -# 0 .. 9 = screen type -# i = touchscreen with propritary FriendlyARM protocol -# Note: can be "minit6410= " if nothing of these components are connected -# -bootargs="console=ttySAC0,115200 mini6410=0" - -nand_device="nand" -nand_parts="256k(barebox),128k(bareboxenv),1536k(kernel),-(root)" -rootfs_mtdblock_nand=3 diff --git a/arch/arm/boards/friendlyarm-mini6410/lowlevel.c b/arch/arm/boards/friendlyarm-mini6410/lowlevel.c deleted file mode 100644 index dfb69d2272..0000000000 --- a/arch/arm/boards/friendlyarm-mini6410/lowlevel.c +++ /dev/null @@ -1,13 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only - -#include <common.h> -#include <linux/sizes.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/s3c-iomap.h> - -void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - arm_cpu_lowlevel_init(); - barebox_arm_entry(S3C_SDRAM_BASE, SZ_128M, NULL); -} diff --git a/arch/arm/boards/friendlyarm-mini6410/mini6410.c b/arch/arm/boards/friendlyarm-mini6410/mini6410.c deleted file mode 100644 index 3f5e8ca2a3..0000000000 --- a/arch/arm/boards/friendlyarm-mini6410/mini6410.c +++ /dev/null @@ -1,302 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2012 Juergen Beisert - -#include <common.h> -#include <driver.h> -#include <init.h> -#include <platform_data/eth-dm9000.h> -#include <gpio.h> -#include <envfs.h> -#include <generated/mach-types.h> -#include <asm/armlinux.h> -#include <mach/s3c-iomap.h> -#include <mach/devices-s3c64xx.h> -#include <mach/s3c-generic.h> -#include <mach/iomux.h> - -/* - * dm9000 network controller onboard - * Connected to CS line 1 and interrupt line EINT7, - * data width is 16 bit - * Area 1: Offset 0x300...0x301 - * Area 2: Offset 0x304...0x305 - */ -static struct dm9000_platform_data dm9000_data = { - .srom = 0, /* no serial ROM for the ethernet address */ -}; - -static const unsigned pin_usage[] = { - /* UART2 (spare, 3,3 V TTL level only) */ - GPA4_RXD1 | ENABLE_PU, - GPA5_TXD1, - GPA6_NCTS1 | ENABLE_PU, - GPA7_NRTS1, - /* UART3 (spare, 3,3 V TTL level only) */ - GPB0_RXD2 | ENABLE_PU, - GPB1_TXD2, - /* UART4 (spare, 3,3 V TTL level only) */ - GPB2_RXD3 | ENABLE_PU, - GPB3_TXD3, - - GPB4_GPIO | GPIO_IN | ENABLE_PU, - - /* I2C bus */ - GPB5_IIC0_SCL, /* external PU */ - GPB6_IIC0_SDA, /* external PU */ - - GPC0_SPI0_MISO | ENABLE_PU, - GPC1_SPI0_CLK, - GPC2_SPI0_MOSI, - GPC3_SPI0_NCS, - - GPC4_SPI1_MISO | ENABLE_PU, - GPC5_SPI1_CLK, - GPC6_SPI1_MOSI, - GPC7_SPI1_NCS, - - GPD0_AC97_BITCLK, - GPD1_AC97_NRST, - GPD2_AC97_SYNC, - GPD3_AC97_SDI | ENABLE_PU, - GPD4_AC97_SDO, - - GPE0_GPIO | GPIO_OUT | GPIO_VAL(0), /* LCD backlight off */ - GPE1_GPIO | GPIO_IN | ENABLE_PU, - GPE2_GPIO | GPIO_IN | ENABLE_PU, - GPE3_GPIO | GPIO_IN | ENABLE_PU, - GPE4_GPIO | GPIO_IN | ENABLE_PU, - - /* keep all camera signals at reasonable values */ - GPF0_GPIO | GPIO_IN | ENABLE_PU, - GPF1_GPIO | GPIO_IN | ENABLE_PU, - GPF2_GPIO | GPIO_IN | ENABLE_PU, - GPF3_GPIO | GPIO_IN | ENABLE_PU, - GPF4_GPIO | GPIO_IN | ENABLE_PU, - GPF5_GPIO | GPIO_IN | ENABLE_PU, - GPF6_GPIO | GPIO_IN | ENABLE_PU, - GPF7_GPIO | GPIO_IN | ENABLE_PU, - GPF8_GPIO | GPIO_IN | ENABLE_PU, - GPF9_GPIO | GPIO_IN | ENABLE_PU, - GPF10_GPIO | GPIO_IN | ENABLE_PU, - GPF11_GPIO | GPIO_IN | ENABLE_PU, - GPF12_GPIO | GPIO_IN | ENABLE_PU, - GPF13_GPIO | GPIO_OUT | GPIO_VAL(0), /* USB power off */ -#if 0 - GPF14_CLKOUT, /* for testing purposes, but very noisy */ -#else - GPF14_GPIO | GPIO_OUT | GPIO_VAL(0), /* Buzzer off */ -#endif - GPF15_GPIO | GPIO_OUT | GPIO_VAL(0), /* Backlight PWM inactive */ - - /* SD card slot (all signals have external 10k PU) */ - GPG0_MMC0_CLK, - GPG1_MMC0_CMD, - GPG2_MMC0_DAT0, - GPG3_MMC0_DAT1, - GPG4_MMC0_DAT2, - GPG5_MMC0_DAT3, - GPG6_MMC0_NCD, - - /* SDIO slot (all used signals have external PU) */ - GPH0_GPIO | GPIO_IN, /* CLK */ - GPH1_GPIO | GPIO_IN, /* CMD */ - GPH2_GPIO | GPIO_IN, /* DAT0 */ - GPH3_GPIO | GPIO_IN, /* DAT1 */ - GPH4_GPIO | GPIO_IN, /* DAT2 */ - GPH5_GPIO | GPIO_IN, /* DAT3 */ - GPH6_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */ - GPH7_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */ - GPH8_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */ - GPH9_GPIO | GPIO_IN | ENABLE_PU, /* nowhere connected */ - - /* as long as we are not using the LCD controller, disable the pins */ - GPI0_GPIO | GPIO_IN | ENABLE_PD, - GPI1_GPIO | GPIO_IN | ENABLE_PD, - GPI2_GPIO | GPIO_IN | ENABLE_PD, - GPI3_GPIO | GPIO_IN | ENABLE_PD, - GPI4_GPIO | GPIO_IN | ENABLE_PD, - GPI5_GPIO | GPIO_IN | ENABLE_PD, - GPI6_GPIO | GPIO_IN | ENABLE_PD, - GPI7_GPIO | GPIO_IN | ENABLE_PD, - GPI8_GPIO | GPIO_IN | ENABLE_PD, - GPI9_GPIO | GPIO_IN | ENABLE_PD, - GPI10_GPIO | GPIO_IN | ENABLE_PD, - GPI11_GPIO | GPIO_IN | ENABLE_PD, - GPI12_GPIO | GPIO_IN | ENABLE_PD, - GPI13_GPIO | GPIO_IN | ENABLE_PD, - GPI14_GPIO | GPIO_IN | ENABLE_PD, - GPI15_GPIO | GPIO_IN | ENABLE_PD, - GPJ0_GPIO | GPIO_IN | ENABLE_PD, - GPJ1_GPIO | GPIO_IN | ENABLE_PD, - GPJ2_GPIO | GPIO_IN | ENABLE_PD, - GPJ3_GPIO | GPIO_IN | ENABLE_PD, - GPJ4_GPIO | GPIO_IN | ENABLE_PD, - GPJ5_GPIO | GPIO_IN | ENABLE_PD, - GPJ6_GPIO | GPIO_IN | ENABLE_PD, - GPJ7_GPIO | GPIO_IN | ENABLE_PD, - GPJ8_GPIO | GPIO_IN | ENABLE_PD, - GPJ9_GPIO | GPIO_IN | ENABLE_PD, - GPJ10_GPIO | GPIO_IN | ENABLE_PD, - GPJ11_GPIO | GPIO_IN | ENABLE_PD, - - GPK0_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPK1_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPK2_GPIO | GPIO_IN, - GPK3_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPK4_GPIO | GPIO_OUT | GPIO_VAL(1), /* LED #1 (high = LED off) */ - GPK5_GPIO | GPIO_OUT | GPIO_VAL(1), /* LED #2 (high = LED off) */ - GPK6_GPIO | GPIO_OUT | GPIO_VAL(1), /* LED #3 (high = LED off) */ - GPK7_GPIO | GPIO_OUT | GPIO_VAL(1), /* LED #4 (high = LED off) */ - GPK8_GPIO | GPIO_IN, /* (external PU) */ - GPK9_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPK10_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPK11_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPK12_GPIO | GPIO_IN, /* OCT_DET */ - GPK13_GPIO | GPIO_IN, /* WIFI power (external PU) */ - GPK14_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPK15_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - - GPL0_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPL1_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPL2_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPL3_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPL4_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPL5_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPL6_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPL7_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPL8_GPIO | GPIO_IN, /* EINT16 (external PU) */ - GPL9_GPIO | GPIO_IN | ENABLE_PU, /* EINT17 */ - GPL10_GPIO | GPIO_IN | ENABLE_PU, /* EINT18 */ - GPL11_GPIO | GPIO_IN, /* EINT19 + K7 (external PU) */ - GPL12_GPIO | GPIO_IN, /* EINT20 + K6 (external PU) */ - GPL13_GPIO | GPIO_IN, /* SD0 WP (external PU) */ - GPL14_GPIO | GPIO_IN, /* SD1 WP (external PU) */ - - GPM0_GPIO | GPIO_IN, /* (external PU) */ - GPM1_GPIO | GPIO_IN, /* (external PU) */ - GPM2_GPIO | GPIO_IN, /* (external PU) */ - GPM3_GPIO | GPIO_IN, /* (external PU) */ - GPM4_GPIO | GPIO_IN, /* (external PU) */ - GPM5_GPIO | GPIO_IN, /* (external PU) */ - - GPN0_GPIO | GPIO_IN, /* EINT0 (external PU) */ - GPN1_GPIO | GPIO_IN, /* EINT1 (external PU) */ - GPN2_GPIO | GPIO_IN, /* EINT2 (external PU) */ - GPN3_GPIO | GPIO_IN, /* EINT3 (external PU) */ - GPN4_GPIO | GPIO_IN, /* EINT4 (external PU) */ - GPN5_GPIO | GPIO_IN, /* EINT5 (external PU) */ - GPN6_GPIO | GPIO_IN, /* EINT6 (external PU) */ - GPN7_GPIO | GPIO_IN | ENABLE_PU, /* EINT7 DM9000 interrupt */ - GPN8_GPIO | GPIO_IN, /* EINT8 USB detect (external PU) */ - GPN9_GPIO | GPIO_IN, /* EINT9 (external PU) */ - GPN10_GPIO | GPIO_IN, /* SD1 CD (external PU) */ - GPN11_GPIO | GPIO_IN, /* EINT11 (external PU) */ - GPN12_GPIO | GPIO_IN, /* EINT12 IR in (external PU) */ - GPN13_GPIO | GPIO_IN, /* BOOT0/EINT13 (externally fixed) */ - GPN14_GPIO | GPIO_IN, /* BOOT1/EINT14 (externally fixed) */ - GPN15_GPIO | GPIO_IN, /* BOOT2/EINT15 (externally fixed) */ - - GPO0_NCS2, /* NAND */ - GPO1_NCS3, /* NAND */ - GPO2_NCS4, /* CON5 */ - GPO3_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO4_GPIO | GPIO_IN | ENABLE_PU, /* CON5 pin 8 */ - GPO5_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO6_ADDR6, /* CON5 */ - GPO7_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO8_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO9_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO10_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO11_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO12_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO13_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO14_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPO15_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - - GPP0_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPP1_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPP2_NWAIT | ENABLE_PU, /* CON5 */ - GPP3_FALE, /* NAND */ - GPP4_FCLE, /* NAND */ - GPP5_FWE, /* NAND */ - GPP6_FRE, /* NAND */ - GPP7_RNB, /* NAND (external PU) */ - GPP8_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPP9_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPP10_GPIO | GPIO_IN, /* (external PU) */ - GPP11_GPIO | GPIO_IN, /* (external PU) */ - GPP12_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPP13_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - GPP14_GPIO | GPIO_IN | ENABLE_PU, /* not used */ - - GPQ0_GPIO | GPIO_IN | ENABLE_PU, /* not used as LADDR18 */ - GPQ1_GPIO | GPIO_IN, /* (external PU) */ - GPQ2_GPIO | GPIO_IN, /* (external PU) */ - GPQ3_GPIO | GPIO_IN, /* (external PU) */ - GPQ4_GPIO | GPIO_IN, /* (external PU) */ - GPQ5_GPIO | GPIO_IN, /* (external PU) */ - GPQ6_GPIO | GPIO_IN, /* (external PU) */ - GPQ7_GPIO | GPIO_IN | ENABLE_PU, /* not used as LADDR17 */ - GPQ8_GPIO | GPIO_IN | ENABLE_PU, /* not used as LADDR16 */ -}; - -static int mini6410_mem_init(void) -{ - arm_add_mem_device("ram0", S3C_SDRAM_BASE, s3c6410_get_memory_size()); - - return 0; -} -mem_initcall(mini6410_mem_init); - -static const struct s3c6410_chipselect dm900_cs = { - .adr_setup_t = 0, - .access_setup_t = 0, - .access_t = 20, - .cs_hold_t = 3, - .adr_hold_t = 20, /* CS must be de-asserted for at least 20 ns */ - .width = 16, -}; - -static void mini6410_setup_dm9000_cs(void) -{ - s3c6410_setup_chipselect(1, &dm900_cs); -} - -static int mini6410_devices_init(void) -{ - int i; - - /* ----------- configure the access to the outer space ---------- */ - for (i = 0; i < ARRAY_SIZE(pin_usage); i++) - s3c_gpio_mode(pin_usage[i]); - - mini6410_setup_dm9000_cs(); - add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304, - IORESOURCE_MEM_16BIT, &dm9000_data); - - armlinux_set_architecture(MACH_TYPE_MINI6410); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_friendlyarm_mini6410); - - return 0; -} - -device_initcall(mini6410_devices_init); - -static int mini6410_console_init(void) -{ - s3c_gpio_mode(GPA0_RXD0 | ENABLE_PU); - s3c_gpio_mode(GPA1_TXD0); - s3c_gpio_mode(GPA2_NCTS0 | ENABLE_PU); - s3c_gpio_mode(GPA3_NRTS0); - - barebox_set_model("Friendlyarm mini6410"); - barebox_set_hostname("mini6410"); - - s3c64xx_add_uart1(); - - return 0; -} - -console_initcall(mini6410_console_init); diff --git a/arch/arm/boards/friendlyarm-tiny210/config.h b/arch/arm/boards/friendlyarm-tiny210/config.h deleted file mode 100644 index 7437e6bddd..0000000000 --- a/arch/arm/boards/friendlyarm-tiny210/config.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#define S5PCXX_CLOCK_REFERENCE 24000000 - -#define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv) - -#define BOARD_APLL_VAL set_pll(0x7d, 0x3, 0x1) -#define BOARD_MPLL_VAL set_pll(0x29b, 0xc, 0x1) -#define BOARD_EPLL_VAL set_pll(0x60, 0x6, 0x2) -#define BOARD_VPLL_VAL set_pll(0x6c, 0x6, 0x3) - -#define BOARD_CLK_DIV0_MASK 0xFFFFFFFF -#define BOARD_CLK_DIV0_VAL 0x14131440 -#define BOARD_APLL_LOCKTIME 0x2cf - -#define S5P_DRAM_WR 3 -#define S5P_DRAM_CAS 4 -#define DMC_TIMING_AREF 0x00000618 -#define DMC_TIMING_ROW 0x2B34438A -#define DMC_TIMING_DATA 0x24240000 -#define DMC_TIMING_PWR 0x0BDC0343 diff --git a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c deleted file mode 100644 index d79661b222..0000000000 --- a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c +++ /dev/null @@ -1,100 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -// SPDX-FileCopyrightText: 2012 Alexey Galakhov - -#include <config.h> -#include <common.h> -#include <init.h> -#include <io.h> -#include <linux/sizes.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <asm/sections.h> -#include <mach/s3c-iomap.h> -#include <mach/s3c-clocks.h> -#include <mach/s3c-generic.h> - -#define IRAM_CODE_BASE 0xD0020010 - -/* Tiny210 has 4 leds numbered from 0 to 3 at GPJ2 */ -static inline void __bare_init debug_led(int led, bool state) -{ - uint32_t r; - /* GPJ2CON: mode 0001=output */ - r = readl(0xE0200280); - r &= ~(0xF << (4 * led)); - r |= (0x1 << (4 * led)); - writel(r, 0xE0200280); - /* GPJ2DAT: active low */ - r = readl(0xE0200284); - r &= ~(1 << led); - r |= (state ? 0 : 1) << led; - writel(r, 0xE0200284); -} - -/* - * iROM boot from MMC - * TODO: replace this by native boot - */ - -#define ADDR_V210_SDMMC_BASE 0xD0037488 -#define ADDR_CopySDMMCtoMem 0xD0037F98 - -static int __bare_init s5p_irom_load_mmc(void *dest, uint32_t start_block, - uint16_t block_count) -{ - typedef uint32_t (*func_t) (int32_t, uint32_t, uint16_t, uint32_t*, int8_t); - uint32_t chbase = readl(ADDR_V210_SDMMC_BASE); - func_t func = (func_t)readl(ADDR_CopySDMMCtoMem); - int chan = (chbase - 0xEB000000) >> 20; - if (chan != 0 && chan != 2) - return 0; - return func(chan, start_block, block_count, (uint32_t*)dest, 0) ? 1 : 0; -} - -static __bare_init __naked void jump_sdram(unsigned long offset) -{ - __asm__ __volatile__ ( - "sub lr, lr, %0;" - "mov pc, lr;" : : "r"(offset) - ); -} - -static __bare_init bool load_stage2(void *dest, size_t size) -{ - /* TODO add other ways to boot */ - return s5p_irom_load_mmc(dest, 1, (size+ 511) / 512); -} - -void __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - arm_cpu_lowlevel_init(); - -#ifdef CONFIG_S3C_PLL_INIT - s5p_init_pll(); -#endif - - debug_led(0, 1); - - if (get_pc() < IRAM_CODE_BASE) /* Are we running from iRAM? */ - /* No, we don't. */ - goto boot; - - s5p_init_dram_bank_ddr2(S5P_DMC0_BASE, 0x20E00323, 0, 0); - - debug_led(1, 1); - - if (! load_stage2((void*)(_text - 16), - barebox_image_size + 16)) { - debug_led(3, 1); - while (1) { } /* hang */ - } - - debug_led(2, 1); - - jump_sdram(IRAM_CODE_BASE - (unsigned long)_text); - - debug_led(1, 0); - -boot: - barebox_arm_entry(S3C_SDRAM_BASE, SZ_256M, NULL); -} diff --git a/arch/arm/boards/friendlyarm-tiny210/tiny210.c b/arch/arm/boards/friendlyarm-tiny210/tiny210.c deleted file mode 100644 index c47f488207..0000000000 --- a/arch/arm/boards/friendlyarm-tiny210/tiny210.c +++ /dev/null @@ -1,102 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/* - * Copyright (C) 2012 Alexey Galakhov - * Based on Mini6410 code by Juergen Beisert - * - * Copyright (C) 2012 Juergen Beisert, Pengutronix - * - * In some ways inspired by code - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> - */ - -#include <common.h> -#include <driver.h> -#include <init.h> -#include <linux/sizes.h> -#include <generated/mach-types.h> -#include <gpio.h> -#include <led.h> -#include <io.h> -#include <nand.h> -#include <asm/armlinux.h> -#include <mach/iomux.h> -#include <mach/s3c-iomap.h> -#include <mach/s3c-clocks.h> -#include <mach/s3c-generic.h> - -static struct gpio_led leds[] = { - { - .gpio = GPJ20, - .led = { - .name = "led1", - } - }, { - .gpio = GPJ21, - .led = { - .name = "led2", - } - }, { - .gpio = GPJ22, - .led = { - .name = "led3", - } - }, { - .gpio = GPJ23, - .led = { - .name = "led4", - } - } -}; - -static int tiny210_mem_init(void) -{ - arm_add_mem_device("ram0", S3C_SDRAM_BASE, s5p_get_memory_size()); - return 0; -} -mem_initcall(tiny210_mem_init); - -static int tiny210_console_init(void) -{ - /* - * configure the UART1 right now, as barebox will - * start to send data immediately - */ - s3c_gpio_mode(GPA00_RXD0 | ENABLE_PU); - s3c_gpio_mode(GPA01_TXD0); - s3c_gpio_mode(GPA02_NCTS0 | ENABLE_PU); - s3c_gpio_mode(GPA03_NRTS0); - - barebox_set_model("Friendlyarm tiny210"); - barebox_set_hostname("tiny210"); - - add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, - S3C_UART1_BASE, S3C_UART1_SIZE, - IORESOURCE_MEM, NULL); - return 0; -} -console_initcall(tiny210_console_init); - -static int tiny210_devices_init(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(leds); i++) { - leds[i].active_low = 1; - gpio_direction_output(leds[i].gpio, leds[i].active_low); - led_gpio_register(&leds[i]); - } - - led_set_trigger(LED_TRIGGER_HEARTBEAT, &leds[0].led); - - armlinux_set_architecture(MACH_TYPE_MINI210); - - return 0; -} -device_initcall(tiny210_devices_init); diff --git a/arch/arm/boards/friendlyarm-tiny6410/Kconfig b/arch/arm/boards/friendlyarm-tiny6410/Kconfig deleted file mode 100644 index 1283b8e7d9..0000000000 --- a/arch/arm/boards/friendlyarm-tiny6410/Kconfig +++ /dev/null @@ -1,21 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -if MACH_TINY6410 - -choice - prompt "FriendlyARM Tiny6410 baseboard" - help - Since the Tiny6410 is a CPU card only, it requires a basebord to make - it work. Select here the baseboard Barebox should expect and - configure. - -config MACH_TINY6410_FA - bool - select HAS_DM9000 - prompt "FA development platform" - help - FriendlyARM's Tiny6410 evaluation board. - -endchoice - -endif diff --git a/arch/arm/boards/friendlyarm-tiny6410/Makefile b/arch/arm/boards/friendlyarm-tiny6410/Makefile deleted file mode 100644 index f0b868d67f..0000000000 --- a/arch/arm/boards/friendlyarm-tiny6410/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -obj-y += tiny6410.o -lwl-y += lowlevel.o -lwl-$(CONFIG_MACH_TINY6410_FA) += development-board.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-friendlyarm-tiny6410 diff --git a/arch/arm/boards/friendlyarm-tiny6410/config.h b/arch/arm/boards/friendlyarm-tiny6410/config.h deleted file mode 100644 index 22692a3025..0000000000 --- a/arch/arm/boards/friendlyarm-tiny6410/config.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* FriendlyARM Tiny6410 specific global settings */ - -#ifndef _TINY6410_CONFIG_H_ -# define _TINY6410_CONFIG_H_ - -#define S3C64XX_CLOCK_REFERENCE 12000000 - -#endif /* _TINY6410_CONFIG_H_ */ diff --git a/arch/arm/boards/friendlyarm-tiny6410/defaultenv-friendlyarm-tiny6410/config b/arch/arm/boards/friendlyarm-tiny6410/defaultenv-friendlyarm-tiny6410/config deleted file mode 100644 index f38535be48..0000000000 --- a/arch/arm/boards/friendlyarm-tiny6410/defaultenv-friendlyarm-tiny6410/config +++ /dev/null @@ -1,52 +0,0 @@ -#!/bin/sh - -machine=tiny6410 -eth0.serverip=a.b.c.d.e -user= - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d.e -#eth0.netmask=a.b.c.d.e -#eth0.gateway=a.b.c.d.e -#eth0.ethaddr= - -# can be either 'nfs', 'tftp' or 'nand' -kernel_loc=tftp -# can be either 'net', 'nand' or 'initrd' -rootfs_loc=net - -# can be either 'jffs2' or 'ubifs' -rootfs_type=ubifs -rootfsimage=root-${machine}.${rootfs_type} - -# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo -kernelimage=zImage-${machine} -#kernelimage=uImage-$machine -#kernelimage=Image-$machine -#kernelimage=Image-$machine.lzo - -if [ -n $user ]; then - kernelimage="${user}"-"${kernelimage}" - nfsroot="${eth0.serverip}:/home/${user}/nfsroot/${machine}" - rootfsimage="${user}"-"${rootfsimage}" -else - nfsroot="${eth0.serverip}:/path/to/nfs/root" -fi - -autoboot_timeout=3 - -# -# "tiny6410" kernel parameter -# 0 .. 9 = screen type -# i = touchscreen with propritary FriendlyARM protocol -# Note: can be "tiny6410= " if nothing of these components are connected -# -bootargs="console=ttySAC0,115200 tiny6410=0" - -nand_device="nand" -nand_parts="256k(barebox),128k(bareboxenv),1536k(kernel),-(root)" -rootfs_mtdblock_nand=3 diff --git a/arch/arm/boards/friendlyarm-tiny6410/development-board.c b/arch/arm/boards/friendlyarm-tiny6410/development-board.c deleted file mode 100644 index 69c9768405..0000000000 --- a/arch/arm/boards/friendlyarm-tiny6410/development-board.c +++ /dev/null @@ -1,94 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2012 Juergen Beisert - -/* - * The FriendlyARM's Tiny6410 evaluation board comes with all connectors and - * devices to make the Tiny6410 CPU card work. This includes: - * - * - the DM9000 network controller - * - USB/MCI connectors - * - display connector - */ - -#include <common.h> -#include <driver.h> -#include <init.h> -#include <gpio.h> -#include <platform_data/eth-dm9000.h> -#include <mach/devices-s3c64xx.h> -#include <mach/s3c-generic.h> -#include <mach/iomux.h> - -#include "tiny6410.h" - -/* - * dm9000 network controller onboard - * Connected to CS line 1 and interrupt line EINT7, - * data width is 16 bit - * Area 1: Offset 0x300...0x301 - * Area 2: Offset 0x304...0x305 - */ -static struct dm9000_platform_data dm9000_data = { - .srom = 0, /* no serial ROM for the ethernet address */ -}; - -static const struct s3c6410_chipselect dm900_cs = { - .adr_setup_t = 0, - .access_setup_t = 0, - .access_t = 20, - .cs_hold_t = 3, - .adr_hold_t = 20, /* CS must be de-asserted for at least 20 ns */ - .width = 16, -}; - -static void tiny6410evk_setup_dm9000_cs(void) -{ - s3c6410_setup_chipselect(1, &dm900_cs); -} - -static const unsigned tiny6410evk_pin_usage[] = { - /* UART1 (V24) */ - GPA4_RXD1 | ENABLE_PU, - GPA5_TXD1, - GPA6_NCTS1 | ENABLE_PU, - GPA7_NRTS1, - /* UART2 (V24) */ - GPB0_RXD2 | ENABLE_PU, - GPB1_TXD2, - /* UART3 (spare, 3,3 V TTL level only) */ - GPB2_RXD3 | ENABLE_PU, - GPB3_TXD3, -}; - -static int tiny6410evk_devices_init(void) -{ - int i; - - /* init CPU card specific devices first */ - tiny6410_init("FA EVK"); - - /* ----------- configure the access to the outer space ---------- */ - for (i = 0; i < ARRAY_SIZE(tiny6410evk_pin_usage); i++) - s3c_gpio_mode(tiny6410evk_pin_usage[i]); - - tiny6410evk_setup_dm9000_cs(); - add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304, - IORESOURCE_MEM_16BIT, &dm9000_data); - return 0; -} -device_initcall(tiny6410evk_devices_init); - -static int tiny6410evk_console_init(void) -{ - /* note: UART0 has no RTS/CTS connected */ - s3c_gpio_mode(GPA0_RXD0 | ENABLE_PU); - s3c_gpio_mode(GPA1_TXD0); - - barebox_set_model("Friendlyarm tiny6410"); - barebox_set_hostname("tiny6410"); - - s3c64xx_add_uart1(); - - return 0; -} -console_initcall(tiny6410evk_console_init); diff --git a/arch/arm/boards/friendlyarm-tiny6410/lowlevel.c b/arch/arm/boards/friendlyarm-tiny6410/lowlevel.c deleted file mode 100644 index dfb69d2272..0000000000 --- a/arch/arm/boards/friendlyarm-tiny6410/lowlevel.c +++ /dev/null @@ -1,13 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only - -#include <common.h> -#include <linux/sizes.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/s3c-iomap.h> - -void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - arm_cpu_lowlevel_init(); - barebox_arm_entry(S3C_SDRAM_BASE, SZ_128M, NULL); -} diff --git a/arch/arm/boards/friendlyarm-tiny6410/tiny6410.c b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.c deleted file mode 100644 index a1126b7893..0000000000 --- a/arch/arm/boards/friendlyarm-tiny6410/tiny6410.c +++ /dev/null @@ -1,72 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2012 Juergen Beisert - -#include <common.h> -#include <driver.h> -#include <init.h> -#include <gpio.h> -#include <generated/mach-types.h> -#include <asm/armlinux.h> -#include <mach/s3c-iomap.h> -#include <mach/s3c-generic.h> -#include <mach/iomux.h> - -#include "tiny6410.h" - -static const unsigned tiny6410_pin_usage[] = { - /* UART0 */ - GPA2_GPIO | GPIO_IN | ENABLE_PU, /* CTS not connected */ - GPA3_GPIO | GPIO_IN | ENABLE_PU, /* RTS not connected */ - - /* local bus' D0 ... D15 are always active */ - /* local bus' A0...A5 are always active */ - - /* internal NAND memory */ - GPO0_NCS2, /* NAND's first chip select line */ - /* NAND's second chip select line, not used */ - GPO1_GPIO | GPIO_OUT | GPIO_VAL(1), - GPP3_FALE, - GPP4_FCLE, - GPP5_FWE, - GPP6_FRE, - GPP7_RNB, /* external pull-up */ - - GPF13_GPIO | GPIO_OUT | GPIO_VAL(0), /* OTG power supply, 0 = off */ - - /* nowhere connected */ - GPO2_GPIO | GPIO_IN | ENABLE_PU, - GPO3_GPIO | GPIO_IN | ENABLE_PU, - GPO4_GPIO | GPIO_IN | ENABLE_PU, - GPO5_GPIO | GPIO_IN | ENABLE_PU, - - /* local bus address lines 6...15 are nowhere connected */ - GPO6_GPIO | GPIO_IN | ENABLE_PU, - GPO7_GPIO | GPIO_IN | ENABLE_PU, - GPO8_GPIO | GPIO_IN | ENABLE_PU, - GPO9_GPIO | GPIO_IN | ENABLE_PU, - GPO10_GPIO | GPIO_IN | ENABLE_PU, - GPO11_GPIO | GPIO_IN | ENABLE_PU, - GPO12_GPIO | GPIO_IN | ENABLE_PU, - GPO13_GPIO | GPIO_IN | ENABLE_PU, - GPO14_GPIO | GPIO_IN | ENABLE_PU, - GPO15_GPIO | GPIO_IN | ENABLE_PU, -}; - -static int tiny6410_mem_init(void) -{ - arm_add_mem_device("ram0", S3C_SDRAM_BASE, s3c6410_get_memory_size()); - - return 0; -} -mem_initcall(tiny6410_mem_init); - -void tiny6410_init(const char *bb_name) -{ - int i; - - /* ----------- configure the access to the outer space ---------- */ - for (i = 0; i < ARRAY_SIZE(tiny6410_pin_usage); i++) - s3c_gpio_mode(tiny6410_pin_usage[i]); - - armlinux_set_architecture(MACH_TYPE_TINY6410); -} diff --git a/arch/arm/boards/friendlyarm-tiny6410/tiny6410.h b/arch/arm/boards/friendlyarm-tiny6410/tiny6410.h deleted file mode 100644 index bbe8877ca0..0000000000 --- a/arch/arm/boards/friendlyarm-tiny6410/tiny6410.h +++ /dev/null @@ -1,4 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/* to be called by the base board */ -void tiny6410_init(const char*); diff --git a/arch/arm/boards/gateworks-ventana/board.c b/arch/arm/boards/gateworks-ventana/board.c index c4c6960192..aa2137a971 100644 --- a/arch/arm/boards/gateworks-ventana/board.c +++ b/arch/arm/boards/gateworks-ventana/board.c @@ -8,8 +8,8 @@ #include <linux/marvell_phy.h> #include <linux/pci.h> #include <linux/phy.h> -#include <mach/bbu.h> -#include <mach/imx6.h> +#include <mach/imx/bbu.h> +#include <mach/imx/imx6.h> #include <net.h> #include "gsc.h" @@ -21,8 +21,13 @@ static int gw54xx_wdog_of_fixup(struct device_node *root, void *context) /* switch to the watchdog with internal reset capabilities */ np = of_find_node_by_name_address(root, "wdog@020c0000"); of_device_disable(np); + np = of_find_node_by_name_address(root, "watchdog@20c0000"); + of_device_disable(np); + np = of_find_node_by_name_address(root, "wdog@020bc000"); of_device_enable(np); + np = of_find_node_by_name_address(root, "watchdog@20bc000"); + of_device_enable(np); return 0; } diff --git a/arch/arm/boards/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg b/arch/arm/boards/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg index 8f155a88dd..cde49ef029 100644 --- a/arch/arm/boards/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg +++ b/arch/arm/boards/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> #include "ram-base.imxcfg" #include "quad_128x64.imxcfg" diff --git a/arch/arm/boards/gateworks-ventana/lowlevel.c b/arch/arm/boards/gateworks-ventana/lowlevel.c index 50386d8aed..db18b53139 100644 --- a/arch/arm/boards/gateworks-ventana/lowlevel.c +++ b/arch/arm/boards/gateworks-ventana/lowlevel.c @@ -2,7 +2,7 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/gk802/board.c b/arch/arm/boards/gk802/board.c index 2713d6e756..c4a90306e8 100644 --- a/arch/arm/boards/gk802/board.c +++ b/arch/arm/boards/gk802/board.c @@ -9,9 +9,9 @@ #include <envfs.h> #include <gpio.h> #include <init.h> -#include <mach/generic.h> -#include <mach/imx6-regs.h> -#include <mach/imx6.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx6.h> #include <mfd/imx6q-iomuxc-gpr.h> #include <linux/sizes.h> #include <of.h> diff --git a/arch/arm/boards/gk802/flash-header.imxcfg b/arch/arm/boards/gk802/flash-header.imxcfg index aa5aef554f..e77f4601cb 100644 --- a/arch/arm/boards/gk802/flash-header.imxcfg +++ b/arch/arm/boards/gk802/flash-header.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x10000000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 wm 32 MX6_IOM_DRAM_SDQS1 0x00000030 diff --git a/arch/arm/boards/gk802/lowlevel.c b/arch/arm/boards/gk802/lowlevel.c index 385ec3e737..7c56a6a1a6 100644 --- a/arch/arm/boards/gk802/lowlevel.c +++ b/arch/arm/boards/gk802/lowlevel.c @@ -2,7 +2,7 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/globalscale-guruplug/lowlevel.c b/arch/arm/boards/globalscale-guruplug/lowlevel.c index 964d3510ee..a54d848c04 100644 --- a/arch/arm/boards/globalscale-guruplug/lowlevel.c +++ b/arch/arm/boards/globalscale-guruplug/lowlevel.c @@ -4,12 +4,12 @@ #include <common.h> #include <linux/sizes.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> extern char __dtb_kirkwood_guruplug_server_plus_bb_start[]; -ENTRY_FUNCTION(start_globalscale_guruplug, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_globalscale_guruplug, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/globalscale-mirabox/lowlevel.c b/arch/arm/boards/globalscale-mirabox/lowlevel.c index 094792d461..da08e80d74 100644 --- a/arch/arm/boards/globalscale-mirabox/lowlevel.c +++ b/arch/arm/boards/globalscale-mirabox/lowlevel.c @@ -4,12 +4,12 @@ #include <common.h> #include <linux/sizes.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> extern char __dtb_armada_370_mirabox_bb_start[]; -ENTRY_FUNCTION(start_globalscale_mirabox, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_globalscale_mirabox, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/grinn-liteboard/board.c b/arch/arm/boards/grinn-liteboard/board.c index 3e69ea520a..6d390a5287 100644 --- a/arch/arm/boards/grinn-liteboard/board.c +++ b/arch/arm/boards/grinn-liteboard/board.c @@ -9,8 +9,8 @@ #include <common.h> #include <envfs.h> #include <init.h> -#include <mach/bbu.h> -#include <mach/imx6.h> +#include <mach/imx/bbu.h> +#include <mach/imx/imx6.h> #include <malloc.h> #include <mfd/imx6q-iomuxc-gpr.h> #include <of.h> @@ -25,7 +25,7 @@ static void bbu_register_handler_emmc(bool is_boot_source) { int emmc_boot_flag = 0, emmc_flag = 0; const char *bootpart; - struct device_d *dev; + struct device *dev; int ret; if (!is_boot_source) diff --git a/arch/arm/boards/grinn-liteboard/lowlevel.c b/arch/arm/boards/grinn-liteboard/lowlevel.c index d3ee212ca9..6851a678bc 100644 --- a/arch/arm/boards/grinn-liteboard/lowlevel.c +++ b/arch/arm/boards/grinn-liteboard/lowlevel.c @@ -4,6 +4,7 @@ /* Author: Marcin Niestroj <m.niestroj@grinn-global.com> */ #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <linux/sizes.h> #include <io.h> @@ -13,8 +14,8 @@ #include <asm/sections.h> #include <asm/cache.h> #include <asm/mmu.h> -#include <mach/esdctl.h> -#include <mach/imx6.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/imx6.h> static inline void setup_uart(void) { diff --git a/arch/arm/boards/guf-cupid/Makefile b/arch/arm/boards/guf-cupid/Makefile deleted file mode 100644 index 86a27f301d..0000000000 --- a/arch/arm/boards/guf-cupid/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Juergen Beisert <jbe@pengutronix.de> - -lwl-y += lowlevel.o -obj-y += board.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-guf-cupid diff --git a/arch/arm/boards/guf-cupid/board.c b/arch/arm/boards/guf-cupid/board.c deleted file mode 100644 index 0c62b573c9..0000000000 --- a/arch/arm/boards/guf-cupid/board.c +++ /dev/null @@ -1,340 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix -// SPDX-FileCopyrightText: 2009 Juergen Beisert <kernel@pengutronix.de>, Pengutronix - -/* Board support for the Garz+Fricke Cupid board */ - -#include <common.h> -#include <command.h> -#include <init.h> -#include <driver.h> -#include <environment.h> -#include <fs.h> -#include <envfs.h> -#include <mach/imx35-regs.h> -#include <asm/armlinux.h> -#include <io.h> -#include <gpio.h> -#include <partition.h> -#include <nand.h> -#include <generated/mach-types.h> -#include <mach/imx-nand.h> -#include <platform_data/eth-fec.h> -#include <fb.h> -#include <asm/mmu.h> -#include <mach/weim.h> -#include <mach/imx-ipu-fb.h> -#include <mach/imx-pll.h> -#include <mach/iomux-mx35.h> -#include <mach/devices-imx35.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_MII, -}; - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, - .flash_bbt = 1, -}; - -static struct fb_videomode guf_cupid_fb_mode = { - /* 800x480 @ 70 Hz */ - .name = "CPT CLAA070LC0JCT", - .refresh = 70, - .xres = 800, - .yres = 480, - .pixclock = 30761, - .left_margin = 24, - .right_margin = 47, - .upper_margin = 5, - .lower_margin = 3, - .hsync_len = 24, - .vsync_len = 3, - .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_CLK_INVERT | - FB_SYNC_OE_ACT_HIGH, - .vmode = FB_VMODE_NONINTERLACED, -}; - -#define GPIO_LCD_ENABLE (2 * 32 + 24) -#define GPIO_LCD_BACKLIGHT (0 * 32 + 19) - -static void cupid_fb_enable(int enable) -{ - if (enable) { - gpio_direction_output(GPIO_LCD_ENABLE, 1); - mdelay(100); - gpio_direction_output(GPIO_LCD_BACKLIGHT, 1); - } else { - gpio_direction_output(GPIO_LCD_BACKLIGHT, 0); - mdelay(100); - gpio_direction_output(GPIO_LCD_ENABLE, 0); - } -} - -static struct imx_ipu_fb_platform_data ipu_fb_data = { - .mode = &guf_cupid_fb_mode, - .num_modes = 1, - .bpp = 16, - .enable = cupid_fb_enable, -}; - -static int cupid_mmu_init(void) -{ - l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000); - - return 0; -} -postmmu_initcall(cupid_mmu_init); - -static int cupid_devices_init(void) -{ - uint32_t reg; - - gpio_direction_output(GPIO_LCD_ENABLE, 0); - gpio_direction_output(GPIO_LCD_BACKLIGHT, 0); - - reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_RCSR); - /* some fuses provide us vital information about connected hardware */ - if (reg & 0x20000000) - nand_info.width = 2; /* 16 bit */ - else - nand_info.width = 1; /* 8 bit */ - - imx35_add_fec(&fec_info); - imx35_add_nand(&nand_info); - - devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - devfs_add_partition("nand0", 0x40000, 0x80000, DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); - - imx35_add_fb(&ipu_fb_data); - imx35_add_mmc0(NULL); - - armlinux_set_architecture(MACH_TYPE_GUF_CUPID); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_guf_cupid); - - return 0; -} - -device_initcall(cupid_devices_init); - -static iomux_v3_cfg_t cupid_pads[] = { - /* UART1 */ - MX35_PAD_CTS1__UART1_CTS, - MX35_PAD_RTS1__UART1_RTS, - MX35_PAD_TXD1__UART1_TXD_MUX, - MX35_PAD_RXD1__UART1_RXD_MUX, - /* UART2 */ - MX35_PAD_CTS2__UART2_CTS, - MX35_PAD_RTS2__UART2_RTS, - MX35_PAD_TXD2__UART2_TXD_MUX, - MX35_PAD_RXD2__UART2_RXD_MUX, - /* FEC */ - MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, - MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, - MX35_PAD_FEC_RX_DV__FEC_RX_DV, - MX35_PAD_FEC_COL__FEC_COL, - MX35_PAD_FEC_RDATA0__FEC_RDATA_0, - MX35_PAD_FEC_TDATA0__FEC_TDATA_0, - MX35_PAD_FEC_TX_EN__FEC_TX_EN, - MX35_PAD_FEC_MDC__FEC_MDC, - MX35_PAD_FEC_MDIO__FEC_MDIO, - MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, - MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, - MX35_PAD_FEC_CRS__FEC_CRS, - MX35_PAD_FEC_RDATA1__FEC_RDATA_1, - MX35_PAD_FEC_TDATA1__FEC_TDATA_1, - MX35_PAD_FEC_RDATA2__FEC_RDATA_2, - MX35_PAD_FEC_TDATA2__FEC_TDATA_2, - MX35_PAD_FEC_RDATA3__FEC_RDATA_3, - MX35_PAD_FEC_TDATA3__FEC_TDATA_3, - /* I2C1 */ - MX35_PAD_I2C1_CLK__I2C1_SCL, - MX35_PAD_I2C1_DAT__I2C1_SDA, - /* Display */ - MX35_PAD_LD0__IPU_DISPB_DAT_0, - MX35_PAD_LD1__IPU_DISPB_DAT_1, - MX35_PAD_LD2__IPU_DISPB_DAT_2, - MX35_PAD_LD3__IPU_DISPB_DAT_3, - MX35_PAD_LD4__IPU_DISPB_DAT_4, - MX35_PAD_LD5__IPU_DISPB_DAT_5, - MX35_PAD_LD6__IPU_DISPB_DAT_6, - MX35_PAD_LD7__IPU_DISPB_DAT_7, - MX35_PAD_LD8__IPU_DISPB_DAT_8, - MX35_PAD_LD9__IPU_DISPB_DAT_9, - MX35_PAD_LD10__IPU_DISPB_DAT_10, - MX35_PAD_LD11__IPU_DISPB_DAT_11, - MX35_PAD_LD12__IPU_DISPB_DAT_12, - MX35_PAD_LD13__IPU_DISPB_DAT_13, - MX35_PAD_LD14__IPU_DISPB_DAT_14, - MX35_PAD_LD15__IPU_DISPB_DAT_15, - MX35_PAD_LD16__IPU_DISPB_DAT_16, - MX35_PAD_LD17__IPU_DISPB_DAT_17, - MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC, - MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK, - MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY, - MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC, - MX35_PAD_LD18__GPIO3_24, /* LCD enable */ - MX35_PAD_CSPI1_SS1__GPIO1_19, /* LCD backligtht PWM */ - /* USB Host*/ - MX35_PAD_MLB_CLK__GPIO3_3, /* USB Host PWR */ - MX35_PAD_MLB_DAT__GPIO3_4, /* USB Host Overcurrent */ - /* USB OTG */ - MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR, - MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC, - /* SSI */ - MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS, - MX35_PAD_STXD4__AUDMUX_AUD4_TXD, - MX35_PAD_SRXD4__AUDMUX_AUD4_RXD, - MX35_PAD_SCK4__AUDMUX_AUD4_TXC, - /* UCB1400 IRQ */ - MX35_PAD_ATA_INTRQ__GPIO2_29, - /* Speaker On */ - MX35_PAD_LD20__GPIO3_26, - /* LEDs */ - MX35_PAD_TX1__GPIO1_14, - /* ESDHC1 */ - MX35_PAD_SD1_CMD__ESDHC1_CMD, - MX35_PAD_SD1_CLK__ESDHC1_CLK, - MX35_PAD_SD1_DATA0__ESDHC1_DAT0, - MX35_PAD_SD1_DATA1__ESDHC1_DAT1, - MX35_PAD_SD1_DATA2__ESDHC1_DAT2, - MX35_PAD_SD1_DATA3__ESDHC1_DAT3, - /* ESDHC1 CD */ - MX35_PAD_ATA_DATA5__GPIO2_18, - /* ESDHC1 WP */ - MX35_PAD_ATA_DATA6__GPIO2_19, -}; - -static int cupid_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(cupid_pads, ARRAY_SIZE(cupid_pads)); - - barebox_set_model("Garz & Fricke CUPID"); - barebox_set_hostname("cupid"); - - imx35_add_uart0(); - - return 0; -} - -console_initcall(cupid_console_init); - -static int cupid_core_setup(void) -{ - u32 tmp; - - /* AIPS setup - Only setup MPROTx registers. The PACR default values are good.*/ - /* - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - writel(0x77777777, MX35_AIPS1_BASE_ADDR); - writel(0x77777777, MX35_AIPS1_BASE_ADDR + 0x4); - writel(0x77777777, MX35_AIPS2_BASE_ADDR); - writel(0x77777777, MX35_AIPS2_BASE_ADDR + 0x4); - - /* - * Clear the on and off peripheral modules Supervisor Protect bit - * for SDMA to access them. Did not change the AIPS control registers - * (offset 0x20) access type - */ - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x4C); - tmp = readl(MX35_AIPS1_BASE_ADDR + 0x50); - tmp &= 0x00FFFFFF; - writel(tmp, MX35_AIPS1_BASE_ADDR + 0x50); - - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x4C); - tmp = readl(MX35_AIPS2_BASE_ADDR + 0x50); - tmp &= 0x00FFFFFF; - writel(tmp, MX35_AIPS2_BASE_ADDR + 0x50); - - /* MAX (Multi-Layer AHB Crossbar Switch) setup */ - - /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ -#define MAX_PARAM1 0x00302154 - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x0); /* for S0 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x100); /* for S1 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x200); /* for S2 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x300); /* for S3 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x400); /* for S4 */ - - /* SGPCR - always park on last master */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x10); /* for S0 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x110); /* for S1 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x210); /* for S2 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x310); /* for S3 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x410); /* for S4 */ - - /* MGPCR - restore default values */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x800); /* for M0 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x900); /* for M1 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xa00); /* for M2 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xb00); /* for M3 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xc00); /* for M4 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xd00); /* for M5 */ - - /* CS0: NOR Flash */ - imx35_setup_weimcs(0, 0x0000DCF6, 0x444A4541, 0x44443302); - - /* - * M3IF Control Register (M3IFCTL) - * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 - * MRRP[1] = MAX1 not on priority list (0 << 0) = 0x00000000 - * MRRP[2] = L2CC1 not on priority list (0 << 0) = 0x00000000 - * MRRP[3] = USB not on priority list (0 << 0) = 0x00000000 - * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 - * MRRP[5] = GPU not on priority list (0 << 0) = 0x00000000 - * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 - * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 - * ------------ - * 0x00000040 - */ - writel(0x40, MX35_M3IF_BASE_ADDR); - - return 0; -} - -core_initcall(cupid_core_setup); - -static int do_cpufreq(int argc, char *argv[]) -{ - unsigned long freq; - - if (argc != 2) - return COMMAND_ERROR_USAGE; - - freq = simple_strtoul(argv[1], NULL, 0); - - switch (freq) { - case 399: - writel(MPCTL_PARAM_399, MX35_CCM_BASE_ADDR + MX35_CCM_MPCTL); - break; - case 532: - writel(MPCTL_PARAM_532, MX35_CCM_BASE_ADDR + MX35_CCM_MPCTL); - break; - default: - return COMMAND_ERROR_USAGE; - } - - printf("Switched CPU frequency to %luMHz\n", freq); - - return 0; -} - -BAREBOX_CMD_START(cpufreq) - .cmd = do_cpufreq, - BAREBOX_CMD_DESC("adjust CPU frequency") - BAREBOX_CMD_OPTS("399|532") - BAREBOX_CMD_GROUP(CMD_GRP_HWMANIP) -BAREBOX_CMD_END diff --git a/arch/arm/boards/guf-cupid/defaultenv-guf-cupid/config b/arch/arm/boards/guf-cupid/defaultenv-guf-cupid/config deleted file mode 100644 index dc289b39f2..0000000000 --- a/arch/arm/boards/guf-cupid/defaultenv-guf-cupid/config +++ /dev/null @@ -1,50 +0,0 @@ -#!/bin/sh - -eth0.serverip= -user= - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'nfs', 'tftp', 'nor' or 'nand' -kernel_loc=tftp -# can be either 'net', 'nor', 'nand' or 'initrd' -rootfs_loc=net - -# can be either 'jffs2' or 'ubifs' -rootfs_type=ubifs -rootfsimage=root-${global.hostname}.$rootfs_type - -kernelimage=zImage-${global.hostname} -#kernelimage=uImage-${global.hostname} -#kernelimage=Image-${global.hostname} -#kernelimage=Image-${global.hostname}.lzo - -if [ -n $user ]; then - kernelimage="$user"-"$kernelimage" - nfsroot="$eth0.serverip:/home/$user/nfsroot/${global.hostname}" - rootfsimage="$user"-"$rootfsimage" -else - nfsroot="$eth0.serverip:/path/to/nfs/root" -fi - -autoboot_timeout=3 - -bootargs="console=ttymxc0,115200" - -bootargs="$bootargs video=mx3fb:CTP-CLAA070LC0ACW" - -nand_parts="256k(barebox)ro,512k(bareboxenv),2M(kernel),-(root)" -nand_device=mxc_nand -rootfs_mtdblock_nand=3 - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " - diff --git a/arch/arm/boards/guf-cupid/lowlevel.c b/arch/arm/boards/guf-cupid/lowlevel.c deleted file mode 100644 index 6b6590f5d8..0000000000 --- a/arch/arm/boards/guf-cupid/lowlevel.c +++ /dev/null @@ -1,301 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - -#include <common.h> -#include <init.h> -#include <mach/imx35-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> -#include <asm/cache-l2x0.h> -#include <io.h> -#include <mach/imx-nand.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <asm/sections.h> -#include <asm-generic/memory_layout.h> -#include <asm/system.h> - -#define SDRAM_MODE_BL_8 0x0003 -#define SDRAM_MODE_BSEQ 0x0000 -#define SDRAM_MODE_CL_3 0x0030 -#define MDDR_DS_HALF 0x20 -#define SDRAM_COMPARE_CONST1 0x55555555 -#define SDRAM_COMPARE_CONST2 0xaaaaaaaa - -static void __bare_init noinline setup_sdram(u32 memsize, u32 mode, u32 sdram_addr) -{ - volatile int loop; - void *r9 = (void *)MX35_CSD0_BASE_ADDR; - u32 r11 = 0xda; /* dummy constant */ - u32 r1, r0; - - /* disable second SDRAM region to save power */ - r1 = readl(MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL1); - r1 &= ~ESDCTL0_SDE; - writel(r1, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL1); - - mode |= ESDMISC_RST | ESDMISC_MDDR_DL_RST; - writel(mode, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); - - mode &= ~(ESDMISC_RST | ESDMISC_MDDR_DL_RST); - writel(mode, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); - - /* wait for esdctl reset */ - for (loop = 0; loop < 0x20000; loop++); - - r1 = ESDCFGx_tXP_4 | ESDCFGx_tWTR_1 | - ESDCFGx_tRP_3 | ESDCFGx_tMRD_2 | - ESDCFGx_tWR_1_2 | ESDCFGx_tRAS_6 | - ESDCFGx_tRRD_2 | ESDCFGx_tCAS_3 | - ESDCFGx_tRCD_3 | ESDCFGx_tRC_20; - - writel(r1, MX35_ESDCTL_BASE_ADDR + IMX_ESDCFG0); - - /* enable SDRAM controller */ - writel(memsize | ESDCTL0_SMODE_NORMAL, - MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - - /* Micron Datasheet Initialization Step 3: Wait 200us before first command */ - for (loop = 0; loop < 1000; loop++); - - /* Micron Datasheet Initialization Step 4: PRE CHARGE ALL */ - writel(memsize | ESDCTL0_SMODE_PRECHARGE, - MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(r11, sdram_addr); - - /* Micron Datasheet Initialization Step 5: NOP for tRP (at least 22.5ns) - * The CPU is not fast enough to cause a problem here - */ - - /* Micron Datasheet Initialization Step 6: 2 AUTO REFRESH and tRFC NOP - * (at least 140ns) - */ - writel(memsize | ESDCTL0_SMODE_AUTO_REFRESH, - MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(r11, r9); /* AUTO REFRESH #1 */ - - for (loop = 0; loop < 3; loop++); /* ~140ns delay at 532MHz */ - - writeb(r11, r9); /* AUTO REFRESH #2 */ - - for (loop = 0; loop < 3; loop++); /* ~140ns delay at 532MHz */ - - /* Micron Datasheet Initialization Step 7: LOAD MODE REGISTER */ - writel(memsize | ESDCTL0_SMODE_LOAD_MODE, - MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(r11, r9 + (SDRAM_MODE_BL_8 | SDRAM_MODE_BSEQ | SDRAM_MODE_CL_3)); - - /* Micron Datasheet Initialization Step 8: tMRD = 2 tCK NOP - * (The memory controller will take care of this delay) - */ - - /* Micron Datasheet Initialization Step 9: LOAD MODE REGISTER EXTENDED */ - writeb(r11, 0x84000000 | MDDR_DS_HALF); /*we assume 14 Rows / 10 Cols here */ - - /* Micron Datasheet Initialization Step 9: tMRD = 2 tCK NOP - * (The memory controller will take care of this delay) - */ - - /* Now configure SDRAM-Controller and check that it works */ - writel(memsize | ESDCTL0_BL | ESDCTL0_REF4, - MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - - /* Freescale asks for first access to be a write to properly - * initialize DQS pin-state and keepers - */ - writel(0xdeadbeef, r9); - - /* test that the RAM is in fact working */ - writel(SDRAM_COMPARE_CONST1, r9); - writel(SDRAM_COMPARE_CONST2, r9 + 0x4); - - if (readl(r9) != SDRAM_COMPARE_CONST1) - while (1); - - /* Verify that the correct row and coloumn is selected */ - - /* So far we asssumed that we have 14 rows, verify this */ - writel(SDRAM_COMPARE_CONST1, r9); - writel(SDRAM_COMPARE_CONST2, r9 + (1 << 25)); - - /* if both value are identical, we don't have 14 rows. assume 13 instead */ - if (readl(r9) == readl(r9 + (1 << 25))) { - r0 = readl(MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - r0 &= ~ESDCTL0_ROW_MASK; - r0 |= ESDCTL0_ROW13; - writel(r0, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - } - - /* So far we asssumed that we have 10 columns, verify this */ - writel(SDRAM_COMPARE_CONST1, r9); - writel(SDRAM_COMPARE_CONST2, r9 + (1 << 11)); - - /* if both value are identical, we don't have 10 cols. assume 9 instead */ - if (readl(r9) == readl(r9 + (1 << 11))) { - r0 = readl(MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - r0 &= ~ESDCTL0_COL_MASK; - r0 |= ESDCTL0_COL9; - writel(r0, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - } -} - -#define BRANCH_PREDICTION_ENABLE -#define UNALIGNED_ACCESS_ENABLE -#define LOW_INT_LATENCY_ENABLE - -void __bare_init __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - void *iomuxc_base = (void *)MX35_IOMUXC_BASE_ADDR; - int i; - - arm_cpu_lowlevel_init(); - - arm_setup_stack(0x10000000 + 128 * 1024); - - /* - * ARM1136 init - * - invalidate I/D cache/TLB and drain write buffer; - * - invalidate L2 cache - * - unaligned access - * - branch predictions - */ -#ifdef TURN_OFF_IMPRECISE_ABORT - __asm__ __volatile__("mrs %0, cpsr":"=r"(r0)); - r0 &= ~0x100; - __asm__ __volatile__("msr cpsr, %0" : : "r"(r0)); -#endif - /* ensure L1 caches and MMU are turned-off for now */ - r1 = get_cr(); - r1 &= ~(CR_I | CR_M | CR_C); - - /* setup core features */ - __asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1":"=r"(r0)); -#ifdef BRANCH_PREDICTION_ENABLE - r0 |= 7; - r1 |= CR_Z; -#else - r0 &= ~7; - r1 &= ~CR_Z; -#endif - __asm__ __volatile__("mcr p15, 0, r0, c1, c0, 1" : : "r"(r0)); - -#ifdef UNALIGNED_ACCESS_ENABLE - r1 |= CR_U; -#else - r1 &= ~CR_U; -#endif - -#ifdef LOW_INT_LATENCY_ENABLE - r1 |= CR_FI; -#else - r1 &= ~CR_FI; -#endif - set_cr(r1); - - r0 = 0; - __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 6" : : "r"(r0)); - - /* invalidate I cache and D cache */ - __asm__ __volatile__("mcr p15, 0, r0, c7, c7, 0" : : "r"(r0)); - /* invalidate TLBs */ - __asm__ __volatile__("mcr p15, 0, r0, c8, c7, 0" : : "r"(r0)); - /* Drain the write buffer */ - __asm__ __volatile__("mcr p15, 0, r0, c7, c10, 4" : : "r"(r0)); - - /* Also setup the Peripheral Port Remap register inside the core */ - r0 = 0x40000015; /* start from AIPS 2GB region */ - __asm__ __volatile__("mcr p15, 0, r0, c15, c2, 4" : : "r"(r0)); - -#define WDOG_WMCR 0x8 - /* silence reset WDOG */ - writew(0, MX35_WDOG_BASE_ADDR + WDOG_WMCR); - - /* Skip SDRAM initialization if we run from RAM */ - r0 = get_pc(); - if (r0 > 0x80000000 && r0 < 0x90000000) - goto out; - - /* Configure drive strength */ - - /* Configure DDR-pins to correct mode */ - r0 = 0x00001800; - writel(r0, iomuxc_base + 0x794); - writel(r0, iomuxc_base + 0x798); - writel(r0, iomuxc_base + 0x79c); - writel(r0, iomuxc_base + 0x7a0); - writel(r0, iomuxc_base + 0x7a4); - - /* Set drive strength for DDR-pins */ - for (i = 0x368; i <= 0x4c8; i += 4) { - r0 = readl(iomuxc_base + i); - r0 &= ~0x6; - r0 |= 0x2; - writel(r0, iomuxc_base + i); - if (i == 0x468) - i = 0x4a4; - } - - r0 = readl(iomuxc_base + 0x480); - r0 &= ~0x6; - r0 |= 0x2; - writel(r0, iomuxc_base + 0x480); - - r0 = readl(iomuxc_base + 0x4b8); - r0 &= ~0x6; - r0 |= 0x2; - writel(r0, iomuxc_base + 0x4b8); - - /* Configure static chip-selects */ - r0 = readl(iomuxc_base + 0x000); - r0 &= ~1; /* configure CS2/CSD0 for SDRAM */ - writel(r0, iomuxc_base + 0x000); - - /* start-up code doesn't need any static chip-select. - * Leave their initialization to high-level code that - * can initialize them depending on the baseboard. - */ - - /* Configure clocks */ - - /* setup cpu/bus clocks */ - writel(0x003f4208, MX35_CCM_BASE_ADDR + MX35_CCM_CCMR); - - /* configure MPLL */ - writel(MPCTL_PARAM_532, MX35_CCM_BASE_ADDR + MX35_CCM_MPCTL); - - /* configure PPLL */ - writel(PPCTL_PARAM_300, MX35_CCM_BASE_ADDR + MX35_CCM_PPCTL); - - /* configure core dividers */ - r0 = MX35_PDR0_CCM_PER_AHB(1) | MX35_PDR0_HSP_PODF(2); - - writel(r0, MX35_CCM_BASE_ADDR + MX35_CCM_PDR0); - - /* configure clock-gates */ - r0 = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); - r0 |= 0x3 << MX35_CCM_CGR0_EPIT1_SHIFT; - writel(r0, MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); - - r0 = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); - r0 |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; - r0 |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; - writel(r0, MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); - - /* Configure SDRAM */ - /* Try 32-Bit 256 MB DDR memory */ - r0 = ESDCTL0_SDE | ESDCTL0_ROW14 | ESDCTL0_COL10 | ESDCTL0_DSIZ_31_0; /* 1024 MBit DDR-SDRAM */ - setup_sdram(r0, ESDMISC_MDDR_EN, 0x80000f00); - - if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND)) { - /* Speed up NAND controller by adjusting the NFC divider */ - r0 = readl(MX35_CCM_BASE_ADDR + MX35_CCM_PDR4); - r0 &= ~(0xf << 28); - r0 |= 0x1 << 28; - writel(r0, MX35_CCM_BASE_ADDR + MX35_CCM_PDR4); - - imx35_barebox_boot_nand_external(); - } - -out: - imx35_barebox_entry(NULL); -} diff --git a/arch/arm/boards/guf-neso/Makefile b/arch/arm/boards/guf-neso/Makefile deleted file mode 100644 index 8d304e4afb..0000000000 --- a/arch/arm/boards/guf-neso/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -lwl-y += lowlevel.o -obj-y += board.o -obj-y += pll_init.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-guf-neso diff --git a/arch/arm/boards/guf-neso/board.c b/arch/arm/boards/guf-neso/board.c deleted file mode 100644 index 9eb862db64..0000000000 --- a/arch/arm/boards/guf-neso/board.c +++ /dev/null @@ -1,319 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2010 Sascha Hauer, Pengutronix - -#include <common.h> -#include <net.h> -#include <init.h> -#include <environment.h> -#include <platform_data/eth-fec.h> -#include <notifier.h> -#include <partition.h> -#include <gpio.h> -#include <fs.h> -#include <envfs.h> -#include <fcntl.h> -#include <nand.h> -#include <command.h> -#include <spi/spi.h> -#include <usb/ulpi.h> - -#include <io.h> -#include <asm/mmu.h> -#include <asm/armlinux.h> -#include <generated/mach-types.h> - -#include <mach/spi.h> -#include <mach/imx27-regs.h> -#include <mach/iomux-mx27.h> -#include <mach/imx-nand.h> -#include <mach/imx-pll.h> -#include <mach/imxfb.h> -#include <mach/devices-imx27.h> - -/* two pins are controlling the CS signals to the USB phys */ -#define USBH2_PHY_CS_GPIO (GPIO_PORTF + 20) -#define OTG_PHY_CS_GPIO (GPIO_PORTF + 19) - -/* two pins are controlling the display and its backlight */ -#define LCD_POWER_GPIO (GPIO_PORTF + 18) -#define BACKLIGHT_POWER_GPIO (GPIO_PORTE + 5) - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_MII, - .phy_addr = 31, -}; - -static struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, - .flash_bbt = 1, -}; - -static struct fb_videomode imxfb_mode = { - .name = "CPT CLAA070LC0JCT", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = KHZ2PICOS(27000), - .hsync_len = 1, /* DE only sync */ - .left_margin = 50, - .right_margin = 50, - .vsync_len = 1, /* DE only sync */ - .upper_margin = 10, - .lower_margin = 10, -}; - -static void neso_fb_enable(int enable) -{ - gpio_direction_output(LCD_POWER_GPIO, enable); - gpio_direction_output(BACKLIGHT_POWER_GPIO, enable); -} - -static struct imx_fb_platform_data neso_fb_data = { - .mode = &imxfb_mode, - .num_modes = 1, - .pwmr = 0x00000000, /* doesn't matter */ - .lscr1 = 0x00120300, /* doesn't matter */ - /* dynamic mode -> using the reset values (as recommended in the datasheet) */ - .dmacr = (0 << 31) | (4 << 16) | 96, - .enable = neso_fb_enable, - .framebuffer_ovl = (void *)0xa7f00000, - /* - * - TFT style panel - * - clk enabled while idle - * - clock inverted - * - data not inverted - * - data enable high active - */ - .pcr = PCR_TFT | - PCR_COLOR | - PCR_PBSIZ_8 | - PCR_BPIX_16 | - PCR_CLKPOL | - PCR_SCLK_SEL | - PCR_LPPOL | - PCR_FLMPOL, - .bpp = 16, /* TODO 32 bit does not work: The 'green' component is lacking in this mode */ -}; - -#if defined(CONFIG_USB) && defined(CONFIG_USB_ULPI) -static void neso_usbh_init(void) -{ - uint32_t temp; - - temp = readl(MX27_USB_OTG_BASE_ADDR + 0x600); - temp &= ~((3 << 21) | 1); - temp |= (1 << 5) | (1 << 16) | (1 << 19) | (1 << 20) | (1<<11); - writel(temp, MX27_USB_OTG_BASE_ADDR + 0x600); - - temp = readl(MX27_USB_OTG_BASE_ADDR + 0x584); - temp &= ~(3 << 30); - temp |= 2 << 30; - writel(temp, MX27_USB_OTG_BASE_ADDR + 0x584); - - mdelay(10); - - gpio_set_value(USBH2_PHY_CS_GPIO, 0); - mdelay(10); - ulpi_setup((void *)(MX27_USB_OTG_BASE_ADDR + 0x570), 1); - add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, - MX27_USB_OTG_BASE_ADDR + 0x400, NULL); -} -#else -static void neso_usbh_init(void) { } -#endif - -static int neso_devices_init(void) -{ - int i; - - unsigned int mode[] = { - /* UART1 */ - PE12_PF_UART1_TXD, - PE13_PF_UART1_RXD, - PE14_PF_UART1_CTS, - PE15_PF_UART1_RTS, - /* FEC */ - PD0_AIN_FEC_TXD0, - PD1_AIN_FEC_TXD1, - PD2_AIN_FEC_TXD2, - PD3_AIN_FEC_TXD3, - PD4_AOUT_FEC_RX_ER, - PD5_AOUT_FEC_RXD1, - PD6_AOUT_FEC_RXD2, - PD7_AOUT_FEC_RXD3, - PD8_AF_FEC_MDIO, - PD9_AIN_FEC_MDC, - PD10_AOUT_FEC_CRS, - PD11_AOUT_FEC_TX_CLK, - PD12_AOUT_FEC_RXD0, - PD13_AOUT_FEC_RX_DV, - PD14_AOUT_FEC_RX_CLK, - PD15_AOUT_FEC_COL, - PD16_AIN_FEC_TX_ER, - PF23_AIN_FEC_TX_EN, - - /* SSI1 connected in AC97 style */ - PC20_PF_SSI1_FS, - PC21_PF_SSI1_RXD, - PC22_PF_SSI1_TXD, - PC23_PF_SSI1_CLK, - - /* LED 1 */ - (GPIO_PORTB | 15 | GPIO_GPIO | GPIO_OUT), - /* LED 2 */ - (GPIO_PORTB | 16 | GPIO_GPIO | GPIO_OUT), - /* CTOUCH reset */ - (GPIO_PORTB | 17 | GPIO_GPIO | GPIO_OUT), - /* CTOUCH IRQ */ - (GPIO_PORTB | 14 | GPIO_GPIO | GPIO_IN), - /* RTC IRQ */ - (GPIO_PORTF | 14 | GPIO_GPIO | GPIO_IN), - /* SD change card detection */ - (GPIO_PORTF | 17 | GPIO_GPIO | GPIO_IN), - /* SDHC1*/ - PE18_PF_SD1_D0, - PE19_PF_SD1_D1, - PE20_PF_SD1_D2, - PE21_PF_SD1_D3, - PE22_PF_SD1_CMD, - PE23_PF_SD1_CLK, - /* I2C1 */ - PD17_PF_I2C_DATA, - PD18_PF_I2C_CLK, - /* I2C2, for CTOUCH */ - PC5_PF_I2C2_SDA, - PC6_PF_I2C2_SCL, - - /* Connected to: Both USB phys and ethernet phy FIXME 1 = RESET? */ - PE17_PF_RESET_OUT, - - /* USB host */ - (USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT), - PA0_PF_USBH2_CLK, - PA1_PF_USBH2_DIR, - PA3_PF_USBH2_NXT, - PA4_PF_USBH2_STP, - PD22_AF_USBH2_DATA0, - PD24_AF_USBH2_DATA1, - PD23_AF_USBH2_DATA2, - PD20_AF_USBH2_DATA3, - PD19_AF_USBH2_DATA4, - PD26_AF_USBH2_DATA5, - PD21_AF_USBH2_DATA6, - PA2_PF_USBH2_DATA7, - - /* USB OTG */ - (OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT), - PE24_PF_USBOTG_CLK, - PE2_PF_USBOTG_DIR, - PE0_PF_USBOTG_NXT, - PE1_PF_USBOTG_STP, - PC9_PF_USBOTG_DATA0, - PC11_PF_USBOTG_DATA1, - PC10_PF_USBOTG_DATA2, - PC13_PF_USBOTG_DATA3, - PC12_PF_USBOTG_DATA4, - PC7_PF_USBOTG_DATA5, - PC8_PF_USBOTG_DATA6, - PE25_PF_USBOTG_DATA7, - - /* Display signals */ - (LCD_POWER_GPIO | GPIO_GPIO | GPIO_OUT), /* LCD power: 1 = LCD on */ - PA5_PF_LSCLK, - PA6_PF_LD0, - PA7_PF_LD1, - PA8_PF_LD2, - PA9_PF_LD3, - PA10_PF_LD4, - PA11_PF_LD5, - PA12_PF_LD6, - PA13_PF_LD7, - PA14_PF_LD8, - PA15_PF_LD9, - PA16_PF_LD10, - PA17_PF_LD11, - PA18_PF_LD12, - PA19_PF_LD13, - PA20_PF_LD14, - PA21_PF_LD15, - PA22_PF_LD16, - PA23_PF_LD17, - PA31_PF_OE_ACD, /* DE */ - - /* Backlight PWM (Use as gpio) */ - (BACKLIGHT_POWER_GPIO | GPIO_GPIO | GPIO_OUT), - }; - - /* reset the chip select lines to the USB/OTG phys to avoid any hang */ - gpio_direction_output(OTG_PHY_CS_GPIO, 1); - gpio_direction_output(USBH2_PHY_CS_GPIO, 1); - - /* initialize gpios */ - for (i = 0; i < ARRAY_SIZE(mode); i++) - imx27_gpio_mode(mode[i]); - - imx27_add_nand(&nand_info); - imx27_add_fb(&neso_fb_data); - - neso_usbh_init(); - - imx27_add_fec(&fec_info); - - devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - - devfs_add_partition("nand0", 0x40000, 0x80000, DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); - - armlinux_set_architecture(MACH_TYPE_NESO); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_guf_neso); - - return 0; -} - -device_initcall(neso_devices_init); - -static int neso_console_init(void) -{ - barebox_set_model("Garz & Fricke NESO"); - barebox_set_hostname("neso"); - - imx27_add_uart0(); - - return 0; -} - -console_initcall(neso_console_init); - -extern void *neso_pll_init, *neso_pll_init_end; - -static int neso_pll(void) -{ - void *vram = (void *)0xffff4c00; - void (*pllfunc)(void) = vram; - - printf("initialising PLLs\n"); - - memcpy(vram, &neso_pll_init, 0x100); - - console_flush(); - - pllfunc(); - - /* clock gating enable */ - writel(0x00050f08, MX27_SYSCTRL_BASE_ADDR + MX27_GPCR); - - writel(0x130410c3, MX27_CCM_BASE_ADDR + MX27_PCDR0); - writel(0x09030911, MX27_CCM_BASE_ADDR + MX27_PCDR1); - - /* Clocks have changed. Notify clients */ - clock_notifier_call_chain(); - - return 0; -} - -late_initcall(neso_pll); - diff --git a/arch/arm/boards/guf-neso/defaultenv-guf-neso/config b/arch/arm/boards/guf-neso/defaultenv-guf-neso/config deleted file mode 100644 index bd44a555d9..0000000000 --- a/arch/arm/boards/guf-neso/defaultenv-guf-neso/config +++ /dev/null @@ -1,47 +0,0 @@ -#!/bin/sh - -eth0.serverip= -user= - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'nfs', 'tftp', 'nor' or 'nand' -kernel_loc=tftp -# can be either 'net', 'nor', 'nand' or 'initrd' -rootfs_loc=net - -# can be either 'jffs2' or 'ubifs' -rootfs_type=ubifs -rootfsimage=root-${global.hostname}.$rootfs_type - -kernelimage=zImage-${global.hostname} -#kernelimage=uImage-${global.hostname} -#kernelimage=Image-${global.hostname} -#kernelimage=Image-${global.hostname}.lzo - -if [ -n $user ]; then - kernelimage="$user"-"$kernelimage" - nfsroot="$eth0.serverip:/home/$user/nfsroot/${global.hostname}" - rootfsimage="$user"-"$rootfsimage" -else - nfsroot="$eth0.serverip:/path/to/nfs/root" -fi - -autoboot_timeout=3 - -bootargs="console=ttymxc0,115200" - -nand_parts="256k(barebox)ro,512k(bareboxenv),2M(kernel),-(root)" -rootfs_mtdblock_nand=3 - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " - diff --git a/arch/arm/boards/guf-neso/lowlevel.c b/arch/arm/boards/guf-neso/lowlevel.c deleted file mode 100644 index df91bc329f..0000000000 --- a/arch/arm/boards/guf-neso/lowlevel.c +++ /dev/null @@ -1,81 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - -#include <common.h> -#include <init.h> -#include <mach/imx27-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> -#include <asm/cache-l2x0.h> -#include <io.h> -#include <mach/imx-nand.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <asm/system.h> -#include <asm/sections.h> -#include <asm-generic/memory_layout.h> - -#define ESDCTL0_VAL (ESDCTL0_SDE | ESDCTL0_ROW13 | ESDCTL0_COL10) - -void __bare_init __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - uint32_t r; - int i; - - arm_cpu_lowlevel_init(); - - arm_setup_stack(MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE); - - /* ahb lite ip interface */ - writel(0x20040304, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR0); - writel(0xDFFBFCFB, MX27_AIPI_BASE_ADDR + MX27_AIPI1_PSR1); - writel(0x00000000, MX27_AIPI_BASE_ADDR + MX27_AIPI2_PSR0); - writel(0xFFFFFFFF, MX27_AIPI_BASE_ADDR + MX27_AIPI2_PSR1); - - /* Skip SDRAM initialization if we run from RAM */ - r = get_pc(); - if (r > 0xa0000000 && r < 0xb0000000) - goto out; - - /* - * DDR on CSD0 - */ - /* Enable DDR SDRAM operation */ - writel(0x00000008, MX27_ESDCTL_BASE_ADDR + IMX_ESDMISC); - - /* Set the driving strength */ - writel(0x55555555, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(3)); - writel(0x55555555, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(5)); - writel(0x55555555, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(6)); - writel(0x00005005, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(7)); - writel(0x15555555, MX27_SYSCTRL_BASE_ADDR + MX27_DSCR(8)); - - /* Initial reset */ - writel(0x00000004, MX27_ESDCTL_BASE_ADDR + IMX_ESDMISC); - writel(0x006ac73a, MX27_ESDCTL_BASE_ADDR + IMX_ESDCFG0); - - /* precharge CSD0 all banks */ - writel(ESDCTL0_VAL | ESDCTL0_SMODE_PRECHARGE, - MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writel(0x00000000, 0xA0000F00); /* CSD0 precharge address (A10 = 1) */ - writel(ESDCTL0_VAL | ESDCTL0_SMODE_AUTO_REFRESH, - MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - - for (i = 0; i < 8; i++) - writel(0, 0xa0000f00); - - writel(ESDCTL0_VAL | ESDCTL0_SMODE_LOAD_MODE, - MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - - writeb(0xda, 0xa0000033); - writeb(0xff, 0xa1000000); - writel(ESDCTL0_VAL | ESDCTL0_DSIZ_31_0 | ESDCTL0_REF4 | - ESDCTL0_BL | ESDCTL0_SMODE_NORMAL, - MX27_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - - if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND)) - imx27_barebox_boot_nand_external(); - -out: - imx27_barebox_entry(NULL); -} diff --git a/arch/arm/boards/guf-neso/pll_init.S b/arch/arm/boards/guf-neso/pll_init.S deleted file mode 100644 index fe28c457fc..0000000000 --- a/arch/arm/boards/guf-neso/pll_init.S +++ /dev/null @@ -1,53 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <config.h> -#include <mach/imx27-regs.h> -#include <mach/imx-pll.h> -#include <linux/linkage.h> - -#define writel(val, reg) \ - ldr r0, =reg; \ - ldr r1, =val; \ - str r1, [r0]; - -#define CSCR_VAL MX27_CSCR_USB_DIV(3) | \ - MX27_CSCR_SD_CNT(3) | \ - MX27_CSCR_MSHC_SEL | \ - MX27_CSCR_H264_SEL | \ - MX27_CSCR_SSI1_SEL | \ - MX27_CSCR_SSI2_SEL | \ - MX27_CSCR_MCU_SEL | \ - MX27_CSCR_ARM_SRC_MPLL | \ - MX27_CSCR_SP_SEL | \ - MX27_CSCR_ARM_DIV(0) | \ - MX27_CSCR_FPM_EN | \ - MX27_CSCR_SPEN | \ - MX27_CSCR_MPEN | \ - MX27_CSCR_AHB_DIV(1) - -ENTRY(neso_pll_init) - - /* 399 MHz */ - writel(IMX_PLL_PD(0) | - IMX_PLL_MFD(51) | - IMX_PLL_MFI(7) | - IMX_PLL_MFN(35), MX27_CCM_BASE_ADDR + MX27_MPCTL0) - - /* SPLL = 2 * 26 * 4.61538 MHz = 240 MHz */ - writel(IMX_PLL_PD(1) | - IMX_PLL_MFD(12) | - IMX_PLL_MFI(9) | - IMX_PLL_MFN(3), MX27_CCM_BASE_ADDR + MX27_SPCTL0) - - writel(CSCR_VAL | MX27_CSCR_MPLL_RESTART | MX27_CSCR_SPLL_RESTART, - MX27_CCM_BASE_ADDR + MX27_CSCR) - - ldr r2, =16000 -1: - subs r2, r2, #1 - nop - bcs 1b - - mov pc, lr -ENDPROC(neso_pll_init) - diff --git a/arch/arm/boards/guf-santaro/board.c b/arch/arm/boards/guf-santaro/board.c index cfc85af59e..acc3fc7f07 100644 --- a/arch/arm/boards/guf-santaro/board.c +++ b/arch/arm/boards/guf-santaro/board.c @@ -6,16 +6,16 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/imx6-regs.h> +#include <mach/imx/imx6-regs.h> #include <asm/armlinux.h> #include <asm/io.h> #include <asm/mmu.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <linux/sizes.h> #include <bootsource.h> #include <bbu.h> -#include <mach/bbu.h> -#include <mach/imx6.h> +#include <mach/imx/bbu.h> +#include <mach/imx/imx6.h> #include <i2c/i2c.h> #include <gpio.h> diff --git a/arch/arm/boards/guf-santaro/flash-header.imxcfg b/arch/arm/boards/guf-santaro/flash-header.imxcfg index eff9f66f94..6d5bbae5d8 100644 --- a/arch/arm/boards/guf-santaro/flash-header.imxcfg +++ b/arch/arm/boards/guf-santaro/flash-header.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x10000000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000c0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/guf-santaro/lowlevel.c b/arch/arm/boards/guf-santaro/lowlevel.c index ee39903c80..72401eb32c 100644 --- a/arch/arm/boards/guf-santaro/lowlevel.c +++ b/arch/arm/boards/guf-santaro/lowlevel.c @@ -6,11 +6,12 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <asm/cache.h> -#include <mach/generic.h> -#include <mach/imx6-regs.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6-regs.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <console.h> -#include <mach/esdctl.h> +#include <mach/imx/esdctl.h> static inline void setup_uart(void) { diff --git a/arch/arm/boards/guf-vincell/board.c b/arch/arm/boards/guf-vincell/board.c index c0bb9d9e74..50439b5b78 100644 --- a/arch/arm/boards/guf-vincell/board.c +++ b/arch/arm/boards/guf-vincell/board.c @@ -11,11 +11,11 @@ #include <io.h> #include <linux/clk.h> -#include <mach/devices-imx53.h> -#include <mach/generic.h> -#include <mach/iim.h> -#include <mach/bbu.h> -#include <mach/imx5.h> +#include <mach/imx/generic.h> +#include <mach/imx/iim.h> +#include <mach/imx/bbu.h> +#include <mach/imx/imx5.h> +#include <mach/imx/imx53-regs.h> static int vincell_devices_init(void) { diff --git a/arch/arm/boards/guf-vincell/lowlevel.c b/arch/arm/boards/guf-vincell/lowlevel.c index 97f1ffc3a9..e691aeca3e 100644 --- a/arch/arm/boards/guf-vincell/lowlevel.c +++ b/arch/arm/boards/guf-vincell/lowlevel.c @@ -2,15 +2,16 @@ #include <common.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <io.h> #include <init.h> -#include <mach/imx53-regs.h> -#include <mach/clock-imx51_53.h> -#include <mach/imx5.h> -#include <mach/iomux-v3.h> -#include <mach/esdctl-v4.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/clock-imx51_53.h> +#include <mach/imx/imx5.h> +#include <mach/imx/iomux-v3.h> +#include <mach/imx/esdctl-v4.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <asm/cache.h> diff --git a/arch/arm/boards/haba-knx/init.c b/arch/arm/boards/haba-knx/init.c index d55739ee2a..d86e84e71a 100644 --- a/arch/arm/boards/haba-knx/init.c +++ b/arch/arm/boards/haba-knx/init.c @@ -7,25 +7,24 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> #include <linux/clk.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> #include <led.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> #include <spi/spi.h> #include <i2c/i2c.h> #include <libfile.h> diff --git a/arch/arm/boards/haba-knx/lowlevel.c b/arch/arm/boards/haba-knx/lowlevel.c index 7f52f824df..f71e0098e8 100644 --- a/arch/arm/boards/haba-knx/lowlevel.c +++ b/arch/arm/boards/haba-knx/lowlevel.c @@ -7,14 +7,12 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> -#include <mach/at91sam9_sdramc.h> -#include <mach/at91sam9260.h> -#include <mach/hardware.h> - -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_haba_knx_lite, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c b/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c index 350576fa52..cf92e2bb63 100644 --- a/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c +++ b/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c @@ -18,13 +18,12 @@ #include <mci.h> #include <asm/armlinux.h> #include <asm/barebox-arm.h> -#include <usb/ehci.h> -#include <mach/usb.h> -#include <generated/mach-types.h> -#include <mach/imx-regs.h> -#include <mach/clock.h> -#include <mach/mci.h> -#include <mach/iomux.h> +#include <linux/usb/ehci.h> +#include <mach/mxs/usb.h> +#include <asm/mach-types.h> +#include <mach/mxs/imx-regs.h> +#include <mach/mxs/mci.h> +#include <mach/mxs/iomux.h> static struct mxs_mci_platform_data mci_pdata = { .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED, diff --git a/arch/arm/boards/imx233-olinuxino/lowlevel.c b/arch/arm/boards/imx233-olinuxino/lowlevel.c index 71fc379f04..91c1ba3dba 100644 --- a/arch/arm/boards/imx233-olinuxino/lowlevel.c +++ b/arch/arm/boards/imx233-olinuxino/lowlevel.c @@ -4,16 +4,29 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx23-regs.h> -#include <mach/init.h> +#include <mach/mxs/imx23-regs.h> +#include <mach/mxs/init.h> #include <io.h> #include <debug_ll.h> -#include <mach/iomux.h> -#include <generated/mach-types.h> +#include <mach/mxs/iomux.h> +#include <asm/mach-types.h> + +static noinline void continue_imx_entry(size_t size) +{ + static struct barebox_arm_boarddata boarddata = { + .magic = BAREBOX_ARM_BOARDDATA_MAGIC, + .machine = MACH_TYPE_IMX233_OLINUXINO, + }; + + barebox_arm_entry(IMX_MEMORY_BASE, size, &boarddata); +} ENTRY_FUNCTION(start_barebox_olinuxino_imx23, r0, r1, r2) { - barebox_arm_entry(IMX_MEMORY_BASE, SZ_64M, (void *)MACH_TYPE_IMX233_OLINUXINO); + relocate_to_current_adr(); + setup_c(); + + continue_imx_entry(SZ_64M); } static const uint32_t pad_setup[] = { diff --git a/arch/arm/boards/innocomm-imx8mm-wb15/board.c b/arch/arm/boards/innocomm-imx8mm-wb15/board.c index 8bc4dabb66..5bb285b189 100644 --- a/arch/arm/boards/innocomm-imx8mm-wb15/board.c +++ b/arch/arm/boards/innocomm-imx8mm-wb15/board.c @@ -5,9 +5,9 @@ #include <common.h> #include <deep-probe.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> -static int innocomm_wb15_evk_probe(struct device_d *dev) +static int innocomm_wb15_evk_probe(struct device *dev) { int emmc_bbu_flag = 0; int sd_bbu_flag = 0; @@ -32,7 +32,7 @@ static const struct of_device_id innocomm_wb15_evk_of_match[] = { }; BAREBOX_DEEP_PROBE_ENABLE(innocomm_wb15_evk_of_match); -static struct driver_d innocomm_wb15_evkboard_driver = { +static struct driver innocomm_wb15_evkboard_driver = { .name = "board-innocomm-wb15-evk", .probe = innocomm_wb15_evk_probe, .of_compatible = DRV_OF_COMPAT(innocomm_wb15_evk_of_match), diff --git a/arch/arm/boards/innocomm-imx8mm-wb15/flash-header-imx8mm-wb15.imxcfg b/arch/arm/boards/innocomm-imx8mm-wb15/flash-header-imx8mm-wb15.imxcfg index 10606ce29c..8aff991618 100644 --- a/arch/arm/boards/innocomm-imx8mm-wb15/flash-header-imx8mm-wb15.imxcfg +++ b/arch/arm/boards/innocomm-imx8mm-wb15/flash-header-imx8mm-wb15.imxcfg @@ -5,3 +5,5 @@ soc imx8mm loadaddr 0x007e1000 max_load_size 0x3f000 ivtofs 0x400 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c b/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c index 2077d3c88e..a779c1f0ac 100644 --- a/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c +++ b/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c @@ -2,18 +2,18 @@ #include <common.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <asm/barebox-arm.h> #include <pbl/i2c.h> #include <pbl/pmic.h> -#include <mach/esdctl.h> -#include <mach/atf.h> -#include <mach/generic.h> -#include <mach/iomux-mx8mm.h> -#include <mach/imx8m-ccm-regs.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/atf.h> +#include <mach/imx/generic.h> +#include <mach/imx/iomux-mx8mm.h> +#include <mach/imx/imx8m-ccm-regs.h> #include <mfd/bd71837.h> -#include <mach/xload.h> +#include <mach/imx/xload.h> #include <soc/imx8m/ddr.h> -#include <image-metadata.h> #include "lowlevel.h" @@ -35,14 +35,24 @@ static void setup_uart(void) } static struct pmic_config bd71837_cfg[] = { + /* unlock the PMIC regs */ + { BD718XX_REGLOCK, 0x0 }, + /* retry powering up indefinitely every 250ms after VR fault */ + { BD718XX_RCVCFG, 0xfc }, /* decrease RESET key long push time from the default 10s to 10ms */ { BD718XX_PWRONCONFIG1, 0x0 }, - /* unlock the PMIC regs */ - { BD718XX_REGLOCK, 0x1 }, + /* WDOG_B: Warm Reset */ + { BD718XX_PWRCTRL0, 0xa3 }, + /* READY=>SNVS on PMIC_ON_REQ, SNVS=>RUN on VSYS_UVLO */ + { BD718XX_TRANS_COND0, 0x48 }, + /* WDOG_B: Go to SNVS power state after deassert */ + { BD718XX_TRANS_COND1, 0xc0 }, /* Set VDD_SOC/VDD_DRAM to typical value 0.85v for nominal mode */ { BD718XX_BUCK1_VOLT_RUN, 0xf }, - /* increase VDD_DRAM to 0.975v for 3Ghz DDR */ - { BD718XX_1ST_NODVS_BUCK_VOLT, 0x83 }, + /* increase VDD_DRAM to 0.900v for 2400MT/s DDR */ + { BD718XX_1ST_NODVS_BUCK_VOLT, 0x02 }, + /* set BUCK8 to 1.10v */ + { BD718XX_4TH_NODVS_BUCK_VOLT, 0x1e }, /* lock the PMIC regs */ { BD718XX_REGLOCK, 0x11 }, }; @@ -54,18 +64,15 @@ void innocomm_wb15_power_init_board(void) imx8mm_setup_pad(IMX8MM_PAD_I2C1_SCL_I2C1_SCL); imx8mm_setup_pad(IMX8MM_PAD_I2C1_SDA_I2C1_SDA); - imx8mm_early_clock_init(); imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); - i2c = imx8m_i2c_early_init(IOMEM(MX8MQ_I2C1_BASE_ADDR)); + i2c = imx8m_i2c_early_init(IOMEM(MX8MM_I2C1_BASE_ADDR)); pmic_configure(i2c, 0x4b, bd71837_cfg, ARRAY_SIZE(bd71837_cfg)); } ENTRY_FUNCTION(start_innocomm_wb15_evk, r0, r1, r2) { - IMD_USED_OF(imx8mm_innocomm_wb15_evk); - imx8mm_cpu_lowlevel_init(); relocate_to_current_adr(); @@ -79,6 +86,8 @@ ENTRY_FUNCTION(start_innocomm_wb15_evk, r0, r1, r2) * will then jump to DRAM in EL2 */ if (current_el() == 3) { + imx8mm_early_clock_init(); + innocomm_wb15_power_init_board(); imx8mm_ddr_init(&innocomm_wb15_dram_timing, DRAM_TYPE_LPDDR4); diff --git a/arch/arm/boards/innocomm-imx8mm-wb15/lpddr4-timing.c b/arch/arm/boards/innocomm-imx8mm-wb15/lpddr4-timing.c index 006ee37df5..54c8442673 100644 --- a/arch/arm/boards/innocomm-imx8mm-wb15/lpddr4-timing.c +++ b/arch/arm/boards/innocomm-imx8mm-wb15/lpddr4-timing.c @@ -329,728 +329,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { {0x2200ca,0x24}, }; -/* ddr phy trained csr */ -static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { - { 0x200b2, 0x0 }, - { 0x1200b2, 0x0 }, - { 0x2200b2, 0x0 }, - { 0x200cb, 0x0 }, - { 0x10043, 0x0 }, - { 0x110043, 0x0 }, - { 0x210043, 0x0 }, - { 0x10143, 0x0 }, - { 0x110143, 0x0 }, - { 0x210143, 0x0 }, - { 0x11043, 0x0 }, - { 0x111043, 0x0 }, - { 0x211043, 0x0 }, - { 0x11143, 0x0 }, - { 0x111143, 0x0 }, - { 0x211143, 0x0 }, - { 0x12043, 0x0 }, - { 0x112043, 0x0 }, - { 0x212043, 0x0 }, - { 0x12143, 0x0 }, - { 0x112143, 0x0 }, - { 0x212143, 0x0 }, - { 0x13043, 0x0 }, - { 0x113043, 0x0 }, - { 0x213043, 0x0 }, - { 0x13143, 0x0 }, - { 0x113143, 0x0 }, - { 0x213143, 0x0 }, - { 0x80, 0x0 }, - { 0x100080, 0x0 }, - { 0x200080, 0x0 }, - { 0x1080, 0x0 }, - { 0x101080, 0x0 }, - { 0x201080, 0x0 }, - { 0x2080, 0x0 }, - { 0x102080, 0x0 }, - { 0x202080, 0x0 }, - { 0x3080, 0x0 }, - { 0x103080, 0x0 }, - { 0x203080, 0x0 }, - { 0x4080, 0x0 }, - { 0x104080, 0x0 }, - { 0x204080, 0x0 }, - { 0x5080, 0x0 }, - { 0x105080, 0x0 }, - { 0x205080, 0x0 }, - { 0x6080, 0x0 }, - { 0x106080, 0x0 }, - { 0x206080, 0x0 }, - { 0x7080, 0x0 }, - { 0x107080, 0x0 }, - { 0x207080, 0x0 }, - { 0x8080, 0x0 }, - { 0x108080, 0x0 }, - { 0x208080, 0x0 }, - { 0x9080, 0x0 }, - { 0x109080, 0x0 }, - { 0x209080, 0x0 }, - { 0x10080, 0x0 }, - { 0x110080, 0x0 }, - { 0x210080, 0x0 }, - { 0x10180, 0x0 }, - { 0x110180, 0x0 }, - { 0x210180, 0x0 }, - { 0x11080, 0x0 }, - { 0x111080, 0x0 }, - { 0x211080, 0x0 }, - { 0x11180, 0x0 }, - { 0x111180, 0x0 }, - { 0x211180, 0x0 }, - { 0x12080, 0x0 }, - { 0x112080, 0x0 }, - { 0x212080, 0x0 }, - { 0x12180, 0x0 }, - { 0x112180, 0x0 }, - { 0x212180, 0x0 }, - { 0x13080, 0x0 }, - { 0x113080, 0x0 }, - { 0x213080, 0x0 }, - { 0x13180, 0x0 }, - { 0x113180, 0x0 }, - { 0x213180, 0x0 }, - { 0x10081, 0x0 }, - { 0x110081, 0x0 }, - { 0x210081, 0x0 }, - { 0x10181, 0x0 }, - { 0x110181, 0x0 }, - { 0x210181, 0x0 }, - { 0x11081, 0x0 }, - { 0x111081, 0x0 }, - { 0x211081, 0x0 }, - { 0x11181, 0x0 }, - { 0x111181, 0x0 }, - { 0x211181, 0x0 }, - { 0x12081, 0x0 }, - { 0x112081, 0x0 }, - { 0x212081, 0x0 }, - { 0x12181, 0x0 }, - { 0x112181, 0x0 }, - { 0x212181, 0x0 }, - { 0x13081, 0x0 }, - { 0x113081, 0x0 }, - { 0x213081, 0x0 }, - { 0x13181, 0x0 }, - { 0x113181, 0x0 }, - { 0x213181, 0x0 }, - { 0x100d0, 0x0 }, - { 0x1100d0, 0x0 }, - { 0x2100d0, 0x0 }, - { 0x101d0, 0x0 }, - { 0x1101d0, 0x0 }, - { 0x2101d0, 0x0 }, - { 0x110d0, 0x0 }, - { 0x1110d0, 0x0 }, - { 0x2110d0, 0x0 }, - { 0x111d0, 0x0 }, - { 0x1111d0, 0x0 }, - { 0x2111d0, 0x0 }, - { 0x120d0, 0x0 }, - { 0x1120d0, 0x0 }, - { 0x2120d0, 0x0 }, - { 0x121d0, 0x0 }, - { 0x1121d0, 0x0 }, - { 0x2121d0, 0x0 }, - { 0x130d0, 0x0 }, - { 0x1130d0, 0x0 }, - { 0x2130d0, 0x0 }, - { 0x131d0, 0x0 }, - { 0x1131d0, 0x0 }, - { 0x2131d0, 0x0 }, - { 0x100d1, 0x0 }, - { 0x1100d1, 0x0 }, - { 0x2100d1, 0x0 }, - { 0x101d1, 0x0 }, - { 0x1101d1, 0x0 }, - { 0x2101d1, 0x0 }, - { 0x110d1, 0x0 }, - { 0x1110d1, 0x0 }, - { 0x2110d1, 0x0 }, - { 0x111d1, 0x0 }, - { 0x1111d1, 0x0 }, - { 0x2111d1, 0x0 }, - { 0x120d1, 0x0 }, - { 0x1120d1, 0x0 }, - { 0x2120d1, 0x0 }, - { 0x121d1, 0x0 }, - { 0x1121d1, 0x0 }, - { 0x2121d1, 0x0 }, - { 0x130d1, 0x0 }, - { 0x1130d1, 0x0 }, - { 0x2130d1, 0x0 }, - { 0x131d1, 0x0 }, - { 0x1131d1, 0x0 }, - { 0x2131d1, 0x0 }, - { 0x10068, 0x0 }, - { 0x10168, 0x0 }, - { 0x10268, 0x0 }, - { 0x10368, 0x0 }, - { 0x10468, 0x0 }, - { 0x10568, 0x0 }, - { 0x10668, 0x0 }, - { 0x10768, 0x0 }, - { 0x10868, 0x0 }, - { 0x11068, 0x0 }, - { 0x11168, 0x0 }, - { 0x11268, 0x0 }, - { 0x11368, 0x0 }, - { 0x11468, 0x0 }, - { 0x11568, 0x0 }, - { 0x11668, 0x0 }, - { 0x11768, 0x0 }, - { 0x11868, 0x0 }, - { 0x12068, 0x0 }, - { 0x12168, 0x0 }, - { 0x12268, 0x0 }, - { 0x12368, 0x0 }, - { 0x12468, 0x0 }, - { 0x12568, 0x0 }, - { 0x12668, 0x0 }, - { 0x12768, 0x0 }, - { 0x12868, 0x0 }, - { 0x13068, 0x0 }, - { 0x13168, 0x0 }, - { 0x13268, 0x0 }, - { 0x13368, 0x0 }, - { 0x13468, 0x0 }, - { 0x13568, 0x0 }, - { 0x13668, 0x0 }, - { 0x13768, 0x0 }, - { 0x13868, 0x0 }, - { 0x10069, 0x0 }, - { 0x10169, 0x0 }, - { 0x10269, 0x0 }, - { 0x10369, 0x0 }, - { 0x10469, 0x0 }, - { 0x10569, 0x0 }, - { 0x10669, 0x0 }, - { 0x10769, 0x0 }, - { 0x10869, 0x0 }, - { 0x11069, 0x0 }, - { 0x11169, 0x0 }, - { 0x11269, 0x0 }, - { 0x11369, 0x0 }, - { 0x11469, 0x0 }, - { 0x11569, 0x0 }, - { 0x11669, 0x0 }, - { 0x11769, 0x0 }, - { 0x11869, 0x0 }, - { 0x12069, 0x0 }, - { 0x12169, 0x0 }, - { 0x12269, 0x0 }, - { 0x12369, 0x0 }, - { 0x12469, 0x0 }, - { 0x12569, 0x0 }, - { 0x12669, 0x0 }, - { 0x12769, 0x0 }, - { 0x12869, 0x0 }, - { 0x13069, 0x0 }, - { 0x13169, 0x0 }, - { 0x13269, 0x0 }, - { 0x13369, 0x0 }, - { 0x13469, 0x0 }, - { 0x13569, 0x0 }, - { 0x13669, 0x0 }, - { 0x13769, 0x0 }, - { 0x13869, 0x0 }, - { 0x1008c, 0x0 }, - { 0x11008c, 0x0 }, - { 0x21008c, 0x0 }, - { 0x1018c, 0x0 }, - { 0x11018c, 0x0 }, - { 0x21018c, 0x0 }, - { 0x1108c, 0x0 }, - { 0x11108c, 0x0 }, - { 0x21108c, 0x0 }, - { 0x1118c, 0x0 }, - { 0x11118c, 0x0 }, - { 0x21118c, 0x0 }, - { 0x1208c, 0x0 }, - { 0x11208c, 0x0 }, - { 0x21208c, 0x0 }, - { 0x1218c, 0x0 }, - { 0x11218c, 0x0 }, - { 0x21218c, 0x0 }, - { 0x1308c, 0x0 }, - { 0x11308c, 0x0 }, - { 0x21308c, 0x0 }, - { 0x1318c, 0x0 }, - { 0x11318c, 0x0 }, - { 0x21318c, 0x0 }, - { 0x1008d, 0x0 }, - { 0x11008d, 0x0 }, - { 0x21008d, 0x0 }, - { 0x1018d, 0x0 }, - { 0x11018d, 0x0 }, - { 0x21018d, 0x0 }, - { 0x1108d, 0x0 }, - { 0x11108d, 0x0 }, - { 0x21108d, 0x0 }, - { 0x1118d, 0x0 }, - { 0x11118d, 0x0 }, - { 0x21118d, 0x0 }, - { 0x1208d, 0x0 }, - { 0x11208d, 0x0 }, - { 0x21208d, 0x0 }, - { 0x1218d, 0x0 }, - { 0x11218d, 0x0 }, - { 0x21218d, 0x0 }, - { 0x1308d, 0x0 }, - { 0x11308d, 0x0 }, - { 0x21308d, 0x0 }, - { 0x1318d, 0x0 }, - { 0x11318d, 0x0 }, - { 0x21318d, 0x0 }, - { 0x100c0, 0x0 }, - { 0x1100c0, 0x0 }, - { 0x2100c0, 0x0 }, - { 0x101c0, 0x0 }, - { 0x1101c0, 0x0 }, - { 0x2101c0, 0x0 }, - { 0x102c0, 0x0 }, - { 0x1102c0, 0x0 }, - { 0x2102c0, 0x0 }, - { 0x103c0, 0x0 }, - { 0x1103c0, 0x0 }, - { 0x2103c0, 0x0 }, - { 0x104c0, 0x0 }, - { 0x1104c0, 0x0 }, - { 0x2104c0, 0x0 }, - { 0x105c0, 0x0 }, - { 0x1105c0, 0x0 }, - { 0x2105c0, 0x0 }, - { 0x106c0, 0x0 }, - { 0x1106c0, 0x0 }, - { 0x2106c0, 0x0 }, - { 0x107c0, 0x0 }, - { 0x1107c0, 0x0 }, - { 0x2107c0, 0x0 }, - { 0x108c0, 0x0 }, - { 0x1108c0, 0x0 }, - { 0x2108c0, 0x0 }, - { 0x110c0, 0x0 }, - { 0x1110c0, 0x0 }, - { 0x2110c0, 0x0 }, - { 0x111c0, 0x0 }, - { 0x1111c0, 0x0 }, - { 0x2111c0, 0x0 }, - { 0x112c0, 0x0 }, - { 0x1112c0, 0x0 }, - { 0x2112c0, 0x0 }, - { 0x113c0, 0x0 }, - { 0x1113c0, 0x0 }, - { 0x2113c0, 0x0 }, - { 0x114c0, 0x0 }, - { 0x1114c0, 0x0 }, - { 0x2114c0, 0x0 }, - { 0x115c0, 0x0 }, - { 0x1115c0, 0x0 }, - { 0x2115c0, 0x0 }, - { 0x116c0, 0x0 }, - { 0x1116c0, 0x0 }, - { 0x2116c0, 0x0 }, - { 0x117c0, 0x0 }, - { 0x1117c0, 0x0 }, - { 0x2117c0, 0x0 }, - { 0x118c0, 0x0 }, - { 0x1118c0, 0x0 }, - { 0x2118c0, 0x0 }, - { 0x120c0, 0x0 }, - { 0x1120c0, 0x0 }, - { 0x2120c0, 0x0 }, - { 0x121c0, 0x0 }, - { 0x1121c0, 0x0 }, - { 0x2121c0, 0x0 }, - { 0x122c0, 0x0 }, - { 0x1122c0, 0x0 }, - { 0x2122c0, 0x0 }, - { 0x123c0, 0x0 }, - { 0x1123c0, 0x0 }, - { 0x2123c0, 0x0 }, - { 0x124c0, 0x0 }, - { 0x1124c0, 0x0 }, - { 0x2124c0, 0x0 }, - { 0x125c0, 0x0 }, - { 0x1125c0, 0x0 }, - { 0x2125c0, 0x0 }, - { 0x126c0, 0x0 }, - { 0x1126c0, 0x0 }, - { 0x2126c0, 0x0 }, - { 0x127c0, 0x0 }, - { 0x1127c0, 0x0 }, - { 0x2127c0, 0x0 }, - { 0x128c0, 0x0 }, - { 0x1128c0, 0x0 }, - { 0x2128c0, 0x0 }, - { 0x130c0, 0x0 }, - { 0x1130c0, 0x0 }, - { 0x2130c0, 0x0 }, - { 0x131c0, 0x0 }, - { 0x1131c0, 0x0 }, - { 0x2131c0, 0x0 }, - { 0x132c0, 0x0 }, - { 0x1132c0, 0x0 }, - { 0x2132c0, 0x0 }, - { 0x133c0, 0x0 }, - { 0x1133c0, 0x0 }, - { 0x2133c0, 0x0 }, - { 0x134c0, 0x0 }, - { 0x1134c0, 0x0 }, - { 0x2134c0, 0x0 }, - { 0x135c0, 0x0 }, - { 0x1135c0, 0x0 }, - { 0x2135c0, 0x0 }, - { 0x136c0, 0x0 }, - { 0x1136c0, 0x0 }, - { 0x2136c0, 0x0 }, - { 0x137c0, 0x0 }, - { 0x1137c0, 0x0 }, - { 0x2137c0, 0x0 }, - { 0x138c0, 0x0 }, - { 0x1138c0, 0x0 }, - { 0x2138c0, 0x0 }, - { 0x100c1, 0x0 }, - { 0x1100c1, 0x0 }, - { 0x2100c1, 0x0 }, - { 0x101c1, 0x0 }, - { 0x1101c1, 0x0 }, - { 0x2101c1, 0x0 }, - { 0x102c1, 0x0 }, - { 0x1102c1, 0x0 }, - { 0x2102c1, 0x0 }, - { 0x103c1, 0x0 }, - { 0x1103c1, 0x0 }, - { 0x2103c1, 0x0 }, - { 0x104c1, 0x0 }, - { 0x1104c1, 0x0 }, - { 0x2104c1, 0x0 }, - { 0x105c1, 0x0 }, - { 0x1105c1, 0x0 }, - { 0x2105c1, 0x0 }, - { 0x106c1, 0x0 }, - { 0x1106c1, 0x0 }, - { 0x2106c1, 0x0 }, - { 0x107c1, 0x0 }, - { 0x1107c1, 0x0 }, - { 0x2107c1, 0x0 }, - { 0x108c1, 0x0 }, - { 0x1108c1, 0x0 }, - { 0x2108c1, 0x0 }, - { 0x110c1, 0x0 }, - { 0x1110c1, 0x0 }, - { 0x2110c1, 0x0 }, - { 0x111c1, 0x0 }, - { 0x1111c1, 0x0 }, - { 0x2111c1, 0x0 }, - { 0x112c1, 0x0 }, - { 0x1112c1, 0x0 }, - { 0x2112c1, 0x0 }, - { 0x113c1, 0x0 }, - { 0x1113c1, 0x0 }, - { 0x2113c1, 0x0 }, - { 0x114c1, 0x0 }, - { 0x1114c1, 0x0 }, - { 0x2114c1, 0x0 }, - { 0x115c1, 0x0 }, - { 0x1115c1, 0x0 }, - { 0x2115c1, 0x0 }, - { 0x116c1, 0x0 }, - { 0x1116c1, 0x0 }, - { 0x2116c1, 0x0 }, - { 0x117c1, 0x0 }, - { 0x1117c1, 0x0 }, - { 0x2117c1, 0x0 }, - { 0x118c1, 0x0 }, - { 0x1118c1, 0x0 }, - { 0x2118c1, 0x0 }, - { 0x120c1, 0x0 }, - { 0x1120c1, 0x0 }, - { 0x2120c1, 0x0 }, - { 0x121c1, 0x0 }, - { 0x1121c1, 0x0 }, - { 0x2121c1, 0x0 }, - { 0x122c1, 0x0 }, - { 0x1122c1, 0x0 }, - { 0x2122c1, 0x0 }, - { 0x123c1, 0x0 }, - { 0x1123c1, 0x0 }, - { 0x2123c1, 0x0 }, - { 0x124c1, 0x0 }, - { 0x1124c1, 0x0 }, - { 0x2124c1, 0x0 }, - { 0x125c1, 0x0 }, - { 0x1125c1, 0x0 }, - { 0x2125c1, 0x0 }, - { 0x126c1, 0x0 }, - { 0x1126c1, 0x0 }, - { 0x2126c1, 0x0 }, - { 0x127c1, 0x0 }, - { 0x1127c1, 0x0 }, - { 0x2127c1, 0x0 }, - { 0x128c1, 0x0 }, - { 0x1128c1, 0x0 }, - { 0x2128c1, 0x0 }, - { 0x130c1, 0x0 }, - { 0x1130c1, 0x0 }, - { 0x2130c1, 0x0 }, - { 0x131c1, 0x0 }, - { 0x1131c1, 0x0 }, - { 0x2131c1, 0x0 }, - { 0x132c1, 0x0 }, - { 0x1132c1, 0x0 }, - { 0x2132c1, 0x0 }, - { 0x133c1, 0x0 }, - { 0x1133c1, 0x0 }, - { 0x2133c1, 0x0 }, - { 0x134c1, 0x0 }, - { 0x1134c1, 0x0 }, - { 0x2134c1, 0x0 }, - { 0x135c1, 0x0 }, - { 0x1135c1, 0x0 }, - { 0x2135c1, 0x0 }, - { 0x136c1, 0x0 }, - { 0x1136c1, 0x0 }, - { 0x2136c1, 0x0 }, - { 0x137c1, 0x0 }, - { 0x1137c1, 0x0 }, - { 0x2137c1, 0x0 }, - { 0x138c1, 0x0 }, - { 0x1138c1, 0x0 }, - { 0x2138c1, 0x0 }, - { 0x10020, 0x0 }, - { 0x110020, 0x0 }, - { 0x210020, 0x0 }, - { 0x11020, 0x0 }, - { 0x111020, 0x0 }, - { 0x211020, 0x0 }, - { 0x12020, 0x0 }, - { 0x112020, 0x0 }, - { 0x212020, 0x0 }, - { 0x13020, 0x0 }, - { 0x113020, 0x0 }, - { 0x213020, 0x0 }, - { 0x20072, 0x0 }, - { 0x20073, 0x0 }, - { 0x20074, 0x0 }, - { 0x100aa, 0x0 }, - { 0x110aa, 0x0 }, - { 0x120aa, 0x0 }, - { 0x130aa, 0x0 }, - { 0x20010, 0x0 }, - { 0x120010, 0x0 }, - { 0x220010, 0x0 }, - { 0x20011, 0x0 }, - { 0x120011, 0x0 }, - { 0x220011, 0x0 }, - { 0x100ae, 0x0 }, - { 0x1100ae, 0x0 }, - { 0x2100ae, 0x0 }, - { 0x100af, 0x0 }, - { 0x1100af, 0x0 }, - { 0x2100af, 0x0 }, - { 0x110ae, 0x0 }, - { 0x1110ae, 0x0 }, - { 0x2110ae, 0x0 }, - { 0x110af, 0x0 }, - { 0x1110af, 0x0 }, - { 0x2110af, 0x0 }, - { 0x120ae, 0x0 }, - { 0x1120ae, 0x0 }, - { 0x2120ae, 0x0 }, - { 0x120af, 0x0 }, - { 0x1120af, 0x0 }, - { 0x2120af, 0x0 }, - { 0x130ae, 0x0 }, - { 0x1130ae, 0x0 }, - { 0x2130ae, 0x0 }, - { 0x130af, 0x0 }, - { 0x1130af, 0x0 }, - { 0x2130af, 0x0 }, - { 0x20020, 0x0 }, - { 0x120020, 0x0 }, - { 0x220020, 0x0 }, - { 0x100a0, 0x0 }, - { 0x100a1, 0x0 }, - { 0x100a2, 0x0 }, - { 0x100a3, 0x0 }, - { 0x100a4, 0x0 }, - { 0x100a5, 0x0 }, - { 0x100a6, 0x0 }, - { 0x100a7, 0x0 }, - { 0x110a0, 0x0 }, - { 0x110a1, 0x0 }, - { 0x110a2, 0x0 }, - { 0x110a3, 0x0 }, - { 0x110a4, 0x0 }, - { 0x110a5, 0x0 }, - { 0x110a6, 0x0 }, - { 0x110a7, 0x0 }, - { 0x120a0, 0x0 }, - { 0x120a1, 0x0 }, - { 0x120a2, 0x0 }, - { 0x120a3, 0x0 }, - { 0x120a4, 0x0 }, - { 0x120a5, 0x0 }, - { 0x120a6, 0x0 }, - { 0x120a7, 0x0 }, - { 0x130a0, 0x0 }, - { 0x130a1, 0x0 }, - { 0x130a2, 0x0 }, - { 0x130a3, 0x0 }, - { 0x130a4, 0x0 }, - { 0x130a5, 0x0 }, - { 0x130a6, 0x0 }, - { 0x130a7, 0x0 }, - { 0x2007c, 0x0 }, - { 0x12007c, 0x0 }, - { 0x22007c, 0x0 }, - { 0x2007d, 0x0 }, - { 0x12007d, 0x0 }, - { 0x22007d, 0x0 }, - { 0x400fd, 0x0 }, - { 0x400c0, 0x0 }, - { 0x90201, 0x0 }, - { 0x190201, 0x0 }, - { 0x290201, 0x0 }, - { 0x90202, 0x0 }, - { 0x190202, 0x0 }, - { 0x290202, 0x0 }, - { 0x90203, 0x0 }, - { 0x190203, 0x0 }, - { 0x290203, 0x0 }, - { 0x90204, 0x0 }, - { 0x190204, 0x0 }, - { 0x290204, 0x0 }, - { 0x90205, 0x0 }, - { 0x190205, 0x0 }, - { 0x290205, 0x0 }, - { 0x90206, 0x0 }, - { 0x190206, 0x0 }, - { 0x290206, 0x0 }, - { 0x90207, 0x0 }, - { 0x190207, 0x0 }, - { 0x290207, 0x0 }, - { 0x90208, 0x0 }, - { 0x190208, 0x0 }, - { 0x290208, 0x0 }, - { 0x10062, 0x0 }, - { 0x10162, 0x0 }, - { 0x10262, 0x0 }, - { 0x10362, 0x0 }, - { 0x10462, 0x0 }, - { 0x10562, 0x0 }, - { 0x10662, 0x0 }, - { 0x10762, 0x0 }, - { 0x10862, 0x0 }, - { 0x11062, 0x0 }, - { 0x11162, 0x0 }, - { 0x11262, 0x0 }, - { 0x11362, 0x0 }, - { 0x11462, 0x0 }, - { 0x11562, 0x0 }, - { 0x11662, 0x0 }, - { 0x11762, 0x0 }, - { 0x11862, 0x0 }, - { 0x12062, 0x0 }, - { 0x12162, 0x0 }, - { 0x12262, 0x0 }, - { 0x12362, 0x0 }, - { 0x12462, 0x0 }, - { 0x12562, 0x0 }, - { 0x12662, 0x0 }, - { 0x12762, 0x0 }, - { 0x12862, 0x0 }, - { 0x13062, 0x0 }, - { 0x13162, 0x0 }, - { 0x13262, 0x0 }, - { 0x13362, 0x0 }, - { 0x13462, 0x0 }, - { 0x13562, 0x0 }, - { 0x13662, 0x0 }, - { 0x13762, 0x0 }, - { 0x13862, 0x0 }, - { 0x20077, 0x0 }, - { 0x10001, 0x0 }, - { 0x11001, 0x0 }, - { 0x12001, 0x0 }, - { 0x13001, 0x0 }, - { 0x10040, 0x0 }, - { 0x10140, 0x0 }, - { 0x10240, 0x0 }, - { 0x10340, 0x0 }, - { 0x10440, 0x0 }, - { 0x10540, 0x0 }, - { 0x10640, 0x0 }, - { 0x10740, 0x0 }, - { 0x10840, 0x0 }, - { 0x10030, 0x0 }, - { 0x10130, 0x0 }, - { 0x10230, 0x0 }, - { 0x10330, 0x0 }, - { 0x10430, 0x0 }, - { 0x10530, 0x0 }, - { 0x10630, 0x0 }, - { 0x10730, 0x0 }, - { 0x10830, 0x0 }, - { 0x11040, 0x0 }, - { 0x11140, 0x0 }, - { 0x11240, 0x0 }, - { 0x11340, 0x0 }, - { 0x11440, 0x0 }, - { 0x11540, 0x0 }, - { 0x11640, 0x0 }, - { 0x11740, 0x0 }, - { 0x11840, 0x0 }, - { 0x11030, 0x0 }, - { 0x11130, 0x0 }, - { 0x11230, 0x0 }, - { 0x11330, 0x0 }, - { 0x11430, 0x0 }, - { 0x11530, 0x0 }, - { 0x11630, 0x0 }, - { 0x11730, 0x0 }, - { 0x11830, 0x0 }, - { 0x12040, 0x0 }, - { 0x12140, 0x0 }, - { 0x12240, 0x0 }, - { 0x12340, 0x0 }, - { 0x12440, 0x0 }, - { 0x12540, 0x0 }, - { 0x12640, 0x0 }, - { 0x12740, 0x0 }, - { 0x12840, 0x0 }, - { 0x12030, 0x0 }, - { 0x12130, 0x0 }, - { 0x12230, 0x0 }, - { 0x12330, 0x0 }, - { 0x12430, 0x0 }, - { 0x12530, 0x0 }, - { 0x12630, 0x0 }, - { 0x12730, 0x0 }, - { 0x12830, 0x0 }, - { 0x13040, 0x0 }, - { 0x13140, 0x0 }, - { 0x13240, 0x0 }, - { 0x13340, 0x0 }, - { 0x13440, 0x0 }, - { 0x13540, 0x0 }, - { 0x13640, 0x0 }, - { 0x13740, 0x0 }, - { 0x13840, 0x0 }, - { 0x13030, 0x0 }, - { 0x13130, 0x0 }, - { 0x13230, 0x0 }, - { 0x13330, 0x0 }, - { 0x13430, 0x0 }, - { 0x13530, 0x0 }, - { 0x13630, 0x0 }, - { 0x13730, 0x0 }, - { 0x13830, 0x0 }, -}; /* P0 message block paremeter for training firmware */ static struct dram_cfg_param ddr_fsp0_cfg_1g_2ch1cs15r10cx32[] = { {0xd0000, 0x0}, @@ -1848,8 +1126,6 @@ struct dram_timing_info innocomm_wb15_dram_timing = { .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), .fsp_msg = ddr_dram_fsp_msg_1g_2ch1cs15r10cx32, .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg_1g_2ch1cs15r10cx32), - .ddrphy_trained_csr = ddr_ddrphy_trained_csr, - .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), .fsp_table = { 2400, 400, 100, }, diff --git a/arch/arm/boards/kamstrup-mx7-concentrator/flash-header-tqma7d.imxcfg b/arch/arm/boards/kamstrup-mx7-concentrator/flash-header-tqma7d.imxcfg index 564fa62b91..12e0754912 100644 --- a/arch/arm/boards/kamstrup-mx7-concentrator/flash-header-tqma7d.imxcfg +++ b/arch/arm/boards/kamstrup-mx7-concentrator/flash-header-tqma7d.imxcfg @@ -4,7 +4,7 @@ soc imx7 loadaddr 0xbfbff000 ivtofs 0x400 -#include <mach/imx7-ddr-regs.h> +#include <mach/imx/imx7-ddr-regs.h> wm 32 0x30340004 0x4F400005 /* IOMUXC_GPR_GPR1 */ /* Clear then set bit30 to ensure exit from DDR retention */ diff --git a/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c b/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c index 4a9eae80d1..e1ba327251 100644 --- a/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c +++ b/arch/arm/boards/kamstrup-mx7-concentrator/lowlevel.c @@ -1,23 +1,24 @@ // SPDX-License-Identifier: GPL-2.0-only #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <io.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx7-ccm-regs.h> -#include <mach/iomux-mx7.h> -#include <mach/debug_ll.h> +#include <mach/imx/imx7-ccm-regs.h> +#include <mach/imx/iomux-mx7.h> +#include <mach/imx/debug_ll.h> #include <asm/cache.h> -#include <mach/esdctl.h> +#include <mach/imx/esdctl.h> extern char __dtb_z_imx7d_flex_concentrator_mfg_start[]; static inline void setup_uart(void) { - imx7_early_setup_uart_clock(); + imx7_early_setup_uart_clock(4); imx7_setup_pad(MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX); diff --git a/arch/arm/boards/karo-qsxp-ml81/Makefile b/arch/arm/boards/karo-qsxp-ml81/Makefile new file mode 100644 index 0000000000..10abebc539 --- /dev/null +++ b/arch/arm/boards/karo-qsxp-ml81/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +lwl-y += lowlevel.o lpddr4-timing.o +obj-y += board.o diff --git a/arch/arm/boards/karo-qsxp-ml81/board.c b/arch/arm/boards/karo-qsxp-ml81/board.c new file mode 100644 index 0000000000..e9e3d46bf1 --- /dev/null +++ b/arch/arm/boards/karo-qsxp-ml81/board.c @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +// SPDX-FileCopyrightText: 2022 Ahmad Fatoum, Pengutronix + +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <init.h> +#include <mach/imx/bbu.h> + +static int karo_qsxp_ml81_probe(struct device *dev) +{ + int emmc_bbu_flag = 0; + + if (bootsource_get() == BOOTSOURCE_MMC && bootsource_get_instance() == 2) { + of_device_enable_path("/chosen/environment-emmc"); + emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } + + imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + + return 0; +} + +static const struct of_device_id karo_qsxp_ml81_of_match[] = { + { .compatible = "karo,imx8mp-qsxp-ml81-qsbase4" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(karo_qsxp_ml81_of_match); + +static struct driver karo_qsxp_ml81_board_driver = { + .name = "board-karo-qsxp-ml81", + .probe = karo_qsxp_ml81_probe, + .of_compatible = DRV_OF_COMPAT(karo_qsxp_ml81_of_match), +}; +coredevice_platform_driver(karo_qsxp_ml81_board_driver); diff --git a/arch/arm/boards/karo-qsxp-ml81/flash-header-karo-qsxp-ml81.imxcfg b/arch/arm/boards/karo-qsxp-ml81/flash-header-karo-qsxp-ml81.imxcfg new file mode 100644 index 0000000000..da0892e52d --- /dev/null +++ b/arch/arm/boards/karo-qsxp-ml81/flash-header-karo-qsxp-ml81.imxcfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-only + +soc imx8mp + +loadaddr 0x00920000 +max_load_size 0x3f000 +ivtofs 0x0 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/karo-qsxp-ml81/lowlevel.c b/arch/arm/boards/karo-qsxp-ml81/lowlevel.c new file mode 100644 index 0000000000..506a9c9930 --- /dev/null +++ b/arch/arm/boards/karo-qsxp-ml81/lowlevel.c @@ -0,0 +1,102 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <asm/barebox-arm.h> +#include <common.h> +#include <debug_ll.h> +#include <mach/imx/atf.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/iomux-mx8mp.h> +#include <mach/imx/xload.h> +#include <mfd/pca9450.h> +#include <pbl/i2c.h> +#include <pbl/pmic.h> +#include <soc/imx8m/ddr.h> + +#include "lowlevel.h" + +extern char __dtb_z_imx8mp_karo_qsxp_ml81_qsbase4_start[]; + +#define UART_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_FSEL) + +#define I2C_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_PE | \ + MX8MP_PAD_CTL_HYS | \ + MX8MP_PAD_CTL_PUE | \ + MX8MP_PAD_CTL_DSE6) + +static void setup_uart(void) +{ + void __iomem *uart = IOMEM(MX8M_UART2_BASE_ADDR); + + imx8m_early_setup_uart_clock(); + + imx8mp_setup_pad(MX8MP_PAD_UART2_TXD__UART2_DCE_TX | UART_PAD_CTRL); + imx8m_uart_setup(uart); + + pbl_set_putc(imx_uart_putc, uart); + + putc_ll('>'); +} + +#define pca9450_mV_to_reg(mV) (((mV) - 600) * 10 / 125) +#define pca9450_reg_to_mV(val) (((val) * 125 / 10) + 600) + +#define VDD_SOC_VAL pca9450_mV_to_reg(950) +#define VDD_SOC_SLP_VAL pca9450_mV_to_reg(850) +#define VDD_ARM_VAL pca9450_mV_to_reg(950) +#define VDD_DRAM_VAL pca9450_mV_to_reg(950) + +static struct pmic_config pca9450_cfg[] = { + { PCA9450_BUCK123_DVS, 0x29 }, + { PCA9450_BUCK1OUT_DVS0, VDD_SOC_VAL }, + { PCA9450_BUCK1OUT_DVS1, VDD_SOC_SLP_VAL }, + { PCA9450_BUCK2OUT_DVS0, VDD_ARM_VAL }, + { PCA9450_BUCK3OUT_DVS0, VDD_DRAM_VAL }, + { PCA9450_BUCK1CTRL, 0x59 }, + { PCA9450_RESET_CTRL, 0xA1 }, +}; + +static void power_init_board(void) +{ + struct pbl_i2c *i2c; + + imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL); + + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); + + i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR)); + + pmic_configure(i2c, 0x25, pca9450_cfg, ARRAY_SIZE(pca9450_cfg)); +} + +ENTRY_FUNCTION(start_karo_qsxp_ml81, r0, r1, r2) +{ + imx8mp_cpu_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + setup_uart(); + + /* + * If we are in EL3 we are running for the first time out of OCRAM, + * we'll need to initialize the DRAM and run TF-A (BL31). The TF-A + * will then jump to DRAM in EL2 + */ + if (current_el() == 3) { + imx8mp_early_clock_init(); + + power_init_board(); + + imx8mp_ddr_init(&karo_qsxp_ml81_dram_timing, DRAM_TYPE_LPDDR4); + + imx8mp_load_and_start_image_via_tfa(); + } + + /* Standard entry we hit once we initialized both DDR and ATF */ + imx8mp_barebox_entry(__dtb_z_imx8mp_karo_qsxp_ml81_qsbase4_start); +} diff --git a/arch/arm/boards/karo-qsxp-ml81/lowlevel.h b/arch/arm/boards/karo-qsxp-ml81/lowlevel.h new file mode 100644 index 0000000000..37e5269653 --- /dev/null +++ b/arch/arm/boards/karo-qsxp-ml81/lowlevel.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef KARO_QSXP_ML81_LOWLEVEL_H_ +#define KARO_QSXP_ML81_LOWLEVEL_H_ + +extern struct dram_timing_info karo_qsxp_ml81_dram_timing; + +#endif diff --git a/arch/arm/boards/karo-qsxp-ml81/lpddr4-timing.c b/arch/arm/boards/karo-qsxp-ml81/lpddr4-timing.c new file mode 100644 index 0000000000..e151bcf01a --- /dev/null +++ b/arch/arm/boards/karo-qsxp-ml81/lpddr4-timing.c @@ -0,0 +1,872 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2019 NXP + * + * Generated code from MX8M_DDR_tool + * + * Align with uboot version: + * imx_v2019.04_5.4.x and above version + */ + +#include <common.h> +#include <soc/imx8m/ddr.h> + +#include <soc/imx8m/lpddr4_define.h> + +#include "lowlevel.h" + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0xa1080020 }, + { 0x3d400020, 0x1203 }, + { 0x3d400024, 0x186a000 }, + { 0x3d400064, 0x6100e0 }, + { 0x3d400070, 0x7027f90 }, + { 0x3d400074, 0x790 }, + { 0x3d4000d0, 0xc003061c }, + { 0x3d4000d4, 0x9e0000 }, + { 0x3d4000dc, 0xd4002d }, + { 0x3d4000e0, 0x210000 }, + { 0x3d4000e8, 0x630048 }, + { 0x3d4000ec, 0x140025 }, + { 0x3d400100, 0x1a201b22 }, + { 0x3d400104, 0x60633 }, + { 0x3d40010c, 0xc0c000 }, + { 0x3d400110, 0xf04080f }, + { 0x3d400114, 0x2040c0c }, + { 0x3d400118, 0x1010007 }, + { 0x3d40011c, 0x401 }, + { 0x3d400130, 0x20600 }, + { 0x3d400134, 0xe100002 }, + { 0x3d400138, 0xe6 }, + { 0x3d400144, 0xa00050 }, + { 0x3d400180, 0x3200018 }, + { 0x3d400184, 0x28061a8 }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x497820a }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x170a }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0xdf00e4 }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x11 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x1 }, + { 0x3d4000f4, 0xc99 }, + { 0x3d400108, 0x70e1617 }, + { 0x3d400200, 0x1f }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, + { 0x3d400250, 0x1705 }, + { 0x3d400254, 0x2c }, + { 0x3d40025c, 0x4000030 }, + { 0x3d400264, 0x900093e7 }, + { 0x3d40026c, 0x2005574 }, + { 0x3d400400, 0x111 }, + { 0x3d400404, 0x72ff }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x2100e07 }, + { 0x3d400498, 0x620096 }, + { 0x3d40049c, 0x1100e07 }, + { 0x3d4004a0, 0xc8012c }, + { 0x3d400028, 0x0 }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x1 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x5 }, + { 0x100a3, 0x3 }, + { 0x100a4, 0x2 }, + { 0x100a5, 0x4 }, + { 0x100a6, 0x6 }, + { 0x100a7, 0x7 }, + { 0x110a0, 0x7 }, + { 0x110a1, 0x6 }, + { 0x110a2, 0x3 }, + { 0x110a3, 0x5 }, + { 0x110a4, 0x4 }, + { 0x110a5, 0x2 }, + { 0x110a6, 0x1 }, + { 0x110a7, 0x0 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x1 }, + { 0x120a2, 0x3 }, + { 0x120a3, 0x4 }, + { 0x120a4, 0x5 }, + { 0x120a5, 0x2 }, + { 0x120a6, 0x6 }, + { 0x120a7, 0x7 }, + { 0x130a0, 0x1 }, + { 0x130a1, 0x6 }, + { 0x130a2, 0x2 }, + { 0x130a3, 0x3 }, + { 0x130a4, 0x4 }, + { 0x130a5, 0x5 }, + { 0x130a6, 0x7 }, + { 0x130a7, 0x0 }, + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + { 0x200c5, 0x19 }, + { 0x2002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x20024, 0x1a3 }, + { 0x2003a, 0x2 }, + { 0x20056, 0x3 }, + { 0x1004d, 0x600 }, + { 0x1014d, 0x600 }, + { 0x1104d, 0x600 }, + { 0x1114d, 0x600 }, + { 0x1204d, 0x600 }, + { 0x1214d, 0x600 }, + { 0x1304d, 0x600 }, + { 0x1314d, 0x600 }, + { 0x10049, 0x69a }, + { 0x10149, 0x69a }, + { 0x11049, 0x69a }, + { 0x11149, 0x69a }, + { 0x12049, 0x69a }, + { 0x12149, 0x69a }, + { 0x13049, 0x69a }, + { 0x13149, 0x69a }, + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x320 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x104 }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + { 0x200fa, 0x1 }, + { 0x20019, 0x1 }, + { 0x200f0, 0x0 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5555 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x2007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x1204a, 0x500 }, + { 0x1304a, 0x500 }, + { 0x2002c, 0x0 }, +}; + +/* P0 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xc80 }, + { 0x54004, 0x2 }, + { 0x54005, 0x303c }, + { 0x54006, 0x14 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, 0x21 }, + { 0x5401b, 0x4863 }, + { 0x5401c, 0x2500 }, + { 0x5401e, 0x14 }, + { 0x5401f, 0x2dd4 }, + { 0x54020, 0x21 }, + { 0x54021, 0x4863 }, + { 0x54022, 0x2500 }, + { 0x54024, 0x14 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xd400 }, + { 0x54033, 0x212d }, + { 0x54034, 0x6300 }, + { 0x54035, 0x48 }, + { 0x54036, 0x25 }, + { 0x54037, 0x1400 }, + { 0x54038, 0xd400 }, + { 0x54039, 0x212d }, + { 0x5403a, 0x6300 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x25 }, + { 0x5403d, 0x1400 }, + { 0xd0000, 0x1 }, +}; + +/* P0 2D message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xc80 }, + { 0x54004, 0x2 }, + { 0x54005, 0x303c }, + { 0x54006, 0x14 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x110 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, 0x21 }, + { 0x5401b, 0x4863 }, + { 0x5401c, 0x2500 }, + { 0x5401e, 0x14 }, + { 0x5401f, 0x2dd4 }, + { 0x54020, 0x21 }, + { 0x54021, 0x4863 }, + { 0x54022, 0x2500 }, + { 0x54024, 0x14 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xd400 }, + { 0x54033, 0x212d }, + { 0x54034, 0x6300 }, + { 0x54035, 0x48 }, + { 0x54036, 0x25 }, + { 0x54037, 0x1400 }, + { 0x54038, 0xd400 }, + { 0x54039, 0x212d }, + { 0x5403a, 0x6300 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x25 }, + { 0x5403d, 0x1400 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x633 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x633 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x633 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x633 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x633 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x633 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xb }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x1 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a4, 0x0 }, + { 0x900a5, 0x790 }, + { 0x900a6, 0x11a }, + { 0x900a7, 0x8 }, + { 0x900a8, 0x7aa }, + { 0x900a9, 0x2a }, + { 0x900aa, 0x10 }, + { 0x900ab, 0x7b2 }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x0 }, + { 0x900ae, 0x7c8 }, + { 0x900af, 0x109 }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x10 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x1 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xd }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x8 }, + { 0x90159, 0xe8 }, + { 0x9015a, 0x109 }, + { 0x9015b, 0x0 }, + { 0x9015c, 0x8140 }, + { 0x9015d, 0x10c }, + { 0x9015e, 0x10 }, + { 0x9015f, 0x8138 }, + { 0x90160, 0x104 }, + { 0x90161, 0x8 }, + { 0x90162, 0x448 }, + { 0x90163, 0x109 }, + { 0x90164, 0xf }, + { 0x90165, 0x7c0 }, + { 0x90166, 0x109 }, + { 0x90167, 0x0 }, + { 0x90168, 0xe8 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x47 }, + { 0x9016b, 0x630 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x8 }, + { 0x9016e, 0x618 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0xe0 }, + { 0x90172, 0x109 }, + { 0x90173, 0x0 }, + { 0x90174, 0x7c8 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x8140 }, + { 0x90178, 0x10c }, + { 0x90179, 0x0 }, + { 0x9017a, 0x478 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x1 }, + { 0x9017e, 0x8 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x4 }, + { 0x90181, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x29 }, + { 0x90026, 0x68 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x384 }, + { 0x2000c, 0xc8 }, + { 0x2000d, 0x7d0 }, + { 0x2000e, 0x2c }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3200mts 1D */ + .drate = 3200, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P0 3200mts 2D */ + .drate = 3200, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info karo_qsxp_ml81_dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3200, }, +}; diff --git a/arch/arm/boards/karo-tx25/board.c b/arch/arm/boards/karo-tx25/board.c index 6086da53cc..7e8691ef93 100644 --- a/arch/arm/boards/karo-tx25/board.c +++ b/arch/arm/boards/karo-tx25/board.c @@ -9,20 +9,19 @@ #include <linux/sizes.h> #include <gpio.h> #include <environment.h> -#include <mach/imx25-regs.h> +#include <mach/imx/imx25-regs.h> #include <asm/armlinux.h> #include <asm/sections.h> #include <asm/barebox-arm.h> #include <io.h> -#include <partition.h> -#include <generated/mach-types.h> -#include <mach/imx-nand.h> -#include <mach/iomux-mx25.h> -#include <mach/generic.h> -#include <mach/iim.h> +#include <asm/mach-types.h> +#include <mach/imx/imx-nand.h> +#include <mach/imx/iomux-mx25.h> +#include <mach/imx/generic.h> +#include <mach/imx/iim.h> +#include <platform_data/imxfb.h> #include <linux/err.h> -#include <mach/devices-imx25.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <asm/mmu.h> #define TX25_FEC_PWR_GPIO IMX_GPIO_NR(4, 9) @@ -165,8 +164,8 @@ static int tx25_init_fb(void) mxc_iomux_v3_setup_multiple_pads(tx25_lcdc_gpios, ARRAY_SIZE(tx25_lcdc_gpios)); - imx25_add_fb(&tx25_fb_data); - + add_generic_device("imxfb", -1, NULL, (resource_size_t)MX25_LCDC_BASE_ADDR, 0x1000, + IORESOURCE_MEM, &tx25_fb_data); return 0; } device_initcall(tx25_init_fb); diff --git a/arch/arm/boards/karo-tx25/lowlevel.c b/arch/arm/boards/karo-tx25/lowlevel.c index f20c659d5d..d6658b535f 100644 --- a/arch/arm/boards/karo-tx25/lowlevel.c +++ b/arch/arm/boards/karo-tx25/lowlevel.c @@ -3,11 +3,11 @@ #include <common.h> #include <init.h> -#include <mach/imx25-regs.h> -#include <mach/esdctl.h> +#include <mach/imx/imx25-regs.h> +#include <mach/imx/esdctl.h> #include <io.h> #include <linux/sizes.h> -#include <mach/imx-nand.h> +#include <mach/imx/imx-nand.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <asm/system.h> diff --git a/arch/arm/boards/karo-tx28/lowlevel.c b/arch/arm/boards/karo-tx28/lowlevel.c index 28d96f3e1a..3be5f521e1 100644 --- a/arch/arm/boards/karo-tx28/lowlevel.c +++ b/arch/arm/boards/karo-tx28/lowlevel.c @@ -7,17 +7,30 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx28-regs.h> -#include <mach/init.h> +#include <mach/mxs/imx28-regs.h> +#include <mach/mxs/init.h> #include <io.h> #include <debug_ll.h> -#include <mach/iomux.h> +#include <mach/mxs/iomux.h> #include <stmp-device.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> + +static noinline void continue_imx_entry(size_t size) +{ + static struct barebox_arm_boarddata boarddata = { + .magic = BAREBOX_ARM_BOARDDATA_MAGIC, + .machine = MACH_TYPE_TX28, + }; + + barebox_arm_entry(IMX_MEMORY_BASE, size, &boarddata); +} ENTRY_FUNCTION(start_barebox_karo_tx28, r0, r1, r2) { - barebox_arm_entry(IMX_MEMORY_BASE, SZ_128M, (void *)MACH_TYPE_TX28); + relocate_to_current_adr(); + setup_c(); + + continue_imx_entry(SZ_128M); } static const uint32_t iomux_pads[] = { diff --git a/arch/arm/boards/karo-tx28/tx28-stk5.c b/arch/arm/boards/karo-tx28/tx28-stk5.c index 56211d7a3a..d1fd526c00 100644 --- a/arch/arm/boards/karo-tx28/tx28-stk5.c +++ b/arch/arm/boards/karo-tx28/tx28-stk5.c @@ -14,13 +14,12 @@ #include <asm/sections.h> #include <asm/barebox-arm.h> #include <linux/err.h> -#include <mach/imx-regs.h> -#include <mach/clock.h> -#include <mach/mci.h> -#include <mach/fb.h> -#include <mach/ocotp.h> -#include <mach/iomux.h> -#include <generated/mach-types.h> +#include <mach/mxs/imx-regs.h> +#include <mach/mxs/mci.h> +#include <mach/mxs/fb.h> +#include <mach/mxs/ocotp.h> +#include <mach/mxs/iomux.h> +#include <asm/mach-types.h> #include "tx28.h" diff --git a/arch/arm/boards/karo-tx28/tx28.c b/arch/arm/boards/karo-tx28/tx28.c index 8bd2252410..ef3c42b5f6 100644 --- a/arch/arm/boards/karo-tx28/tx28.c +++ b/arch/arm/boards/karo-tx28/tx28.c @@ -9,10 +9,10 @@ #include <asm/armlinux.h> #include <asm/barebox-arm.h> #include <io.h> -#include <generated/mach-types.h> -#include <mach/imx-regs.h> -#include <mach/devices.h> -#include <mach/iomux.h> +#include <asm/mach-types.h> +#include <mach/mxs/imx-regs.h> +#include <mach/mxs/devices.h> +#include <mach/mxs/iomux.h> #include <asm/mmu.h> #include "tx28.h" diff --git a/arch/arm/boards/karo-tx53/board.c b/arch/arm/boards/karo-tx53/board.c index 738faf8f18..e00378746c 100644 --- a/arch/arm/boards/karo-tx53/board.c +++ b/arch/arm/boards/karo-tx53/board.c @@ -10,21 +10,19 @@ #include <init.h> #include <nand.h> #include <net.h> -#include <partition.h> #include <linux/sizes.h> #include <gpio.h> #include <mci.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> -#include <mach/imx53-regs.h> -#include <mach/iomux-mx53.h> -#include <mach/devices-imx53.h> -#include <mach/generic.h> -#include <mach/imx-nand.h> -#include <mach/iim.h> -#include <mach/imx5.h> -#include <mach/bbu.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/iomux-mx53.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx-nand.h> +#include <mach/imx/iim.h> +#include <mach/imx/imx5.h> +#include <mach/imx/bbu.h> #include <asm/armlinux.h> #include <io.h> diff --git a/arch/arm/boards/karo-tx53/lowlevel.c b/arch/arm/boards/karo-tx53/lowlevel.c index e1bce4d329..914ef69de9 100644 --- a/arch/arm/boards/karo-tx53/lowlevel.c +++ b/arch/arm/boards/karo-tx53/lowlevel.c @@ -2,12 +2,13 @@ #include <common.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx5.h> -#include <mach/imx53-regs.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/imx5.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> #include <asm/cache.h> extern char __dtb_imx53_tx53_xx30_start[]; diff --git a/arch/arm/boards/karo-tx6x/board.c b/arch/arm/boards/karo-tx6x/board.c index 2a141be61a..f964ddefd1 100644 --- a/arch/arm/boards/karo-tx6x/board.c +++ b/arch/arm/boards/karo-tx6x/board.c @@ -16,8 +16,8 @@ #include <linux/clk.h> #include <linux/kernel.h> #include <environment.h> -#include <mach/bbu.h> -#include <mach/imx6.h> +#include <mach/imx/bbu.h> +#include <mach/imx/imx6.h> #include <mfd/imx6q-iomuxc-gpr.h> #include "pmic.h" @@ -112,12 +112,12 @@ static int tx6x_devices_init(void) if (sbmr1 & (1 << 7)) { imx6_bbu_nand_register_handler("nand", BBU_HANDLER_FLAG_DEFAULT); of_device_enable_and_register_by_name("environment-nand"); - of_device_enable_and_register_by_name("gpmi-nand@00112000"); + of_device_enable_and_register_by_alias("nand"); } else { imx6_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc3.boot0", BBU_HANDLER_FLAG_DEFAULT); of_device_enable_and_register_by_name("environment-emmc"); - of_device_enable_and_register_by_name("usdhc@0219c000"); + of_device_enable_and_register_by_alias("mmc3"); } diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6dl-1g.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-1g.imxcfg index d860a5e2af..3d15238c20 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6dl-1g.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-1g.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> #include "ram-base.imxcfg" #include "1600mhz_4x128mx16.imxcfg" diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg index 51f600d490..bfc9a80a3e 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> wm 32 0x020e0158 0x00000016 wm 32 0x020e0174 0x00000011 diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg index 697ce45480..b05c4a186b 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 0x020e00a4 0x00000016 wm 32 0x020e00c4 0x00000011 diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg index 8756e8dfb5..bbb9e01022 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 0x020e00a4 0x00000016 wm 32 0x020e00c4 0x00000011 diff --git a/arch/arm/boards/karo-tx6x/lowlevel.c b/arch/arm/boards/karo-tx6x/lowlevel.c index a80862025a..082307626b 100644 --- a/arch/arm/boards/karo-tx6x/lowlevel.c +++ b/arch/arm/boards/karo-tx6x/lowlevel.c @@ -2,12 +2,13 @@ // SPDX-FileCopyrightText: 2014 Steffen Trumtrar, Pengutronix #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <image-metadata.h> -#include <mach/generic.h> -#include <mach/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/esdctl.h> #include <linux/sizes.h> static inline void setup_uart(void) diff --git a/arch/arm/boards/kindle-mx50/board.c b/arch/arm/boards/kindle-mx50/board.c index 4cfd68a258..a5c81ac8e7 100644 --- a/arch/arm/boards/kindle-mx50/board.c +++ b/arch/arm/boards/kindle-mx50/board.c @@ -10,17 +10,16 @@ #include <driver.h> #include <param.h> #include <magicvar.h> -#include <partition.h> #include <libfile.h> #include <globalvar.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <linux/sizes.h> -#include <usb/fsl_usb2.h> -#include <mach/generic.h> -#include <mach/imx50-regs.h> -#include <mach/imx5.h> -#include <mach/revision.h> +#include <linux/usb/fsl_usb2.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx50-regs.h> +#include <mach/imx/imx5.h> +#include <mach/imx/revision.h> /* 16 byte id for serial number */ #define ATAG_SERIAL16 0x5441000a @@ -141,7 +140,7 @@ mem_initcall(kindle_mx50_mem_init); static int kindle_mx50_devices_init(void) { - struct device_d *dev; + struct device *dev; if (!is_mx50_kindle()) return 0; diff --git a/arch/arm/boards/kindle-mx50/lowlevel.c b/arch/arm/boards/kindle-mx50/lowlevel.c index fce23ec6e0..61d2b037fe 100644 --- a/arch/arm/boards/kindle-mx50/lowlevel.c +++ b/arch/arm/boards/kindle-mx50/lowlevel.c @@ -8,8 +8,8 @@ #include <asm/sections.h> #include <asm/cache.h> #include <asm/mmu.h> -#include <mach/imx50-regs.h> -#include <mach/generic.h> +#include <mach/imx/imx50-regs.h> +#include <mach/imx/generic.h> extern char __dtb_imx50_kindle_d01100_start[]; extern char __dtb_imx50_kindle_d01200_start[]; diff --git a/arch/arm/boards/kindle3/env/boot/mmc_kernel b/arch/arm/boards/kindle3/env/boot/mmc_kernel deleted file mode 100644 index c6145b85ac..0000000000 --- a/arch/arm/boards/kindle3/env/boot/mmc_kernel +++ /dev/null @@ -1,7 +0,0 @@ -#!/bin/sh -# Boot the Amazon factory-shipped kernel uimage stored on -# the eMMC at MOVINAND_OFFSET_KERNEL=266240. - -global linux.bootargs.dyn.root="root=/dev/mmcblk0p1 ro" - -bootm -c -a 0x80008000 /dev/disk0.kernel diff --git a/arch/arm/boards/kindle3/env/init/serials b/arch/arm/boards/kindle3/env/init/serials deleted file mode 100644 index 76580aeece..0000000000 --- a/arch/arm/boards/kindle3/env/init/serials +++ /dev/null @@ -1,21 +0,0 @@ -#!/bin/sh - -global board.serial16 -global board.revision16 - -# 16-byte alphanumeric containing the serial number -# SN is the first 16 bytes before the bootloader -if test -b /dev/disk0.serial; then - if memcpy -s /dev/disk0.serial -d tmp_serial16 -b 0 0 16; then - readf tmp_serial16 global.board.serial16 - fi -fi -[ -f tmp_serial16 ] && rm tmp_serial16 - -# 16-byte alphanumeric containing the board revision -if test -b /dev/disk0.imx_header; then - if memcpy -s /dev/disk0.imx_header -d tmp_revision16 -b 2032 0 16; then - readf tmp_revision16 global.board.revision16 - fi -fi -[ -f tmp_revision16 ] && rm tmp_revision16 diff --git a/arch/arm/boards/kindle3/env/init/usbconsole b/arch/arm/boards/kindle3/env/init/usbconsole deleted file mode 100644 index 87a8f9bf8c..0000000000 --- a/arch/arm/boards/kindle3/env/init/usbconsole +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -# Fiveway device select key activates usbserial access for 60s -echo -if gpio_get_value 63; then - usbserial - global.autoboot_timeout=60 -fi diff --git a/arch/arm/boards/kindle3/env/nv/autoboot_timeout b/arch/arm/boards/kindle3/env/nv/autoboot_timeout deleted file mode 100644 index 00750edc07..0000000000 --- a/arch/arm/boards/kindle3/env/nv/autoboot_timeout +++ /dev/null @@ -1 +0,0 @@ -3 diff --git a/arch/arm/boards/kindle3/env/nv/boot.default b/arch/arm/boards/kindle3/env/nv/boot.default deleted file mode 100644 index 3118b7af45..0000000000 --- a/arch/arm/boards/kindle3/env/nv/boot.default +++ /dev/null @@ -1 +0,0 @@ -mmc_kernel diff --git a/arch/arm/boards/kindle3/env/nv/linux.bootargs.base b/arch/arm/boards/kindle3/env/nv/linux.bootargs.base deleted file mode 100644 index 3a940d88fa..0000000000 --- a/arch/arm/boards/kindle3/env/nv/linux.bootargs.base +++ /dev/null @@ -1 +0,0 @@ -mem=256M ip=none diff --git a/arch/arm/boards/kindle3/env/nv/linux.bootargs.console b/arch/arm/boards/kindle3/env/nv/linux.bootargs.console deleted file mode 100644 index d775310b40..0000000000 --- a/arch/arm/boards/kindle3/env/nv/linux.bootargs.console +++ /dev/null @@ -1 +0,0 @@ -console=ttymxc0,115200 diff --git a/arch/arm/boards/kindle3/env/nv/linux.bootargs.lpj b/arch/arm/boards/kindle3/env/nv/linux.bootargs.lpj deleted file mode 100644 index aa3ba59e55..0000000000 --- a/arch/arm/boards/kindle3/env/nv/linux.bootargs.lpj +++ /dev/null @@ -1 +0,0 @@ -lpj=2555904 diff --git a/arch/arm/boards/kindle3/flash-header.imxcfg b/arch/arm/boards/kindle3/flash-header.imxcfg deleted file mode 100644 index 5ef09200ed..0000000000 --- a/arch/arm/boards/kindle3/flash-header.imxcfg +++ /dev/null @@ -1,26 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -soc imx35 -loadaddr 0x87eff400 -ivtofs 0x400 - -wm 32 0x53f80004 0x00821000 -wm 32 0x53f80004 0x00821000 -wm 32 0xb8001010 0x00000002 -wm 32 0xb8001010 0x00000004 -wm 32 0xb8001004 0x0019672f -wm 32 0xb8001000 0x93100000 -wm 8 0x80000400 0xda -wm 32 0xb8001000 0xa3100000 -wm 32 0x80000000 0x12344321 -wm 32 0x80000000 0x12344321 -wm 32 0xb8001000 0xb3100000 -wm 8 0x80000033 0xda -wm 8 0x82000000 0xff -wm 32 0xb8001000 0x83226080 -wm 32 0xb8001010 0x0000000c -wm 32 0x80000000 0xdeadbeef -wm 32 0xb8001030 0x00e78000 -wm 32 0x43fac004 0x00000004 -wm 32 0x43fac328 0x00002100 -wm 32 0x43fac7d0 0x00000000 diff --git a/arch/arm/boards/kindle3/kindle3.c b/arch/arm/boards/kindle3/kindle3.c deleted file mode 100644 index a593dc424d..0000000000 --- a/arch/arm/boards/kindle3/kindle3.c +++ /dev/null @@ -1,304 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix -// SPDX-FileCopyrightText: 2016 Alexander Kurz <akurz@blala.de> - -/* Board support for the Amazon Kindle 3rd generation */ - -#include <common.h> -#include <command.h> -#include <driver.h> -#include <init.h> -#include <bootsource.h> -#include <io.h> -#include <environment.h> -#include <generated/mach-types.h> -#include <asm/armlinux.h> -#include <asm/mmu.h> -#include <asm/setup.h> -#include <mach/imx35-regs.h> -#include <mach/imx-pll.h> -#include <mach/iomux-mx35.h> -#include <mach/devices-imx35.h> -#include <mach/generic.h> -#include <usb/fsl_usb2.h> -#include <mach/usb.h> -#include <mach/spi.h> -#include <spi/spi.h> -#include <magicvar.h> - -/* 16 byte id for serial number */ -#define ATAG_SERIAL16 0x5441000a -/* 16 byte id for a board revision */ -#define ATAG_REVISION16 0x5441000b - -struct char16_tag { - char data[16]; -}; - -static struct tag *setup_16char_tag(struct tag *params, uint32_t tag, - const char *value) -{ - struct char16_tag *target; - target = ((void *) params) + sizeof(struct tag_header); - params->hdr.tag = tag; - params->hdr.size = tag_size(char16_tag); - memcpy(target->data, value, sizeof target->data); - return tag_next(params); -} - -static const char *get_env_16char_tag(const char *tag) -{ - static const char *default16 = "0000000000000000"; - const char *value; - value = getenv(tag); - if (!value) { - printf("env var %s not found, using default\n", tag); - return default16; - } - if (strlen(value) != 16) { - printf("env var %s: expecting 16 characters, using default\n", - tag); - return default16; - } - printf("%s: %s\n", tag, value); - return value; -} - -BAREBOX_MAGICVAR(global.board.serial16, - "Pass the kindle Serial as vendor-specific ATAG to linux"); -BAREBOX_MAGICVAR(global.board.revision16, - "Pass the kindle BoardId as vendor-specific ATAG to linux"); - -/* The Kindle3 Kernel expects two custom ATAGs, ATAG_REVISION16 describing - * the board and ATAG_SERIAL16 to identify the individual device. - */ -static struct tag *kindle3_append_atags(struct tag *params) -{ - params = setup_16char_tag(params, ATAG_SERIAL16, - get_env_16char_tag("global.board.serial16")); - params = setup_16char_tag(params, ATAG_REVISION16, - get_env_16char_tag("global.board.revision16")); - return params; -} - -static struct fsl_usb2_platform_data kindle3_usb_info = { - .operating_mode = FSL_USB2_DR_DEVICE, - .phy_mode = FSL_USB2_PHY_UTMI, -}; - -/* SPI master devices. */ -static int kindle3_spi0_internal_chipselect[] = { - IMX_GPIO_NR(1, 18), -}; - -static struct spi_imx_master kindle3_spi0_info = { - .chipselect = kindle3_spi0_internal_chipselect, - .num_chipselect = ARRAY_SIZE(kindle3_spi0_internal_chipselect), -}; - -static const struct spi_board_info kindle3_spi_board_info[] = { - { - .name = "mc13892", - .bus_num = 0, - .chip_select = 0, - .mode = SPI_CS_HIGH, - }, -}; - -static int kindle3_mmu_init(void) -{ - l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000); - - return 0; -} -postmmu_initcall(kindle3_mmu_init); - -static int kindle3_devices_init(void) -{ - imx35_add_mmc0(NULL); - - if (IS_ENABLED(CONFIG_USB_GADGET)) { - unsigned int tmp; - /* Workaround ENGcm09152 */ - tmp = readl(MX35_USB_OTG_BASE_ADDR + 0x608); - writel(tmp | (1 << 23), MX35_USB_OTG_BASE_ADDR + 0x608); - add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, - MX35_USB_OTG_BASE_ADDR, 0x200, - IORESOURCE_MEM, &kindle3_usb_info); - } - - /* The kindle3 related linux patch published by amazon bluntly - * renamed MACH_MX35_3DS to MACH_MX35_LUIGI - */ - armlinux_set_architecture(MACH_TYPE_MX35_3DS); - - /* Compatibility ATAGs for original kernel */ - armlinux_set_atag_appender(kindle3_append_atags); - return 0; -} -device_initcall(kindle3_devices_init); - -#define FIVEWAY_PAD_CTL (PAD_CTL_PUS_100K_UP | PAD_CTL_HYS | PAD_CTL_DVS) -static iomux_v3_cfg_t kindle3_pads[] = { - /* UART1 */ - MX35_PAD_RXD1__UART1_RXD_MUX, - MX35_PAD_TXD1__UART1_TXD_MUX, - - /* eMMC */ - MX35_PAD_SD1_CMD__ESDHC1_CMD, - MX35_PAD_SD1_CLK__ESDHC1_CLK, - MX35_PAD_SD1_DATA0__ESDHC1_DAT0, - MX35_PAD_SD1_DATA1__ESDHC1_DAT1, - MX35_PAD_SD1_DATA2__ESDHC1_DAT2, - MX35_PAD_SD1_DATA3__ESDHC1_DAT3, - - /* USB */ - MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR, - MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC, - - /* I2C 1+2 */ - MX35_PAD_I2C1_CLK__I2C1_SCL, - MX35_PAD_I2C1_DAT__I2C1_SDA, - MX35_PAD_I2C2_CLK__I2C2_SCL, - MX35_PAD_I2C2_DAT__I2C2_SDA, - - /* SPI */ - MX35_PAD_CSPI1_SS0__GPIO1_18, - MX35_PAD_CSPI1_SCLK__CSPI1_SCLK, - MX35_PAD_CSPI1_MOSI__CSPI1_MOSI, - MX35_PAD_CSPI1_MISO__CSPI1_MISO, - MX35_PAD_CSPI1_SPI_RDY__CSPI1_RDY, - - /* fiveway device: up, down, left, right, select */ - IOMUX_PAD(0x718, 0x2b4, 5, 0x8b4, 1, FIVEWAY_PAD_CTL), - IOMUX_PAD(0x71c, 0x2b8, 5, 0x8b8, 1, FIVEWAY_PAD_CTL), - IOMUX_PAD(0x59c, 0x158, 5, 0x830, 0, FIVEWAY_PAD_CTL), - IOMUX_PAD(0x724, 0x2c0, 5, 0x8c4, 1, FIVEWAY_PAD_CTL), - IOMUX_PAD(0x728, 0x2c4, 5, 0x8c8, 1, FIVEWAY_PAD_CTL), - - /* Volume keys: up, down */ - MX35_PAD_SCKR__GPIO1_4, - MX35_PAD_FSR__GPIO1_5, - -}; - -static int kindle3_part_init(void) -{ - devfs_add_partition("disk0", SZ_1K, 2 * SZ_1K, - DEVFS_PARTITION_FIXED, "disk0.imx_header"); - devfs_add_partition("disk0", 4 * SZ_1K, (192 - 1) * SZ_1K, - DEVFS_PARTITION_FIXED, "disk0.self"); - devfs_add_partition("disk0", (192 + 3) * SZ_1K, SZ_64K, - DEVFS_PARTITION_FIXED, "env0"); - devfs_add_partition("disk0", (256 + 3) * SZ_1K, SZ_1K, - DEVFS_PARTITION_FIXED, "disk0.serial"); - devfs_add_partition("disk0", (256 + 4) * SZ_1K, 3407872, - DEVFS_PARTITION_FIXED, "disk0.kernel"); - devfs_add_partition("disk0", 3674112, SZ_256K, - DEVFS_PARTITION_FIXED, "disk0.waveform"); - return 0; -} - -late_initcall(kindle3_part_init); - -static int imx35_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(kindle3_pads, - ARRAY_SIZE(kindle3_pads)); - - barebox_set_model("Kindle3"); - barebox_set_hostname("kindle3"); - - imx35_add_uart0(); - - spi_register_board_info(kindle3_spi_board_info, - ARRAY_SIZE(kindle3_spi_board_info)); - imx35_add_spi0(&kindle3_spi0_info); - - imx35_add_i2c0(NULL); - imx35_add_i2c1(NULL); - return 0; -} -console_initcall(imx35_console_init); - -static int kindle3_core_setup(void) -{ - u32 tmp; - - /* AIPS setup - Only setup MPROTx registers. - * The PACR default values are good. - */ - /* - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - writel(0x77777777, MX35_AIPS1_BASE_ADDR); - writel(0x77777777, MX35_AIPS1_BASE_ADDR + 0x4); - writel(0x77777777, MX35_AIPS2_BASE_ADDR); - writel(0x77777777, MX35_AIPS2_BASE_ADDR + 0x4); - - /* - * Clear the on and off peripheral modules Supervisor Protect bit - * for SDMA to access them. Did not change the AIPS control registers - * (offset 0x20) access type - */ - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x4C); - tmp = readl(MX35_AIPS1_BASE_ADDR + 0x50); - tmp &= 0x00FFFFFF; - writel(tmp, MX35_AIPS1_BASE_ADDR + 0x50); - - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x4C); - tmp = readl(MX35_AIPS2_BASE_ADDR + 0x50); - tmp &= 0x00FFFFFF; - writel(tmp, MX35_AIPS2_BASE_ADDR + 0x50); - - /* MAX (Multi-Layer AHB Crossbar Switch) setup */ - - /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ -#define MAX_PARAM1 0x00302154 - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x0); /* for S0 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x100); /* for S1 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x200); /* for S2 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x300); /* for S3 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x400); /* for S4 */ - - /* SGPCR - always park on last master */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x10); /* for S0 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x110); /* for S1 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x210); /* for S2 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x310); /* for S3 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x410); /* for S4 */ - - /* MGPCR - restore default values */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x800); /* for M0 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x900); /* for M1 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xa00); /* for M2 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xb00); /* for M3 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xc00); /* for M4 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xd00); /* for M5 */ - - /* - * M3IF Control Register (M3IFCTL) - * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 - * MRRP[1] = MAX1 not on priority list (0 << 0) = 0x00000000 - * MRRP[2] = L2CC1 not on priority list (0 << 0) = 0x00000000 - * MRRP[3] = USB not on priority list (0 << 0) = 0x00000000 - * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 - * MRRP[5] = GPU not on priority list (0 << 0) = 0x00000000 - * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 - * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 - * ------------ - * 0x00000040 - */ - writel(0x40, MX35_M3IF_BASE_ADDR); - - return 0; -} - -core_initcall(kindle3_core_setup); diff --git a/arch/arm/boards/kindle3/lowlevel.c b/arch/arm/boards/kindle3/lowlevel.c deleted file mode 100644 index 251bcf9d42..0000000000 --- a/arch/arm/boards/kindle3/lowlevel.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix -// SPDX-FileCopyrightText: 2016 Alexander Kurz <akurz@blala.de> - -#include <common.h> -#include <init.h> -#include <mach/imx35-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> -#include <asm/cache-l2x0.h> -#include <io.h> -#include <mach/imx-nand.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <asm/sections.h> -#include <asm-generic/memory_layout.h> -#include <asm/system.h> - -void __bare_init __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - uint32_t r, s; - unsigned long ccm_base = MX35_CCM_BASE_ADDR; - register uint32_t loops = 0x20000; - - arm_cpu_lowlevel_init(); - - arm_setup_stack(MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE); - - r = get_cr(); - r |= CR_Z; /* Flow prediction (Z) */ - r |= CR_U; /* unaligned accesses */ - r |= CR_FI; /* Low Int Latency */ - - __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1" : "=r"(s)); - s |= 0x7; - __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1" : : "r"(s)); - - set_cr(r); - - r = 0; - __asm__ __volatile__("mcr p15, 0, %0, c15, c2, 4" : : "r"(r)); - - /* - * Branch predicition is now enabled. Flush the BTAC to ensure a valid - * starting point. Don't flush BTAC while it is disabled to avoid - * ARM1136 erratum 408023. - */ - __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 6" : : "r"(r)); - - /* invalidate I cache and D cache */ - __asm__ __volatile__("mcr p15, 0, %0, c7, c7, 0" : : "r"(r)); - - /* invalidate TLBs */ - __asm__ __volatile__("mcr p15, 0, %0, c8, c7, 0" : : "r"(r)); - - /* Drain the write buffer */ - __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" : : "r"(r)); - - /* Also setup the Peripheral Port Remap register inside the core */ - r = 0x40000015; /* start from AIPS 2GB region */ - __asm__ __volatile__("mcr p15, 0, %0, c15, c2, 4" : : "r"(r)); - - /* - * End of ARM1136 init - */ - - writel(0x003F4208, ccm_base + MX35_CCM_CCMR); - - /* Set MPLL , arm clock and ahb clock*/ - writel(MPCTL_PARAM_532, ccm_base + MX35_CCM_MPCTL); - - writel(PPCTL_PARAM_300, ccm_base + MX35_CCM_PPCTL); - writel(0x00001000, ccm_base + MX35_CCM_PDR0); - - r = readl(ccm_base + MX35_CCM_CGR0); - r |= 0x3 << MX35_CCM_CGR0_CSPI1_SHIFT; - r |= 0x3 << MX35_CCM_CGR0_EPIT1_SHIFT; - r |= 0x3 << MX35_CCM_CGR0_ESDHC1_SHIFT; - writel(r, ccm_base + MX35_CCM_CGR0); - - r = readl(ccm_base + MX35_CCM_CGR1); - r |= 0x3 << MX35_CCM_CGR1_IOMUX_SHIFT; - r |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; - r |= 0x3 << MX35_CCM_CGR1_I2C2_SHIFT; - r |= 0x3 << MX35_CCM_CGR1_GPIO1_SHIFT; - r |= 0x3 << MX35_CCM_CGR1_GPIO2_SHIFT; - writel(r, ccm_base + MX35_CCM_CGR1); - - r = readl(MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); - r |= 0x1000; - writel(r, MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); - - /* Skip SDRAM initialization if we run from RAM */ - r = get_pc(); - if (r > 0x80000000 && r < 0x90000000) - goto out; - - /* Init Mobile DDR */ - writel(0x0000000E, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); - /* ESD_MISC: Enable DDR SDRAM */ - writel(0x00000004, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b" : "=r" (loops) : "0" (loops)); - - writel(0x0019672f, MX35_ESDCTL_BASE_ADDR + IMX_ESDCFG0); - /* ESD_ESDCTL0 : select Prechare-All mode */ - writel(0x93220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX35_CSD0_BASE_ADDR + 0x400); - /* ESD_ESDCTL0: Auto Refresh command */ - writel(0xA3220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX35_CSD0_BASE_ADDR); - writeb(0xda, MX35_CSD0_BASE_ADDR); - /* ESD_ESDCTL0: Load Mode Register */ - writel(0xB3220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX35_CSD0_BASE_ADDR + 0x33); - writeb(0xff, MX35_CSD0_BASE_ADDR + 0x2000000); - /* ESD_ESDCTL0: enable Auto-Refresh */ - writel(0x83228080, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - - writel(0x0000000c, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); - writel(0xdeadbeef, MX35_CSD0_BASE_ADDR); - writel(0x00e78000, MX35_CSD0_BASE_ADDR + 0x1030); - -out: - imx35_barebox_entry(NULL); -} diff --git a/arch/arm/boards/kontron-samx6i/board.c b/arch/arm/boards/kontron-samx6i/board.c index b4b0eac824..376548f549 100644 --- a/arch/arm/boards/kontron-samx6i/board.c +++ b/arch/arm/boards/kontron-samx6i/board.c @@ -18,8 +18,8 @@ #include <common.h> #include <init.h> #include <of.h> -#include <mach/bbu.h> -#include <mach/esdctl.h> +#include <mach/imx/bbu.h> +#include <mach/imx/esdctl.h> #include <asm/armlinux.h> diff --git a/arch/arm/boards/kontron-samx6i/lowlevel.c b/arch/arm/boards/kontron-samx6i/lowlevel.c index afb7372323..59694e72f9 100644 --- a/arch/arm/boards/kontron-samx6i/lowlevel.c +++ b/arch/arm/boards/kontron-samx6i/lowlevel.c @@ -10,6 +10,7 @@ */ #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <io.h> #include <asm/barebox-arm-head.h> @@ -17,8 +18,8 @@ #include <asm/sections.h> #include <asm/cache.h> #include <asm/mmu.h> -#include <mach/imx6.h> -#include <mach/esdctl.h> +#include <mach/imx/imx6.h> +#include <mach/imx/esdctl.h> #include "mem.h" diff --git a/arch/arm/boards/kontron-samx6i/mem.c b/arch/arm/boards/kontron-samx6i/mem.c index 08dceb55c0..19e2ac2dd8 100644 --- a/arch/arm/boards/kontron-samx6i/mem.c +++ b/arch/arm/boards/kontron-samx6i/mem.c @@ -11,9 +11,9 @@ #include <linux/sizes.h> #include <common.h> -#include <mach/iomux-mx6.h> -#include <mach/imx-gpio.h> -#include <mach/imx6.h> +#include <mach/imx/iomux-mx6.h> +#include <mach/imx/imx-gpio.h> +#include <mach/imx/imx6.h> #include "mem.h" diff --git a/arch/arm/boards/lenovo-ix4-300d/lowlevel.c b/arch/arm/boards/lenovo-ix4-300d/lowlevel.c index c0a695908f..d76e4af30d 100644 --- a/arch/arm/boards/lenovo-ix4-300d/lowlevel.c +++ b/arch/arm/boards/lenovo-ix4-300d/lowlevel.c @@ -3,13 +3,13 @@ #include <common.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> +#include <mach/mvebu/barebox-arm-head.h> #include <linux/sizes.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/lowlevel.h> extern char __dtb_armada_xp_lenovo_ix4_300d_bb_start[]; -ENTRY_FUNCTION(start_lenovo_ix4_300d, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_lenovo_ix4_300d, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/ls1021aiot/Makefile b/arch/arm/boards/ls1021aiot/Makefile new file mode 100644 index 0000000000..df69ce814b --- /dev/null +++ b/arch/arm/boards/ls1021aiot/Makefile @@ -0,0 +1,3 @@ +lwl-y += lowlevel.o +obj-y += board.o +lwl-y += start.o diff --git a/arch/arm/boards/ls1021aiot/board.c b/arch/arm/boards/ls1021aiot/board.c new file mode 100644 index 0000000000..70070a4e75 --- /dev/null +++ b/arch/arm/boards/ls1021aiot/board.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ +// SPDX-FileCopyrightText: (C) Copyright 2023 Ametek Inc. +// SPDX-FileCopyrightText: 2023 Renaud Barbier <renaud.barbier@ametek.com>, + +#include <common.h> +#include <init.h> +#include <bbu.h> +#include <net.h> +#include <crc.h> +#include <fs.h> +#include <io.h> +#include <envfs.h> +#include <libfile.h> +#include <asm/memory.h> +#include <linux/sizes.h> +#include <linux/clk.h> +#include <linux/clkdev.h> +#include <asm/system.h> +#include <mach/layerscape/layerscape.h> +#include <of_address.h> +#include <soc/fsl/immap_lsch2.h> + +static int iot_mem_init(void) +{ + if (!of_machine_is_compatible("fsl,ls1021a")) + return 0; + + arm_add_mem_device("ram0", 0x80000000, 0x40000000); + + return 0; +} +mem_initcall(iot_mem_init); + +static int iot_postcore_init(void) +{ + struct ls102xa_ccsr_scfg *scfg = IOMEM(LSCH2_SCFG_ADDR); + + if (!of_machine_is_compatible("fsl,ls1021a")) + return 0; + + /* clear BD & FR bits for BE BD's and frame data */ + clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR); + out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125); + + return 0; +} +coredevice_initcall(iot_postcore_init); diff --git a/arch/arm/boards/ls1021aiot/lowlevel.c b/arch/arm/boards/ls1021aiot/lowlevel.c new file mode 100644 index 0000000000..6bba528635 --- /dev/null +++ b/arch/arm/boards/ls1021aiot/lowlevel.c @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0+ +// SPDX-FileCopyrightText: (C) Copyright 2023 Ametek Inc. +// SPDX-FileCopyrightText: 2023 Renaud Barbier <renaud.barbier@ametek.com> + +/* + * Derived from Freescale LSDK-19.09-update-311219 + */ +#include <common.h> +#include <clock.h> +#include <debug_ll.h> +#include <soc/fsl/fsl_ddr_sdram.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <asm/syscounter.h> +#include <asm/system.h> +#include <asm/cache.h> +#include <linux/sizes.h> +#include <mach/layerscape/errata.h> +#include <mach/layerscape/lowlevel.h> +#include <mach/layerscape/xload.h> +#include <mach/layerscape/layerscape.h> + +static struct fsl_ddr_controller ddrc[] = { + { + .memctl_opts.ddrtype = SDRAM_TYPE_DDR3, + .base = IOMEM(LSCH2_DDR_ADDR), + .ddr_freq = LS1021A_DDR_FREQ, + .erratum_A009942 = 1, + .chip_selects_per_ctrl = 4, + .fsl_ddr_config_reg = { + .cs[0].bnds = 0x008000bf, + .cs[0].config = 0x80014302, + .cs[0].config_2 = 0x00000000, + .cs[1].bnds = 0x00000000, + .cs[1].config = 0x00000000, + .cs[1].config_2 = 0x00000000, + .cs[2].bnds = 0x00000000, + .cs[2].config = 0x00000000, + .cs[2].config_2 = 0x00000000, + .cs[3].bnds = 0x00000000, + .cs[3].config = 0x00000000, + .cs[3].config_2 = 0x00000000, + .timing_cfg_3 = 0x010e1000, + .timing_cfg_0 = 0x50550004, + .timing_cfg_1 = 0xbcb38c56, + .timing_cfg_2 = 0x0040d120, + .ddr_sdram_cfg = 0x470c0008, + .ddr_sdram_cfg_2 = 0x00401010, + .ddr_sdram_mode = 0x00061c60, + .ddr_sdram_mode_2 = 0x00180000, + .ddr_sdram_interval = 0x18600618, + .ddr_data_init = 0xDEADBEEF, + .ddr_sdram_clk_cntl = 0x02000000, + .ddr_init_addr = 0x00000000, + .ddr_init_ext_addr = 0x00000000, + .timing_cfg_4 = 0x00000001, + .timing_cfg_5 = 0x03401400, + .ddr_zq_cntl = 0x89080600, + .ddr_wrlvl_cntl = 0x8655f605, + .ddr_wrlvl_cntl_2 = 0x05060607, + .ddr_wrlvl_cntl_3 = 0x05050505, + .ddr_sr_cntr = 0x00000000, + .ddr_sdram_rcw_1 = 0x00000000, + .ddr_sdram_rcw_2 = 0x00000000, + .ddr_sdram_rcw_3 = 0x00000000, + .ddr_cdr1 = 0x80040000, + .ddr_cdr2 = 0x000000C0, + .dq_map_0 = 0x00000000, + .dq_map_1 = 0x00000000, + .dq_map_2 = 0x00000000, + .dq_map_3 = 0x00000000, + .debug[28] = 0x00700046, + }, + }, +}; + +extern char __dtb_fsl_ls1021a_iot_start[]; + +static noinline __noreturn void ls1021aiot_r_entry(void) +{ + unsigned long membase = LS1021A_DDR_SDRAM_BASE; + + if (get_pc() >= membase) { + barebox_arm_entry(membase, SZ_1G - SZ_64M, + __dtb_fsl_ls1021a_iot_start); + } + + ls102xa_init_lowlevel(); + ls102xa_debug_ll_init(); + + udelay(500); + putc_ll('>'); + + fsl_ddr_set_memctl_regs(&ddrc[0], 0, false); + + ls1021a_errata_post_ddr(); + + ls1021a_xload_start_image(SZ_1G, 0, 0); + + pr_err("Booting failed\n"); + + while (1) + ; +} + +void ls1021aiot_entry(unsigned long r0, unsigned long r1, unsigned long r2); + +__noreturn void +ls1021aiot_entry(unsigned long r0, unsigned long r1, unsigned long r2) +{ + relocate_to_current_adr(); + setup_c(); + + ls1021aiot_r_entry(); +} diff --git a/arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg b/arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg new file mode 100644 index 0000000000..840299be8d --- /dev/null +++ b/arch/arm/boards/ls1021aiot/ls102xa_pbi.cfg @@ -0,0 +1,11 @@ +#PBI commands + +09570200 ffffffff +09570158 00000300 +8940007c 21f47300 +#Configure Scratch register +09ee0200 10000000 +#Configure alternate space +09570158 00001000 +#Flush PBL data +096100c0 000FFFFF diff --git a/arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg b/arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg new file mode 100644 index 0000000000..3b5300501d --- /dev/null +++ b/arch/arm/boards/ls1021aiot/ls102xa_rcw_sd_qspi.cfg @@ -0,0 +1,8 @@ +#PBL preamble and RCW header +aa55aa55 01ee0100 + +#disable IFC, enable QSPI and DSPI +0608000a 00000000 00000000 00000000 +20000000 08407900 e0025a00 21046000 +00000000 00000000 00000000 20038000 +20024800 881b1340 00000000 00000000 diff --git a/arch/arm/boards/ls1021aiot/start.S b/arch/arm/boards/ls1021aiot/start.S new file mode 100644 index 0000000000..c907777ca1 --- /dev/null +++ b/arch/arm/boards/ls1021aiot/start.S @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <linux/linkage.h> +#include <asm/barebox-arm64.h> + +#define STACK_TOP 0x10020000 + +ENTRY_PROC(start_ls1021aiot) + ldr r3, =STACK_TOP + mov sp, r3 + b ls1021aiot_entry +ENTRY_PROC_END(start_ls1021aiot) diff --git a/arch/arm/boards/freescale-mx53-smd/Makefile b/arch/arm/boards/ls1028ardb/Makefile index 9e7882a5db..df60a21844 100644 --- a/arch/arm/boards/freescale-mx53-smd/Makefile +++ b/arch/arm/boards/ls1028ardb/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += board.o lwl-y += lowlevel.o -bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-freescale-mx53-smd +lwl-y += start.o +obj-y += board.o diff --git a/arch/arm/boards/ls1028ardb/board.c b/arch/arm/boards/ls1028ardb/board.c new file mode 100644 index 0000000000..094d72e6fc --- /dev/null +++ b/arch/arm/boards/ls1028ardb/board.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <deep-probe.h> +#include <bootsource.h> +#include <driver.h> +#include <init.h> +#include <of.h> +#include <asm/memory.h> +#include <mach/layerscape/layerscape.h> +#include <mach/layerscape/bbu.h> +#include <linux/sizes.h> + +static int ls1028ardb_probe(struct device *dev) +{ + unsigned long sd_bbu_flags = 0; + unsigned long emmc_bbu_flags = 0; + + arm_add_mem_device("ram1", LS1028A_DDR_SDRAM_HIGHMEM_BASE, SZ_2G); + + if (bootsource_get() == BOOTSOURCE_MMC && bootsource_get_instance() == 0) { + sd_bbu_flags = BBU_HANDLER_FLAG_DEFAULT; + of_device_enable_path("/chosen/environment-sd"); + } else { + emmc_bbu_flags = BBU_HANDLER_FLAG_DEFAULT; + of_device_enable_path("/chosen/environment-emmc"); + } + + ls1028a_bbu_mmc_register_handler("sd", "/dev/mmc0.barebox", sd_bbu_flags); + ls1028a_bbu_mmc_register_handler("emmc", "/dev/mmc1.barebox", emmc_bbu_flags); + + return 0; +} + +static const struct of_device_id ls1028a_of_match[] = { + { .compatible = "fsl,ls1028a-rdb" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(ls1028a_of_match); + +static struct driver ls1028ardb_board_driver = { + .name = "ls1028a-rdb", + .probe = ls1028ardb_probe, + .of_compatible = ls1028a_of_match, +}; +device_platform_driver(ls1028ardb_board_driver); diff --git a/arch/arm/boards/ls1028ardb/lowlevel.c b/arch/arm/boards/ls1028ardb/lowlevel.c new file mode 100644 index 0000000000..00db0b1cf8 --- /dev/null +++ b/arch/arm/boards/ls1028ardb/lowlevel.c @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <debug_ll.h> +#include <ddr_spd.h> +#include <image-metadata.h> +#include <platform_data/mmc-esdhc-imx.h> +#include <soc/fsl/fsl_ddr_sdram.h> +#include <soc/fsl/immap_lsch2.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <asm/syscounter.h> +#include <asm/cache.h> +#include <mach/layerscape/lowlevel.h> +#include <mach/layerscape/xload.h> +#include <mach/layerscape/errata.h> +#include <mach/layerscape/layerscape.h> +#include <linux/bitfield.h> + +static struct fsl_ddr_controller ddrc = { + .memctl_opts.ddrtype = SDRAM_TYPE_DDR4, + .base = IOMEM(LSCH2_DDR_ADDR), + .ddr_freq = 1600000000, + .erratum_A009942 = 1, + .erratum_A009663 = 1, + .chip_selects_per_ctrl = 4, + .fsl_ddr_config_reg = { + .cs[0].bnds = 0x000000ff, + .cs[0].config = 0x80040422, + .cs[0].config_2 = 0, + .cs[1].bnds = 0, + .cs[1].config = 0, + .cs[1].config_2 = 0, + + .timing_cfg_3 = 0x01111000, + .timing_cfg_0 = 0xd0550018, + .timing_cfg_1 = 0xFAFC0C42, + .timing_cfg_2 = 0x0048c114, + .ddr_sdram_cfg = 0xe50c000c, + .ddr_sdram_cfg_2 = 0x00401110, + .ddr_sdram_mode = 0x01010230, + .ddr_sdram_mode_2 = 0x0, + + .ddr_sdram_md_cntl = 0x0600001f, + .ddr_sdram_interval = 0x18600618, + .ddr_data_init = 0xdeadbeef, + + .ddr_sdram_clk_cntl = 0x02000000, + .ddr_init_addr = 0, + .ddr_init_ext_addr = 0, + + .timing_cfg_4 = 0x00000002, + .timing_cfg_5 = 0x07401400, + .timing_cfg_6 = 0x0, + .timing_cfg_7 = 0x23300000, + + .ddr_zq_cntl = 0x8A090705, + .ddr_wrlvl_cntl = 0x86550607, + .ddr_sr_cntr = 0, + .ddr_sdram_rcw_1 = 0, + .ddr_sdram_rcw_2 = 0, + .ddr_wrlvl_cntl_2 = 0x0708080A, + .ddr_wrlvl_cntl_3 = 0x0A0B0C09, + + .ddr_sdram_mode_9 = 0x00000400, + .ddr_sdram_mode_10 = 0x04000000, + + .timing_cfg_8 = 0x06115600, + + .dq_map_0 = 0x5b65b658, + .dq_map_1 = 0xd96d8000, + .dq_map_2 = 0, + .dq_map_3 = 0x01600000, + + .ddr_cdr1 = 0x80040000, + .ddr_cdr2 = 0x000000C1 + }, +}; + +extern char __dtb_z_fsl_ls1028a_rdb_start[]; + +#define MEM_PLL_RAT GENMASK(15, 10) + +static unsigned long get_ddr_freq(void) +{ + unsigned long freq = 100000000; + u32 rcwsr1 = readl(0x1e00100); + u32 mult; + + mult = FIELD_GET(MEM_PLL_RAT, rcwsr1); + + return freq * mult; +} + +struct dram_regions_info dram_info = { + .num_dram_regions = 2, + .total_dram_size = SZ_4G, + .region = { + { + .addr = LS1028A_DDR_SDRAM_BASE, + .size = SZ_2G, + }, { + .addr = LS1028A_DDR_SDRAM_HIGHMEM_BASE, + .size = SZ_2G, + }, + }, +}; + +static noinline __noreturn void ls1028ardb_r_entry(unsigned long memsize) +{ + unsigned long membase = LS1028A_DDR_SDRAM_BASE; + + if (get_pc() >= membase) + barebox_arm_entry(membase, SZ_2G - LS1028A_TFA_RESERVED_SIZE, + __dtb_z_fsl_ls1028a_rdb_start); + + arm_cpu_lowlevel_init(); + ls1028a_init_lowlevel(); + ddrc.ddr_freq = get_ddr_freq(); + + fsl_ddr_set_memctl_regs(&ddrc, 0, true); + + ls1028a_tzc400_init(SZ_4G); + + ls1028a_errata_post_ddr(); + + ls1028a_esdhc1_start_image(&dram_info); + + hang(); +} + +void ls1028ardb_entry(unsigned long r0, unsigned long r1, unsigned long r2); + +__noreturn void ls1028ardb_entry(unsigned long r0, unsigned long r1, unsigned long r2) +{ + ls1028a_uart_setup(IOMEM(LSCH2_NS16550_COM1)); + + relocate_to_current_adr(); + setup_c(); + + ls1028ardb_r_entry(r0); +} diff --git a/arch/arm/boards/ls1028ardb/ls1028ardb_pbi.cfg b/arch/arm/boards/ls1028ardb/ls1028ardb_pbi.cfg new file mode 100644 index 0000000000..53cfb20327 --- /dev/null +++ b/arch/arm/boards/ls1028ardb/ls1028ardb_pbi.cfg @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0-only + +31e00400 18010000 +31e00404 00000000 +33400890 00800401 +33500890 00800401 +334008bc 00000001 +33400154 47474747 +33400158 47474747 +335008bc 00000001 +33500154 47474747 +33500158 47474747 +334008bc 00000000 +335008bc 00000000 diff --git a/arch/arm/boards/ls1028ardb/ls1028ardb_rcw_sd.cfg b/arch/arm/boards/ls1028ardb/ls1028ardb_rcw_sd.cfg new file mode 100644 index 0000000000..2183991112 --- /dev/null +++ b/arch/arm/boards/ls1028ardb/ls1028ardb_rcw_sd.cfg @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0-only + +#PBL preamble and RCW header +aa55aa55 80100000 +# RCW +34004010 00000030 00000000 00000000 +00000000 00bf0000 0030c000 00000000 +01e03150 00002580 00000000 00003496 +00000000 00000010 00000000 00000000 +00000000 00000000 00000000 00000000 +00000000 00000000 00000000 00000000 +00000000 00000000 200e705a 00000000 +bb580000 00000000 00000000 00000000 + diff --git a/arch/arm/boards/ls1028ardb/start.S b/arch/arm/boards/ls1028ardb/start.S new file mode 100644 index 0000000000..fd410b744a --- /dev/null +++ b/arch/arm/boards/ls1028ardb/start.S @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <linux/linkage.h> +#include <asm/barebox-arm64.h> +#include <asm/assembler64.h> + +#define STACK_TOP 0x18040000 + +ENTRY_PROC(start_ls1028ardb) + switch_el x3, 3f, 2f, 1f +3: + mov x3, #STACK_TOP + mov sp, x3 + b ls1028ardb_entry +2: +1: + mov x3, 0x90000000 + mov sp, x3 + b ls1028ardb_entry +ENTRY_PROC_END(start_ls1028ardb) diff --git a/arch/arm/boards/ls1046ardb/board.c b/arch/arm/boards/ls1046ardb/board.c index 5e42209c8b..ee70171ca3 100644 --- a/arch/arm/boards/ls1046ardb/board.c +++ b/arch/arm/boards/ls1046ardb/board.c @@ -13,8 +13,8 @@ #include <linux/clk.h> #include <linux/clkdev.h> #include <asm/system.h> -#include <mach/layerscape.h> -#include <mach/bbu.h> +#include <mach/layerscape/layerscape.h> +#include <mach/layerscape/bbu.h> #include <of_address.h> #include <linux/fsl_ifc.h> @@ -33,7 +33,7 @@ struct nxid { u8 mac_count; /* 0x40 Number of MAC addresses */ u8 mac_flag; /* 0x41 MAC table flags */ u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - 0xa1 MAC addresses */ - u8 res_2[90]; /* 0xa2 - 0xfb Reserved */ + u8 res_2[90]; /* 0xa2 - 0xfb Reserved */ u32 crc; /* 0xfc - 0xff CRC32 checksum */ } __packed; diff --git a/arch/arm/boards/ls1046ardb/lowlevel.c b/arch/arm/boards/ls1046ardb/lowlevel.c index 055e5f4c99..408e6017f6 100644 --- a/arch/arm/boards/ls1046ardb/lowlevel.c +++ b/arch/arm/boards/ls1046ardb/lowlevel.c @@ -12,10 +12,10 @@ #include <asm/barebox-arm.h> #include <asm/syscounter.h> #include <asm/cache.h> -#include <mach/errata.h> -#include <mach/lowlevel.h> -#include <mach/xload.h> -#include <mach/layerscape.h> +#include <mach/layerscape/errata.h> +#include <mach/layerscape/lowlevel.h> +#include <mach/layerscape/xload.h> +#include <mach/layerscape/layerscape.h> struct board_specific_parameters { u32 n_ranks; @@ -147,7 +147,7 @@ found: popts->cpo_sample = 0x61; } -extern char __dtb_fsl_ls1046a_rdb_start[]; +extern char __dtb_z_fsl_ls1046a_rdb_start[]; static struct spd_eeprom spd_eeprom[] = { { @@ -195,23 +195,21 @@ static noinline __noreturn void ls1046ardb_r_entry(unsigned long memsize) memsize = 0x100000000 - membase; barebox_arm_entry(membase, 0x80000000 - SZ_64M, - __dtb_fsl_ls1046a_rdb_start); + __dtb_z_fsl_ls1046a_rdb_start); } arm_cpu_lowlevel_init(); - debug_ll_init(); + ls1046a_debug_ll_init(); ls1046a_init_lowlevel(); - IMD_USED_OF(fsl_ls1046a_rdb); - i2c = ls1046_i2c_init(IOMEM(LSCH2_I2C1_BASE_ADDR)); - ret = spd_read_eeprom(i2c, 0x51, &spd_eeprom); + ret = spd_read_eeprom(i2c, 0x51, &spd_eeprom, SPD_MEMTYPE_DDR4); if (ret) { pr_err("Cannot read SPD EEPROM: %d\n", ret); goto err; } - memsize = fsl_ddr_sdram(&ls1046a_info); + memsize = fsl_ddr_sdram(&ls1046a_info, false); ls1046a_errata_post_ddr(); diff --git a/arch/arm/boards/lubbock/board.c b/arch/arm/boards/lubbock/board.c index 2f3b6ad16b..af046e110a 100644 --- a/arch/arm/boards/lubbock/board.c +++ b/arch/arm/boards/lubbock/board.c @@ -6,24 +6,23 @@ #include <environment.h> #include <fs.h> #include <init.h> -#include <partition.h> #include <led.h> #include <gpio.h> #include <pwm.h> #include <linux/sizes.h> -#include <mach/devices.h> -#include <mach/mfp-pxa27x.h> -#include <mach/pxa-regs.h> -#include <mach/udc_pxa2xx.h> -#include <mach/mci_pxa2xx.h> +#include <mach/pxa/devices.h> +#include <mach/pxa/mfp-pxa27x.h> +#include <mach/pxa/pxa-regs.h> +#include <mach/pxa/udc_pxa2xx.h> +#include <mach/pxa/mci_pxa2xx.h> #include <platform_data/eth-smc91111.h> #include <asm/armlinux.h> #include <asm/io.h> #include <asm/mmu.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #define ECOR 0x8000 #define ECOR_RESET 0x80 diff --git a/arch/arm/boards/lubbock/lowlevel.c b/arch/arm/boards/lubbock/lowlevel.c index f93a2ff47b..ef6b544a26 100644 --- a/arch/arm/boards/lubbock/lowlevel.c +++ b/arch/arm/boards/lubbock/lowlevel.c @@ -7,8 +7,8 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <linux/sizes.h> -#include <mach/pxa-regs.h> -#include <mach/regs-ost.h> +#include <mach/pxa/pxa-regs.h> +#include <mach/pxa/regs-ost.h> /* * Memory settings diff --git a/arch/arm/boards/lxa-mc1/board.c b/arch/arm/boards/lxa-mc1/board.c index 9126973dcb..8be265b0fc 100644 --- a/arch/arm/boards/lxa-mc1/board.c +++ b/arch/arm/boards/lxa-mc1/board.c @@ -3,8 +3,9 @@ #include <linux/sizes.h> #include <init.h> #include <asm/memory.h> -#include <mach/bbu.h> +#include <mach/stm32mp/bbu.h> #include <bootsource.h> +#include <deep-probe.h> #include <of.h> static int of_fixup_regulator_supply_disable(struct device_node *root, void *path) @@ -28,8 +29,9 @@ static int of_fixup_regulator_supply_disable(struct device_node *root, void *pat return 0; } -static int mc1_probe(struct device_d *dev) +static int mc1_probe(struct device *dev) { + struct device_node *state_node, *state_backend; int flags; flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0; @@ -39,10 +41,18 @@ static int mc1_probe(struct device_d *dev) stm32mp_bbu_mmc_register_handler("emmc", "/dev/mmc1.ssbl", flags); - if (bootsource_get_instance() == 0) + if (bootsource_get_instance() == 0) { of_device_enable_path("/chosen/environment-sd"); - else + state_backend = of_find_node_by_alias(NULL, "mmc0"); + } else { of_device_enable_path("/chosen/environment-emmc"); + state_backend = of_find_node_by_alias(NULL, "mmc1"); + } + + state_node = of_find_node_by_alias(NULL, "state"); + if (state_node) + of_property_write_u32(state_node, "backend", + of_node_create_phandle(state_backend)); barebox_set_hostname("lxa-mc1"); @@ -58,8 +68,9 @@ static const struct of_device_id mc1_of_match[] = { { .compatible = "lxa,stm32mp157c-mc1" }, { /* sentinel */ }, }; +BAREBOX_DEEP_PROBE_ENABLE(mc1_of_match); -static struct driver_d mc1_board_driver = { +static struct driver mc1_board_driver = { .name = "board-lxa-mc1", .probe = mc1_probe, .of_compatible = mc1_of_match, diff --git a/arch/arm/boards/lxa-mc1/lowlevel.c b/arch/arm/boards/lxa-mc1/lowlevel.c index 274f824a16..86211bf9d8 100644 --- a/arch/arm/boards/lxa-mc1/lowlevel.c +++ b/arch/arm/boards/lxa-mc1/lowlevel.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ #include <common.h> -#include <mach/entry.h> +#include <mach/stm32mp/entry.h> #include <debug_ll.h> extern char __dtb_z_stm32mp157c_lxa_mc1_start[]; diff --git a/arch/arm/boards/mainstone/board.c b/arch/arm/boards/mainstone/board.c index f95bf057a7..979a4f3609 100644 --- a/arch/arm/boards/mainstone/board.c +++ b/arch/arm/boards/mainstone/board.c @@ -6,24 +6,23 @@ #include <environment.h> #include <fs.h> #include <init.h> -#include <partition.h> #include <led.h> #include <gpio.h> #include <pwm.h> #include <linux/sizes.h> -#include <mach/devices.h> -#include <mach/mfp-pxa27x.h> -#include <mach/pxa-regs.h> -#include <mach/udc_pxa2xx.h> -#include <mach/mci_pxa2xx.h> +#include <mach/pxa/devices.h> +#include <mach/pxa/mfp-pxa27x.h> +#include <mach/pxa/pxa-regs.h> +#include <mach/pxa/udc_pxa2xx.h> +#include <mach/pxa/mci_pxa2xx.h> #include <platform_data/eth-smc91111.h> #include <asm/armlinux.h> #include <asm/io.h> #include <asm/mmu.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> static struct smc91c111_pdata smsc91x_pdata = { .word_aligned_short_writes = true, diff --git a/arch/arm/boards/mainstone/lowlevel.c b/arch/arm/boards/mainstone/lowlevel.c index 1ec1d1e028..29d12f7424 100644 --- a/arch/arm/boards/mainstone/lowlevel.c +++ b/arch/arm/boards/mainstone/lowlevel.c @@ -7,8 +7,8 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <linux/sizes.h> -#include <mach/pxa-regs.h> -#include <mach/regs-ost.h> +#include <mach/pxa/pxa-regs.h> +#include <mach/pxa/regs-ost.h> /* * Memory settings diff --git a/arch/arm/boards/marvell-armada-xp-db/lowlevel.c b/arch/arm/boards/marvell-armada-xp-db/lowlevel.c index 4752bbf1b4..14059fe8c5 100644 --- a/arch/arm/boards/marvell-armada-xp-db/lowlevel.c +++ b/arch/arm/boards/marvell-armada-xp-db/lowlevel.c @@ -7,13 +7,13 @@ #include <common.h> #include <linux/sizes.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> #include <io.h> extern char __dtb_armada_xp_db_bb_start[]; -ENTRY_FUNCTION(start_marvell_armada_xp_db, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_marvell_armada_xp_db, r0, r1, r2) { void *fdt; uint32_t reg; diff --git a/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c b/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c index 43b1ba8c9a..ae5ad2822a 100644 --- a/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c +++ b/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c @@ -4,12 +4,12 @@ #include <common.h> #include <linux/sizes.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> extern char __dtb_armada_xp_gp_bb_start[]; -ENTRY_FUNCTION(start_marvell_armada_xp_gp, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_marvell_armada_xp_gp, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/meerkat96/lowlevel.c b/arch/arm/boards/meerkat96/lowlevel.c index 1c9baeacfb..03a1a11466 100644 --- a/arch/arm/boards/meerkat96/lowlevel.c +++ b/arch/arm/boards/meerkat96/lowlevel.c @@ -3,10 +3,10 @@ #include <debug_ll.h> #include <io.h> #include <linux/sizes.h> -#include <mach/debug_ll.h> -#include <mach/iomux-mx7.h> -#include <mach/imx7-ccm-regs.h> -#include <mach/generic.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/iomux-mx7.h> +#include <mach/imx/imx7-ccm-regs.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <asm/cache.h> @@ -14,7 +14,8 @@ extern char __dtb_z_imx7d_meerkat96_start[]; static void setup_uart(void) { - imx7_early_setup_uart_clock(); + /* FIXME: Below UART6 is muxed, not UART1 */ + imx7_early_setup_uart_clock(1); imx7_setup_pad(MX7D_PAD_SD1_WP__UART6_DCE_TX); imx7_uart_setup_ll(); putc_ll('>'); diff --git a/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c index 93ae481975..aa2161daee 100644 --- a/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c +++ b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c @@ -9,11 +9,11 @@ #include <asm/barebox-arm-head.h> #include <debug_ll.h> -#include <mach/barebox-arm.h> -#include <mach/iomux.h> -#include <mach/sama5d3.h> -#include <mach/sama5d3-xplained-ddramc.h> -#include <mach/xload.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/iomux.h> +#include <mach/at91/sama5d3.h> +#include <mach/at91/sama5d3-xplained-ddramc.h> +#include <mach/at91/xload.h> /* PCK = 528MHz, MCK = 132MHz */ #define MASTER_CLOCK 132000000 @@ -32,7 +32,7 @@ static void dbgu_init(void) putc_ll('>'); } -SAMA5_ENTRY_FUNCTION(start_sama5d3_xplained_ung8071_xload_mmc, r4) +SAMA5D3_ENTRY_FUNCTION(start_sama5d3_xplained_ung8071_xload_mmc, r4) { sama5d3_lowlevel_init(); @@ -49,16 +49,14 @@ SAMA5_ENTRY_FUNCTION(start_sama5d3_xplained_ung8071_xload_mmc, r4) extern char __dtb_z_at91_microchip_ksz9477_evb_start[]; -SAMA5_ENTRY_FUNCTION(start_sama5d3_xplained_ung8071, r4) +SAMA5D3_ENTRY_FUNCTION(start_sama5d3_xplained_ung8071, r4) { void *fdt; - arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE); - if (IS_ENABLED(CONFIG_DEBUG_LL)) dbgu_init(); fdt = __dtb_z_at91_microchip_ksz9477_evb_start + get_runtime_offset(); - barebox_arm_entry(SAMA5_DDRCS, SZ_256M, fdt); + sama5d3_barebox_entry(r4, fdt); } diff --git a/arch/arm/boards/kindle3/Makefile b/arch/arm/boards/microchip-sama5d3-eds/Makefile index 75a0ff560f..458f520900 100644 --- a/arch/arm/boards/kindle3/Makefile +++ b/arch/arm/boards/microchip-sama5d3-eds/Makefile @@ -1,4 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += kindle3.o lwl-y += lowlevel.o diff --git a/arch/arm/boards/microchip-sama5d3-eds/lowlevel.c b/arch/arm/boards/microchip-sama5d3-eds/lowlevel.c new file mode 100644 index 0000000000..79346a9b6a --- /dev/null +++ b/arch/arm/boards/microchip-sama5d3-eds/lowlevel.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0-only AND BSD-1-Clause +/* + * Copyright (C) 2014, Atmel Corporation + * Copyright (C) 2018 Ahmad Fatoum, Pengutronix + */ + +#include <common.h> +#include <init.h> + +#include <asm/barebox-arm-head.h> +#include <debug_ll.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/iomux.h> +#include <mach/at91/sama5d3.h> +#include <mach/at91/sama5d3-xplained-ddramc.h> +#include <mach/at91/xload.h> + +/* PCK = 528MHz, MCK = 132MHz */ +#define MASTER_CLOCK 132000000 + +static void dbgu_init(void) +{ + void __iomem *pio = IOMEM(SAMA5D3_BASE_PIOB); + + sama5d3_pmc_enable_periph_clock(SAMA5D3_ID_PIOB); + + at91_mux_pio3_pin(pio, pin_to_mask(AT91_PIN_PB31), AT91_MUX_PERIPH_A, 0); + + sama5d3_pmc_enable_periph_clock(SAMA5D3_ID_DBGU); + at91_dbgu_setup_ll(IOMEM(AT91_BASE_DBGU1), MASTER_CLOCK, 115200); + + putc_ll('>'); +} + +SAMA5D3_ENTRY_FUNCTION(start_microchip_sama5d3_eds_xload_mmc, r4) +{ + sama5d3_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + sama5d3_udelay_init(MASTER_CLOCK); + sama5d3_xplained_ddrconf(); + if (IS_ENABLED(CONFIG_DEBUG_LL)) + dbgu_init(); + + sama5d3_atmci_start_image(0, MASTER_CLOCK, 0); +} + +extern char __dtb_z_at91_microchip_sama5d3_eds_start[]; + +SAMA5D3_ENTRY_FUNCTION(start_microchip_sama5d3_eds, r4) +{ + void *fdt; + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + dbgu_init(); + + fdt = __dtb_z_at91_microchip_sama5d3_eds_start + get_runtime_offset(); + + sama5d3_barebox_entry(r4, fdt); +} diff --git a/arch/arm/boards/mioa701/board.c b/arch/arm/boards/mioa701/board.c index 963fefbf77..685c78611b 100644 --- a/arch/arm/boards/mioa701/board.c +++ b/arch/arm/boards/mioa701/board.c @@ -6,20 +6,19 @@ #include <environment.h> #include <fs.h> #include <init.h> -#include <partition.h> #include <led.h> #include <gpio.h> #include <pwm.h> -#include <mach/devices.h> -#include <mach/mfp-pxa27x.h> -#include <mach/pxa-regs.h> -#include <mach/udc_pxa2xx.h> -#include <mach/mci_pxa2xx.h> +#include <mach/pxa/devices.h> +#include <mach/pxa/mfp-pxa27x.h> +#include <mach/pxa/pxa-regs.h> +#include <mach/pxa/udc_pxa2xx.h> +#include <mach/pxa/mci_pxa2xx.h> #include <asm/armlinux.h> #include <asm/io.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <asm/mmu.h> #include "mioa701.h" diff --git a/arch/arm/boards/mnt-reform/board.c b/arch/arm/boards/mnt-reform/board.c index 010690ecbd..8b56d108e6 100644 --- a/arch/arm/boards/mnt-reform/board.c +++ b/arch/arm/boards/mnt-reform/board.c @@ -7,9 +7,9 @@ #include <common.h> #include <deep-probe.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> -static int mnt_reform_probe(struct device_d *dev) +static int mnt_reform_probe(struct device *dev) { int emmc_bbu_flag = 0; int sd_bbu_flag = 0; @@ -34,7 +34,7 @@ static const struct of_device_id mnt_reform_of_match[] = { }; BAREBOX_DEEP_PROBE_ENABLE(mnt_reform_of_match); -static struct driver_d mnt_reform_board_driver = { +static struct driver mnt_reform_board_driver = { .name = "board-mnt-reform", .probe = mnt_reform_probe, .of_compatible = DRV_OF_COMPAT(mnt_reform_of_match), diff --git a/arch/arm/boards/mnt-reform/flash-header-mnt-reform.imxcfg b/arch/arm/boards/mnt-reform/flash-header-mnt-reform.imxcfg index 180a44fda3..f82759f849 100644 --- a/arch/arm/boards/mnt-reform/flash-header-mnt-reform.imxcfg +++ b/arch/arm/boards/mnt-reform/flash-header-mnt-reform.imxcfg @@ -1,8 +1,9 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ +# SPDX-License-Identifier: GPL-2.0-only soc imx8mq loadaddr 0x007E1000 max_load_size 0x3F000 ivtofs 0x400 -#include <mach/habv4-imx8-gencsf.h> + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/mnt-reform/lowlevel.c b/arch/arm/boards/mnt-reform/lowlevel.c index d22c8b8a74..9f951508df 100644 --- a/arch/arm/boards/mnt-reform/lowlevel.c +++ b/arch/arm/boards/mnt-reform/lowlevel.c @@ -6,17 +6,18 @@ #include <asm/barebox-arm.h> #include <common.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <firmware.h> #include <pbl/i2c.h> #include <pbl/pmic.h> -#include <mach/atf.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <mach/imx-gpio.h> -#include <mach/imx8m-ccm-regs.h> -#include <mach/imx8mq-regs.h> -#include <mach/iomux-mx8mq.h> -#include <mach/xload.h> +#include <mach/imx/atf.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx-gpio.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/imx8mq-regs.h> +#include <mach/imx/iomux-mx8mq.h> +#include <mach/imx/xload.h> #include <soc/imx8m/ddr.h> extern char __dtb_z_imx8mq_mnt_reform2_start[]; @@ -58,7 +59,7 @@ static void i2c_mux_set(struct pbl_i2c *i2c, u8 channel) static void i2c_regulator_set_voltage(struct pbl_i2c *i2c, u8 reg, u8 voffs) { - pmic_reg_write(i2c, 0x60, reg, 0x80 + voffs); + pmic_reg_write8(i2c, 0x60, reg, 0x80 + voffs); } #define I2C_PAD_CTRL MUX_PAD_CTRL(MX8MQ_PAD_CTL_DSE_45R | \ @@ -116,44 +117,13 @@ static __noreturn noinline void mnt_reform_start(void) * The TF-A will then jump to DRAM in EL2. */ if (current_el() == 3) { - size_t bl31_size; - const u8 *bl31; - enum bootsource src; - int instance; - mnt_reform_setup_uart(); mnt_reform_init_power(); imx8mq_ddr_init(&mnt_reform_dram_timing, DRAM_TYPE_LPDDR4); - imx8mq_get_boot_source(&src, &instance); - switch (src) { - case BOOTSOURCE_MMC: - imx8m_esdhc_load_image(instance, false); - break; - case BOOTSOURCE_SERIAL: - imx8m_esdhc_load_image(1, false); - break; - default: - printf("Unhandled bootsource BOOTSOURCE_%d\n", src); - hang(); - } - - /* - * On completion the TF-A will jump to MX8M_ATF_BL33_BASE_ADDR - * in EL2. Copy the image there, but replace the PBL part of - * that image with ourselves. On a high assurance boot only the - * currently running code is validated and contains the checksum - * for the piggy data, so we need to ensure that we are running - * the same code in DRAM. - */ - memcpy((void *)MX8M_ATF_BL33_BASE_ADDR, - __image_start, barebox_pbl_size); - - get_builtin_firmware(imx8mq_bl31_bin, &bl31, &bl31_size); - - imx8mq_atf_load_bl31(bl31, bl31_size); + imx8mq_load_and_start_image_via_tfa(); } /* diff --git a/arch/arm/boards/module-mb7707/board.c b/arch/arm/boards/module-mb7707/board.c index c4f78a8135..366baddf81 100644 --- a/arch/arm/boards/module-mb7707/board.c +++ b/arch/arm/boards/module-mb7707/board.c @@ -6,8 +6,8 @@ #include <common.h> #include <init.h> #include <driver.h> -#include <usb/ehci.h> -#include <mach/hardware.h> +#include <linux/usb/ehci.h> +#include <mach/uemd/hardware.h> static int hostname_init(void) { diff --git a/arch/arm/boards/myirtech-x335x/board.c b/arch/arm/boards/myirtech-x335x/board.c index c6d808284e..82bb612032 100644 --- a/arch/arm/boards/myirtech-x335x/board.c +++ b/arch/arm/boards/myirtech-x335x/board.c @@ -7,7 +7,7 @@ #include <envfs.h> #include <init.h> #include <linux/sizes.h> -#include <mach/am33xx-generic.h> +#include <mach/omap/am33xx-generic.h> static struct omap_barebox_part myir_barebox_part = { .nand_offset = SZ_128K * 4, diff --git a/arch/arm/boards/myirtech-x335x/lowlevel.c b/arch/arm/boards/myirtech-x335x/lowlevel.c index c394253320..0ac2370e57 100644 --- a/arch/arm/boards/myirtech-x335x/lowlevel.c +++ b/arch/arm/boards/myirtech-x335x/lowlevel.c @@ -6,14 +6,15 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <debug_ll.h> +#include <mach/omap/debug_ll.h> #include <init.h> #include <linux/sizes.h> -#include <mach/am33xx-clock.h> -#include <mach/am33xx-generic.h> -#include <mach/am33xx-mux.h> -#include <mach/generic.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> +#include <mach/omap/am33xx-clock.h> +#include <mach/omap/am33xx-generic.h> +#include <mach/omap/am33xx-mux.h> +#include <mach/omap/generic.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> #define AM335X_ZCZ_1000 0x1c2f @@ -91,7 +92,7 @@ ENTRY_FUNCTION(start_am33xx_myirtech_sram, bootinfo, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) { am33xx_uart_soft_reset(IOMEM(AM33XX_UART0_BASE)); am33xx_enable_uart0_pin_mux(); - omap_uart_lowlevel_init(IOMEM(AM33XX_UART0_BASE)); + omap_debug_ll_init(); putc_ll('>'); } diff --git a/arch/arm/boards/netgear-rn104/lowlevel.c b/arch/arm/boards/netgear-rn104/lowlevel.c index c6c8e84023..e693d13993 100644 --- a/arch/arm/boards/netgear-rn104/lowlevel.c +++ b/arch/arm/boards/netgear-rn104/lowlevel.c @@ -6,12 +6,12 @@ #include <common.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> extern char __dtb_armada_370_rn104_bb_start[]; -ENTRY_FUNCTION(start_netgear_rn104, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_netgear_rn104, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/netgear-rn2120/board.c b/arch/arm/boards/netgear-rn2120/board.c index 8b44b92257..8689202ba6 100644 --- a/arch/arm/boards/netgear-rn2120/board.c +++ b/arch/arm/boards/netgear-rn2120/board.c @@ -7,7 +7,7 @@ #include <linux/printk.h> #include <linux/kernel.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> static int rn2120_init(void) { diff --git a/arch/arm/boards/netgear-rn2120/lowlevel.c b/arch/arm/boards/netgear-rn2120/lowlevel.c index c78d3644b5..f923be5a27 100644 --- a/arch/arm/boards/netgear-rn2120/lowlevel.c +++ b/arch/arm/boards/netgear-rn2120/lowlevel.c @@ -3,14 +3,14 @@ #include <common.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> +#include <mach/mvebu/barebox-arm-head.h> #include <asm/io.h> -#include <mach/lowlevel.h> -#include <mach/common.h> +#include <mach/mvebu/lowlevel.h> +#include <mach/mvebu/common.h> extern char __dtb_armada_xp_rn2120_bb_start[]; -ENTRY_FUNCTION(start_netgear_rn2120, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_netgear_rn2120, r0, r1, r2) { void *fdt; void __iomem *base = mvebu_get_initial_int_reg_base(); diff --git a/arch/arm/boards/nhk8815/setup.c b/arch/arm/boards/nhk8815/setup.c index ed32218ac8..c7a2afdbfe 100644 --- a/arch/arm/boards/nhk8815/setup.c +++ b/arch/arm/boards/nhk8815/setup.c @@ -5,17 +5,16 @@ #include <init.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> -#include <partition.h> #include <nand.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> -#include <mach/board.h> -#include <mach/nand.h> -#include <mach/fsmc.h> +#include <mach/nomadik/hardware.h> +#include <mach/nomadik/board.h> +#include <mach/nomadik/nand.h> +#include <mach/nomadik/fsmc.h> static int nhk8815_nand_init(void) { @@ -53,7 +52,7 @@ static struct resource nhk8815_nand_resources[] = { } }; -static struct device_d nhk8815_nand_device = { +static struct device nhk8815_nand_device = { .id = DEVICE_ID_DYNAMIC, .name = "nomadik_nand", .num_resources = ARRAY_SIZE(nhk8815_nand_resources), diff --git a/arch/arm/boards/novena/Makefile b/arch/arm/boards/novena/Makefile new file mode 100644 index 0000000000..3111392bf9 --- /dev/null +++ b/arch/arm/boards/novena/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/novena/board.c b/arch/arm/boards/novena/board.c new file mode 100644 index 0000000000..b6c59aff44 --- /dev/null +++ b/arch/arm/boards/novena/board.c @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2023 John Watts <contact@jookia.org> + +#include <common.h> +#include <deep-probe.h> +#include <fs.h> +#include <libfile.h> +#include <net.h> + +struct novena_eeprom { + uint8_t signature[6]; /* 'Novena' */ + uint8_t version; /* 1 or 2, not checked */ + uint8_t page_size; /* v2 only: EEPROM read/write page */ + uint32_t serial; /* 32-bit serial number */ + uint8_t mac[6]; /* Gigabit MAC address */ + uint16_t features; /* features */ + /* ... extra fields omitted ... */ +} __packed; + +static void power_on_audio_codec(void) +{ + int rc = of_devices_ensure_probed_by_name("regulator-audio-codec"); + + if (rc < 0) + pr_err("Unable to power on audio codec: %s\n", strerror(-rc)); +} + +static struct novena_eeprom *novena_read_eeprom(void) +{ + size_t read; + loff_t max = sizeof(struct novena_eeprom); + void *eeprom; + int rc; + + /* + * When powered off the audio codec pulls down the EEPROM's I2C line. + * Power it on so we can actually read data. + */ + power_on_audio_codec(); + + rc = of_device_ensure_probed_by_alias("eeprom0"); + if (rc < 0) { + pr_err("Unable to probe eeprom0: %s\n", strerror(-rc)); + return NULL; + } + + rc = read_file_2("/dev/eeprom0", &read, &eeprom, max); + + if (rc < 0 && rc != -EFBIG) { + pr_err("Unable to read Novena EEPROM: %s\n", strerror(-rc)); + return NULL; + } else if (read != max) { + pr_err("Short read from Novena EEPROM?\n"); + free(eeprom); + return NULL; + } + + return eeprom; +} + +static bool novena_check_eeprom(struct novena_eeprom *eeprom) +{ + char *sig = eeprom->signature; + size_t size = sizeof(eeprom->signature); + + if (memcmp("Novena", sig, size) != 0) { + pr_err("Unknown Novena EEPROM signature\n"); + return false; + } + + return true; +} + +static void novena_set_mac(struct novena_eeprom *eeprom) +{ + struct device_node *dnode; + + dnode = of_find_node_by_alias(of_get_root_node(), "ethernet0"); + if (dnode) + of_eth_register_ethaddr(dnode, eeprom->mac); + else + pr_err("Unable to find ethernet node\n"); +} + +static int novena_probe(struct device *dev) +{ + struct novena_eeprom *eeprom = novena_read_eeprom(); + + if (eeprom && novena_check_eeprom(eeprom)) + novena_set_mac(eeprom); + + free(eeprom); + + return 0; +} + +static const struct of_device_id novena_of_match[] = { + { .compatible = "kosagi,imx6q-novena", }, + { /* sentinel */ } +}; + +static struct driver novena_board_driver = { + .name = "board-novena", + .probe = novena_probe, + .of_compatible = novena_of_match, +}; +coredevice_platform_driver(novena_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(novena_of_match); diff --git a/arch/arm/boards/novena/ddr_regs.h b/arch/arm/boards/novena/ddr_regs.h new file mode 100644 index 0000000000..5f18d5e0e4 --- /dev/null +++ b/arch/arm/boards/novena/ddr_regs.h @@ -0,0 +1,119 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* SPDX-FileCopyrightText: 2014 Marek Vasut <marex@denx.de> */ + +#ifndef NOVENA_DDR_REGS_H +#define NOVENA_DDR_REGS_H + +/* MEMORY CONTROLLER CONFIGURATION */ + +static struct mx6dq_iomux_ddr_regs novena_ddr_regs = { + /* SDCLK[0:1], CAS, RAS, Reset: Differential input, 40ohm */ + .dram_sdclk_0 = 0x00020038, + .dram_sdclk_1 = 0x00020038, + .dram_cas = 0x00000038, + .dram_ras = 0x00000038, + .dram_reset = 0x00000038, + /* SDCKE[0:1]: 100k pull-up */ + .dram_sdcke0 = 0x00003000, + .dram_sdcke1 = 0x00003000, + /* SDBA2: pull-up disabled */ + .dram_sdba2 = 0x00000000, + /* SDODT[0:1]: 100k pull-up, 40 ohm */ + .dram_sdodt0 = 0x00000038, + .dram_sdodt1 = 0x00000038, + /* SDQS[0:7]: Differential input, 40 ohm */ + .dram_sdqs0 = 0x00000038, + .dram_sdqs1 = 0x00000038, + .dram_sdqs2 = 0x00000038, + .dram_sdqs3 = 0x00000038, + .dram_sdqs4 = 0x00000038, + .dram_sdqs5 = 0x00000038, + .dram_sdqs6 = 0x00000038, + .dram_sdqs7 = 0x00000038, + + /* DQM[0:7]: Differential input, 40 ohm */ + .dram_dqm0 = 0x00000038, + .dram_dqm1 = 0x00000038, + .dram_dqm2 = 0x00000038, + .dram_dqm3 = 0x00000038, + .dram_dqm4 = 0x00000038, + .dram_dqm5 = 0x00000038, + .dram_dqm6 = 0x00000038, + .dram_dqm7 = 0x00000038, +}; + +static struct mx6dq_iomux_grp_regs novena_grp_regs = { + /* DDR3 */ + .grp_ddr_type = 0x000c0000, + .grp_ddrmode_ctl = 0x00020000, + /* Disable DDR pullups */ + .grp_ddrpke = 0x00000000, + /* ADDR[00:16], SDBA[0:1]: 40 ohm */ + .grp_addds = 0x00000038, + /* CS0/CS1/SDBA2/CKE0/CKE1/SDWE: 40 ohm */ + .grp_ctlds = 0x00000038, + /* DATA[00:63]: Differential input, 40 ohm */ + .grp_ddrmode = 0x00020000, + .grp_b0ds = 0x00000038, + .grp_b1ds = 0x00000038, + .grp_b2ds = 0x00000038, + .grp_b3ds = 0x00000038, + .grp_b4ds = 0x00000038, + .grp_b5ds = 0x00000038, + .grp_b6ds = 0x00000038, + .grp_b7ds = 0x00000038, +}; + +/* MEMORY STICK CONFIGURATION */ + +static struct mx6_mmdc_calibration novena_mmdc_calib = { + /* write leveling calibration determine */ + .p0_mpwldectrl0 = 0x00420048, + .p0_mpwldectrl1 = 0x006f0059, + .p1_mpwldectrl0 = 0x005a0104, + .p1_mpwldectrl1 = 0x01070113, + /* Read DQS Gating calibration */ + .p0_mpdgctrl0 = 0x437c040b, + .p0_mpdgctrl1 = 0x0413040e, + .p1_mpdgctrl0 = 0x444f0446, + .p1_mpdgctrl1 = 0x044d0422, + /* Read Calibration: DQS delay relative to DQ read access */ + .p0_mprddlctl = 0x4c424249, + .p1_mprddlctl = 0x4e48414f, + /* Write Calibration: DQ/DM delay relative to DQS write access */ + .p0_mpwrdlctl = 0x42414641, + .p1_mpwrdlctl = 0x46374b43, +}; + +static struct mx6_ddr_sysinfo novena_ddr_info = { + /* Width of data bus: 0=16, 1=32, 2=64 */ + .dsize = 2, + /* Config for full 4GB range so that get_mem_size() works */ + .cs_density = 32, /* 32Gb per CS */ + /* Single chip select */ + .ncs = 1, + .cs1_mirror = 0, + .rtt_wr = 1, /* RTT_Wr = RZQ/4 */ + .rtt_nom = 2, /* RTT_Nom = RZQ/2 */ + .walat = 3, /* Write additional latency */ + .ralat = 7, /* Read additional latency */ + .mif3_mode = 3, /* Command prediction working mode */ + .bi_on = 0, /* Bank interleaving disabled */ + .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ + .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ +}; + +static struct mx6_ddr3_cfg novena_ddr_cfg = { + .mem_speed = 1600, + .density = 4, + .width = 64, + .banks = 8, + .rowaddr = 16, + .coladdr = 10, + .pagesz = 1, + .trcd = 1300, + .trcmin = 4900, + .trasmin = 3590, +}; + +#endif diff --git a/arch/arm/boards/novena/flash-header-novena.imxcfg b/arch/arm/boards/novena/flash-header-novena.imxcfg new file mode 100644 index 0000000000..0612542c19 --- /dev/null +++ b/arch/arm/boards/novena/flash-header-novena.imxcfg @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +loadaddr 0x00907000 +soc imx6 +max_load_size 0x11000 +ivtofs 0x400 diff --git a/arch/arm/boards/novena/lowlevel.c b/arch/arm/boards/novena/lowlevel.c new file mode 100644 index 0000000000..70aa92d5b4 --- /dev/null +++ b/arch/arm/boards/novena/lowlevel.c @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2023 John Watts <contact@jookia.org> + +#include <asm/barebox-arm.h> +#include <common.h> +#include <ddr_dimms.h> +#include <ddr_spd.h> +#include <debug_ll.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6.h> +#include <mach/imx/imx6-mmdc.h> +#include <mach/imx/iomux-mx6.h> +#include <mach/imx/xload.h> +#include <pbl/i2c.h> +#include <soc/fsl/fsl_udc.h> +#include "ddr_regs.h" + +#define STACK_TOP (MX6_OCRAM_BASE_ADDR + MX6_OCRAM_MAX_SIZE) + +extern char __dtb_z_imx6q_novena_start[]; + +static struct spd_eeprom spd_eeprom; +static struct dimm_params dimm_params; + +static struct pbl_i2c *setup_spd_i2c(void) +{ + void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR); + void __iomem *i2c1base = IOMEM(MX6_I2C1_BASE_ADDR); + + imx_setup_pad(iomuxbase, MX6Q_PAD_CSI0_DAT8__I2C1_SDA); + imx_setup_pad(iomuxbase, MX6Q_PAD_CSI0_DAT9__I2C1_SCL); + + return imx6_i2c_early_init(i2c1base); +} + +static struct spd_eeprom *read_spd(void) +{ + struct spd_eeprom *eeprom = &spd_eeprom; + struct pbl_i2c *i2c = setup_spd_i2c(); + int rc; + + rc = spd_read_eeprom(i2c, 0x50, eeprom, SPD_MEMTYPE_DDR3); + if (rc < 0) { + pr_err("Couldn't read SPD EEPROM: %i\n", rc); + return NULL; + } + + rc = ddr3_spd_check(&eeprom->ddr3); + if (rc < 0) { + pr_err("Couldn't verify SPD data: %i\n", rc); + return NULL; + } + + return eeprom; +} + +static void setup_dimm_settings(struct dimm_params *params, + struct mx6_ddr_sysinfo *info, + struct mx6_ddr3_cfg *cfg) +{ + int capacity_gbit = params->capacity / 0x8000000; + int density_rank = capacity_gbit / params->n_ranks; + + info->ncs = params->n_ranks; + info->cs_density = density_rank; + cfg->mem_speed = params->tckmin_x_ps; + cfg->density = density_rank / params->n_banks_per_sdram_device; + cfg->width = params->data_width; + cfg->banks = params->n_banks_per_sdram_device; + cfg->rowaddr = params->n_row_addr; + cfg->coladdr = params->n_col_addr; + cfg->trcd = params->trcd_ps / 10; + cfg->trcmin = params->trc_ps / 10; + cfg->trasmin = params->tras_ps / 10; + cfg->SRT = params->extended_op_srt; + + if (params->device_width >= 16) + cfg->pagesz = 2; +} + +static void read_dimm_settings(void) +{ + struct spd_eeprom *eeprom = read_spd(); + struct dimm_params *params = &dimm_params; + int rc; + + if (!eeprom) { + pr_err("Couldn't read SPD EEPROM, using default settings\n"); + return; + } + + rc = ddr3_compute_dimm_parameters(&eeprom->ddr3, params); + if (rc < 0) { + pr_err("Couldn't compute DIMM params: %i\n", rc); + return; + } + + pr_info("Found DIMM: %s\n", params->mpart); + + if (params->primary_sdram_width != 64) { + pr_err("ERROR: DIMM stick memory width is not 64 bits\n"); + hang(); + } + + setup_dimm_settings(params, &novena_ddr_info, &novena_ddr_cfg); +} + +static bool running_from_ram(void) +{ + return (get_pc() >= MX6_MMDC_PORT01_BASE_ADDR); +} + +static void setup_uart(void) +{ + void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR); + void __iomem *uart2base = IOMEM(MX6_UART2_BASE_ADDR); + + /* NOTE: RX is needed for TX to work on this board */ + imx_setup_pad(iomuxbase, MX6Q_PAD_EIM_D26__UART2_RXD); + imx_setup_pad(iomuxbase, MX6Q_PAD_EIM_D27__UART2_TXD); + + imx6_uart_setup(uart2base); + pbl_set_putc(imx_uart_putc, uart2base); + + pr_debug(">"); +} + +static void setup_ram(void) +{ + read_dimm_settings(); + + mx6dq_dram_iocfg(64, &novena_ddr_regs, &novena_grp_regs); + mx6_dram_cfg(&novena_ddr_info, &novena_mmdc_calib, &novena_ddr_cfg); + + mmdc_do_write_level_calibration(); + mmdc_do_dqs_calibration(); +} + +static void load_barebox(void) +{ + enum bootsource bootsrc; + int bootinstance; + + imx6_get_boot_source(&bootsrc, &bootinstance); + + if (bootsrc == BOOTSOURCE_SERIAL) + imx6_barebox_start_usb(IOMEM(MX6_MMDC_PORT01_BASE_ADDR)); + else if (bootsrc == BOOTSOURCE_MMC) + imx6_esdhc_start_image(bootinstance); + + pr_err("Unsupported boot source %i instance %i\n", + bootsrc, bootinstance); + hang(); +} + +ENTRY_FUNCTION_WITHSTACK(start_imx6q_novena, STACK_TOP, r0, r1, r2) +{ + imx6_cpu_lowlevel_init(); + relocate_to_current_adr(); + setup_c(); + + imx6_ungate_all_peripherals(); + setup_uart(); + + if (!running_from_ram()) { + setup_ram(); + load_barebox(); + } else { + imx6q_barebox_entry(__dtb_z_imx6q_novena_start); + } +} diff --git a/arch/arm/boards/nvidia-beaver/board.c b/arch/arm/boards/nvidia-beaver/board.c index 0ef37780b4..2537e75337 100644 --- a/arch/arm/boards/nvidia-beaver/board.c +++ b/arch/arm/boards/nvidia-beaver/board.c @@ -6,7 +6,7 @@ #include <gpio.h> #include <i2c/i2c.h> #include <init.h> -#include <mach/tegra-bbu.h> +#include <mach/tegra/tegra-bbu.h> static int nvidia_beaver_fs_init(void) { diff --git a/arch/arm/boards/nvidia-beaver/entry.c b/arch/arm/boards/nvidia-beaver/entry.c index a89d419797..c79057cd9d 100644 --- a/arch/arm/boards/nvidia-beaver/entry.c +++ b/arch/arm/boards/nvidia-beaver/entry.c @@ -2,8 +2,8 @@ // SPDX-FileCopyrightText: 2014 Lucas Stach <l.stach@pengutronix.de> #include <common.h> -#include <mach/lowlevel.h> -#include <mach/lowlevel-dvc.h> +#include <mach/tegra/lowlevel.h> +#include <mach/tegra/lowlevel-dvc.h> extern char __dtb_tegra30_beaver_start[]; diff --git a/arch/arm/boards/nvidia-jetson-tk1/board.c b/arch/arm/boards/nvidia-jetson-tk1/board.c index fca3038170..6f72466d76 100644 --- a/arch/arm/boards/nvidia-jetson-tk1/board.c +++ b/arch/arm/boards/nvidia-jetson-tk1/board.c @@ -6,7 +6,7 @@ #include <gpio.h> #include <i2c/i2c.h> #include <init.h> -#include <mach/tegra-bbu.h> +#include <mach/tegra/tegra-bbu.h> #define AS3722_SD_VOLTAGE(n) (0x00 + (n)) #define AS3722_GPIO_CONTROL(n) (0x08 + (n)) diff --git a/arch/arm/boards/nvidia-jetson-tk1/entry.c b/arch/arm/boards/nvidia-jetson-tk1/entry.c index 22b6c743ee..db9b1d9ebf 100644 --- a/arch/arm/boards/nvidia-jetson-tk1/entry.c +++ b/arch/arm/boards/nvidia-jetson-tk1/entry.c @@ -2,8 +2,8 @@ // SPDX-FileCopyrightText: 2014 Lucas Stach <l.stach@pengutronix.de> #include <common.h> -#include <mach/lowlevel.h> -#include <mach/lowlevel-dvc.h> +#include <mach/tegra/lowlevel.h> +#include <mach/tegra/lowlevel-dvc.h> extern char __dtb_tegra124_jetson_tk1_start[]; diff --git a/arch/arm/boards/nxp-imx6ull-evk/board.c b/arch/arm/boards/nxp-imx6ull-evk/board.c index 5959501a26..fb168662b9 100644 --- a/arch/arm/boards/nxp-imx6ull-evk/board.c +++ b/arch/arm/boards/nxp-imx6ull-evk/board.c @@ -3,7 +3,7 @@ #include <common.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <linux/phy.h> #include <linux/micrel_phy.h> diff --git a/arch/arm/boards/nxp-imx6ull-evk/lowlevel.c b/arch/arm/boards/nxp-imx6ull-evk/lowlevel.c index afef4c4498..0a12eb9b68 100644 --- a/arch/arm/boards/nxp-imx6ull-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx6ull-evk/lowlevel.c @@ -2,13 +2,14 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx6-regs.h> +#include <mach/imx/imx6-regs.h> #include <io.h> #include <debug_ll.h> -#include <mach/esdctl.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/esdctl.h> #include <asm/cache.h> #include <asm/sections.h> #include <image-metadata.h> diff --git a/arch/arm/boards/nxp-imx8mm-evk/board.c b/arch/arm/boards/nxp-imx8mm-evk/board.c index 6e4df60065..c8e17570ca 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/board.c +++ b/arch/arm/boards/nxp-imx8mm-evk/board.c @@ -7,7 +7,8 @@ #include <init.h> #include <linux/phy.h> #include <linux/sizes.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> +#include <deep-probe.h> #include <envfs.h> @@ -30,14 +31,11 @@ static int ar8031_phy_fixup(struct phy_device *phydev) return 0; } -static int nxp_imx8mm_evk_init(void) +static int imx8mm_evk_probe(struct device *dev) { int emmc_bbu_flag = 0; int sd_bbu_flag = 0; - if (!of_machine_is_compatible("fsl,imx8mm-evk")) - return 0; - barebox_set_hostname("imx8mm-evk"); if (bootsource_get() == BOOTSOURCE_MMC) { @@ -55,9 +53,24 @@ static int nxp_imx8mm_evk_init(void) imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", "/dev/m25p0.barebox", 0); phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup); return 0; } -device_initcall(nxp_imx8mm_evk_init); + +static const struct of_device_id imx8mm_evk_of_match[] = { + { .compatible = "fsl,imx8mm-evk", }, + { .compatible = "fsl,imx8mm-evkb", }, + { /* sentinel */ } +}; + +static struct driver imx8mm_evk_board_driver = { + .name = "board-imx8mm-evk", + .probe = imx8mm_evk_probe, + .of_compatible = imx8mm_evk_of_match, +}; +coredevice_platform_driver(imx8mm_evk_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(imx8mm_evk_of_match); diff --git a/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg b/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg index 10606ce29c..d1d223a8ee 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg @@ -5,3 +5,6 @@ soc imx8mm loadaddr 0x007e1000 max_load_size 0x3f000 ivtofs 0x400 + +#include <mach/imx/flexspi-imx8mm-cfg.h> +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c index 6132df53ec..881d8285b6 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c @@ -3,6 +3,7 @@ #include <io.h> #include <common.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <asm/mmu.h> #include <asm/cache.h> #include <asm/barebox-arm.h> @@ -10,17 +11,15 @@ #include <pbl/i2c.h> #include <pbl/pmic.h> #include <linux/sizes.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <mach/imx8mm-regs.h> -#include <mach/iomux-mx8mm.h> -#include <mach/imx8m-ccm-regs.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8mm-regs.h> +#include <mach/imx/iomux-mx8mm.h> +#include <mach/imx/imx8m-ccm-regs.h> #include <mfd/bd71837.h> -#include <mach/xload.h> +#include <mfd/pca9450.h> +#include <mach/imx/xload.h> #include <soc/imx8m/ddr.h> -#include <image-metadata.h> - -extern char __dtb_z_imx8mm_evk_start[]; #define UART_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_DSE_3P3V_45_OHM) @@ -38,6 +37,32 @@ static void setup_uart(void) putc_ll('>'); } +static struct pmic_config pca9450_cfg[] = { + /* BUCKxOUT_DVS0/1 control BUCK123 output */ + { PCA9450_BUCK123_DVS, 0x29 }, + + /* Buck 1 DVS control through PMIC_STBY_REQ */ + { PCA9450_BUCK1CTRL, 0x59 }, + + /* Set DVS1 to 0.8v for suspend */ + { PCA9450_BUCK1OUT_DVS1, 0x10 }, + + /* increase VDD_DRAM to 0.95v for 3Ghz DDR */ + { PCA9450_BUCK3OUT_DVS0, 0x1c }, + + /* + * VDD_DRAM needs off in suspend, set B1_ENMODE=10 + * (ON by PMIC_ON_REQ = H && PMIC_STBY_REQ = L) + */ + { PCA9450_BUCK3CTRL, 0x4a }, + + /* set VDD_SNVS_0V8 from default 0.85V */ + { PCA9450_LDO2CTRL, 0xc0 }, + + /* set WDOG_B_CFG to cold reset */ + { PCA9450_RESET_CTRL, 0xa1 }, +}; + static struct pmic_config bd71837_cfg[] = { /* decrease RESET key long push time from the default 10s to 10ms */ { BD718XX_PWRONCONFIG1, 0x0 }, @@ -58,12 +83,14 @@ static void power_init_board(void) imx8mm_setup_pad(IMX8MM_PAD_I2C1_SCL_I2C1_SCL); imx8mm_setup_pad(IMX8MM_PAD_I2C1_SDA_I2C1_SDA); - imx8mm_early_clock_init(); imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); i2c = imx8m_i2c_early_init(IOMEM(MX8MQ_I2C1_BASE_ADDR)); - pmic_configure(i2c, 0x4b, bd71837_cfg, ARRAY_SIZE(bd71837_cfg)); + if (i2c_dev_probe(i2c, 0x25, true) == 0) + pmic_configure(i2c, 0x25, pca9450_cfg, ARRAY_SIZE(pca9450_cfg)); + else + pmic_configure(i2c, 0x4b, bd71837_cfg, ARRAY_SIZE(bd71837_cfg)); } extern struct dram_timing_info imx8mm_evk_dram_timing; @@ -78,6 +105,7 @@ static void start_atf(void) if (current_el() != 3) return; + imx8mm_early_clock_init(); power_init_board(); imx8mm_ddr_init(&imx8mm_evk_dram_timing, DRAM_TYPE_LPDDR4); @@ -102,14 +130,26 @@ static void start_atf(void) */ static __noreturn noinline void nxp_imx8mm_evk_start(void) { + extern char __dtb_z_imx8mm_evk_start[], __dtb_z_imx8mm_evkb_start[]; + struct pbl_i2c *i2c; + void *fdt; + setup_uart(); start_atf(); /* - * Standard entry we hit once we initialized both DDR and ATF + * Standard entry we hit once we initialized both DDR and ATF. I2C pad + * and clock setup already done during power_init_board(). */ - imx8mm_barebox_entry(__dtb_z_imx8mm_evk_start); + i2c = imx8m_i2c_early_init(IOMEM(MX8MQ_I2C1_BASE_ADDR)); + + if (i2c_dev_probe(i2c, 0x25, true) == 0) + fdt = __dtb_z_imx8mm_evkb_start; + else + fdt = __dtb_z_imx8mm_evk_start; + + imx8mm_barebox_entry(fdt); } ENTRY_FUNCTION(start_nxp_imx8mm_evk, r0, r1, r2) @@ -119,7 +159,5 @@ ENTRY_FUNCTION(start_nxp_imx8mm_evk, r0, r1, r2) relocate_to_current_adr(); setup_c(); - IMD_USED_OF(imx8mm_evk); - nxp_imx8mm_evk_start(); } diff --git a/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c b/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c index e7c01f9cc9..c9d11a2408 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c +++ b/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c @@ -320,729 +320,6 @@ static struct dram_cfg_param lpddr4_ddrphy_cfg[] = { { 0x2200ca, 0x24 }, }; -/* ddr phy trained csr */ -static struct dram_cfg_param lpddr4_ddrphy_trained_csr[] = { - { 0x200b2, 0x0 }, - { 0x1200b2, 0x0 }, - { 0x2200b2, 0x0 }, - { 0x200cb, 0x0 }, - { 0x10043, 0x0 }, - { 0x110043, 0x0 }, - { 0x210043, 0x0 }, - { 0x10143, 0x0 }, - { 0x110143, 0x0 }, - { 0x210143, 0x0 }, - { 0x11043, 0x0 }, - { 0x111043, 0x0 }, - { 0x211043, 0x0 }, - { 0x11143, 0x0 }, - { 0x111143, 0x0 }, - { 0x211143, 0x0 }, - { 0x12043, 0x0 }, - { 0x112043, 0x0 }, - { 0x212043, 0x0 }, - { 0x12143, 0x0 }, - { 0x112143, 0x0 }, - { 0x212143, 0x0 }, - { 0x13043, 0x0 }, - { 0x113043, 0x0 }, - { 0x213043, 0x0 }, - { 0x13143, 0x0 }, - { 0x113143, 0x0 }, - { 0x213143, 0x0 }, - { 0x80, 0x0 }, - { 0x100080, 0x0 }, - { 0x200080, 0x0 }, - { 0x1080, 0x0 }, - { 0x101080, 0x0 }, - { 0x201080, 0x0 }, - { 0x2080, 0x0 }, - { 0x102080, 0x0 }, - { 0x202080, 0x0 }, - { 0x3080, 0x0 }, - { 0x103080, 0x0 }, - { 0x203080, 0x0 }, - { 0x4080, 0x0 }, - { 0x104080, 0x0 }, - { 0x204080, 0x0 }, - { 0x5080, 0x0 }, - { 0x105080, 0x0 }, - { 0x205080, 0x0 }, - { 0x6080, 0x0 }, - { 0x106080, 0x0 }, - { 0x206080, 0x0 }, - { 0x7080, 0x0 }, - { 0x107080, 0x0 }, - { 0x207080, 0x0 }, - { 0x8080, 0x0 }, - { 0x108080, 0x0 }, - { 0x208080, 0x0 }, - { 0x9080, 0x0 }, - { 0x109080, 0x0 }, - { 0x209080, 0x0 }, - { 0x10080, 0x0 }, - { 0x110080, 0x0 }, - { 0x210080, 0x0 }, - { 0x10180, 0x0 }, - { 0x110180, 0x0 }, - { 0x210180, 0x0 }, - { 0x11080, 0x0 }, - { 0x111080, 0x0 }, - { 0x211080, 0x0 }, - { 0x11180, 0x0 }, - { 0x111180, 0x0 }, - { 0x211180, 0x0 }, - { 0x12080, 0x0 }, - { 0x112080, 0x0 }, - { 0x212080, 0x0 }, - { 0x12180, 0x0 }, - { 0x112180, 0x0 }, - { 0x212180, 0x0 }, - { 0x13080, 0x0 }, - { 0x113080, 0x0 }, - { 0x213080, 0x0 }, - { 0x13180, 0x0 }, - { 0x113180, 0x0 }, - { 0x213180, 0x0 }, - { 0x10081, 0x0 }, - { 0x110081, 0x0 }, - { 0x210081, 0x0 }, - { 0x10181, 0x0 }, - { 0x110181, 0x0 }, - { 0x210181, 0x0 }, - { 0x11081, 0x0 }, - { 0x111081, 0x0 }, - { 0x211081, 0x0 }, - { 0x11181, 0x0 }, - { 0x111181, 0x0 }, - { 0x211181, 0x0 }, - { 0x12081, 0x0 }, - { 0x112081, 0x0 }, - { 0x212081, 0x0 }, - { 0x12181, 0x0 }, - { 0x112181, 0x0 }, - { 0x212181, 0x0 }, - { 0x13081, 0x0 }, - { 0x113081, 0x0 }, - { 0x213081, 0x0 }, - { 0x13181, 0x0 }, - { 0x113181, 0x0 }, - { 0x213181, 0x0 }, - { 0x100d0, 0x0 }, - { 0x1100d0, 0x0 }, - { 0x2100d0, 0x0 }, - { 0x101d0, 0x0 }, - { 0x1101d0, 0x0 }, - { 0x2101d0, 0x0 }, - { 0x110d0, 0x0 }, - { 0x1110d0, 0x0 }, - { 0x2110d0, 0x0 }, - { 0x111d0, 0x0 }, - { 0x1111d0, 0x0 }, - { 0x2111d0, 0x0 }, - { 0x120d0, 0x0 }, - { 0x1120d0, 0x0 }, - { 0x2120d0, 0x0 }, - { 0x121d0, 0x0 }, - { 0x1121d0, 0x0 }, - { 0x2121d0, 0x0 }, - { 0x130d0, 0x0 }, - { 0x1130d0, 0x0 }, - { 0x2130d0, 0x0 }, - { 0x131d0, 0x0 }, - { 0x1131d0, 0x0 }, - { 0x2131d0, 0x0 }, - { 0x100d1, 0x0 }, - { 0x1100d1, 0x0 }, - { 0x2100d1, 0x0 }, - { 0x101d1, 0x0 }, - { 0x1101d1, 0x0 }, - { 0x2101d1, 0x0 }, - { 0x110d1, 0x0 }, - { 0x1110d1, 0x0 }, - { 0x2110d1, 0x0 }, - { 0x111d1, 0x0 }, - { 0x1111d1, 0x0 }, - { 0x2111d1, 0x0 }, - { 0x120d1, 0x0 }, - { 0x1120d1, 0x0 }, - { 0x2120d1, 0x0 }, - { 0x121d1, 0x0 }, - { 0x1121d1, 0x0 }, - { 0x2121d1, 0x0 }, - { 0x130d1, 0x0 }, - { 0x1130d1, 0x0 }, - { 0x2130d1, 0x0 }, - { 0x131d1, 0x0 }, - { 0x1131d1, 0x0 }, - { 0x2131d1, 0x0 }, - { 0x10068, 0x0 }, - { 0x10168, 0x0 }, - { 0x10268, 0x0 }, - { 0x10368, 0x0 }, - { 0x10468, 0x0 }, - { 0x10568, 0x0 }, - { 0x10668, 0x0 }, - { 0x10768, 0x0 }, - { 0x10868, 0x0 }, - { 0x11068, 0x0 }, - { 0x11168, 0x0 }, - { 0x11268, 0x0 }, - { 0x11368, 0x0 }, - { 0x11468, 0x0 }, - { 0x11568, 0x0 }, - { 0x11668, 0x0 }, - { 0x11768, 0x0 }, - { 0x11868, 0x0 }, - { 0x12068, 0x0 }, - { 0x12168, 0x0 }, - { 0x12268, 0x0 }, - { 0x12368, 0x0 }, - { 0x12468, 0x0 }, - { 0x12568, 0x0 }, - { 0x12668, 0x0 }, - { 0x12768, 0x0 }, - { 0x12868, 0x0 }, - { 0x13068, 0x0 }, - { 0x13168, 0x0 }, - { 0x13268, 0x0 }, - { 0x13368, 0x0 }, - { 0x13468, 0x0 }, - { 0x13568, 0x0 }, - { 0x13668, 0x0 }, - { 0x13768, 0x0 }, - { 0x13868, 0x0 }, - { 0x10069, 0x0 }, - { 0x10169, 0x0 }, - { 0x10269, 0x0 }, - { 0x10369, 0x0 }, - { 0x10469, 0x0 }, - { 0x10569, 0x0 }, - { 0x10669, 0x0 }, - { 0x10769, 0x0 }, - { 0x10869, 0x0 }, - { 0x11069, 0x0 }, - { 0x11169, 0x0 }, - { 0x11269, 0x0 }, - { 0x11369, 0x0 }, - { 0x11469, 0x0 }, - { 0x11569, 0x0 }, - { 0x11669, 0x0 }, - { 0x11769, 0x0 }, - { 0x11869, 0x0 }, - { 0x12069, 0x0 }, - { 0x12169, 0x0 }, - { 0x12269, 0x0 }, - { 0x12369, 0x0 }, - { 0x12469, 0x0 }, - { 0x12569, 0x0 }, - { 0x12669, 0x0 }, - { 0x12769, 0x0 }, - { 0x12869, 0x0 }, - { 0x13069, 0x0 }, - { 0x13169, 0x0 }, - { 0x13269, 0x0 }, - { 0x13369, 0x0 }, - { 0x13469, 0x0 }, - { 0x13569, 0x0 }, - { 0x13669, 0x0 }, - { 0x13769, 0x0 }, - { 0x13869, 0x0 }, - { 0x1008c, 0x0 }, - { 0x11008c, 0x0 }, - { 0x21008c, 0x0 }, - { 0x1018c, 0x0 }, - { 0x11018c, 0x0 }, - { 0x21018c, 0x0 }, - { 0x1108c, 0x0 }, - { 0x11108c, 0x0 }, - { 0x21108c, 0x0 }, - { 0x1118c, 0x0 }, - { 0x11118c, 0x0 }, - { 0x21118c, 0x0 }, - { 0x1208c, 0x0 }, - { 0x11208c, 0x0 }, - { 0x21208c, 0x0 }, - { 0x1218c, 0x0 }, - { 0x11218c, 0x0 }, - { 0x21218c, 0x0 }, - { 0x1308c, 0x0 }, - { 0x11308c, 0x0 }, - { 0x21308c, 0x0 }, - { 0x1318c, 0x0 }, - { 0x11318c, 0x0 }, - { 0x21318c, 0x0 }, - { 0x1008d, 0x0 }, - { 0x11008d, 0x0 }, - { 0x21008d, 0x0 }, - { 0x1018d, 0x0 }, - { 0x11018d, 0x0 }, - { 0x21018d, 0x0 }, - { 0x1108d, 0x0 }, - { 0x11108d, 0x0 }, - { 0x21108d, 0x0 }, - { 0x1118d, 0x0 }, - { 0x11118d, 0x0 }, - { 0x21118d, 0x0 }, - { 0x1208d, 0x0 }, - { 0x11208d, 0x0 }, - { 0x21208d, 0x0 }, - { 0x1218d, 0x0 }, - { 0x11218d, 0x0 }, - { 0x21218d, 0x0 }, - { 0x1308d, 0x0 }, - { 0x11308d, 0x0 }, - { 0x21308d, 0x0 }, - { 0x1318d, 0x0 }, - { 0x11318d, 0x0 }, - { 0x21318d, 0x0 }, - { 0x100c0, 0x0 }, - { 0x1100c0, 0x0 }, - { 0x2100c0, 0x0 }, - { 0x101c0, 0x0 }, - { 0x1101c0, 0x0 }, - { 0x2101c0, 0x0 }, - { 0x102c0, 0x0 }, - { 0x1102c0, 0x0 }, - { 0x2102c0, 0x0 }, - { 0x103c0, 0x0 }, - { 0x1103c0, 0x0 }, - { 0x2103c0, 0x0 }, - { 0x104c0, 0x0 }, - { 0x1104c0, 0x0 }, - { 0x2104c0, 0x0 }, - { 0x105c0, 0x0 }, - { 0x1105c0, 0x0 }, - { 0x2105c0, 0x0 }, - { 0x106c0, 0x0 }, - { 0x1106c0, 0x0 }, - { 0x2106c0, 0x0 }, - { 0x107c0, 0x0 }, - { 0x1107c0, 0x0 }, - { 0x2107c0, 0x0 }, - { 0x108c0, 0x0 }, - { 0x1108c0, 0x0 }, - { 0x2108c0, 0x0 }, - { 0x110c0, 0x0 }, - { 0x1110c0, 0x0 }, - { 0x2110c0, 0x0 }, - { 0x111c0, 0x0 }, - { 0x1111c0, 0x0 }, - { 0x2111c0, 0x0 }, - { 0x112c0, 0x0 }, - { 0x1112c0, 0x0 }, - { 0x2112c0, 0x0 }, - { 0x113c0, 0x0 }, - { 0x1113c0, 0x0 }, - { 0x2113c0, 0x0 }, - { 0x114c0, 0x0 }, - { 0x1114c0, 0x0 }, - { 0x2114c0, 0x0 }, - { 0x115c0, 0x0 }, - { 0x1115c0, 0x0 }, - { 0x2115c0, 0x0 }, - { 0x116c0, 0x0 }, - { 0x1116c0, 0x0 }, - { 0x2116c0, 0x0 }, - { 0x117c0, 0x0 }, - { 0x1117c0, 0x0 }, - { 0x2117c0, 0x0 }, - { 0x118c0, 0x0 }, - { 0x1118c0, 0x0 }, - { 0x2118c0, 0x0 }, - { 0x120c0, 0x0 }, - { 0x1120c0, 0x0 }, - { 0x2120c0, 0x0 }, - { 0x121c0, 0x0 }, - { 0x1121c0, 0x0 }, - { 0x2121c0, 0x0 }, - { 0x122c0, 0x0 }, - { 0x1122c0, 0x0 }, - { 0x2122c0, 0x0 }, - { 0x123c0, 0x0 }, - { 0x1123c0, 0x0 }, - { 0x2123c0, 0x0 }, - { 0x124c0, 0x0 }, - { 0x1124c0, 0x0 }, - { 0x2124c0, 0x0 }, - { 0x125c0, 0x0 }, - { 0x1125c0, 0x0 }, - { 0x2125c0, 0x0 }, - { 0x126c0, 0x0 }, - { 0x1126c0, 0x0 }, - { 0x2126c0, 0x0 }, - { 0x127c0, 0x0 }, - { 0x1127c0, 0x0 }, - { 0x2127c0, 0x0 }, - { 0x128c0, 0x0 }, - { 0x1128c0, 0x0 }, - { 0x2128c0, 0x0 }, - { 0x130c0, 0x0 }, - { 0x1130c0, 0x0 }, - { 0x2130c0, 0x0 }, - { 0x131c0, 0x0 }, - { 0x1131c0, 0x0 }, - { 0x2131c0, 0x0 }, - { 0x132c0, 0x0 }, - { 0x1132c0, 0x0 }, - { 0x2132c0, 0x0 }, - { 0x133c0, 0x0 }, - { 0x1133c0, 0x0 }, - { 0x2133c0, 0x0 }, - { 0x134c0, 0x0 }, - { 0x1134c0, 0x0 }, - { 0x2134c0, 0x0 }, - { 0x135c0, 0x0 }, - { 0x1135c0, 0x0 }, - { 0x2135c0, 0x0 }, - { 0x136c0, 0x0 }, - { 0x1136c0, 0x0 }, - { 0x2136c0, 0x0 }, - { 0x137c0, 0x0 }, - { 0x1137c0, 0x0 }, - { 0x2137c0, 0x0 }, - { 0x138c0, 0x0 }, - { 0x1138c0, 0x0 }, - { 0x2138c0, 0x0 }, - { 0x100c1, 0x0 }, - { 0x1100c1, 0x0 }, - { 0x2100c1, 0x0 }, - { 0x101c1, 0x0 }, - { 0x1101c1, 0x0 }, - { 0x2101c1, 0x0 }, - { 0x102c1, 0x0 }, - { 0x1102c1, 0x0 }, - { 0x2102c1, 0x0 }, - { 0x103c1, 0x0 }, - { 0x1103c1, 0x0 }, - { 0x2103c1, 0x0 }, - { 0x104c1, 0x0 }, - { 0x1104c1, 0x0 }, - { 0x2104c1, 0x0 }, - { 0x105c1, 0x0 }, - { 0x1105c1, 0x0 }, - { 0x2105c1, 0x0 }, - { 0x106c1, 0x0 }, - { 0x1106c1, 0x0 }, - { 0x2106c1, 0x0 }, - { 0x107c1, 0x0 }, - { 0x1107c1, 0x0 }, - { 0x2107c1, 0x0 }, - { 0x108c1, 0x0 }, - { 0x1108c1, 0x0 }, - { 0x2108c1, 0x0 }, - { 0x110c1, 0x0 }, - { 0x1110c1, 0x0 }, - { 0x2110c1, 0x0 }, - { 0x111c1, 0x0 }, - { 0x1111c1, 0x0 }, - { 0x2111c1, 0x0 }, - { 0x112c1, 0x0 }, - { 0x1112c1, 0x0 }, - { 0x2112c1, 0x0 }, - { 0x113c1, 0x0 }, - { 0x1113c1, 0x0 }, - { 0x2113c1, 0x0 }, - { 0x114c1, 0x0 }, - { 0x1114c1, 0x0 }, - { 0x2114c1, 0x0 }, - { 0x115c1, 0x0 }, - { 0x1115c1, 0x0 }, - { 0x2115c1, 0x0 }, - { 0x116c1, 0x0 }, - { 0x1116c1, 0x0 }, - { 0x2116c1, 0x0 }, - { 0x117c1, 0x0 }, - { 0x1117c1, 0x0 }, - { 0x2117c1, 0x0 }, - { 0x118c1, 0x0 }, - { 0x1118c1, 0x0 }, - { 0x2118c1, 0x0 }, - { 0x120c1, 0x0 }, - { 0x1120c1, 0x0 }, - { 0x2120c1, 0x0 }, - { 0x121c1, 0x0 }, - { 0x1121c1, 0x0 }, - { 0x2121c1, 0x0 }, - { 0x122c1, 0x0 }, - { 0x1122c1, 0x0 }, - { 0x2122c1, 0x0 }, - { 0x123c1, 0x0 }, - { 0x1123c1, 0x0 }, - { 0x2123c1, 0x0 }, - { 0x124c1, 0x0 }, - { 0x1124c1, 0x0 }, - { 0x2124c1, 0x0 }, - { 0x125c1, 0x0 }, - { 0x1125c1, 0x0 }, - { 0x2125c1, 0x0 }, - { 0x126c1, 0x0 }, - { 0x1126c1, 0x0 }, - { 0x2126c1, 0x0 }, - { 0x127c1, 0x0 }, - { 0x1127c1, 0x0 }, - { 0x2127c1, 0x0 }, - { 0x128c1, 0x0 }, - { 0x1128c1, 0x0 }, - { 0x2128c1, 0x0 }, - { 0x130c1, 0x0 }, - { 0x1130c1, 0x0 }, - { 0x2130c1, 0x0 }, - { 0x131c1, 0x0 }, - { 0x1131c1, 0x0 }, - { 0x2131c1, 0x0 }, - { 0x132c1, 0x0 }, - { 0x1132c1, 0x0 }, - { 0x2132c1, 0x0 }, - { 0x133c1, 0x0 }, - { 0x1133c1, 0x0 }, - { 0x2133c1, 0x0 }, - { 0x134c1, 0x0 }, - { 0x1134c1, 0x0 }, - { 0x2134c1, 0x0 }, - { 0x135c1, 0x0 }, - { 0x1135c1, 0x0 }, - { 0x2135c1, 0x0 }, - { 0x136c1, 0x0 }, - { 0x1136c1, 0x0 }, - { 0x2136c1, 0x0 }, - { 0x137c1, 0x0 }, - { 0x1137c1, 0x0 }, - { 0x2137c1, 0x0 }, - { 0x138c1, 0x0 }, - { 0x1138c1, 0x0 }, - { 0x2138c1, 0x0 }, - { 0x10020, 0x0 }, - { 0x110020, 0x0 }, - { 0x210020, 0x0 }, - { 0x11020, 0x0 }, - { 0x111020, 0x0 }, - { 0x211020, 0x0 }, - { 0x12020, 0x0 }, - { 0x112020, 0x0 }, - { 0x212020, 0x0 }, - { 0x13020, 0x0 }, - { 0x113020, 0x0 }, - { 0x213020, 0x0 }, - { 0x20072, 0x0 }, - { 0x20073, 0x0 }, - { 0x20074, 0x0 }, - { 0x100aa, 0x0 }, - { 0x110aa, 0x0 }, - { 0x120aa, 0x0 }, - { 0x130aa, 0x0 }, - { 0x20010, 0x0 }, - { 0x120010, 0x0 }, - { 0x220010, 0x0 }, - { 0x20011, 0x0 }, - { 0x120011, 0x0 }, - { 0x220011, 0x0 }, - { 0x100ae, 0x0 }, - { 0x1100ae, 0x0 }, - { 0x2100ae, 0x0 }, - { 0x100af, 0x0 }, - { 0x1100af, 0x0 }, - { 0x2100af, 0x0 }, - { 0x110ae, 0x0 }, - { 0x1110ae, 0x0 }, - { 0x2110ae, 0x0 }, - { 0x110af, 0x0 }, - { 0x1110af, 0x0 }, - { 0x2110af, 0x0 }, - { 0x120ae, 0x0 }, - { 0x1120ae, 0x0 }, - { 0x2120ae, 0x0 }, - { 0x120af, 0x0 }, - { 0x1120af, 0x0 }, - { 0x2120af, 0x0 }, - { 0x130ae, 0x0 }, - { 0x1130ae, 0x0 }, - { 0x2130ae, 0x0 }, - { 0x130af, 0x0 }, - { 0x1130af, 0x0 }, - { 0x2130af, 0x0 }, - { 0x20020, 0x0 }, - { 0x120020, 0x0 }, - { 0x220020, 0x0 }, - { 0x100a0, 0x0 }, - { 0x100a1, 0x0 }, - { 0x100a2, 0x0 }, - { 0x100a3, 0x0 }, - { 0x100a4, 0x0 }, - { 0x100a5, 0x0 }, - { 0x100a6, 0x0 }, - { 0x100a7, 0x0 }, - { 0x110a0, 0x0 }, - { 0x110a1, 0x0 }, - { 0x110a2, 0x0 }, - { 0x110a3, 0x0 }, - { 0x110a4, 0x0 }, - { 0x110a5, 0x0 }, - { 0x110a6, 0x0 }, - { 0x110a7, 0x0 }, - { 0x120a0, 0x0 }, - { 0x120a1, 0x0 }, - { 0x120a2, 0x0 }, - { 0x120a3, 0x0 }, - { 0x120a4, 0x0 }, - { 0x120a5, 0x0 }, - { 0x120a6, 0x0 }, - { 0x120a7, 0x0 }, - { 0x130a0, 0x0 }, - { 0x130a1, 0x0 }, - { 0x130a2, 0x0 }, - { 0x130a3, 0x0 }, - { 0x130a4, 0x0 }, - { 0x130a5, 0x0 }, - { 0x130a6, 0x0 }, - { 0x130a7, 0x0 }, - { 0x2007c, 0x0 }, - { 0x12007c, 0x0 }, - { 0x22007c, 0x0 }, - { 0x2007d, 0x0 }, - { 0x12007d, 0x0 }, - { 0x22007d, 0x0 }, - { 0x400fd, 0x0 }, - { 0x400c0, 0x0 }, - { 0x90201, 0x0 }, - { 0x190201, 0x0 }, - { 0x290201, 0x0 }, - { 0x90202, 0x0 }, - { 0x190202, 0x0 }, - { 0x290202, 0x0 }, - { 0x90203, 0x0 }, - { 0x190203, 0x0 }, - { 0x290203, 0x0 }, - { 0x90204, 0x0 }, - { 0x190204, 0x0 }, - { 0x290204, 0x0 }, - { 0x90205, 0x0 }, - { 0x190205, 0x0 }, - { 0x290205, 0x0 }, - { 0x90206, 0x0 }, - { 0x190206, 0x0 }, - { 0x290206, 0x0 }, - { 0x90207, 0x0 }, - { 0x190207, 0x0 }, - { 0x290207, 0x0 }, - { 0x90208, 0x0 }, - { 0x190208, 0x0 }, - { 0x290208, 0x0 }, - { 0x10062, 0x0 }, - { 0x10162, 0x0 }, - { 0x10262, 0x0 }, - { 0x10362, 0x0 }, - { 0x10462, 0x0 }, - { 0x10562, 0x0 }, - { 0x10662, 0x0 }, - { 0x10762, 0x0 }, - { 0x10862, 0x0 }, - { 0x11062, 0x0 }, - { 0x11162, 0x0 }, - { 0x11262, 0x0 }, - { 0x11362, 0x0 }, - { 0x11462, 0x0 }, - { 0x11562, 0x0 }, - { 0x11662, 0x0 }, - { 0x11762, 0x0 }, - { 0x11862, 0x0 }, - { 0x12062, 0x0 }, - { 0x12162, 0x0 }, - { 0x12262, 0x0 }, - { 0x12362, 0x0 }, - { 0x12462, 0x0 }, - { 0x12562, 0x0 }, - { 0x12662, 0x0 }, - { 0x12762, 0x0 }, - { 0x12862, 0x0 }, - { 0x13062, 0x0 }, - { 0x13162, 0x0 }, - { 0x13262, 0x0 }, - { 0x13362, 0x0 }, - { 0x13462, 0x0 }, - { 0x13562, 0x0 }, - { 0x13662, 0x0 }, - { 0x13762, 0x0 }, - { 0x13862, 0x0 }, - { 0x20077, 0x0 }, - { 0x10001, 0x0 }, - { 0x11001, 0x0 }, - { 0x12001, 0x0 }, - { 0x13001, 0x0 }, - { 0x10040, 0x0 }, - { 0x10140, 0x0 }, - { 0x10240, 0x0 }, - { 0x10340, 0x0 }, - { 0x10440, 0x0 }, - { 0x10540, 0x0 }, - { 0x10640, 0x0 }, - { 0x10740, 0x0 }, - { 0x10840, 0x0 }, - { 0x10030, 0x0 }, - { 0x10130, 0x0 }, - { 0x10230, 0x0 }, - { 0x10330, 0x0 }, - { 0x10430, 0x0 }, - { 0x10530, 0x0 }, - { 0x10630, 0x0 }, - { 0x10730, 0x0 }, - { 0x10830, 0x0 }, - { 0x11040, 0x0 }, - { 0x11140, 0x0 }, - { 0x11240, 0x0 }, - { 0x11340, 0x0 }, - { 0x11440, 0x0 }, - { 0x11540, 0x0 }, - { 0x11640, 0x0 }, - { 0x11740, 0x0 }, - { 0x11840, 0x0 }, - { 0x11030, 0x0 }, - { 0x11130, 0x0 }, - { 0x11230, 0x0 }, - { 0x11330, 0x0 }, - { 0x11430, 0x0 }, - { 0x11530, 0x0 }, - { 0x11630, 0x0 }, - { 0x11730, 0x0 }, - { 0x11830, 0x0 }, - { 0x12040, 0x0 }, - { 0x12140, 0x0 }, - { 0x12240, 0x0 }, - { 0x12340, 0x0 }, - { 0x12440, 0x0 }, - { 0x12540, 0x0 }, - { 0x12640, 0x0 }, - { 0x12740, 0x0 }, - { 0x12840, 0x0 }, - { 0x12030, 0x0 }, - { 0x12130, 0x0 }, - { 0x12230, 0x0 }, - { 0x12330, 0x0 }, - { 0x12430, 0x0 }, - { 0x12530, 0x0 }, - { 0x12630, 0x0 }, - { 0x12730, 0x0 }, - { 0x12830, 0x0 }, - { 0x13040, 0x0 }, - { 0x13140, 0x0 }, - { 0x13240, 0x0 }, - { 0x13340, 0x0 }, - { 0x13440, 0x0 }, - { 0x13540, 0x0 }, - { 0x13640, 0x0 }, - { 0x13740, 0x0 }, - { 0x13840, 0x0 }, - { 0x13030, 0x0 }, - { 0x13130, 0x0 }, - { 0x13230, 0x0 }, - { 0x13330, 0x0 }, - { 0x13430, 0x0 }, - { 0x13530, 0x0 }, - { 0x13630, 0x0 }, - { 0x13730, 0x0 }, - { 0x13830, 0x0 }, -}; - /* P0 message block paremeter for training firmware */ static struct dram_cfg_param lpddr4_fsp0_cfg[] = { { 0xd0000, 0x0 }, @@ -1971,8 +1248,7 @@ struct dram_timing_info imx8mm_evk_dram_timing = { .ddrphy_cfg_num = ARRAY_SIZE(lpddr4_ddrphy_cfg), .fsp_msg = lpddr4_dram_fsp_msg, .fsp_msg_num = ARRAY_SIZE(lpddr4_dram_fsp_msg), - .ddrphy_trained_csr = lpddr4_ddrphy_trained_csr, - .ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr), .ddrphy_pie = lpddr4_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie), + .fsp_table = { 4000, 400, 100, }, }; diff --git a/arch/arm/boards/nxp-imx8mn-evk/board.c b/arch/arm/boards/nxp-imx8mn-evk/board.c index 3606dabe9d..3e90ba284c 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/board.c +++ b/arch/arm/boards/nxp-imx8mn-evk/board.c @@ -9,7 +9,7 @@ #include <init.h> #include <linux/phy.h> #include <linux/sizes.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <envfs.h> #define PHY_ID_AR8031 0x004dd074 @@ -31,7 +31,7 @@ static int ar8031_phy_fixup(struct phy_device *phydev) return 0; } -static int imx8mn_evk_probe(struct device_d *dev) +static int imx8mn_evk_probe(struct device *dev) { int emmc_bbu_flag = 0; int sd_bbu_flag = 0; @@ -51,6 +51,7 @@ static int imx8mn_evk_probe(struct device_d *dev) imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", "/dev/m25p0.barebox", 0); phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup); @@ -65,7 +66,7 @@ static const struct of_device_id imx8mn_evk_of_match[] = { }; BAREBOX_DEEP_PROBE_ENABLE(imx8mn_evk_of_match); -static struct driver_d imx8mn_evkboard_driver = { +static struct driver imx8mn_evkboard_driver = { .name = "board-imx8mn-evk", .probe = imx8mn_evk_probe, .of_compatible = DRV_OF_COMPAT(imx8mn_evk_of_match), diff --git a/arch/arm/boards/nxp-imx8mn-evk/ddr4-timing.c b/arch/arm/boards/nxp-imx8mn-evk/ddr4-timing.c index 131a63156e..626d7e1c08 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/ddr4-timing.c +++ b/arch/arm/boards/nxp-imx8mn-evk/ddr4-timing.c @@ -210,533 +210,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { { 0x2002c, 0x0 }, }; -/* ddr phy trained csr */ -static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { - {0x0200b2, 0x0}, - {0x1200b2, 0x0}, - {0x2200b2, 0x0}, - {0x0200cb, 0x0}, - {0x010043, 0x0}, - {0x110043, 0x0}, - {0x210043, 0x0}, - {0x010143, 0x0}, - {0x110143, 0x0}, - {0x210143, 0x0}, - {0x011043, 0x0}, - {0x111043, 0x0}, - {0x211043, 0x0}, - {0x011143, 0x0}, - {0x111143, 0x0}, - {0x211143, 0x0}, - {0x000080, 0x0}, - {0x100080, 0x0}, - {0x200080, 0x0}, - {0x001080, 0x0}, - {0x101080, 0x0}, - {0x201080, 0x0}, - {0x002080, 0x0}, - {0x102080, 0x0}, - {0x202080, 0x0}, - {0x003080, 0x0}, - {0x103080, 0x0}, - {0x203080, 0x0}, - {0x004080, 0x0}, - {0x104080, 0x0}, - {0x204080, 0x0}, - {0x005080, 0x0}, - {0x105080, 0x0}, - {0x205080, 0x0}, - {0x006080, 0x0}, - {0x106080, 0x0}, - {0x206080, 0x0}, - {0x007080, 0x0}, - {0x107080, 0x0}, - {0x207080, 0x0}, - {0x008080, 0x0}, - {0x108080, 0x0}, - {0x208080, 0x0}, - {0x009080, 0x0}, - {0x109080, 0x0}, - {0x209080, 0x0}, - {0x010080, 0x0}, - {0x110080, 0x0}, - {0x210080, 0x0}, - {0x010180, 0x0}, - {0x110180, 0x0}, - {0x210180, 0x0}, - {0x010081, 0x0}, - {0x110081, 0x0}, - {0x210081, 0x0}, - {0x010181, 0x0}, - {0x110181, 0x0}, - {0x210181, 0x0}, - {0x010082, 0x0}, - {0x110082, 0x0}, - {0x210082, 0x0}, - {0x010182, 0x0}, - {0x110182, 0x0}, - {0x210182, 0x0}, - {0x010083, 0x0}, - {0x110083, 0x0}, - {0x210083, 0x0}, - {0x010183, 0x0}, - {0x110183, 0x0}, - {0x210183, 0x0}, - {0x011080, 0x0}, - {0x111080, 0x0}, - {0x211080, 0x0}, - {0x011180, 0x0}, - {0x111180, 0x0}, - {0x211180, 0x0}, - {0x011081, 0x0}, - {0x111081, 0x0}, - {0x211081, 0x0}, - {0x011181, 0x0}, - {0x111181, 0x0}, - {0x211181, 0x0}, - {0x011082, 0x0}, - {0x111082, 0x0}, - {0x211082, 0x0}, - {0x011182, 0x0}, - {0x111182, 0x0}, - {0x211182, 0x0}, - {0x011083, 0x0}, - {0x111083, 0x0}, - {0x211083, 0x0}, - {0x011183, 0x0}, - {0x111183, 0x0}, - {0x211183, 0x0}, - {0x0100d0, 0x0}, - {0x1100d0, 0x0}, - {0x2100d0, 0x0}, - {0x0101d0, 0x0}, - {0x1101d0, 0x0}, - {0x2101d0, 0x0}, - {0x0100d1, 0x0}, - {0x1100d1, 0x0}, - {0x2100d1, 0x0}, - {0x0101d1, 0x0}, - {0x1101d1, 0x0}, - {0x2101d1, 0x0}, - {0x0100d2, 0x0}, - {0x1100d2, 0x0}, - {0x2100d2, 0x0}, - {0x0101d2, 0x0}, - {0x1101d2, 0x0}, - {0x2101d2, 0x0}, - {0x0100d3, 0x0}, - {0x1100d3, 0x0}, - {0x2100d3, 0x0}, - {0x0101d3, 0x0}, - {0x1101d3, 0x0}, - {0x2101d3, 0x0}, - {0x0110d0, 0x0}, - {0x1110d0, 0x0}, - {0x2110d0, 0x0}, - {0x0111d0, 0x0}, - {0x1111d0, 0x0}, - {0x2111d0, 0x0}, - {0x0110d1, 0x0}, - {0x1110d1, 0x0}, - {0x2110d1, 0x0}, - {0x0111d1, 0x0}, - {0x1111d1, 0x0}, - {0x2111d1, 0x0}, - {0x0110d2, 0x0}, - {0x1110d2, 0x0}, - {0x2110d2, 0x0}, - {0x0111d2, 0x0}, - {0x1111d2, 0x0}, - {0x2111d2, 0x0}, - {0x0110d3, 0x0}, - {0x1110d3, 0x0}, - {0x2110d3, 0x0}, - {0x0111d3, 0x0}, - {0x1111d3, 0x0}, - {0x2111d3, 0x0}, - {0x010068, 0x0}, - {0x010168, 0x0}, - {0x010268, 0x0}, - {0x010368, 0x0}, - {0x010468, 0x0}, - {0x010568, 0x0}, - {0x010668, 0x0}, - {0x010768, 0x0}, - {0x010868, 0x0}, - {0x010069, 0x0}, - {0x010169, 0x0}, - {0x010269, 0x0}, - {0x010369, 0x0}, - {0x010469, 0x0}, - {0x010569, 0x0}, - {0x010669, 0x0}, - {0x010769, 0x0}, - {0x010869, 0x0}, - {0x01006a, 0x0}, - {0x01016a, 0x0}, - {0x01026a, 0x0}, - {0x01036a, 0x0}, - {0x01046a, 0x0}, - {0x01056a, 0x0}, - {0x01066a, 0x0}, - {0x01076a, 0x0}, - {0x01086a, 0x0}, - {0x01006b, 0x0}, - {0x01016b, 0x0}, - {0x01026b, 0x0}, - {0x01036b, 0x0}, - {0x01046b, 0x0}, - {0x01056b, 0x0}, - {0x01066b, 0x0}, - {0x01076b, 0x0}, - {0x01086b, 0x0}, - {0x011068, 0x0}, - {0x011168, 0x0}, - {0x011268, 0x0}, - {0x011368, 0x0}, - {0x011468, 0x0}, - {0x011568, 0x0}, - {0x011668, 0x0}, - {0x011768, 0x0}, - {0x011868, 0x0}, - {0x011069, 0x0}, - {0x011169, 0x0}, - {0x011269, 0x0}, - {0x011369, 0x0}, - {0x011469, 0x0}, - {0x011569, 0x0}, - {0x011669, 0x0}, - {0x011769, 0x0}, - {0x011869, 0x0}, - {0x01106a, 0x0}, - {0x01116a, 0x0}, - {0x01126a, 0x0}, - {0x01136a, 0x0}, - {0x01146a, 0x0}, - {0x01156a, 0x0}, - {0x01166a, 0x0}, - {0x01176a, 0x0}, - {0x01186a, 0x0}, - {0x01106b, 0x0}, - {0x01116b, 0x0}, - {0x01126b, 0x0}, - {0x01136b, 0x0}, - {0x01146b, 0x0}, - {0x01156b, 0x0}, - {0x01166b, 0x0}, - {0x01176b, 0x0}, - {0x01186b, 0x0}, - {0x01008c, 0x0}, - {0x11008c, 0x0}, - {0x21008c, 0x0}, - {0x01018c, 0x0}, - {0x11018c, 0x0}, - {0x21018c, 0x0}, - {0x01008d, 0x0}, - {0x11008d, 0x0}, - {0x21008d, 0x0}, - {0x01018d, 0x0}, - {0x11018d, 0x0}, - {0x21018d, 0x0}, - {0x01008e, 0x0}, - {0x11008e, 0x0}, - {0x21008e, 0x0}, - {0x01018e, 0x0}, - {0x11018e, 0x0}, - {0x21018e, 0x0}, - {0x01008f, 0x0}, - {0x11008f, 0x0}, - {0x21008f, 0x0}, - {0x01018f, 0x0}, - {0x11018f, 0x0}, - {0x21018f, 0x0}, - {0x01108c, 0x0}, - {0x11108c, 0x0}, - {0x21108c, 0x0}, - {0x01118c, 0x0}, - {0x11118c, 0x0}, - {0x21118c, 0x0}, - {0x01108d, 0x0}, - {0x11108d, 0x0}, - {0x21108d, 0x0}, - {0x01118d, 0x0}, - {0x11118d, 0x0}, - {0x21118d, 0x0}, - {0x01108e, 0x0}, - {0x11108e, 0x0}, - {0x21108e, 0x0}, - {0x01118e, 0x0}, - {0x11118e, 0x0}, - {0x21118e, 0x0}, - {0x01108f, 0x0}, - {0x11108f, 0x0}, - {0x21108f, 0x0}, - {0x01118f, 0x0}, - {0x11118f, 0x0}, - {0x21118f, 0x0}, - {0x0100c0, 0x0}, - {0x1100c0, 0x0}, - {0x2100c0, 0x0}, - {0x0101c0, 0x0}, - {0x1101c0, 0x0}, - {0x2101c0, 0x0}, - {0x0102c0, 0x0}, - {0x1102c0, 0x0}, - {0x2102c0, 0x0}, - {0x0103c0, 0x0}, - {0x1103c0, 0x0}, - {0x2103c0, 0x0}, - {0x0104c0, 0x0}, - {0x1104c0, 0x0}, - {0x2104c0, 0x0}, - {0x0105c0, 0x0}, - {0x1105c0, 0x0}, - {0x2105c0, 0x0}, - {0x0106c0, 0x0}, - {0x1106c0, 0x0}, - {0x2106c0, 0x0}, - {0x0107c0, 0x0}, - {0x1107c0, 0x0}, - {0x2107c0, 0x0}, - {0x0108c0, 0x0}, - {0x1108c0, 0x0}, - {0x2108c0, 0x0}, - {0x0100c1, 0x0}, - {0x1100c1, 0x0}, - {0x2100c1, 0x0}, - {0x0101c1, 0x0}, - {0x1101c1, 0x0}, - {0x2101c1, 0x0}, - {0x0102c1, 0x0}, - {0x1102c1, 0x0}, - {0x2102c1, 0x0}, - {0x0103c1, 0x0}, - {0x1103c1, 0x0}, - {0x2103c1, 0x0}, - {0x0104c1, 0x0}, - {0x1104c1, 0x0}, - {0x2104c1, 0x0}, - {0x0105c1, 0x0}, - {0x1105c1, 0x0}, - {0x2105c1, 0x0}, - {0x0106c1, 0x0}, - {0x1106c1, 0x0}, - {0x2106c1, 0x0}, - {0x0107c1, 0x0}, - {0x1107c1, 0x0}, - {0x2107c1, 0x0}, - {0x0108c1, 0x0}, - {0x1108c1, 0x0}, - {0x2108c1, 0x0}, - {0x0100c2, 0x0}, - {0x1100c2, 0x0}, - {0x2100c2, 0x0}, - {0x0101c2, 0x0}, - {0x1101c2, 0x0}, - {0x2101c2, 0x0}, - {0x0102c2, 0x0}, - {0x1102c2, 0x0}, - {0x2102c2, 0x0}, - {0x0103c2, 0x0}, - {0x1103c2, 0x0}, - {0x2103c2, 0x0}, - {0x0104c2, 0x0}, - {0x1104c2, 0x0}, - {0x2104c2, 0x0}, - {0x0105c2, 0x0}, - {0x1105c2, 0x0}, - {0x2105c2, 0x0}, - {0x0106c2, 0x0}, - {0x1106c2, 0x0}, - {0x2106c2, 0x0}, - {0x0107c2, 0x0}, - {0x1107c2, 0x0}, - {0x2107c2, 0x0}, - {0x0108c2, 0x0}, - {0x1108c2, 0x0}, - {0x2108c2, 0x0}, - {0x0100c3, 0x0}, - {0x1100c3, 0x0}, - {0x2100c3, 0x0}, - {0x0101c3, 0x0}, - {0x1101c3, 0x0}, - {0x2101c3, 0x0}, - {0x0102c3, 0x0}, - {0x1102c3, 0x0}, - {0x2102c3, 0x0}, - {0x0103c3, 0x0}, - {0x1103c3, 0x0}, - {0x2103c3, 0x0}, - {0x0104c3, 0x0}, - {0x1104c3, 0x0}, - {0x2104c3, 0x0}, - {0x0105c3, 0x0}, - {0x1105c3, 0x0}, - {0x2105c3, 0x0}, - {0x0106c3, 0x0}, - {0x1106c3, 0x0}, - {0x2106c3, 0x0}, - {0x0107c3, 0x0}, - {0x1107c3, 0x0}, - {0x2107c3, 0x0}, - {0x0108c3, 0x0}, - {0x1108c3, 0x0}, - {0x2108c3, 0x0}, - {0x0110c0, 0x0}, - {0x1110c0, 0x0}, - {0x2110c0, 0x0}, - {0x0111c0, 0x0}, - {0x1111c0, 0x0}, - {0x2111c0, 0x0}, - {0x0112c0, 0x0}, - {0x1112c0, 0x0}, - {0x2112c0, 0x0}, - {0x0113c0, 0x0}, - {0x1113c0, 0x0}, - {0x2113c0, 0x0}, - {0x0114c0, 0x0}, - {0x1114c0, 0x0}, - {0x2114c0, 0x0}, - {0x0115c0, 0x0}, - {0x1115c0, 0x0}, - {0x2115c0, 0x0}, - {0x0116c0, 0x0}, - {0x1116c0, 0x0}, - {0x2116c0, 0x0}, - {0x0117c0, 0x0}, - {0x1117c0, 0x0}, - {0x2117c0, 0x0}, - {0x0118c0, 0x0}, - {0x1118c0, 0x0}, - {0x2118c0, 0x0}, - {0x0110c1, 0x0}, - {0x1110c1, 0x0}, - {0x2110c1, 0x0}, - {0x0111c1, 0x0}, - {0x1111c1, 0x0}, - {0x2111c1, 0x0}, - {0x0112c1, 0x0}, - {0x1112c1, 0x0}, - {0x2112c1, 0x0}, - {0x0113c1, 0x0}, - {0x1113c1, 0x0}, - {0x2113c1, 0x0}, - {0x0114c1, 0x0}, - {0x1114c1, 0x0}, - {0x2114c1, 0x0}, - {0x0115c1, 0x0}, - {0x1115c1, 0x0}, - {0x2115c1, 0x0}, - {0x0116c1, 0x0}, - {0x1116c1, 0x0}, - {0x2116c1, 0x0}, - {0x0117c1, 0x0}, - {0x1117c1, 0x0}, - {0x2117c1, 0x0}, - {0x0118c1, 0x0}, - {0x1118c1, 0x0}, - {0x2118c1, 0x0}, - {0x0110c2, 0x0}, - {0x1110c2, 0x0}, - {0x2110c2, 0x0}, - {0x0111c2, 0x0}, - {0x1111c2, 0x0}, - {0x2111c2, 0x0}, - {0x0112c2, 0x0}, - {0x1112c2, 0x0}, - {0x2112c2, 0x0}, - {0x0113c2, 0x0}, - {0x1113c2, 0x0}, - {0x2113c2, 0x0}, - {0x0114c2, 0x0}, - {0x1114c2, 0x0}, - {0x2114c2, 0x0}, - {0x0115c2, 0x0}, - {0x1115c2, 0x0}, - {0x2115c2, 0x0}, - {0x0116c2, 0x0}, - {0x1116c2, 0x0}, - {0x2116c2, 0x0}, - {0x0117c2, 0x0}, - {0x1117c2, 0x0}, - {0x2117c2, 0x0}, - {0x0118c2, 0x0}, - {0x1118c2, 0x0}, - {0x2118c2, 0x0}, - {0x0110c3, 0x0}, - {0x1110c3, 0x0}, - {0x2110c3, 0x0}, - {0x0111c3, 0x0}, - {0x1111c3, 0x0}, - {0x2111c3, 0x0}, - {0x0112c3, 0x0}, - {0x1112c3, 0x0}, - {0x2112c3, 0x0}, - {0x0113c3, 0x0}, - {0x1113c3, 0x0}, - {0x2113c3, 0x0}, - {0x0114c3, 0x0}, - {0x1114c3, 0x0}, - {0x2114c3, 0x0}, - {0x0115c3, 0x0}, - {0x1115c3, 0x0}, - {0x2115c3, 0x0}, - {0x0116c3, 0x0}, - {0x1116c3, 0x0}, - {0x2116c3, 0x0}, - {0x0117c3, 0x0}, - {0x1117c3, 0x0}, - {0x2117c3, 0x0}, - {0x0118c3, 0x0}, - {0x1118c3, 0x0}, - {0x2118c3, 0x0}, - {0x010020, 0x0}, - {0x110020, 0x0}, - {0x210020, 0x0}, - {0x011020, 0x0}, - {0x111020, 0x0}, - {0x211020, 0x0}, - {0x02007d, 0x0}, - {0x12007d, 0x0}, - {0x22007d, 0x0}, - {0x010040, 0x0}, - {0x010140, 0x0}, - {0x010240, 0x0}, - {0x010340, 0x0}, - {0x010440, 0x0}, - {0x010540, 0x0}, - {0x010640, 0x0}, - {0x010740, 0x0}, - {0x010840, 0x0}, - {0x010030, 0x0}, - {0x010130, 0x0}, - {0x010230, 0x0}, - {0x010330, 0x0}, - {0x010430, 0x0}, - {0x010530, 0x0}, - {0x010630, 0x0}, - {0x010730, 0x0}, - {0x010830, 0x0}, - {0x011040, 0x0}, - {0x011140, 0x0}, - {0x011240, 0x0}, - {0x011340, 0x0}, - {0x011440, 0x0}, - {0x011540, 0x0}, - {0x011640, 0x0}, - {0x011740, 0x0}, - {0x011840, 0x0}, - {0x011030, 0x0}, - {0x011130, 0x0}, - {0x011230, 0x0}, - {0x011330, 0x0}, - {0x011430, 0x0}, - {0x011530, 0x0}, - {0x011630, 0x0}, - {0x011730, 0x0}, - {0x011830, 0x0}, -}; - /* P0 message block paremeter for training firmware */ static struct dram_cfg_param ddr_fsp0_cfg[] = { { 0xd0000, 0x0 }, @@ -1046,8 +519,6 @@ struct dram_timing_info imx8mn_evk_ddr4_timing = { .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), .fsp_msg = ddr_dram_fsp_msg, .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), - .ddrphy_trained_csr = ddr_ddrphy_trained_csr, - .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), .fsp_table = { 2400, 1066, }, diff --git a/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg b/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg index 27a2138e43..f47ea08266 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg @@ -5,3 +5,6 @@ soc imx8mn loadaddr 0x912000 max_load_size 0x3f000 ivtofs 0x0 + +#include <mach/imx/flexspi-imx8mp-cfg.h> +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c index 7da9c33565..a1a501b1d9 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c @@ -1,8 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 #include <io.h> +#include <image-metadata.h> #include <common.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <firmware.h> #include <asm/mmu.h> #include <asm/cache.h> @@ -12,13 +14,13 @@ #include <pbl/i2c.h> #include <pbl/pmic.h> #include <linux/sizes.h> -#include <mach/atf.h> -#include <mach/xload.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <mach/imx8mn-regs.h> -#include <mach/iomux-mx8mn.h> -#include <mach/imx8m-ccm-regs.h> +#include <mach/imx/atf.h> +#include <mach/imx/xload.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8mn-regs.h> +#include <mach/imx/iomux-mx8mn.h> +#include <mach/imx/imx8m-ccm-regs.h> #include <mfd/pca9450.h> #include <mfd/bd71837.h> #include <soc/imx8m/ddr.h> @@ -90,10 +92,11 @@ static void start_atf(void) if (current_el() != 3) return; + imx8mn_early_clock_init(); + imx8mn_setup_pad(IMX8MN_PAD_I2C1_SCL__I2C1_SCL); imx8mn_setup_pad(IMX8MN_PAD_I2C1_SDA__I2C1_SDA); - imx8mn_early_clock_init(); imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); i2c = imx8m_i2c_early_init(IOMEM(MX8MN_I2C1_BASE_ADDR)); diff --git a/arch/arm/boards/nxp-imx8mn-evk/lpddr4-timing.c b/arch/arm/boards/nxp-imx8mn-evk/lpddr4-timing.c index 940b21cedb..902c607a82 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/lpddr4-timing.c +++ b/arch/arm/boards/nxp-imx8mn-evk/lpddr4-timing.c @@ -278,409 +278,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { {0x000d0000, 0x00000001}, }; -/* ddr phy trained csr */ -static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { - {0x0200b2, 0x0}, - {0x1200b2, 0x0}, - {0x2200b2, 0x0}, - {0x0200cb, 0x0}, - {0x010043, 0x0}, - {0x110043, 0x0}, - {0x210043, 0x0}, - {0x010143, 0x0}, - {0x110143, 0x0}, - {0x210143, 0x0}, - {0x011043, 0x0}, - {0x111043, 0x0}, - {0x211043, 0x0}, - {0x011143, 0x0}, - {0x111143, 0x0}, - {0x211143, 0x0}, - {0x000080, 0x0}, - {0x100080, 0x0}, - {0x200080, 0x0}, - {0x001080, 0x0}, - {0x101080, 0x0}, - {0x201080, 0x0}, - {0x002080, 0x0}, - {0x102080, 0x0}, - {0x202080, 0x0}, - {0x003080, 0x0}, - {0x103080, 0x0}, - {0x203080, 0x0}, - {0x004080, 0x0}, - {0x104080, 0x0}, - {0x204080, 0x0}, - {0x005080, 0x0}, - {0x105080, 0x0}, - {0x205080, 0x0}, - {0x006080, 0x0}, - {0x106080, 0x0}, - {0x206080, 0x0}, - {0x007080, 0x0}, - {0x107080, 0x0}, - {0x207080, 0x0}, - {0x008080, 0x0}, - {0x108080, 0x0}, - {0x208080, 0x0}, - {0x009080, 0x0}, - {0x109080, 0x0}, - {0x209080, 0x0}, - {0x010080, 0x0}, - {0x110080, 0x0}, - {0x210080, 0x0}, - {0x010180, 0x0}, - {0x110180, 0x0}, - {0x210180, 0x0}, - {0x011080, 0x0}, - {0x111080, 0x0}, - {0x211080, 0x0}, - {0x011180, 0x0}, - {0x111180, 0x0}, - {0x211180, 0x0}, - {0x010081, 0x0}, - {0x110081, 0x0}, - {0x210081, 0x0}, - {0x010181, 0x0}, - {0x110181, 0x0}, - {0x210181, 0x0}, - {0x011081, 0x0}, - {0x111081, 0x0}, - {0x211081, 0x0}, - {0x011181, 0x0}, - {0x111181, 0x0}, - {0x211181, 0x0}, - {0x0100d0, 0x0}, - {0x1100d0, 0x0}, - {0x2100d0, 0x0}, - {0x0101d0, 0x0}, - {0x1101d0, 0x0}, - {0x2101d0, 0x0}, - {0x0110d0, 0x0}, - {0x1110d0, 0x0}, - {0x2110d0, 0x0}, - {0x0111d0, 0x0}, - {0x1111d0, 0x0}, - {0x2111d0, 0x0}, - {0x0100d1, 0x0}, - {0x1100d1, 0x0}, - {0x2100d1, 0x0}, - {0x0101d1, 0x0}, - {0x1101d1, 0x0}, - {0x2101d1, 0x0}, - {0x0110d1, 0x0}, - {0x1110d1, 0x0}, - {0x2110d1, 0x0}, - {0x0111d1, 0x0}, - {0x1111d1, 0x0}, - {0x2111d1, 0x0}, - {0x010068, 0x0}, - {0x010168, 0x0}, - {0x010268, 0x0}, - {0x010368, 0x0}, - {0x010468, 0x0}, - {0x010568, 0x0}, - {0x010668, 0x0}, - {0x010768, 0x0}, - {0x010868, 0x0}, - {0x011068, 0x0}, - {0x011168, 0x0}, - {0x011268, 0x0}, - {0x011368, 0x0}, - {0x011468, 0x0}, - {0x011568, 0x0}, - {0x011668, 0x0}, - {0x011768, 0x0}, - {0x011868, 0x0}, - {0x010069, 0x0}, - {0x010169, 0x0}, - {0x010269, 0x0}, - {0x010369, 0x0}, - {0x010469, 0x0}, - {0x010569, 0x0}, - {0x010669, 0x0}, - {0x010769, 0x0}, - {0x010869, 0x0}, - {0x011069, 0x0}, - {0x011169, 0x0}, - {0x011269, 0x0}, - {0x011369, 0x0}, - {0x011469, 0x0}, - {0x011569, 0x0}, - {0x011669, 0x0}, - {0x011769, 0x0}, - {0x011869, 0x0}, - {0x01008c, 0x0}, - {0x11008c, 0x0}, - {0x21008c, 0x0}, - {0x01018c, 0x0}, - {0x11018c, 0x0}, - {0x21018c, 0x0}, - {0x01108c, 0x0}, - {0x11108c, 0x0}, - {0x21108c, 0x0}, - {0x01118c, 0x0}, - {0x11118c, 0x0}, - {0x21118c, 0x0}, - {0x01008d, 0x0}, - {0x11008d, 0x0}, - {0x21008d, 0x0}, - {0x01018d, 0x0}, - {0x11018d, 0x0}, - {0x21018d, 0x0}, - {0x01108d, 0x0}, - {0x11108d, 0x0}, - {0x21108d, 0x0}, - {0x01118d, 0x0}, - {0x11118d, 0x0}, - {0x21118d, 0x0}, - {0x0100c0, 0x0}, - {0x1100c0, 0x0}, - {0x2100c0, 0x0}, - {0x0101c0, 0x0}, - {0x1101c0, 0x0}, - {0x2101c0, 0x0}, - {0x0102c0, 0x0}, - {0x1102c0, 0x0}, - {0x2102c0, 0x0}, - {0x0103c0, 0x0}, - {0x1103c0, 0x0}, - {0x2103c0, 0x0}, - {0x0104c0, 0x0}, - {0x1104c0, 0x0}, - {0x2104c0, 0x0}, - {0x0105c0, 0x0}, - {0x1105c0, 0x0}, - {0x2105c0, 0x0}, - {0x0106c0, 0x0}, - {0x1106c0, 0x0}, - {0x2106c0, 0x0}, - {0x0107c0, 0x0}, - {0x1107c0, 0x0}, - {0x2107c0, 0x0}, - {0x0108c0, 0x0}, - {0x1108c0, 0x0}, - {0x2108c0, 0x0}, - {0x0110c0, 0x0}, - {0x1110c0, 0x0}, - {0x2110c0, 0x0}, - {0x0111c0, 0x0}, - {0x1111c0, 0x0}, - {0x2111c0, 0x0}, - {0x0112c0, 0x0}, - {0x1112c0, 0x0}, - {0x2112c0, 0x0}, - {0x0113c0, 0x0}, - {0x1113c0, 0x0}, - {0x2113c0, 0x0}, - {0x0114c0, 0x0}, - {0x1114c0, 0x0}, - {0x2114c0, 0x0}, - {0x0115c0, 0x0}, - {0x1115c0, 0x0}, - {0x2115c0, 0x0}, - {0x0116c0, 0x0}, - {0x1116c0, 0x0}, - {0x2116c0, 0x0}, - {0x0117c0, 0x0}, - {0x1117c0, 0x0}, - {0x2117c0, 0x0}, - {0x0118c0, 0x0}, - {0x1118c0, 0x0}, - {0x2118c0, 0x0}, - {0x0100c1, 0x0}, - {0x1100c1, 0x0}, - {0x2100c1, 0x0}, - {0x0101c1, 0x0}, - {0x1101c1, 0x0}, - {0x2101c1, 0x0}, - {0x0102c1, 0x0}, - {0x1102c1, 0x0}, - {0x2102c1, 0x0}, - {0x0103c1, 0x0}, - {0x1103c1, 0x0}, - {0x2103c1, 0x0}, - {0x0104c1, 0x0}, - {0x1104c1, 0x0}, - {0x2104c1, 0x0}, - {0x0105c1, 0x0}, - {0x1105c1, 0x0}, - {0x2105c1, 0x0}, - {0x0106c1, 0x0}, - {0x1106c1, 0x0}, - {0x2106c1, 0x0}, - {0x0107c1, 0x0}, - {0x1107c1, 0x0}, - {0x2107c1, 0x0}, - {0x0108c1, 0x0}, - {0x1108c1, 0x0}, - {0x2108c1, 0x0}, - {0x0110c1, 0x0}, - {0x1110c1, 0x0}, - {0x2110c1, 0x0}, - {0x0111c1, 0x0}, - {0x1111c1, 0x0}, - {0x2111c1, 0x0}, - {0x0112c1, 0x0}, - {0x1112c1, 0x0}, - {0x2112c1, 0x0}, - {0x0113c1, 0x0}, - {0x1113c1, 0x0}, - {0x2113c1, 0x0}, - {0x0114c1, 0x0}, - {0x1114c1, 0x0}, - {0x2114c1, 0x0}, - {0x0115c1, 0x0}, - {0x1115c1, 0x0}, - {0x2115c1, 0x0}, - {0x0116c1, 0x0}, - {0x1116c1, 0x0}, - {0x2116c1, 0x0}, - {0x0117c1, 0x0}, - {0x1117c1, 0x0}, - {0x2117c1, 0x0}, - {0x0118c1, 0x0}, - {0x1118c1, 0x0}, - {0x2118c1, 0x0}, - {0x010020, 0x0}, - {0x110020, 0x0}, - {0x210020, 0x0}, - {0x011020, 0x0}, - {0x111020, 0x0}, - {0x211020, 0x0}, - {0x020072, 0x0}, - {0x020073, 0x0}, - {0x020074, 0x0}, - {0x0100aa, 0x0}, - {0x0110aa, 0x0}, - {0x020010, 0x0}, - {0x120010, 0x0}, - {0x220010, 0x0}, - {0x020011, 0x0}, - {0x120011, 0x0}, - {0x220011, 0x0}, - {0x0100ae, 0x0}, - {0x1100ae, 0x0}, - {0x2100ae, 0x0}, - {0x0100af, 0x0}, - {0x1100af, 0x0}, - {0x2100af, 0x0}, - {0x0110ae, 0x0}, - {0x1110ae, 0x0}, - {0x2110ae, 0x0}, - {0x0110af, 0x0}, - {0x1110af, 0x0}, - {0x2110af, 0x0}, - {0x020020, 0x0}, - {0x120020, 0x0}, - {0x220020, 0x0}, - {0x0100a0, 0x0}, - {0x0100a1, 0x0}, - {0x0100a2, 0x0}, - {0x0100a3, 0x0}, - {0x0100a4, 0x0}, - {0x0100a5, 0x0}, - {0x0100a6, 0x0}, - {0x0100a7, 0x0}, - {0x0110a0, 0x0}, - {0x0110a1, 0x0}, - {0x0110a2, 0x0}, - {0x0110a3, 0x0}, - {0x0110a4, 0x0}, - {0x0110a5, 0x0}, - {0x0110a6, 0x0}, - {0x0110a7, 0x0}, - {0x02007c, 0x0}, - {0x12007c, 0x0}, - {0x22007c, 0x0}, - {0x02007d, 0x0}, - {0x12007d, 0x0}, - {0x22007d, 0x0}, - {0x0400fd, 0x0}, - {0x0400c0, 0x0}, - {0x090201, 0x0}, - {0x190201, 0x0}, - {0x290201, 0x0}, - {0x090202, 0x0}, - {0x190202, 0x0}, - {0x290202, 0x0}, - {0x090203, 0x0}, - {0x190203, 0x0}, - {0x290203, 0x0}, - {0x090204, 0x0}, - {0x190204, 0x0}, - {0x290204, 0x0}, - {0x090205, 0x0}, - {0x190205, 0x0}, - {0x290205, 0x0}, - {0x090206, 0x0}, - {0x190206, 0x0}, - {0x290206, 0x0}, - {0x090207, 0x0}, - {0x190207, 0x0}, - {0x290207, 0x0}, - {0x090208, 0x0}, - {0x190208, 0x0}, - {0x290208, 0x0}, - {0x010062, 0x0}, - {0x010162, 0x0}, - {0x010262, 0x0}, - {0x010362, 0x0}, - {0x010462, 0x0}, - {0x010562, 0x0}, - {0x010662, 0x0}, - {0x010762, 0x0}, - {0x010862, 0x0}, - {0x011062, 0x0}, - {0x011162, 0x0}, - {0x011262, 0x0}, - {0x011362, 0x0}, - {0x011462, 0x0}, - {0x011562, 0x0}, - {0x011662, 0x0}, - {0x011762, 0x0}, - {0x011862, 0x0}, - {0x020077, 0x0}, - {0x010001, 0x0}, - {0x011001, 0x0}, - {0x010040, 0x0}, - {0x010140, 0x0}, - {0x010240, 0x0}, - {0x010340, 0x0}, - {0x010440, 0x0}, - {0x010540, 0x0}, - {0x010640, 0x0}, - {0x010740, 0x0}, - {0x010840, 0x0}, - {0x010030, 0x0}, - {0x010130, 0x0}, - {0x010230, 0x0}, - {0x010330, 0x0}, - {0x010430, 0x0}, - {0x010530, 0x0}, - {0x010630, 0x0}, - {0x010730, 0x0}, - {0x010830, 0x0}, - {0x011040, 0x0}, - {0x011140, 0x0}, - {0x011240, 0x0}, - {0x011340, 0x0}, - {0x011440, 0x0}, - {0x011540, 0x0}, - {0x011640, 0x0}, - {0x011740, 0x0}, - {0x011840, 0x0}, - {0x011030, 0x0}, - {0x011130, 0x0}, - {0x011230, 0x0}, - {0x011330, 0x0}, - {0x011430, 0x0}, - {0x011530, 0x0}, - {0x011630, 0x0}, - {0x011730, 0x0}, - {0x011830, 0x0}, -}; - /* P0 message block paremeter for training firmware */ static struct dram_cfg_param ddr_fsp0_cfg[] = { {0x000d0000, 0x00000000}, @@ -1582,8 +1179,6 @@ struct dram_timing_info imx8mn_evk_lpddr4_timing = { .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), .fsp_msg = ddr_dram_fsp_msg, .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), - .ddrphy_trained_csr = ddr_ddrphy_trained_csr, - .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), .fsp_table = { 3200, 400, 100, }, diff --git a/arch/arm/boards/nxp-imx8mp-evk/board.c b/arch/arm/boards/nxp-imx8mp-evk/board.c index 8f1c247109..2aa551e504 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/board.c +++ b/arch/arm/boards/nxp-imx8mp-evk/board.c @@ -6,23 +6,21 @@ #include <asm/memory.h> #include <bootsource.h> #include <common.h> +#include <deep-probe.h> #include <init.h> #include <linux/phy.h> #include <linux/sizes.h> -#include <mach/bbu.h> -#include <mach/iomux-mx8mp.h> +#include <mach/imx/bbu.h> +#include <mach/imx/iomux-mx8mp.h> #include <gpio.h> #include <envfs.h> -static int nxp_imx8mp_evk_init(void) +static int nxp_imx8mp_evk_probe(struct device *dev) { int emmc_bbu_flag = 0; int sd_bbu_flag = 0; u32 val; - if (!of_machine_is_compatible("fsl,imx8mp-evk")) - return 0; - if (bootsource_get() == BOOTSOURCE_MMC) { if (bootsource_get_instance() == 2) { of_device_enable_path("/chosen/environment-emmc"); @@ -38,11 +36,25 @@ static int nxp_imx8mp_evk_init(void) imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", "/dev/m25p0.barebox", 0); + /* Enable RGMII TX clk output */ val = readl(MX8MP_IOMUXC_GPR_BASE_ADDR + MX8MP_IOMUXC_GPR1); val |= MX8MP_IOMUXC_GPR1_ENET1_RGMII_EN; writel(val, MX8MP_IOMUXC_GPR_BASE_ADDR + MX8MP_IOMUXC_GPR1); return 0; } -coredevice_initcall(nxp_imx8mp_evk_init); + +static const struct of_device_id nxp_imx8mp_evk_of_match[] = { + { .compatible = "fsl,imx8mp-evk" }, + { /* Sentinel */ } +}; +BAREBOX_DEEP_PROBE_ENABLE(nxp_imx8mp_evk_of_match); + +static struct driver nxp_imx8mp_evk_board_driver = { + .name = "board-nxp-imx8mp-evk", + .probe = nxp_imx8mp_evk_probe, + .of_compatible = nxp_imx8mp_evk_of_match, +}; +coredevice_platform_driver(nxp_imx8mp_evk_board_driver); diff --git a/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg b/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg index 663bd102e9..c896c9f248 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg @@ -5,3 +5,6 @@ soc imx8mp loadaddr 0x920000 max_load_size 0x3f000 ivtofs 0x0 + +#include <mach/imx/flexspi-imx8mp-cfg.h> +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c index 4f24dd4cd4..969947d2ec 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c @@ -3,8 +3,8 @@ #include <io.h> #include <common.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <firmware.h> -#include <image-metadata.h> #include <asm/mmu.h> #include <asm/cache.h> #include <asm/sections.h> @@ -13,13 +13,13 @@ #include <pbl/i2c.h> #include <pbl/pmic.h> #include <linux/sizes.h> -#include <mach/atf.h> -#include <mach/xload.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <mach/imx8mp-regs.h> -#include <mach/iomux-mx8mp.h> -#include <mach/imx8m-ccm-regs.h> +#include <mach/imx/atf.h> +#include <mach/imx/xload.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8mp-regs.h> +#include <mach/imx/iomux-mx8mp.h> +#include <mach/imx/imx8m-ccm-regs.h> #include <mfd/pca9450.h> #include <soc/imx8m/ddr.h> #include <soc/fsl/fsl_udc.h> @@ -61,6 +61,12 @@ static struct pmic_config pca9450_cfg[] = { { PCA9450_BUCK1OUT_DVS0, 0x1C }, { PCA9450_BUCK1OUT_DVS1, 0x14 }, { PCA9450_BUCK1CTRL, 0x59 }, + /* + * Increase VDD_ARM to 0.95V to avoid issues in case software after + * Barebox switches to the OD ARM frequency without reprogramming the + * PMIC first. + */ + { PCA9450_BUCK2OUT_DVS0, 0x1C }, /* set WDOG_B_CFG to cold reset */ { PCA9450_RESET_CTRL, 0xA1 }, }; @@ -72,7 +78,6 @@ static void power_init_board(void) imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL); imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL); - imx8mm_early_clock_init(); imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR)); @@ -92,6 +97,8 @@ static void start_atf(void) if (current_el() != 3) return; + imx8mp_early_clock_init(); + power_init_board(); imx8mp_ddr_init(&imx8mp_evk_dram_timing, DRAM_TYPE_LPDDR4); @@ -134,7 +141,5 @@ ENTRY_FUNCTION(start_nxp_imx8mp_evk, r0, r1, r2) relocate_to_current_adr(); setup_c(); - IMD_USED_OF(imx8mp_evk); - nxp_imx8mp_evk_start(); } diff --git a/arch/arm/boards/nxp-imx8mp-evk/lpddr4-timing.c b/arch/arm/boards/nxp-imx8mp-evk/lpddr4-timing.c index 3028bc084c..d929890e15 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/lpddr4-timing.c +++ b/arch/arm/boards/nxp-imx8mp-evk/lpddr4-timing.c @@ -325,729 +325,6 @@ static struct dram_cfg_param ddr_ddrphy_cfg[] = { { 0x2002c, 0x0 }, }; -/* ddr phy trained csr */ -static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { - { 0x200b2, 0x0 }, - { 0x1200b2, 0x0 }, - { 0x2200b2, 0x0 }, - { 0x200cb, 0x0 }, - { 0x10043, 0x0 }, - { 0x110043, 0x0 }, - { 0x210043, 0x0 }, - { 0x10143, 0x0 }, - { 0x110143, 0x0 }, - { 0x210143, 0x0 }, - { 0x11043, 0x0 }, - { 0x111043, 0x0 }, - { 0x211043, 0x0 }, - { 0x11143, 0x0 }, - { 0x111143, 0x0 }, - { 0x211143, 0x0 }, - { 0x12043, 0x0 }, - { 0x112043, 0x0 }, - { 0x212043, 0x0 }, - { 0x12143, 0x0 }, - { 0x112143, 0x0 }, - { 0x212143, 0x0 }, - { 0x13043, 0x0 }, - { 0x113043, 0x0 }, - { 0x213043, 0x0 }, - { 0x13143, 0x0 }, - { 0x113143, 0x0 }, - { 0x213143, 0x0 }, - { 0x80, 0x0 }, - { 0x100080, 0x0 }, - { 0x200080, 0x0 }, - { 0x1080, 0x0 }, - { 0x101080, 0x0 }, - { 0x201080, 0x0 }, - { 0x2080, 0x0 }, - { 0x102080, 0x0 }, - { 0x202080, 0x0 }, - { 0x3080, 0x0 }, - { 0x103080, 0x0 }, - { 0x203080, 0x0 }, - { 0x4080, 0x0 }, - { 0x104080, 0x0 }, - { 0x204080, 0x0 }, - { 0x5080, 0x0 }, - { 0x105080, 0x0 }, - { 0x205080, 0x0 }, - { 0x6080, 0x0 }, - { 0x106080, 0x0 }, - { 0x206080, 0x0 }, - { 0x7080, 0x0 }, - { 0x107080, 0x0 }, - { 0x207080, 0x0 }, - { 0x8080, 0x0 }, - { 0x108080, 0x0 }, - { 0x208080, 0x0 }, - { 0x9080, 0x0 }, - { 0x109080, 0x0 }, - { 0x209080, 0x0 }, - { 0x10080, 0x0 }, - { 0x110080, 0x0 }, - { 0x210080, 0x0 }, - { 0x10180, 0x0 }, - { 0x110180, 0x0 }, - { 0x210180, 0x0 }, - { 0x11080, 0x0 }, - { 0x111080, 0x0 }, - { 0x211080, 0x0 }, - { 0x11180, 0x0 }, - { 0x111180, 0x0 }, - { 0x211180, 0x0 }, - { 0x12080, 0x0 }, - { 0x112080, 0x0 }, - { 0x212080, 0x0 }, - { 0x12180, 0x0 }, - { 0x112180, 0x0 }, - { 0x212180, 0x0 }, - { 0x13080, 0x0 }, - { 0x113080, 0x0 }, - { 0x213080, 0x0 }, - { 0x13180, 0x0 }, - { 0x113180, 0x0 }, - { 0x213180, 0x0 }, - { 0x10081, 0x0 }, - { 0x110081, 0x0 }, - { 0x210081, 0x0 }, - { 0x10181, 0x0 }, - { 0x110181, 0x0 }, - { 0x210181, 0x0 }, - { 0x11081, 0x0 }, - { 0x111081, 0x0 }, - { 0x211081, 0x0 }, - { 0x11181, 0x0 }, - { 0x111181, 0x0 }, - { 0x211181, 0x0 }, - { 0x12081, 0x0 }, - { 0x112081, 0x0 }, - { 0x212081, 0x0 }, - { 0x12181, 0x0 }, - { 0x112181, 0x0 }, - { 0x212181, 0x0 }, - { 0x13081, 0x0 }, - { 0x113081, 0x0 }, - { 0x213081, 0x0 }, - { 0x13181, 0x0 }, - { 0x113181, 0x0 }, - { 0x213181, 0x0 }, - { 0x100d0, 0x0 }, - { 0x1100d0, 0x0 }, - { 0x2100d0, 0x0 }, - { 0x101d0, 0x0 }, - { 0x1101d0, 0x0 }, - { 0x2101d0, 0x0 }, - { 0x110d0, 0x0 }, - { 0x1110d0, 0x0 }, - { 0x2110d0, 0x0 }, - { 0x111d0, 0x0 }, - { 0x1111d0, 0x0 }, - { 0x2111d0, 0x0 }, - { 0x120d0, 0x0 }, - { 0x1120d0, 0x0 }, - { 0x2120d0, 0x0 }, - { 0x121d0, 0x0 }, - { 0x1121d0, 0x0 }, - { 0x2121d0, 0x0 }, - { 0x130d0, 0x0 }, - { 0x1130d0, 0x0 }, - { 0x2130d0, 0x0 }, - { 0x131d0, 0x0 }, - { 0x1131d0, 0x0 }, - { 0x2131d0, 0x0 }, - { 0x100d1, 0x0 }, - { 0x1100d1, 0x0 }, - { 0x2100d1, 0x0 }, - { 0x101d1, 0x0 }, - { 0x1101d1, 0x0 }, - { 0x2101d1, 0x0 }, - { 0x110d1, 0x0 }, - { 0x1110d1, 0x0 }, - { 0x2110d1, 0x0 }, - { 0x111d1, 0x0 }, - { 0x1111d1, 0x0 }, - { 0x2111d1, 0x0 }, - { 0x120d1, 0x0 }, - { 0x1120d1, 0x0 }, - { 0x2120d1, 0x0 }, - { 0x121d1, 0x0 }, - { 0x1121d1, 0x0 }, - { 0x2121d1, 0x0 }, - { 0x130d1, 0x0 }, - { 0x1130d1, 0x0 }, - { 0x2130d1, 0x0 }, - { 0x131d1, 0x0 }, - { 0x1131d1, 0x0 }, - { 0x2131d1, 0x0 }, - { 0x10068, 0x0 }, - { 0x10168, 0x0 }, - { 0x10268, 0x0 }, - { 0x10368, 0x0 }, - { 0x10468, 0x0 }, - { 0x10568, 0x0 }, - { 0x10668, 0x0 }, - { 0x10768, 0x0 }, - { 0x10868, 0x0 }, - { 0x11068, 0x0 }, - { 0x11168, 0x0 }, - { 0x11268, 0x0 }, - { 0x11368, 0x0 }, - { 0x11468, 0x0 }, - { 0x11568, 0x0 }, - { 0x11668, 0x0 }, - { 0x11768, 0x0 }, - { 0x11868, 0x0 }, - { 0x12068, 0x0 }, - { 0x12168, 0x0 }, - { 0x12268, 0x0 }, - { 0x12368, 0x0 }, - { 0x12468, 0x0 }, - { 0x12568, 0x0 }, - { 0x12668, 0x0 }, - { 0x12768, 0x0 }, - { 0x12868, 0x0 }, - { 0x13068, 0x0 }, - { 0x13168, 0x0 }, - { 0x13268, 0x0 }, - { 0x13368, 0x0 }, - { 0x13468, 0x0 }, - { 0x13568, 0x0 }, - { 0x13668, 0x0 }, - { 0x13768, 0x0 }, - { 0x13868, 0x0 }, - { 0x10069, 0x0 }, - { 0x10169, 0x0 }, - { 0x10269, 0x0 }, - { 0x10369, 0x0 }, - { 0x10469, 0x0 }, - { 0x10569, 0x0 }, - { 0x10669, 0x0 }, - { 0x10769, 0x0 }, - { 0x10869, 0x0 }, - { 0x11069, 0x0 }, - { 0x11169, 0x0 }, - { 0x11269, 0x0 }, - { 0x11369, 0x0 }, - { 0x11469, 0x0 }, - { 0x11569, 0x0 }, - { 0x11669, 0x0 }, - { 0x11769, 0x0 }, - { 0x11869, 0x0 }, - { 0x12069, 0x0 }, - { 0x12169, 0x0 }, - { 0x12269, 0x0 }, - { 0x12369, 0x0 }, - { 0x12469, 0x0 }, - { 0x12569, 0x0 }, - { 0x12669, 0x0 }, - { 0x12769, 0x0 }, - { 0x12869, 0x0 }, - { 0x13069, 0x0 }, - { 0x13169, 0x0 }, - { 0x13269, 0x0 }, - { 0x13369, 0x0 }, - { 0x13469, 0x0 }, - { 0x13569, 0x0 }, - { 0x13669, 0x0 }, - { 0x13769, 0x0 }, - { 0x13869, 0x0 }, - { 0x1008c, 0x0 }, - { 0x11008c, 0x0 }, - { 0x21008c, 0x0 }, - { 0x1018c, 0x0 }, - { 0x11018c, 0x0 }, - { 0x21018c, 0x0 }, - { 0x1108c, 0x0 }, - { 0x11108c, 0x0 }, - { 0x21108c, 0x0 }, - { 0x1118c, 0x0 }, - { 0x11118c, 0x0 }, - { 0x21118c, 0x0 }, - { 0x1208c, 0x0 }, - { 0x11208c, 0x0 }, - { 0x21208c, 0x0 }, - { 0x1218c, 0x0 }, - { 0x11218c, 0x0 }, - { 0x21218c, 0x0 }, - { 0x1308c, 0x0 }, - { 0x11308c, 0x0 }, - { 0x21308c, 0x0 }, - { 0x1318c, 0x0 }, - { 0x11318c, 0x0 }, - { 0x21318c, 0x0 }, - { 0x1008d, 0x0 }, - { 0x11008d, 0x0 }, - { 0x21008d, 0x0 }, - { 0x1018d, 0x0 }, - { 0x11018d, 0x0 }, - { 0x21018d, 0x0 }, - { 0x1108d, 0x0 }, - { 0x11108d, 0x0 }, - { 0x21108d, 0x0 }, - { 0x1118d, 0x0 }, - { 0x11118d, 0x0 }, - { 0x21118d, 0x0 }, - { 0x1208d, 0x0 }, - { 0x11208d, 0x0 }, - { 0x21208d, 0x0 }, - { 0x1218d, 0x0 }, - { 0x11218d, 0x0 }, - { 0x21218d, 0x0 }, - { 0x1308d, 0x0 }, - { 0x11308d, 0x0 }, - { 0x21308d, 0x0 }, - { 0x1318d, 0x0 }, - { 0x11318d, 0x0 }, - { 0x21318d, 0x0 }, - { 0x100c0, 0x0 }, - { 0x1100c0, 0x0 }, - { 0x2100c0, 0x0 }, - { 0x101c0, 0x0 }, - { 0x1101c0, 0x0 }, - { 0x2101c0, 0x0 }, - { 0x102c0, 0x0 }, - { 0x1102c0, 0x0 }, - { 0x2102c0, 0x0 }, - { 0x103c0, 0x0 }, - { 0x1103c0, 0x0 }, - { 0x2103c0, 0x0 }, - { 0x104c0, 0x0 }, - { 0x1104c0, 0x0 }, - { 0x2104c0, 0x0 }, - { 0x105c0, 0x0 }, - { 0x1105c0, 0x0 }, - { 0x2105c0, 0x0 }, - { 0x106c0, 0x0 }, - { 0x1106c0, 0x0 }, - { 0x2106c0, 0x0 }, - { 0x107c0, 0x0 }, - { 0x1107c0, 0x0 }, - { 0x2107c0, 0x0 }, - { 0x108c0, 0x0 }, - { 0x1108c0, 0x0 }, - { 0x2108c0, 0x0 }, - { 0x110c0, 0x0 }, - { 0x1110c0, 0x0 }, - { 0x2110c0, 0x0 }, - { 0x111c0, 0x0 }, - { 0x1111c0, 0x0 }, - { 0x2111c0, 0x0 }, - { 0x112c0, 0x0 }, - { 0x1112c0, 0x0 }, - { 0x2112c0, 0x0 }, - { 0x113c0, 0x0 }, - { 0x1113c0, 0x0 }, - { 0x2113c0, 0x0 }, - { 0x114c0, 0x0 }, - { 0x1114c0, 0x0 }, - { 0x2114c0, 0x0 }, - { 0x115c0, 0x0 }, - { 0x1115c0, 0x0 }, - { 0x2115c0, 0x0 }, - { 0x116c0, 0x0 }, - { 0x1116c0, 0x0 }, - { 0x2116c0, 0x0 }, - { 0x117c0, 0x0 }, - { 0x1117c0, 0x0 }, - { 0x2117c0, 0x0 }, - { 0x118c0, 0x0 }, - { 0x1118c0, 0x0 }, - { 0x2118c0, 0x0 }, - { 0x120c0, 0x0 }, - { 0x1120c0, 0x0 }, - { 0x2120c0, 0x0 }, - { 0x121c0, 0x0 }, - { 0x1121c0, 0x0 }, - { 0x2121c0, 0x0 }, - { 0x122c0, 0x0 }, - { 0x1122c0, 0x0 }, - { 0x2122c0, 0x0 }, - { 0x123c0, 0x0 }, - { 0x1123c0, 0x0 }, - { 0x2123c0, 0x0 }, - { 0x124c0, 0x0 }, - { 0x1124c0, 0x0 }, - { 0x2124c0, 0x0 }, - { 0x125c0, 0x0 }, - { 0x1125c0, 0x0 }, - { 0x2125c0, 0x0 }, - { 0x126c0, 0x0 }, - { 0x1126c0, 0x0 }, - { 0x2126c0, 0x0 }, - { 0x127c0, 0x0 }, - { 0x1127c0, 0x0 }, - { 0x2127c0, 0x0 }, - { 0x128c0, 0x0 }, - { 0x1128c0, 0x0 }, - { 0x2128c0, 0x0 }, - { 0x130c0, 0x0 }, - { 0x1130c0, 0x0 }, - { 0x2130c0, 0x0 }, - { 0x131c0, 0x0 }, - { 0x1131c0, 0x0 }, - { 0x2131c0, 0x0 }, - { 0x132c0, 0x0 }, - { 0x1132c0, 0x0 }, - { 0x2132c0, 0x0 }, - { 0x133c0, 0x0 }, - { 0x1133c0, 0x0 }, - { 0x2133c0, 0x0 }, - { 0x134c0, 0x0 }, - { 0x1134c0, 0x0 }, - { 0x2134c0, 0x0 }, - { 0x135c0, 0x0 }, - { 0x1135c0, 0x0 }, - { 0x2135c0, 0x0 }, - { 0x136c0, 0x0 }, - { 0x1136c0, 0x0 }, - { 0x2136c0, 0x0 }, - { 0x137c0, 0x0 }, - { 0x1137c0, 0x0 }, - { 0x2137c0, 0x0 }, - { 0x138c0, 0x0 }, - { 0x1138c0, 0x0 }, - { 0x2138c0, 0x0 }, - { 0x100c1, 0x0 }, - { 0x1100c1, 0x0 }, - { 0x2100c1, 0x0 }, - { 0x101c1, 0x0 }, - { 0x1101c1, 0x0 }, - { 0x2101c1, 0x0 }, - { 0x102c1, 0x0 }, - { 0x1102c1, 0x0 }, - { 0x2102c1, 0x0 }, - { 0x103c1, 0x0 }, - { 0x1103c1, 0x0 }, - { 0x2103c1, 0x0 }, - { 0x104c1, 0x0 }, - { 0x1104c1, 0x0 }, - { 0x2104c1, 0x0 }, - { 0x105c1, 0x0 }, - { 0x1105c1, 0x0 }, - { 0x2105c1, 0x0 }, - { 0x106c1, 0x0 }, - { 0x1106c1, 0x0 }, - { 0x2106c1, 0x0 }, - { 0x107c1, 0x0 }, - { 0x1107c1, 0x0 }, - { 0x2107c1, 0x0 }, - { 0x108c1, 0x0 }, - { 0x1108c1, 0x0 }, - { 0x2108c1, 0x0 }, - { 0x110c1, 0x0 }, - { 0x1110c1, 0x0 }, - { 0x2110c1, 0x0 }, - { 0x111c1, 0x0 }, - { 0x1111c1, 0x0 }, - { 0x2111c1, 0x0 }, - { 0x112c1, 0x0 }, - { 0x1112c1, 0x0 }, - { 0x2112c1, 0x0 }, - { 0x113c1, 0x0 }, - { 0x1113c1, 0x0 }, - { 0x2113c1, 0x0 }, - { 0x114c1, 0x0 }, - { 0x1114c1, 0x0 }, - { 0x2114c1, 0x0 }, - { 0x115c1, 0x0 }, - { 0x1115c1, 0x0 }, - { 0x2115c1, 0x0 }, - { 0x116c1, 0x0 }, - { 0x1116c1, 0x0 }, - { 0x2116c1, 0x0 }, - { 0x117c1, 0x0 }, - { 0x1117c1, 0x0 }, - { 0x2117c1, 0x0 }, - { 0x118c1, 0x0 }, - { 0x1118c1, 0x0 }, - { 0x2118c1, 0x0 }, - { 0x120c1, 0x0 }, - { 0x1120c1, 0x0 }, - { 0x2120c1, 0x0 }, - { 0x121c1, 0x0 }, - { 0x1121c1, 0x0 }, - { 0x2121c1, 0x0 }, - { 0x122c1, 0x0 }, - { 0x1122c1, 0x0 }, - { 0x2122c1, 0x0 }, - { 0x123c1, 0x0 }, - { 0x1123c1, 0x0 }, - { 0x2123c1, 0x0 }, - { 0x124c1, 0x0 }, - { 0x1124c1, 0x0 }, - { 0x2124c1, 0x0 }, - { 0x125c1, 0x0 }, - { 0x1125c1, 0x0 }, - { 0x2125c1, 0x0 }, - { 0x126c1, 0x0 }, - { 0x1126c1, 0x0 }, - { 0x2126c1, 0x0 }, - { 0x127c1, 0x0 }, - { 0x1127c1, 0x0 }, - { 0x2127c1, 0x0 }, - { 0x128c1, 0x0 }, - { 0x1128c1, 0x0 }, - { 0x2128c1, 0x0 }, - { 0x130c1, 0x0 }, - { 0x1130c1, 0x0 }, - { 0x2130c1, 0x0 }, - { 0x131c1, 0x0 }, - { 0x1131c1, 0x0 }, - { 0x2131c1, 0x0 }, - { 0x132c1, 0x0 }, - { 0x1132c1, 0x0 }, - { 0x2132c1, 0x0 }, - { 0x133c1, 0x0 }, - { 0x1133c1, 0x0 }, - { 0x2133c1, 0x0 }, - { 0x134c1, 0x0 }, - { 0x1134c1, 0x0 }, - { 0x2134c1, 0x0 }, - { 0x135c1, 0x0 }, - { 0x1135c1, 0x0 }, - { 0x2135c1, 0x0 }, - { 0x136c1, 0x0 }, - { 0x1136c1, 0x0 }, - { 0x2136c1, 0x0 }, - { 0x137c1, 0x0 }, - { 0x1137c1, 0x0 }, - { 0x2137c1, 0x0 }, - { 0x138c1, 0x0 }, - { 0x1138c1, 0x0 }, - { 0x2138c1, 0x0 }, - { 0x10020, 0x0 }, - { 0x110020, 0x0 }, - { 0x210020, 0x0 }, - { 0x11020, 0x0 }, - { 0x111020, 0x0 }, - { 0x211020, 0x0 }, - { 0x12020, 0x0 }, - { 0x112020, 0x0 }, - { 0x212020, 0x0 }, - { 0x13020, 0x0 }, - { 0x113020, 0x0 }, - { 0x213020, 0x0 }, - { 0x20072, 0x0 }, - { 0x20073, 0x0 }, - { 0x20074, 0x0 }, - { 0x100aa, 0x0 }, - { 0x110aa, 0x0 }, - { 0x120aa, 0x0 }, - { 0x130aa, 0x0 }, - { 0x20010, 0x0 }, - { 0x120010, 0x0 }, - { 0x220010, 0x0 }, - { 0x20011, 0x0 }, - { 0x120011, 0x0 }, - { 0x220011, 0x0 }, - { 0x100ae, 0x0 }, - { 0x1100ae, 0x0 }, - { 0x2100ae, 0x0 }, - { 0x100af, 0x0 }, - { 0x1100af, 0x0 }, - { 0x2100af, 0x0 }, - { 0x110ae, 0x0 }, - { 0x1110ae, 0x0 }, - { 0x2110ae, 0x0 }, - { 0x110af, 0x0 }, - { 0x1110af, 0x0 }, - { 0x2110af, 0x0 }, - { 0x120ae, 0x0 }, - { 0x1120ae, 0x0 }, - { 0x2120ae, 0x0 }, - { 0x120af, 0x0 }, - { 0x1120af, 0x0 }, - { 0x2120af, 0x0 }, - { 0x130ae, 0x0 }, - { 0x1130ae, 0x0 }, - { 0x2130ae, 0x0 }, - { 0x130af, 0x0 }, - { 0x1130af, 0x0 }, - { 0x2130af, 0x0 }, - { 0x20020, 0x0 }, - { 0x120020, 0x0 }, - { 0x220020, 0x0 }, - { 0x100a0, 0x0 }, - { 0x100a1, 0x0 }, - { 0x100a2, 0x0 }, - { 0x100a3, 0x0 }, - { 0x100a4, 0x0 }, - { 0x100a5, 0x0 }, - { 0x100a6, 0x0 }, - { 0x100a7, 0x0 }, - { 0x110a0, 0x0 }, - { 0x110a1, 0x0 }, - { 0x110a2, 0x0 }, - { 0x110a3, 0x0 }, - { 0x110a4, 0x0 }, - { 0x110a5, 0x0 }, - { 0x110a6, 0x0 }, - { 0x110a7, 0x0 }, - { 0x120a0, 0x0 }, - { 0x120a1, 0x0 }, - { 0x120a2, 0x0 }, - { 0x120a3, 0x0 }, - { 0x120a4, 0x0 }, - { 0x120a5, 0x0 }, - { 0x120a6, 0x0 }, - { 0x120a7, 0x0 }, - { 0x130a0, 0x0 }, - { 0x130a1, 0x0 }, - { 0x130a2, 0x0 }, - { 0x130a3, 0x0 }, - { 0x130a4, 0x0 }, - { 0x130a5, 0x0 }, - { 0x130a6, 0x0 }, - { 0x130a7, 0x0 }, - { 0x2007c, 0x0 }, - { 0x12007c, 0x0 }, - { 0x22007c, 0x0 }, - { 0x2007d, 0x0 }, - { 0x12007d, 0x0 }, - { 0x22007d, 0x0 }, - { 0x400fd, 0x0 }, - { 0x400c0, 0x0 }, - { 0x90201, 0x0 }, - { 0x190201, 0x0 }, - { 0x290201, 0x0 }, - { 0x90202, 0x0 }, - { 0x190202, 0x0 }, - { 0x290202, 0x0 }, - { 0x90203, 0x0 }, - { 0x190203, 0x0 }, - { 0x290203, 0x0 }, - { 0x90204, 0x0 }, - { 0x190204, 0x0 }, - { 0x290204, 0x0 }, - { 0x90205, 0x0 }, - { 0x190205, 0x0 }, - { 0x290205, 0x0 }, - { 0x90206, 0x0 }, - { 0x190206, 0x0 }, - { 0x290206, 0x0 }, - { 0x90207, 0x0 }, - { 0x190207, 0x0 }, - { 0x290207, 0x0 }, - { 0x90208, 0x0 }, - { 0x190208, 0x0 }, - { 0x290208, 0x0 }, - { 0x10062, 0x0 }, - { 0x10162, 0x0 }, - { 0x10262, 0x0 }, - { 0x10362, 0x0 }, - { 0x10462, 0x0 }, - { 0x10562, 0x0 }, - { 0x10662, 0x0 }, - { 0x10762, 0x0 }, - { 0x10862, 0x0 }, - { 0x11062, 0x0 }, - { 0x11162, 0x0 }, - { 0x11262, 0x0 }, - { 0x11362, 0x0 }, - { 0x11462, 0x0 }, - { 0x11562, 0x0 }, - { 0x11662, 0x0 }, - { 0x11762, 0x0 }, - { 0x11862, 0x0 }, - { 0x12062, 0x0 }, - { 0x12162, 0x0 }, - { 0x12262, 0x0 }, - { 0x12362, 0x0 }, - { 0x12462, 0x0 }, - { 0x12562, 0x0 }, - { 0x12662, 0x0 }, - { 0x12762, 0x0 }, - { 0x12862, 0x0 }, - { 0x13062, 0x0 }, - { 0x13162, 0x0 }, - { 0x13262, 0x0 }, - { 0x13362, 0x0 }, - { 0x13462, 0x0 }, - { 0x13562, 0x0 }, - { 0x13662, 0x0 }, - { 0x13762, 0x0 }, - { 0x13862, 0x0 }, - { 0x20077, 0x0 }, - { 0x10001, 0x0 }, - { 0x11001, 0x0 }, - { 0x12001, 0x0 }, - { 0x13001, 0x0 }, - { 0x10040, 0x0 }, - { 0x10140, 0x0 }, - { 0x10240, 0x0 }, - { 0x10340, 0x0 }, - { 0x10440, 0x0 }, - { 0x10540, 0x0 }, - { 0x10640, 0x0 }, - { 0x10740, 0x0 }, - { 0x10840, 0x0 }, - { 0x10030, 0x0 }, - { 0x10130, 0x0 }, - { 0x10230, 0x0 }, - { 0x10330, 0x0 }, - { 0x10430, 0x0 }, - { 0x10530, 0x0 }, - { 0x10630, 0x0 }, - { 0x10730, 0x0 }, - { 0x10830, 0x0 }, - { 0x11040, 0x0 }, - { 0x11140, 0x0 }, - { 0x11240, 0x0 }, - { 0x11340, 0x0 }, - { 0x11440, 0x0 }, - { 0x11540, 0x0 }, - { 0x11640, 0x0 }, - { 0x11740, 0x0 }, - { 0x11840, 0x0 }, - { 0x11030, 0x0 }, - { 0x11130, 0x0 }, - { 0x11230, 0x0 }, - { 0x11330, 0x0 }, - { 0x11430, 0x0 }, - { 0x11530, 0x0 }, - { 0x11630, 0x0 }, - { 0x11730, 0x0 }, - { 0x11830, 0x0 }, - { 0x12040, 0x0 }, - { 0x12140, 0x0 }, - { 0x12240, 0x0 }, - { 0x12340, 0x0 }, - { 0x12440, 0x0 }, - { 0x12540, 0x0 }, - { 0x12640, 0x0 }, - { 0x12740, 0x0 }, - { 0x12840, 0x0 }, - { 0x12030, 0x0 }, - { 0x12130, 0x0 }, - { 0x12230, 0x0 }, - { 0x12330, 0x0 }, - { 0x12430, 0x0 }, - { 0x12530, 0x0 }, - { 0x12630, 0x0 }, - { 0x12730, 0x0 }, - { 0x12830, 0x0 }, - { 0x13040, 0x0 }, - { 0x13140, 0x0 }, - { 0x13240, 0x0 }, - { 0x13340, 0x0 }, - { 0x13440, 0x0 }, - { 0x13540, 0x0 }, - { 0x13640, 0x0 }, - { 0x13740, 0x0 }, - { 0x13840, 0x0 }, - { 0x13030, 0x0 }, - { 0x13130, 0x0 }, - { 0x13230, 0x0 }, - { 0x13330, 0x0 }, - { 0x13430, 0x0 }, - { 0x13530, 0x0 }, - { 0x13630, 0x0 }, - { 0x13730, 0x0 }, - { 0x13830, 0x0 }, -}; - /* P0 message block paremeter for training firmware */ static struct dram_cfg_param ddr_fsp0_cfg[] = { { 0xd0000, 0x0 }, @@ -1840,8 +1117,6 @@ struct dram_timing_info imx8mp_evk_dram_timing = { .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), .fsp_msg = ddr_dram_fsp_msg, .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), - .ddrphy_trained_csr = ddr_ddrphy_trained_csr, - .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), .fsp_table = { 4000, 400, 100, }, diff --git a/arch/arm/boards/nxp-imx8mq-evk/board.c b/arch/arm/boards/nxp-imx8mq-evk/board.c index 8d88bfe8c2..d86666958a 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/board.c +++ b/arch/arm/boards/nxp-imx8mq-evk/board.c @@ -7,7 +7,7 @@ #include <init.h> #include <linux/phy.h> #include <linux/sizes.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <envfs.h> diff --git a/arch/arm/boards/nxp-imx8mq-evk/ddrphy_train.c b/arch/arm/boards/nxp-imx8mq-evk/ddrphy_train.c index d2c73fc7ce..bac7d0a517 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/ddrphy_train.c +++ b/arch/arm/boards/nxp-imx8mq-evk/ddrphy_train.c @@ -11,6 +11,8 @@ void ddr_cfg_phy(void) { unsigned int tmp, tmp_t; + ddr_get_firmware(DRAM_TYPE_LPDDR4); + //Init DDRPHY register... reg32_write(0x3c080440,0x2); reg32_write(0x3c080444,0x3); @@ -142,7 +144,7 @@ void ddr_cfg_phy(void) { //enable APB bus to access DDRPHY RAM reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0000, 0x0); //load the 1D training image - ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_1D_IMAGE); + imx8m_ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_1D_IMAGE); //configure DDRPHY-FW DMEM structure @clock0... reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); @@ -187,7 +189,7 @@ void ddr_cfg_phy(void) { reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x9); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x0); - wait_ddrphy_training_complete(); + imx8m_wait_ddrphy_training_complete(); //configure DDRPHY-FW DMEM structure @clock1... reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); @@ -256,7 +258,7 @@ void ddr_cfg_phy(void) { reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x9); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x0); - wait_ddrphy_training_complete(); + imx8m_wait_ddrphy_training_complete(); //set the PHY input clock to the desired frequency for pstate 0 reg32_write(0x3038a088,0x7070000); @@ -289,7 +291,7 @@ void ddr_cfg_phy(void) { //enable APB bus to access DDRPHY RAM reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0000, 0x0); //load the 2D training image - ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_2D_IMAGE); + imx8m_ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_2D_IMAGE); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54003,0xc80); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54006,0x11); @@ -330,7 +332,7 @@ void ddr_cfg_phy(void) { reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x9); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x0); - wait_ddrphy_training_complete(); + imx8m_wait_ddrphy_training_complete(); //Halt MPU reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); diff --git a/arch/arm/boards/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg b/arch/arm/boards/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg index 180a44fda3..f82759f849 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg @@ -1,8 +1,9 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ +# SPDX-License-Identifier: GPL-2.0-only soc imx8mq loadaddr 0x007E1000 max_load_size 0x3F000 ivtofs 0x400 -#include <mach/habv4-imx8-gencsf.h> + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c index 0c9f6345ff..d1a517dddb 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c @@ -2,22 +2,22 @@ #include <common.h> #include <firmware.h> -#include <image-metadata.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx8m-ccm-regs.h> -#include <mach/iomux-mx8mq.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/iomux-mx8mq.h> #include <soc/imx8m/ddr.h> -#include <mach/xload.h> +#include <mach/imx/xload.h> #include <io.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <asm/cache.h> #include <asm/sections.h> #include <asm/mmu.h> -#include <mach/atf.h> -#include <mach/esdctl.h> +#include <mach/imx/atf.h> +#include <mach/imx/esdctl.h> #include "ddr.h" @@ -65,33 +65,9 @@ static __noreturn noinline void nxp_imx8mq_evk_start(void) * to DRAM in EL2. */ if (current_el() == 3) { - enum bootsource src = BOOTSOURCE_UNKNOWN; - int instance = BOOTSOURCE_INSTANCE_UNKNOWN; - int ret = -ENOTSUPP; - size_t bl31_size; - const u8 *bl31; - ddr_init(); - /* - * On completion the TF-A will jump to MX8MQ_ATF_BL33_BASE_ADDR - * in EL2. Copy the image there, but replace the PBL part of - * that image with ourselves. On a high assurance boot only the - * currently running code is validated and contains the checksum - * for the piggy data, so we need to ensure that we are running - * the same code in DRAM. - */ - imx8mq_get_boot_source(&src, &instance); - if (src == BOOTSOURCE_MMC) - ret = imx8m_esdhc_load_image(instance, false); - BUG_ON(ret); - - memcpy((void *)MX8MQ_ATF_BL33_BASE_ADDR, - __image_start, barebox_pbl_size); - - get_builtin_firmware(imx8mq_bl31_bin, &bl31, &bl31_size); - imx8mq_atf_load_bl31(bl31, bl31_size); - /* not reached */ + imx8mq_load_and_start_image_via_tfa(); } /* @@ -107,7 +83,5 @@ ENTRY_FUNCTION(start_nxp_imx8mq_evk, r0, r1, r2) relocate_to_current_adr(); setup_c(); - IMD_USED_OF(imx8mq_evk); - nxp_imx8mq_evk_start(); } diff --git a/arch/arm/boards/omap343xdsp/board.c b/arch/arm/boards/omap343xdsp/board.c index 045a8b1bca..ca1cf9c58c 100644 --- a/arch/arm/boards/omap343xdsp/board.c +++ b/arch/arm/boards/omap343xdsp/board.c @@ -7,9 +7,9 @@ #include <driver.h> #include <io.h> #include <asm/armlinux.h> -#include <mach/omap3-silicon.h> -#include <mach/omap3-devices.h> -#include <mach/gpmc.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/omap3-devices.h> +#include <mach/omap/gpmc.h> #include <errno.h> /** diff --git a/arch/arm/boards/omap343xdsp/lowlevel.c b/arch/arm/boards/omap343xdsp/lowlevel.c index 271b122d4d..3a8165f885 100644 --- a/arch/arm/boards/omap343xdsp/lowlevel.c +++ b/arch/arm/boards/omap343xdsp/lowlevel.c @@ -6,14 +6,14 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/generic.h> -#include <mach/omap3-mux.h> -#include <mach/sdrc.h> -#include <mach/control.h> -#include <mach/syslib.h> -#include <mach/omap3-silicon.h> -#include <mach/omap3-generic.h> -#include <mach/sys_info.h> +#include <mach/omap/generic.h> +#include <mach/omap/omap3-mux.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/control.h> +#include <mach/omap/syslib.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/omap3-generic.h> +#include <mach/omap/sys_info.h> /** * @brief Do the SDRC initialization for 128Meg Infenion DDR for CS0 diff --git a/arch/arm/boards/omap3evm/board.c b/arch/arm/boards/omap3evm/board.c index 62b1a1c00f..37dbc0044e 100644 --- a/arch/arm/boards/omap3evm/board.c +++ b/arch/arm/boards/omap3evm/board.c @@ -32,12 +32,12 @@ #include <io.h> #include <linux/sizes.h> #include <asm/armlinux.h> -#include <mach/omap3-silicon.h> -#include <mach/omap3-mux.h> -#include <mach/gpmc.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/omap3-mux.h> +#include <mach/omap/gpmc.h> #include <errno.h> -#include <generated/mach-types.h> -#include <mach/omap3-devices.h> +#include <asm/mach-types.h> +#include <mach/omap/omap3-devices.h> /** * @brief Initialize the serial port to be used as console. diff --git a/arch/arm/boards/omap3evm/lowlevel.c b/arch/arm/boards/omap3evm/lowlevel.c index 1dcfbc27ba..5797acc14e 100644 --- a/arch/arm/boards/omap3evm/lowlevel.c +++ b/arch/arm/boards/omap3evm/lowlevel.c @@ -5,14 +5,14 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/generic.h> -#include <mach/omap3-mux.h> -#include <mach/sdrc.h> -#include <mach/control.h> -#include <mach/syslib.h> -#include <mach/omap3-silicon.h> -#include <mach/omap3-generic.h> -#include <mach/sys_info.h> +#include <mach/omap/generic.h> +#include <mach/omap/omap3-mux.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/control.h> +#include <mach/omap/syslib.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/omap3-generic.h> +#include <mach/omap/sys_info.h> /* diff --git a/arch/arm/boards/panda/board.c b/arch/arm/boards/panda/board.c index 01189ebd76..55836d2331 100644 --- a/arch/arm/boards/panda/board.c +++ b/arch/arm/boards/panda/board.c @@ -7,14 +7,14 @@ #include <io.h> #include <gpio.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-devices.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/control.h> -#include <usb/ehci.h> +#include <asm/mach-types.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-devices.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/control.h> +#include <linux/usb/ehci.h> #include <linux/err.h> #include <linux/sizes.h> #include <asm/mmu.h> diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c index 4fe445b17d..f535e7f9a4 100644 --- a/arch/arm/boards/panda/lowlevel.c +++ b/arch/arm/boards/panda/lowlevel.c @@ -5,12 +5,12 @@ #include <init.h> #include <io.h> #include <linux/sizes.h> -#include <mach/generic.h> -#include <mach/omap4-mux.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-generic.h> -#include <mach/omap4-clock.h> -#include <mach/syslib.h> +#include <mach/omap/generic.h> +#include <mach/omap/omap4-mux.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-generic.h> +#include <mach/omap/omap4-clock.h> +#include <mach/omap/syslib.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c index 25def93ea2..b5e1e79c8f 100644 --- a/arch/arm/boards/panda/mux.c +++ b/arch/arm/boards/panda/mux.c @@ -3,9 +3,9 @@ #include <common.h> #include <init.h> #include <io.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-mux.h> -#include <mach/omap4-clock.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-mux.h> +#include <mach/omap/omap4-clock.h> #include "mux.h" diff --git a/arch/arm/boards/phytec-phycard-imx27/lowlevel.c b/arch/arm/boards/phytec-phycard-imx27/lowlevel.c index 8ab682b9db..a43406e1a2 100644 --- a/arch/arm/boards/phytec-phycard-imx27/lowlevel.c +++ b/arch/arm/boards/phytec-phycard-imx27/lowlevel.c @@ -12,10 +12,10 @@ #include <config.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> -#include <mach/imx27-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> -#include <mach/imx-nand.h> +#include <mach/imx/imx27-regs.h> +#include <mach/imx/imx-pll.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/imx-nand.h> enum { PHYCARD_MICRON_64MB, diff --git a/arch/arm/boards/phytec-phycard-imx27/pca100.c b/arch/arm/boards/phytec-phycard-imx27/pca100.c index ed243fa01e..d3a5598e96 100644 --- a/arch/arm/boards/phytec-phycard-imx27/pca100.c +++ b/arch/arm/boards/phytec-phycard-imx27/pca100.c @@ -5,26 +5,24 @@ #include <net.h> #include <init.h> #include <environment.h> -#include <mach/imx27-regs.h> +#include <mach/imx/imx27-regs.h> #include <gpio.h> #include <linux/sizes.h> #include <asm/armlinux.h> #include <asm/sections.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <nand.h> #include <spi/spi.h> #include <io.h> -#include <mach/imx-nand.h> -#include <mach/imx-pll.h> -#include <mach/imxfb.h> +#include <mach/imx/imx-nand.h> +#include <mach/imx/imx-pll.h> +#include <platform_data/imxfb.h> #include <asm/mmu.h> -#include <usb/ulpi.h> -#include <mach/bbu.h> -#include <mach/iomux-mx27.h> -#include <mach/devices-imx27.h> +#include <linux/usb/ulpi.h> +#include <mach/imx/bbu.h> +#include <mach/imx/iomux-mx27.h> #if defined(CONFIG_USB) && defined(CONFIG_USB_ULPI) static void pca100_usb_register(void) diff --git a/arch/arm/boards/phytec-phycard-omap3/lowlevel.c b/arch/arm/boards/phytec-phycard-omap3/lowlevel.c index 6f24108ef2..56fbdf12ad 100644 --- a/arch/arm/boards/phytec-phycard-omap3/lowlevel.c +++ b/arch/arm/boards/phytec-phycard-omap3/lowlevel.c @@ -6,14 +6,14 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/omap3-mux.h> -#include <mach/generic.h> -#include <mach/sdrc.h> -#include <mach/control.h> -#include <mach/syslib.h> -#include <mach/omap3-silicon.h> -#include <mach/omap3-generic.h> -#include <mach/sys_info.h> +#include <mach/omap/omap3-mux.h> +#include <mach/omap/generic.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/control.h> +#include <mach/omap/syslib.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/omap3-generic.h> +#include <mach/omap/sys_info.h> /* Slower full frequency range default timings for x32 operation */ #define SDP_SDRC_SHARING 0x00000100 diff --git a/arch/arm/boards/phytec-phycard-omap3/pca-a-l1.c b/arch/arm/boards/phytec-phycard-omap3/pca-a-l1.c index e3b148a0ed..d878dba082 100644 --- a/arch/arm/boards/phytec-phycard-omap3/pca-a-l1.c +++ b/arch/arm/boards/phytec-phycard-omap3/pca-a-l1.c @@ -37,19 +37,18 @@ #include <errno.h> #include <init.h> #include <nand.h> -#include <partition.h> #include <linux/sizes.h> #include <asm/armlinux.h> #include <asm/io.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <linux/err.h> -#include <mach/gpmc.h> -#include <mach/gpmc_nand.h> -#include <mach/omap_hsmmc.h> -#include <mach/sdrc.h> -#include <mach/omap3-silicon.h> -#include <mach/sys_info.h> -#include <mach/omap3-devices.h> +#include <mach/omap/gpmc.h> +#include <mach/omap/gpmc_nand.h> +#include <mach/omap/omap_hsmmc.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/omap3-devices.h> #define SMC911X_BASE 0x2c000000 diff --git a/arch/arm/boards/phytec-phycard-omap4/lowlevel.c b/arch/arm/boards/phytec-phycard-omap4/lowlevel.c index 6ccaf3e342..b5906234d3 100644 --- a/arch/arm/boards/phytec-phycard-omap4/lowlevel.c +++ b/arch/arm/boards/phytec-phycard-omap4/lowlevel.c @@ -5,12 +5,12 @@ #include <init.h> #include <io.h> #include <linux/sizes.h> -#include <mach/generic.h> -#include <mach/omap4-mux.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-generic.h> -#include <mach/omap4-clock.h> -#include <mach/syslib.h> +#include <mach/omap/generic.h> +#include <mach/omap/omap4-mux.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-generic.h> +#include <mach/omap/omap4-clock.h> +#include <mach/omap/syslib.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/phytec-phycard-omap4/mux.c b/arch/arm/boards/phytec-phycard-omap4/mux.c index b0bbfa5906..a545ca5948 100644 --- a/arch/arm/boards/phytec-phycard-omap4/mux.c +++ b/arch/arm/boards/phytec-phycard-omap4/mux.c @@ -3,9 +3,9 @@ #include <common.h> #include <init.h> #include <io.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-mux.h> -#include <mach/omap4-clock.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-mux.h> +#include <mach/omap/omap4-clock.h> #include "mux.h" diff --git a/arch/arm/boards/phytec-phycard-omap4/pca-a-xl2.c b/arch/arm/boards/phytec-phycard-omap4/pca-a-xl2.c index ab5976ff8a..f18f11c331 100644 --- a/arch/arm/boards/phytec-phycard-omap4/pca-a-xl2.c +++ b/arch/arm/boards/phytec-phycard-omap4/pca-a-xl2.c @@ -8,21 +8,20 @@ #include <io.h> #include <gpio.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <mach/omap4-silicon.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/control.h> +#include <asm/mach-types.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/control.h> #include <linux/err.h> #include <linux/sizes.h> -#include <partition.h> #include <nand.h> #include <asm/mmu.h> -#include <mach/gpmc.h> -#include <mach/gpmc_nand.h> -#include <mach/omap_hsmmc.h> -#include <mach/omap4-devices.h> +#include <mach/omap/gpmc.h> +#include <mach/omap/gpmc_nand.h> +#include <mach/omap/omap_hsmmc.h> +#include <mach/omap/omap4-devices.h> #include <i2c/i2c.h> static int pcaaxl2_console_init(void) diff --git a/arch/arm/boards/phytec-phycore-imx27/lowlevel.c b/arch/arm/boards/phytec-phycore-imx27/lowlevel.c index 4e2f44d216..a42b30a7bb 100644 --- a/arch/arm/boards/phytec-phycore-imx27/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-imx27/lowlevel.c @@ -3,11 +3,11 @@ #include <common.h> #include <init.h> -#include <mach/imx27-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> +#include <mach/imx/imx27-regs.h> +#include <mach/imx/imx-pll.h> +#include <mach/imx/esdctl.h> #include <io.h> -#include <mach/imx-nand.h> +#include <mach/imx/imx-nand.h> #include <asm/barebox-arm.h> #include <asm/system.h> #include <asm-generic/memory_layout.h> diff --git a/arch/arm/boards/phytec-phycore-imx27/pcm038.c b/arch/arm/boards/phytec-phycore-imx27/pcm038.c index 90ce579684..879e94293c 100644 --- a/arch/arm/boards/phytec-phycore-imx27/pcm038.c +++ b/arch/arm/boards/phytec-phycore-imx27/pcm038.c @@ -11,13 +11,12 @@ #include <notifier.h> #include <linux/sizes.h> #include <envfs.h> -#include <mach/devices-imx27.h> -#include <mach/imx-pll.h> -#include <mach/imx27-regs.h> -#include <mach/imxfb.h> -#include <mach/iomux-mx27.h> +#include <mach/imx/imx-pll.h> +#include <mach/imx/imx27-regs.h> +#include <platform_data/imxfb.h> +#include <mach/imx/iomux-mx27.h> #include <mfd/mc13xxx.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include "pll.h" @@ -106,7 +105,8 @@ static int pcm038_init(void) for (i = 0; i < ARRAY_SIZE(pcm038_pins); i++) imx27_gpio_mode(pcm038_pins[i]); - imx27_add_fb(&pcm038_fb_data); + add_generic_device("imxfb", -1, NULL, (resource_size_t)MX27_LCDC_BASE_ADDR, 0x1000, + IORESOURCE_MEM, &pcm038_fb_data); switch (bootsource_get()) { case BOOTSOURCE_NAND: diff --git a/arch/arm/boards/phytec-phycore-imx27/pcm970.c b/arch/arm/boards/phytec-phycore-imx27/pcm970.c index b7fad6dcbc..1e466e0ec8 100644 --- a/arch/arm/boards/phytec-phycore-imx27/pcm970.c +++ b/arch/arm/boards/phytec-phycore-imx27/pcm970.c @@ -6,8 +6,8 @@ #include <io.h> #include <platform_data/ide.h> #include <linux/sizes.h> -#include <mach/imx27-regs.h> -#include <mach/iomux-mx27.h> +#include <mach/imx/imx27-regs.h> +#include <mach/imx/iomux-mx27.h> #define GPIO_IDE_POWER (GPIO_PORTE + 18) #define GPIO_IDE_PCOE (GPIO_PORTF + 7) @@ -28,7 +28,7 @@ static struct ide_port_info pcm970_ide_pdata = { .reset = &pcm970_ide_reset, }; -static struct device_d pcm970_ide_device = { +static struct device pcm970_ide_device = { .id = DEVICE_ID_DYNAMIC, .name = "ide_intf", .num_resources = ARRAY_SIZE(pcm970_ide_resources), diff --git a/arch/arm/boards/phytec-phycore-imx31/Makefile b/arch/arm/boards/phytec-phycore-imx31/Makefile deleted file mode 100644 index 1a5be8e81f..0000000000 --- a/arch/arm/boards/phytec-phycore-imx31/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Juergen Beisert <jbe@pengutronix.de> - -lwl-y += lowlevel.o -obj-y += pcm037.o diff --git a/arch/arm/boards/phytec-phycore-imx31/env/boot/nand-ubi b/arch/arm/boards/phytec-phycore-imx31/env/boot/nand-ubi deleted file mode 100644 index d555a538d1..0000000000 --- a/arch/arm/boards/phytec-phycore-imx31/env/boot/nand-ubi +++ /dev/null @@ -1,5 +0,0 @@ -#!/bin/sh - -global.bootm.image="/dev/nand0.kernel.bb" -#global.bootm.oftree="/env/oftree" -global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=nand0.root rootfstype=ubifs" diff --git a/arch/arm/boards/phytec-phycore-imx31/env/init/mtdparts-nand b/arch/arm/boards/phytec-phycore-imx31/env/init/mtdparts-nand deleted file mode 100644 index 540277cdeb..0000000000 --- a/arch/arm/boards/phytec-phycore-imx31/env/init/mtdparts-nand +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh - -mtdparts="512k(nand0.barebox)ro,128k(nand0.bareboxenv),4M(nand0.kernel),-(nand0.root)" -kernelname="mxc_nand" - -mtdparts-add -b -d nand0 -k ${kernelname} -p ${mtdparts} diff --git a/arch/arm/boards/phytec-phycore-imx31/env/init/mtdparts-nor b/arch/arm/boards/phytec-phycore-imx31/env/init/mtdparts-nor deleted file mode 100644 index 940eb86c95..0000000000 --- a/arch/arm/boards/phytec-phycore-imx31/env/init/mtdparts-nor +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh - -mtdparts="256k(nor0.barebox)ro,128k(nor0.bareboxenv),4M(nor0.kernel),-(nor0.root)" -kernelname="physmap-flash.0" - -mtdparts-add -d nor0 -k ${kernelname} -p ${mtdparts} diff --git a/arch/arm/boards/phytec-phycore-imx31/lowlevel.c b/arch/arm/boards/phytec-phycore-imx31/lowlevel.c deleted file mode 100644 index 7e1c6efd3f..0000000000 --- a/arch/arm/boards/phytec-phycore-imx31/lowlevel.c +++ /dev/null @@ -1,118 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - -#include <common.h> -#include <init.h> -#include <io.h> -#include <mach/imx-nand.h> -#include <asm/barebox-arm.h> -#include <asm/system.h> -#include <asm-generic/memory_layout.h> -#include <asm-generic/sections.h> -#include <asm/barebox-arm-head.h> -#include <mach/imx31-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> - -#define ESDCTL0_VAL (ESDCTL0_SDE | ESDCTL0_ROW13 | ESDCTL0_COL10) - -void __bare_init __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - uint32_t r; - volatile int v; - - arm_cpu_lowlevel_init(); - - arm_setup_stack(MX31_IRAM_BASE_ADDR + MX31_IRAM_SIZE); - - writel(1 << 6, MX31_IPU_CTRL_BASE_ADDR); - - writel(0x074B0BF5, MX31_CCM_BASE_ADDR + MX31_CCM_CCMR); - - for (v = 0; v < 0x4000; v++); - - writel(0x074B0BF5 | MX31_CCMR_MPE, MX31_CCM_BASE_ADDR + - MX31_CCM_CCMR); - writel((0x074B0BF5 | MX31_CCMR_MPE) & ~MX31_CCMR_MDS, - MX31_CCM_BASE_ADDR + MX31_CCM_CCMR); - - writel(MX31_PDR0_CSI_PODF(0xff1) | \ - MX31_PDR0_PER_PODF(7) | \ - MX31_PDR0_HSP_PODF(3) | \ - MX31_PDR0_NFC_PODF(5) | \ - MX31_PDR0_IPG_PODF(1) | \ - MX31_PDR0_MAX_PODF(3) | \ - MX31_PDR0_MCU_PODF(0), \ - MX31_CCM_BASE_ADDR + MX31_CCM_PDR0); - - writel(IMX_PLL_PD(0) | IMX_PLL_MFD(0xe) | - IMX_PLL_MFI(9) | IMX_PLL_MFN(0xd), - MX31_CCM_BASE_ADDR + MX31_CCM_MPCTL); - writel(IMX_PLL_PD(1) | IMX_PLL_MFD(0x43) | IMX_PLL_MFI(12) | - IMX_PLL_MFN(1), MX31_CCM_BASE_ADDR + - MX31_CCM_SPCTL); - - /* - * Configure IOMUXC - * Clears 0x43fa_c26c - 0x43fa_c2dc with 0, except 0x43fa_c278 (untouched), - * 0x43fa_c27c (set to 0x1000) and 0x43fa_c280 (untouched) - * (behaviour copied by sha, source unknown) - */ - writel(0, 0x43fac26c); - writel(0, 0x43fac270); - writel(0, 0x43fac274); - - writel(0x1000, 0x43fac27c); - - for (r = 0x43fac284; r <= 0x43fac2dc; r += 4) - writel(0, r); - - /* Skip SDRAM initialization if we run from RAM */ - r = get_pc(); - if (r > 0x80000000 && r < 0xa0000000) - imx31_barebox_entry(NULL); - -#if defined CONFIG_PCM037_SDRAM_BANK0_128MB -#define ROWS0 ESDCTL0_ROW13 -#elif defined CONFIG_PCM037_SDRAM_BANK0_256MB -#define ROWS0 ESDCTL0_ROW14 -#endif - writel(0x00000004, MX31_ESDCTL_BASE_ADDR + IMX_ESDMISC); - writel(0x006ac73a, MX31_ESDCTL_BASE_ADDR + IMX_ESDCFG0); - writel(0x90100000 | ROWS0, MX31_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writel(0x12344321, MX31_CSD0_BASE_ADDR + 0xf00); - writel(0xa0100000 | ROWS0, MX31_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writel(0x12344321, MX31_CSD0_BASE_ADDR); - writel(0x12344321, MX31_CSD0_BASE_ADDR); - writel(0xb0100000 | ROWS0, MX31_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writeb(0xda, MX31_CSD0_BASE_ADDR + 0x33); - writeb(0xff, MX31_CSD0_BASE_ADDR + 0x01000000); - writel(0x80226080 | ROWS0, MX31_ESDCTL_BASE_ADDR + IMX_ESDCTL0); - writel(0xDEADBEEF, MX31_CSD0_BASE_ADDR); - writel(0x0000000c, MX31_ESDCTL_BASE_ADDR + IMX_ESDMISC); - -#ifndef CONFIG_PCM037_SDRAM_BANK1_NONE -#if defined CONFIG_PCM037_SDRAM_BANK1_128MB -#define ROWS1 ESDCTL0_ROW13 -#elif defined CONFIG_PCM037_SDRAM_BANK1_256MB -#define ROWS1 ESDCTL0_ROW14 -#endif - writel(0x006ac73a, MX31_ESDCTL_BASE_ADDR + IMX_ESDCFG1); - writel(0x90100000 | ROWS1, MX31_ESDCTL_BASE_ADDR + IMX_ESDCTL1); - writel(0x12344321, MX31_CSD1_BASE_ADDR + 0xf00); - writel(0xa0100000 | ROWS1, MX31_ESDCTL_BASE_ADDR + IMX_ESDCTL1); - writel(0x12344321, MX31_CSD1_BASE_ADDR); - writel(0x12344321, MX31_CSD1_BASE_ADDR); - writel(0xb0100000 | ROWS1, MX31_ESDCTL_BASE_ADDR + IMX_ESDCTL1); - writeb(0xda, MX31_CSD1_BASE_ADDR + 0x33); - writeb(0xff, MX31_CSD1_BASE_ADDR + 0x01000000); - writel(0x80226080 | ROWS1, MX31_ESDCTL_BASE_ADDR + IMX_ESDCTL1); - writel(0xDEADBEEF, MX31_CSD1_BASE_ADDR); - writel(0x0000000c, MX31_ESDCTL_BASE_ADDR + IMX_ESDMISC); -#endif - - if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND)) - imx31_barebox_boot_nand_external(); - else - imx31_barebox_entry(NULL); -} diff --git a/arch/arm/boards/phytec-phycore-imx31/pcm037.c b/arch/arm/boards/phytec-phycore-imx31/pcm037.c deleted file mode 100644 index 52b97fe777..0000000000 --- a/arch/arm/boards/phytec-phycore-imx31/pcm037.c +++ /dev/null @@ -1,241 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - -/* Board support for Phytec's, i.MX31 based CPU card, called: PCM037 */ - -#include <common.h> -#include <init.h> -#include <driver.h> -#include <fs.h> -#include <gpio.h> -#include <environment.h> -#include <usb/ulpi.h> -#include <mach/imx31-regs.h> -#include <mach/iomux-mx31.h> -#include <asm/armlinux.h> -#include <asm/sections.h> -#include <mach/weim.h> -#include <io.h> -#include <platform_data/eth-smc911x.h> -#include <asm/mmu.h> -#include <partition.h> -#include <generated/mach-types.h> -#include <asm/barebox-arm.h> -#include <mach/imx-nand.h> -#include <mach/devices-imx31.h> - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, - .flash_bbt = 1, -}; - -#ifdef CONFIG_USB -static void pcm037_usb_init(void) -{ - u32 tmp; - - /* enable clock */ - tmp = readl(0x53f80000); - tmp |= (1 << 9); - writel(tmp, 0x53f80000); - - /* Host 1 */ - tmp = readl(MX31_USB_OTG_BASE_ADDR + 0x600); - tmp &= ~((3 << 21) | 1); - tmp |= (1 << 5) | (1 << 16) | (1 << 19) | (1 << 11) | (1 << 20); - writel(tmp, MX31_USB_OTG_BASE_ADDR + 0x600); - - tmp = readl(MX31_USB_OTG_BASE_ADDR + 0x184); - tmp &= ~(3 << 30); - tmp |= 2 << 30; - writel(tmp, MX31_USB_OTG_BASE_ADDR + 0x184); - - imx_iomux_mode(MX31_PIN_USBOTG_DATA0__USBOTG_DATA0); - imx_iomux_mode(MX31_PIN_USBOTG_DATA1__USBOTG_DATA1); - imx_iomux_mode(MX31_PIN_USBOTG_DATA2__USBOTG_DATA2); - imx_iomux_mode(MX31_PIN_USBOTG_DATA3__USBOTG_DATA3); - imx_iomux_mode(MX31_PIN_USBOTG_DATA4__USBOTG_DATA4); - imx_iomux_mode(MX31_PIN_USBOTG_DATA5__USBOTG_DATA5); - imx_iomux_mode(MX31_PIN_USBOTG_DATA6__USBOTG_DATA6); - imx_iomux_mode(MX31_PIN_USBOTG_DATA7__USBOTG_DATA7); - imx_iomux_mode(MX31_PIN_USBOTG_CLK__USBOTG_CLK); - imx_iomux_mode(MX31_PIN_USBOTG_DIR__USBOTG_DIR); - imx_iomux_mode(MX31_PIN_USBOTG_NXT__USBOTG_NXT); - imx_iomux_mode(MX31_PIN_USBOTG_STP__USBOTG_STP); - - mdelay(50); - ulpi_setup((void *)(MX31_USB_OTG_BASE_ADDR + 0x170), 1); - - /* Host 2 */ - tmp = readl(MX31_IOMUXC_GPR); - tmp |= 1 << 11; /* IOMUX GPR: enable USBH2 signals */ - writel(tmp, MX31_IOMUXC_GPR); - - imx_iomux_mode(IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC)); - imx_iomux_mode(IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC)); - -#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) - imx_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG); - imx_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG); - imx_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG); - imx_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG); - imx_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */ - imx_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */ - imx_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA2 */ - imx_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA3 */ - imx_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA4 */ - imx_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA5 */ - imx_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA6 */ - imx_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA7 */ - - tmp = readl(MX31_USB_OTG_BASE_ADDR + 0x600); - tmp &= ~((3 << 21) | 1); - tmp |= (1 << 5) | (1 << 16) | (1 << 19) | (1 << 20); - writel(tmp, MX31_USB_OTG_BASE_ADDR + 0x600); - - tmp = readl(MX31_USB_OTG_BASE_ADDR + 0x584); - tmp &= ~(3 << 30); - tmp |= 2 << 30; - writel(tmp, MX31_USB_OTG_BASE_ADDR + 0x584); - - mdelay(50); - ulpi_setup((void *)(MX31_USB_OTG_BASE_ADDR + 0x570), 1); - - /* Set to Host mode */ - tmp = readl(MX31_USB_OTG_BASE_ADDR + 0x1a8); - writel(tmp | 0x3, MX31_USB_OTG_BASE_ADDR + 0x1a8); - -} -#endif - -static int pcm037_mmu_init(void) -{ - l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000); - - return 0; -} -postmmu_initcall(pcm037_mmu_init); - -static struct smc911x_plat smsc9217_pdata = { - .flags = SMC911X_FORCE_INTERNAL_PHY, -}; - -static int pcm037_devices_init(void) -{ - /* CS0: Nor Flash */ - imx31_setup_weimcs(0, 0x0000cf03, 0x10000d03, 0x00720900); - /* CS1: Network Controller */ - imx31_setup_weimcs(1, 0x0000df06, 0x444a4541, 0x44443302); - /* CS4: SRAM */ - imx31_setup_weimcs(4, 0x0000d843, 0x22252521, 0x22220a00); - /* CS5: SJA1000 */ - imx31_setup_weimcs(4, 0x0000DCF6, 0x444A0301, 0x44443302); - - /* - * Up to 32MiB NOR type flash, connected to - * CS line 0, data width is 16 bit - */ - add_cfi_flash_device(DEVICE_ID_DYNAMIC, MX31_CS0_BASE_ADDR, 32 * 1024 * 1024, 0); - - imx31_add_mmc0(NULL); - - /* - * Create partitions that should be - * not touched by any regular user - */ - devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); /* ourself */ - devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); /* environment */ - - protect_file("/dev/env0", 1); - - /* - * up to 2MiB static RAM type memory, connected - * to CS4, data width is 16 bit - */ - add_mem_device("sram0", MX31_CS4_BASE_ADDR, MX31_CS4_SIZE, /* area size */ - IORESOURCE_MEM_WRITEABLE); - imx31_add_nand(&nand_info); - - /* - * SMSC 9217 network controller - * connected to CS line 1 and interrupt line - * GPIO3, data width is 16 bit - */ - add_generic_device("smc911x", DEVICE_ID_DYNAMIC, NULL, MX31_CS1_BASE_ADDR, - MX31_CS1_SIZE, IORESOURCE_MEM, &smsc9217_pdata); - -#ifdef CONFIG_USB - pcm037_usb_init(); - add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX31_USB_OTG_BASE_ADDR, NULL); - add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX31_USB_HS2_BASE_ADDR, NULL); -#endif - armlinux_set_architecture(MACH_TYPE_PCM037); - - return 0; -} - -device_initcall(pcm037_devices_init); - -static unsigned int pcm037_iomux[] = { - /* UART1 */ - MX31_PIN_RXD1__RXD1, - MX31_PIN_TXD1__TXD1, - MX31_PIN_CTS1__CTS1, - MX31_PIN_RTS1__RTS1, - /* I2C */ - MX31_PIN_CSPI2_MOSI__SCL, - MX31_PIN_CSPI2_MISO__SDA, - MX31_PIN_CSPI2_SS2__I2C3_SDA, - MX31_PIN_CSPI2_SCLK__I2C3_SCL, - /* SDHC1 */ - MX31_PIN_SD1_DATA3__SD1_DATA3, - MX31_PIN_SD1_DATA2__SD1_DATA2, - MX31_PIN_SD1_DATA1__SD1_DATA1, - MX31_PIN_SD1_DATA0__SD1_DATA0, - MX31_PIN_SD1_CLK__SD1_CLK, - MX31_PIN_SD1_CMD__SD1_CMD, - IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */ - IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */ - /* SPI1 */ - MX31_PIN_CSPI1_MOSI__MOSI, - MX31_PIN_CSPI1_MISO__MISO, - MX31_PIN_CSPI1_SCLK__SCLK, - MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, - MX31_PIN_CSPI1_SS0__SS0, - MX31_PIN_CSPI1_SS1__SS1, - MX31_PIN_CSPI1_SS2__SS2, - /* UART2 */ - MX31_PIN_TXD2__TXD2, - MX31_PIN_RXD2__RXD2, - MX31_PIN_CTS2__CTS2, - MX31_PIN_RTS2__RTS2, - /* UART3 */ - MX31_PIN_CSPI3_MOSI__RXD3, - MX31_PIN_CSPI3_MISO__TXD3, - MX31_PIN_CSPI3_SCLK__RTS3, - MX31_PIN_CSPI3_SPI_RDY__CTS3, -}; - -static int imx31_console_init(void) -{ - imx_iomux_setup_multiple_pins(pcm037_iomux, ARRAY_SIZE(pcm037_iomux)); - - barebox_set_model("Phytec phyCORE-i.MX31"); - barebox_set_hostname("phycore-imx31"); - - imx31_add_uart0(); - return 0; -} - -console_initcall(imx31_console_init); diff --git a/arch/arm/boards/phytec-phycore-imx35/Makefile b/arch/arm/boards/phytec-phycore-imx35/Makefile deleted file mode 100644 index 5029714421..0000000000 --- a/arch/arm/boards/phytec-phycore-imx35/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Juergen Beisert <jbe@pengutronix.de> - -lwl-y += lowlevel.o -obj-y += pcm043.o diff --git a/arch/arm/boards/phytec-phycore-imx35/env/boot/nand-ubi b/arch/arm/boards/phytec-phycore-imx35/env/boot/nand-ubi deleted file mode 100644 index d555a538d1..0000000000 --- a/arch/arm/boards/phytec-phycore-imx35/env/boot/nand-ubi +++ /dev/null @@ -1,5 +0,0 @@ -#!/bin/sh - -global.bootm.image="/dev/nand0.kernel.bb" -#global.bootm.oftree="/env/oftree" -global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=nand0.root rootfstype=ubifs" diff --git a/arch/arm/boards/phytec-phycore-imx35/env/init/mtdparts-nand b/arch/arm/boards/phytec-phycore-imx35/env/init/mtdparts-nand deleted file mode 100644 index c7185db7f7..0000000000 --- a/arch/arm/boards/phytec-phycore-imx35/env/init/mtdparts-nand +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh - -mtdparts="512k(nand0.barebox),256k(nand0.bareboxenv),4M(nand0.kernel),-(nand0.root)" -kernelname="mxc_nand" - -mtdparts-add -b -d nand0 -k ${kernelname} -p ${mtdparts} diff --git a/arch/arm/boards/phytec-phycore-imx35/env/init/mtdparts-nor b/arch/arm/boards/phytec-phycore-imx35/env/init/mtdparts-nor deleted file mode 100644 index 09c3ba9842..0000000000 --- a/arch/arm/boards/phytec-phycore-imx35/env/init/mtdparts-nor +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh - -mtdparts="512k(nor0.barebox),128k(nor0.bareboxenv),4M(nor0.kernel),-(nor0.root)" -kernelname="physmap-flash.0" - -mtdparts-add -d nor0 -k ${kernelname} -p ${mtdparts} diff --git a/arch/arm/boards/phytec-phycore-imx35/flash-header.imxcfg b/arch/arm/boards/phytec-phycore-imx35/flash-header.imxcfg deleted file mode 100644 index 3d690e9732..0000000000 --- a/arch/arm/boards/phytec-phycore-imx35/flash-header.imxcfg +++ /dev/null @@ -1,39 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -soc imx35 -ivtofs 0x400 -loadaddr 0x80000000 -wm 32 0x53f80004 0x00821000 -wm 32 0x53f80004 0x00821000 - -wm 32 0x43fac794 0x00000800 -wm 32 0x43fac798 0x00000800 -wm 32 0x43fac79c 0x00000800 -wm 32 0x43fac7a0 0x00000800 -wm 32 0x43fac7a4 0x00000800 - -wm 32 0xb8001010 0x00000304 -wm 32 0xb8001004 0x0025541f -wm 32 0xb8001000 0x92220000 -wm 32 0x80000400 0x12345678 - -wm 32 0xb8001000 0xb8001000 -wm 8 0x84000000 0xda -wm 8 0x86000000 0xda -wm 8 0x82000400 0xda -wm 8 0x80000333 0xda - -wm 32 0xb8001000 0x92220000 -wm 32 0x80000400 0x12345678 - -wm 32 0xb8001000 0xa2220000 -wm 32 0x80000000 0x12344321 -wm 32 0x80000000 0x12344321 -wm 32 0xb8001000 0xb2220000 -wm 8 0x80000233 0xda -wm 8 0x82000780 0xda -wm 8 0x82000400 0xda -wm 32 0xb8001000 0x82220080 -wm 32 0xb8001000 0x82228080 -wm 32 0xb8001008 0x00002000 - diff --git a/arch/arm/boards/phytec-phycore-imx35/lowlevel.c b/arch/arm/boards/phytec-phycore-imx35/lowlevel.c deleted file mode 100644 index 73097eea10..0000000000 --- a/arch/arm/boards/phytec-phycore-imx35/lowlevel.c +++ /dev/null @@ -1,179 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - -#include <common.h> -#include <init.h> -#include <mach/imx35-regs.h> -#include <mach/imx-pll.h> -#include <mach/esdctl.h> -#include <asm/cache-l2x0.h> -#include <io.h> -#include <mach/imx-nand.h> -#include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <asm/sections.h> -#include <asm-generic/memory_layout.h> -#include <asm/system.h> - -#define IMX35_CHIP_REVISION_2_1 0x11 - -#define CCM_PDR0_399 0x00011000 -#define CCM_PDR0_532 0x00001000 - -void __bare_init __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) -{ - uint32_t r, s; - unsigned long ccm_base = MX35_CCM_BASE_ADDR; - unsigned long iomuxc_base = MX35_IOMUXC_BASE_ADDR; - unsigned long esdctl_base = MX35_ESDCTL_BASE_ADDR; - - arm_cpu_lowlevel_init(); - - arm_setup_stack(MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE); - - r = get_cr(); - r |= CR_Z; /* Flow prediction (Z) */ - r |= CR_U; /* unaligned accesses */ - r |= CR_FI; /* Low Int Latency */ - - __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(s)); - s |= 0x7; - __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1" : : "r"(s)); - - set_cr(r); - - r = 0; - __asm__ __volatile__("mcr p15, 0, %0, c15, c2, 4" : : "r"(r)); - - /* - * Branch predicition is now enabled. Flush the BTAC to ensure a valid - * starting point. Don't flush BTAC while it is disabled to avoid - * ARM1136 erratum 408023. - */ - __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 6" : : "r"(r)); - - /* invalidate I cache and D cache */ - __asm__ __volatile__("mcr p15, 0, %0, c7, c7, 0" : : "r"(r)); - - /* invalidate TLBs */ - __asm__ __volatile__("mcr p15, 0, %0, c8, c7, 0" : : "r"(r)); - - /* Drain the write buffer */ - __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" : : "r"(r)); - - /* Also setup the Peripheral Port Remap register inside the core */ - r = 0x40000015; /* start from AIPS 2GB region */ - __asm__ __volatile__("mcr p15, 0, %0, c15, c2, 4" : : "r"(r)); - - /* - * End of ARM1136 init - */ - - writel(0x003F4208, ccm_base + MX35_CCM_CCMR); - - /* Set MPLL , arm clock and ahb clock*/ - writel(MPCTL_PARAM_532, ccm_base + MX35_CCM_MPCTL); - - writel(PPCTL_PARAM_300, ccm_base + MX35_CCM_PPCTL); - - /* Check silicon revision and use 532MHz if >=2.1 */ - r = readl(MX35_IIM_BASE_ADDR + 0x24); - if (r >= IMX35_CHIP_REVISION_2_1) - writel(CCM_PDR0_532, ccm_base + MX35_CCM_PDR0); - else - writel(CCM_PDR0_399, ccm_base + MX35_CCM_PDR0); - - r = readl(ccm_base + MX35_CCM_CGR0); - r |= 0x3 << MX35_CCM_CGR0_EPIT1_SHIFT; - writel(r, ccm_base + MX35_CCM_CGR0); - - r = readl(ccm_base + MX35_CCM_CGR1); - r |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; - r |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; - writel(r, ccm_base + MX35_CCM_CGR1); - - r = readl(MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); - r |= 0x1000; - writel(r, MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); - - /* Skip SDRAM initialization if we run from RAM */ - r = get_pc(); - if (r > 0x80000000 && r < 0x90000000) - goto out; - - /* Set DDR Type to SDRAM, drive strength workaround * - * 0x00000000 MDDR * - * 0x00000800 3,3V SDRAM */ - - r = 0x00000800; - writel(r, iomuxc_base + 0x794); - writel(r, iomuxc_base + 0x798); - writel(r, iomuxc_base + 0x79c); - writel(r, iomuxc_base + 0x7a0); - writel(r, iomuxc_base + 0x7a4); - - /* MDDR init, enable mDDR*/ - writel(0x00000304, esdctl_base + IMX_ESDMISC); /* was 0x00000004 */ - - /* set timing paramters */ - writel(0x0025541F, esdctl_base + IMX_ESDCFG0); - /* select Precharge-All mode */ - writel(0x92220000, esdctl_base + IMX_ESDCTL0); - /* Precharge-All */ - writel(0x12345678, MX35_CSD0_BASE_ADDR + 0x400); - - /* select Load-Mode-Register mode */ - writel(0xB8001000, esdctl_base + IMX_ESDCTL0); - /* Load reg EMR2 */ - writeb(0xda, 0x84000000); - /* Load reg EMR3 */ - writeb(0xda, 0x86000000); - /* Load reg EMR1 -- enable DLL */ - writeb(0xda, 0x82000400); - /* Load reg MR -- reset DLL */ - writeb(0xda, 0x80000333); - - /* select Precharge-All mode */ - writel(0x92220000, esdctl_base + IMX_ESDCTL0); - /* Precharge-All */ - writel(0x12345678, MX35_CSD0_BASE_ADDR + 0x400); - - /* select Manual-Refresh mode */ - writel(0xA2220000, esdctl_base + IMX_ESDCTL0); - /* Manual-Refresh 2 times */ - writel(0x87654321, MX35_CSD0_BASE_ADDR); - writel(0x87654321, MX35_CSD0_BASE_ADDR); - - /* select Load-Mode-Register mode */ - writel(0xB2220000, esdctl_base + IMX_ESDCTL0); - /* Load reg MR -- CL3, BL8, end DLL reset */ - writeb(0xda, 0x80000233); - /* Load reg EMR1 -- OCD default */ - writeb(0xda, 0x82000780); - /* Load reg EMR1 -- OCD exit */ - writeb(0xda, 0x82000400); - - /* select normal-operation mode - * DSIZ32-bit, BL8, COL10-bit, ROW13-bit - * disable PWT & PRCT - * disable Auto-Refresh */ - writel(0x82220080, esdctl_base + IMX_ESDCTL0); - - /* enable Auto-Refresh */ - writel(0x82228080, esdctl_base + IMX_ESDCTL0); - /* enable Auto-Refresh */ - writel(0x00002000, esdctl_base + IMX_ESDCTL1); - - if (IS_ENABLED(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND)) { - /* Speed up NAND controller by adjusting the NFC divider */ - r = readl(MX35_CCM_BASE_ADDR + MX35_CCM_PDR4); - r &= ~(0xf << 28); - r |= 0x1 << 28; - writel(r, MX35_CCM_BASE_ADDR + MX35_CCM_PDR4); - - imx35_barebox_boot_nand_external(); - } - -out: - imx35_barebox_entry(NULL); -} diff --git a/arch/arm/boards/phytec-phycore-imx35/pcm043.c b/arch/arm/boards/phytec-phycore-imx35/pcm043.c deleted file mode 100644 index 360a607bd5..0000000000 --- a/arch/arm/boards/phytec-phycore-imx35/pcm043.c +++ /dev/null @@ -1,314 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix -// SPDX-FileCopyrightText: 2009 Juergen Beisert <kernel@pengutronix.de>, Pengutronix - -/* Board support for Phytec's, i.MX35 based CPU card, called: PCM043 */ - -#include <common.h> -#include <command.h> -#include <init.h> -#include <driver.h> -#include <environment.h> -#include <fs.h> -#include <gpio.h> -#include <linux/sizes.h> -#include <mach/imx35-regs.h> -#include <asm/armlinux.h> -#include <io.h> -#include <partition.h> -#include <nand.h> -#include <generated/mach-types.h> -#include <mach/imx-nand.h> -#include <fb.h> -#include <led.h> -#include <bootsource.h> -#include <asm/mmu.h> -#include <mach/weim.h> -#include <mach/imx-ipu-fb.h> -#include <mach/imx-pll.h> -#include <mach/iomux-mx35.h> -#include <mach/devices-imx35.h> -#include <mach/generic.h> -#include <mach/bbu.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_MII, -}; - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, - .flash_bbt = 1, -}; - -static struct fb_videomode pcm043_fb_mode[] = { - { - /* 240x320 @ 60 Hz */ - .name = "TX090", - .refresh = 60, - .xres = 240, - .yres = 320, - .pixclock = 38255, - .left_margin = 144, - .right_margin = 0, - .upper_margin = 7, - .lower_margin = 40, - .hsync_len = 96, - .vsync_len = 1, - .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH, - .vmode = FB_VMODE_NONINTERLACED, - }, { - /* 240x320 @ 60 Hz */ - .name = "Sharp-LQ035Q7", - .refresh = 60, - .xres = 240, - .yres = 320, - .pixclock = 185925, - .left_margin = 9, - .right_margin = 16, - .upper_margin = 7, - .lower_margin = 9, - .hsync_len = 1, - .vsync_len = 1, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | \ - FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN, - .vmode = FB_VMODE_NONINTERLACED, - } -}; - -static struct imx_ipu_fb_platform_data ipu_fb_data = { - .mode = pcm043_fb_mode, - .num_modes = ARRAY_SIZE(pcm043_fb_mode), - .framebuffer_ovl = (void *) (MX35_CSD0_BASE_ADDR + SZ_128M - SZ_1M), - .bpp = 16, -}; - -static int pcm043_mmu_init(void) -{ - l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000); - - return 0; -} -postmmu_initcall(pcm043_mmu_init); - -struct gpio_led led0 = { - .gpio = 1 * 32 + 6, -}; - -static int pcm043_devices_init(void) -{ - uint32_t reg; - char *envstr; - unsigned long bbu_nand_flags = 0; - - /* CS0: Nor Flash */ - imx35_setup_weimcs(5, 0x22C0CF00, 0x75000D01, 0x00000900); - - led_gpio_register(&led0); - - reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_RCSR); - /* some fuses provide us vital information about connected hardware */ - if (reg & 0x20000000) - nand_info.width = 2; /* 16 bit */ - else - nand_info.width = 1; /* 8 bit */ - - imx35_add_fec(&fec_info); - /* - * This platform supports NOR and NAND - */ - imx35_add_nand(&nand_info); - /* - * Up to 32MiB NOR type flash, connected to - * CS line 0, data width is 16 bit - */ - add_cfi_flash_device(DEVICE_ID_DYNAMIC, MX35_CS0_BASE_ADDR, 32 * 1024 * 1024, 0); - - switch (bootsource_get()) { - case BOOTSOURCE_NAND: - devfs_add_partition("nand0", 0x00000, SZ_512K, DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - devfs_add_partition("nand0", SZ_512K, SZ_256K, DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); - envstr = "NAND"; - bbu_nand_flags = BBU_HANDLER_FLAG_DEFAULT; - break; - case BOOTSOURCE_NOR: - default: - devfs_add_partition("nor0", 0x00000, SZ_512K, DEVFS_PARTITION_FIXED, "self0"); /* ourself */ - devfs_add_partition("nor0", SZ_512K, SZ_128K, DEVFS_PARTITION_FIXED, "env0"); /* environment */ - protect_file("/dev/env0", 1); - envstr = "NOR"; - break; - } - - pr_info("using environment from %s flash\n", envstr); - - imx35_add_fb(&ipu_fb_data); - - armlinux_set_architecture(MACH_TYPE_PCM043); - - imx_bbu_external_nand_register_handler("nand", "/dev/nand0.barebox", - bbu_nand_flags); - - return 0; -} - -device_initcall(pcm043_devices_init); - -static iomux_v3_cfg_t pcm043_pads[] = { - MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, - MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, - MX35_PAD_FEC_RX_DV__FEC_RX_DV, - MX35_PAD_FEC_COL__FEC_COL, - MX35_PAD_FEC_RDATA0__FEC_RDATA_0, - MX35_PAD_FEC_TDATA0__FEC_TDATA_0, - MX35_PAD_FEC_TX_EN__FEC_TX_EN, - MX35_PAD_FEC_MDC__FEC_MDC, - MX35_PAD_FEC_MDIO__FEC_MDIO, - MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, - MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, - MX35_PAD_FEC_CRS__FEC_CRS, - MX35_PAD_FEC_RDATA0__FEC_RDATA_0, - MX35_PAD_FEC_TDATA0__FEC_TDATA_0, - MX35_PAD_FEC_RDATA1__FEC_RDATA_1, - MX35_PAD_FEC_TDATA1__FEC_TDATA_1, - MX35_PAD_FEC_RDATA2__FEC_RDATA_2, - MX35_PAD_FEC_TDATA2__FEC_TDATA_2, - MX35_PAD_FEC_RDATA3__FEC_RDATA_3, - MX35_PAD_FEC_TDATA3__FEC_TDATA_3, - MX35_PAD_RXD1__UART1_RXD_MUX, - MX35_PAD_TXD1__UART1_TXD_MUX, - MX35_PAD_RTS1__UART1_RTS, - MX35_PAD_CTS1__UART1_CTS, - MX35_PAD_I2C1_CLK__I2C1_SCL, - MX35_PAD_I2C1_DAT__I2C1_SDA, - MX35_PAD_ATA_CS0__GPIO2_6, /* LED */ -}; - -static int imx35_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); - - barebox_set_model("Phytec phyCORE-i.MX35"); - barebox_set_hostname("phycore-imx35"); - - imx35_add_uart0(); - - return 0; -} - -console_initcall(imx35_console_init); - -static int pcm043_core_setup(void) -{ - u32 tmp; - - /* AIPS setup - Only setup MPROTx registers. The PACR default values are good.*/ - /* - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - writel(0x77777777, MX35_AIPS1_BASE_ADDR); - writel(0x77777777, MX35_AIPS1_BASE_ADDR + 0x4); - writel(0x77777777, MX35_AIPS2_BASE_ADDR); - writel(0x77777777, MX35_AIPS2_BASE_ADDR + 0x4); - - /* - * Clear the on and off peripheral modules Supervisor Protect bit - * for SDMA to access them. Did not change the AIPS control registers - * (offset 0x20) access type - */ - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x4C); - tmp = readl(MX35_AIPS1_BASE_ADDR + 0x50); - tmp &= 0x00FFFFFF; - writel(tmp, MX35_AIPS1_BASE_ADDR + 0x50); - - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x4C); - tmp = readl(MX35_AIPS2_BASE_ADDR + 0x50); - tmp &= 0x00FFFFFF; - writel(tmp, MX35_AIPS2_BASE_ADDR + 0x50); - - /* MAX (Multi-Layer AHB Crossbar Switch) setup */ - - /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ -#define MAX_PARAM1 0x00302154 - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x0); /* for S0 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x100); /* for S1 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x200); /* for S2 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x300); /* for S3 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x400); /* for S4 */ - - /* SGPCR - always park on last master */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x10); /* for S0 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x110); /* for S1 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x210); /* for S2 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x310); /* for S3 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x410); /* for S4 */ - - /* MGPCR - restore default values */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x800); /* for M0 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x900); /* for M1 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xa00); /* for M2 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xb00); /* for M3 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xc00); /* for M4 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xd00); /* for M5 */ - - /* - * M3IF Control Register (M3IFCTL) - * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 - * MRRP[1] = MAX1 not on priority list (0 << 0) = 0x00000000 - * MRRP[2] = L2CC1 not on priority list (0 << 0) = 0x00000000 - * MRRP[3] = USB not on priority list (0 << 0) = 0x00000000 - * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 - * MRRP[5] = GPU not on priority list (0 << 0) = 0x00000000 - * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 - * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 - * ------------ - * 0x00000040 - */ - writel(0x40, MX35_M3IF_BASE_ADDR); - - return 0; -} - -core_initcall(pcm043_core_setup); - -static int do_cpufreq(int argc, char *argv[]) -{ - unsigned long freq; - - if (argc != 2) - return COMMAND_ERROR_USAGE; - - freq = simple_strtoul(argv[1], NULL, 0); - - switch (freq) { - case 399: - writel(MPCTL_PARAM_399, MX35_CCM_BASE_ADDR + MX35_CCM_MPCTL); - break; - case 532: - writel(MPCTL_PARAM_532, MX35_CCM_BASE_ADDR + MX35_CCM_MPCTL); - break; - default: - return COMMAND_ERROR_USAGE; - } - - printf("Switched CPU frequency to %luMHz\n", freq); - - return 0; -} - -BAREBOX_CMD_START(cpufreq) - .cmd = do_cpufreq, - BAREBOX_CMD_DESC("adjust CPU frequency") - BAREBOX_CMD_OPTS("399|532") - BAREBOX_CMD_GROUP(CMD_GRP_HWMANIP) -BAREBOX_CMD_END - diff --git a/arch/arm/boards/phytec-phycore-imx7/board.c b/arch/arm/boards/phytec-phycore-imx7/board.c index f173ee233f..4d8b938f17 100644 --- a/arch/arm/boards/phytec-phycore-imx7/board.c +++ b/arch/arm/boards/phytec-phycore-imx7/board.c @@ -4,15 +4,14 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> -#include <mach/generic.h> +#include <asm/mach-types.h> +#include <mach/imx/generic.h> #include <linux/sizes.h> #include <asm/psci.h> #include <io.h> -#include <mach/imx7-regs.h> +#include <mach/imx/imx7-regs.h> #include <serial/imx-uart.h> #include <asm/secure.h> diff --git a/arch/arm/boards/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg b/arch/arm/boards/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg index a18f3dbed1..03cdbe8bc8 100644 --- a/arch/arm/boards/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg +++ b/arch/arm/boards/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg @@ -13,7 +13,7 @@ soc imx7 loadaddr 0x80000000 ivtofs 0x400 -#include <mach/imx7-ddr-regs.h> +#include <mach/imx/imx7-ddr-regs.h> wm 32 0x30340004 0x4F400005 /* Clear then set bit30 to ensure exit from DDR retention */ diff --git a/arch/arm/boards/phytec-phycore-imx7/lowlevel.c b/arch/arm/boards/phytec-phycore-imx7/lowlevel.c index f8dcb3ce54..1f3c08ac62 100644 --- a/arch/arm/boards/phytec-phycore-imx7/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-imx7/lowlevel.c @@ -4,10 +4,10 @@ #include <io.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/debug_ll.h> +#include <mach/imx/debug_ll.h> #include <asm/cache.h> extern char __dtb_imx7d_phyboard_zeta_start[]; diff --git a/arch/arm/boards/phytec-phycore-omap4460/board.c b/arch/arm/boards/phytec-phycore-omap4460/board.c index e25ff5eb31..2a176f156e 100644 --- a/arch/arm/boards/phytec-phycore-omap4460/board.c +++ b/arch/arm/boards/phytec-phycore-omap4460/board.c @@ -9,22 +9,21 @@ #include <io.h> #include <envfs.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <mach/devices.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-devices.h> -#include <mach/omap4-clock.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/control.h> +#include <asm/mach-types.h> +#include <mach/omap/devices.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-devices.h> +#include <mach/omap/omap4-clock.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/control.h> #include <linux/err.h> #include <linux/sizes.h> -#include <partition.h> #include <nand.h> #include <asm/mmu.h> -#include <mach/gpmc.h> -#include <mach/gpmc_nand.h> +#include <mach/omap/gpmc.h> +#include <mach/omap/gpmc_nand.h> #include <i2c/i2c.h> static int pcm049_console_init(void) diff --git a/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c b/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c index 2a65e40e6b..17194c6562 100644 --- a/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c @@ -5,12 +5,12 @@ #include <init.h> #include <io.h> #include <linux/sizes.h> -#include <mach/generic.h> -#include <mach/omap4-mux.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-generic.h> -#include <mach/omap4-clock.h> -#include <mach/syslib.h> +#include <mach/omap/generic.h> +#include <mach/omap/omap4-mux.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-generic.h> +#include <mach/omap/omap4-clock.h> +#include <mach/omap/syslib.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/phytec-phycore-omap4460/mux.c b/arch/arm/boards/phytec-phycore-omap4460/mux.c index 9cd10e06f8..287c2a4826 100644 --- a/arch/arm/boards/phytec-phycore-omap4460/mux.c +++ b/arch/arm/boards/phytec-phycore-omap4460/mux.c @@ -3,9 +3,9 @@ #include <common.h> #include <init.h> #include <io.h> -#include <mach/omap4-silicon.h> -#include <mach/omap4-mux.h> -#include <mach/omap4-clock.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/omap4-mux.h> +#include <mach/omap/omap4-clock.h> #include "mux.h" diff --git a/arch/arm/boards/phytec-phycore-pxa270/board.c b/arch/arm/boards/phytec-phycore-pxa270/board.c index 9740a3a7af..0283659a4e 100644 --- a/arch/arm/boards/phytec-phycore-pxa270/board.c +++ b/arch/arm/boards/phytec-phycore-pxa270/board.c @@ -7,18 +7,17 @@ #include <environment.h> #include <fs.h> #include <init.h> -#include <partition.h> #include <linux/sizes.h> #include <gpio.h> -#include <mach/mfp-pxa27x.h> -#include <mach/pxa-regs.h> -#include <mach/pxafb.h> -#include <mach/devices.h> +#include <mach/pxa/mfp-pxa27x.h> +#include <mach/pxa/pxa-regs.h> +#include <mach/pxa/pxafb.h> +#include <mach/pxa/devices.h> #include <asm/armlinux.h> #include <asm/io.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <asm/mmu.h> #define PCM990_CTRL_PHYS (void *)PXA_CS1_PHYS diff --git a/arch/arm/boards/phytec-phycore-pxa270/lowlevel_init.S b/arch/arm/boards/phytec-phycore-pxa270/lowlevel_init.S index 9c6366cc2a..f8f1a037e0 100644 --- a/arch/arm/boards/phytec-phycore-pxa270/lowlevel_init.S +++ b/arch/arm/boards/phytec-phycore-pxa270/lowlevel_init.S @@ -13,10 +13,11 @@ #include <config.h> #include <linux/sizes.h> -#include <mach/pxa-regs.h> -#include <mach/regs-ost.h> -#include <mach/regs-intc.h> +#include <mach/pxa/pxa-regs.h> +#include <mach/pxa/regs-ost.h> +#include <mach/pxa/regs-intc.h> #include <asm/barebox-arm-head.h> +#include "config.h" #define GPSR0 0x40E00018 /* GPIO Pin Output Set Register GPIO <31:00> */ #define GPSR1 0x40E0001C /* GPIO Pin Output Set Register GPIO <63:32> */ diff --git a/arch/arm/boards/phytec-phycore-stm32mp1/board.c b/arch/arm/boards/phytec-phycore-stm32mp1/board.c index eb6147785f..6690e36ca7 100644 --- a/arch/arm/boards/phytec-phycore-stm32mp1/board.c +++ b/arch/arm/boards/phytec-phycore-stm32mp1/board.c @@ -2,13 +2,22 @@ #include <common.h> #include <driver.h> #include <bootsource.h> +#include <mach/stm32mp/bbu.h> -static int phycore_stm32mp1_probe(struct device_d *dev) +static int phycore_stm32mp1_probe(struct device *dev) { - if (bootsource_get_instance() == 0) + int sd_bbu_flags = 0, emmc_bbu_flags = 0; + + if (bootsource_get_instance() == 0) { of_device_enable_path("/chosen/environment-sd"); - else + sd_bbu_flags = BBU_HANDLER_FLAG_DEFAULT; + } else { of_device_enable_path("/chosen/environment-emmc"); + emmc_bbu_flags = BBU_HANDLER_FLAG_DEFAULT; + } + + stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", sd_bbu_flags); + stm32mp_bbu_mmc_fip_register("emmc", "/dev/mmc1", emmc_bbu_flags); barebox_set_hostname("phyCORE-STM32MP1"); @@ -19,8 +28,9 @@ static const struct of_device_id phycore_stm32mp1_of_match[] = { { .compatible = "phytec,phycore-stm32mp1-3" }, { /* sentinel */ }, }; +MODULE_DEVICE_TABLE(of, phycore_stm32mp1_of_match); -static struct driver_d phycore_stm32mp1_board_driver = { +static struct driver phycore_stm32mp1_board_driver = { .name = "board-phycore-stm32mp1", .probe = phycore_stm32mp1_probe, .of_compatible = phycore_stm32mp1_of_match, diff --git a/arch/arm/boards/phytec-phycore-stm32mp1/lowlevel.c b/arch/arm/boards/phytec-phycore-stm32mp1/lowlevel.c index f76bad86a1..8174e060af 100644 --- a/arch/arm/boards/phytec-phycore-stm32mp1/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-stm32mp1/lowlevel.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ #include <common.h> -#include <mach/entry.h> +#include <mach/stm32mp/entry.h> #include <debug_ll.h> extern char __dtb_z_stm32mp157c_phycore_stm32mp1_3_start[]; diff --git a/arch/arm/boards/phytec-som-am335x/board.c b/arch/arm/boards/phytec-som-am335x/board.c index 11acd06c53..f3caa5d50a 100644 --- a/arch/arm/boards/phytec-som-am335x/board.c +++ b/arch/arm/boards/phytec-som-am335x/board.c @@ -18,12 +18,12 @@ #include <envfs.h> #include <state.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <linux/phy.h> #include <linux/micrel_phy.h> -#include <mach/am33xx-generic.h> -#include <mach/am33xx-silicon.h> -#include <mach/bbu.h> +#include <mach/omap/am33xx-generic.h> +#include <mach/omap/am33xx-silicon.h> +#include <mach/omap/bbu.h> static int physom_coredevice_init(void) { diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c index 8e506bc4ed..267f30b638 100644 --- a/arch/arm/boards/phytec-som-am335x/lowlevel.c +++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c @@ -7,15 +7,16 @@ #include <init.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/am33xx-silicon.h> -#include <mach/am33xx-clock.h> -#include <mach/generic.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/am33xx-mux.h> -#include <mach/am33xx-generic.h> +#include <mach/omap/am33xx-silicon.h> +#include <mach/omap/am33xx-clock.h> +#include <mach/omap/generic.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/am33xx-mux.h> +#include <mach/omap/am33xx-generic.h> #include <debug_ll.h> +#include <mach/omap/debug_ll.h> #include "ram-timings.h" @@ -163,7 +164,7 @@ static noinline void physom_board_init(void *fdt, int sdram, int module_family) am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE); am33xx_enable_uart0_pin_mux(); - omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE); + omap_debug_ll_init(); putc_ll('>'); am335x_barebox_entry(fdt); diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c index c540aaeb3f..2db3fa1db8 100644 --- a/arch/arm/boards/phytec-som-imx6/board.c +++ b/arch/arm/boards/phytec-som-imx6/board.c @@ -16,15 +16,15 @@ #include <of.h> #include <deep-probe.h> #include <i2c/i2c.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <platform_data/eth-fec.h> #include <mfd/imx6q-iomuxc-gpr.h> #include <linux/micrel_phy.h> #include <globalvar.h> -#include <mach/iomux-mx6.h> -#include <mach/imx6.h> +#include <mach/imx/iomux-mx6.h> +#include <mach/imx/imx6.h> #define PHYFLEX_MODULE_REV_1 0x1 #define PHYFLEX_MODULE_REV_2 0x2 @@ -157,7 +157,7 @@ struct board_data { unsigned flags; }; -static int physom_imx6_probe(struct device_d *dev) +static int physom_imx6_probe(struct device *dev) { int ret; char *environment_path, *default_environment_path; @@ -231,7 +231,7 @@ static int physom_imx6_probe(struct device_d *dev) envdev = "SPI NOR flash"; break; default: - environment_path = basprintf(default_environment_path); + environment_path = strdup(default_environment_path); envdev = default_envdev; break; } @@ -360,7 +360,7 @@ static const struct of_device_id physom_imx6_match[] = { { /* Sentinel */ }, }; -static struct driver_d physom_imx6_driver = { +static struct driver physom_imx6_driver = { .name = "physom-imx6", .probe = physom_imx6_probe, .of_compatible = physom_imx6_match, diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg index d124518930..3b3e290fbe 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg @@ -9,4 +9,4 @@ wm 32 0x021b0000 0x831a0000 #include "flash-header-phytec-pcaaxl3.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg index 4c3e5b06c9..4c8c527043 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg @@ -9,4 +9,4 @@ wm 32 0x021b0000 0xc21a0000 #include "flash-header-phytec-pcaaxl3.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg index bb858e874d..a2f932e12a 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg @@ -9,4 +9,4 @@ wm 32 0x021b0000 0xc31a0000 #include "flash-header-phytec-pcaaxl3.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3.h index 3d1952fb99..c6cd180176 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3.h +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3.h @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x10000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_DRAM_SDQS0 0x00000028 wm 32 MX6_IOM_DRAM_SDQS1 0x00000028 diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ul-512mb.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ul-512mb.imxcfg index 225f8a32aa..1a987c2c1f 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ul-512mb.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ul-512mb.imxcfg @@ -1,4 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include "flash-header-phytec-pcl063-512mb.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ull-256mb.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ull-256mb.imxcfg index 44f1036032..f519abf1a0 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ull-256mb.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ull-256mb.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021B0000 0x83180000 #include "flash-header-phytec-pcl063.h" -#include <mach/habv4-imx6ull-gencsf.h> +#include <mach/imx/habv4-imx6ull-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ull-512mb.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ull-512mb.imxcfg index e976979118..6935bd2ef3 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ull-512mb.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063ull-512mb.imxcfg @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only #include "flash-header-phytec-pcl063-512mb.h" -#include <mach/habv4-imx6ull-gencsf.h> +#include <mach/imx/habv4-imx6ull-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg index b2ea8ee0e8..131e08cf4b 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x831A0000 #include "flash-header-phytec-pcm058.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg index f6895a0587..be638ab1c1 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x841A0000 #include "flash-header-phytec-pcm058.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058.h index d213403467..eaa2a3da6e 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058.h +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058.h @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x10000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000C0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg index ec5beb937c..83f8480bfe 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x84190000 #include "flash-header-phytec-pcm058dl.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib.imxcfg index a5b3cdc633..708e5bb21d 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x831A0000 #include "flash-header-phytec-pcm058dl.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg index 26755f946a..be3cd5a20d 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg @@ -8,5 +8,5 @@ wm 32 0x021b0000 0x82190000 #include "flash-header-phytec-pcm058dl.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-512mb.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-512mb.imxcfg index cd1d2d185e..4fcf36990d 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-512mb.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-512mb.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x83190000 #include "flash-header-phytec-pcm058dl.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl.h index 94ca4bcc0e..2d90faad4c 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl.h +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl.h @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x10000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000C0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg index 0d2d245fc2..e15d220428 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x831A0000 #include "flash-header-phytec-pcm058qp.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg index 77ef6358ec..48b1321b51 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x831a0000 #include "flash-header-phytec-pfla02.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg index dd222ed7a1..8bd6a83786 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0xc21a0000 #include "flash-header-phytec-pfla02.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-2gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-2gib.imxcfg index de5aab6242..fe2fa2c637 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-2gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-2gib.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0xC31A0000 #include "flash-header-phytec-pfla02.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-4gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-4gib.imxcfg index c3819e958f..6f8645c4e6 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-4gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-4gib.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0xC41A0000 #include "flash-header-phytec-pfla02.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg index 08d579241e..edafe2d47c 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x821a0000 #include "flash-header-phytec-pfla02.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02.h index 9984117844..26a9341dda 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02.h +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02.h @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x10000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000C0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg index c851cc2844..553ba8d40a 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x831a0000 #include "flash-header-phytec-pfla02dl.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg index 7276adad60..5c37061853 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0xc21a0000 #include "flash-header-phytec-pfla02dl.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h index 48d2001fb2..537a93eda9 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x10000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000C0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg index d450ec1efd..331692af49 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x82180000 #include "flash-header-phytec-pfla02dl.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg index 7f1535d0e0..bd830865ec 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x82190000 #include "flash-header-phytec-pfla02dl.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg index b6fd2db254..7e57e7cd9e 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg @@ -8,4 +8,4 @@ wm 32 0x021b0000 0x83190000 #include "flash-header-phytec-pfla02dl.h" -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index 62a1c8de73..da5665a716 100644 --- a/arch/arm/boards/phytec-som-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -6,6 +6,7 @@ * Author: Stefan Christ <s.christ@phytec.de> */ #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <linux/sizes.h> #include <io.h> @@ -15,7 +16,7 @@ #include <asm/sections.h> #include <asm/cache.h> #include <asm/mmu.h> -#include <mach/imx6.h> +#include <mach/imx/imx6.h> static inline void setup_uart(void) { @@ -75,7 +76,6 @@ static void __noreturn start_imx6_phytec_common(uint32_t size, extern char __dtb_##fdt_name##_start[]; \ \ IMD_USED(physom_mx6_memsize_##memory_size); \ - IMD_USED_OF(fdt_name); \ \ start_imx6_phytec_common(memory_size, do_early_uart_config, \ __dtb_##fdt_name##_start); \ diff --git a/arch/arm/boards/phytec-som-imx8mm/Makefile b/arch/arm/boards/phytec-som-imx8mm/Makefile new file mode 100644 index 0000000000..10abebc539 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx8mm/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +lwl-y += lowlevel.o lpddr4-timing.o +obj-y += board.o diff --git a/arch/arm/boards/phytec-som-imx8mm/board.c b/arch/arm/boards/phytec-som-imx8mm/board.c new file mode 100644 index 0000000000..52f821f5fa --- /dev/null +++ b/arch/arm/boards/phytec-som-imx8mm/board.c @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +// SPDX-FileCopyrightText: 2022 Ahmad Fatoum, Pengutronix + +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <init.h> +#include <mach/imx/bbu.h> + +static int phyboard_polis_rdk_probe(struct device *dev) +{ + int emmc_bbu_flag = 0; + int sd_bbu_flag = 0; + + if (bootsource_get() == BOOTSOURCE_MMC && bootsource_get_instance() == 1) { + of_device_enable_path("/chosen/environment-sd"); + sd_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } else { + of_device_enable_path("/chosen/environment-emmc"); + emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } + + imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); + + return 0; +} + +static const struct of_device_id phyboard_polis_rdk_of_match[] = { + { .compatible = "phytec,imx8mm-phyboard-polis-rdk" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(phyboard_polis_rdk_of_match); + +static struct driver phyboard_polis_rdkboard_driver = { + .name = "board-phyboard-polis-rdk", + .probe = phyboard_polis_rdk_probe, + .of_compatible = DRV_OF_COMPAT(phyboard_polis_rdk_of_match), +}; +coredevice_platform_driver(phyboard_polis_rdkboard_driver); diff --git a/arch/arm/boards/phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk.imxcfg b/arch/arm/boards/phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk.imxcfg new file mode 100644 index 0000000000..8aff991618 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk.imxcfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-only + +soc imx8mm + +loadaddr 0x007e1000 +max_load_size 0x3f000 +ivtofs 0x400 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx8mm/lowlevel.c b/arch/arm/boards/phytec-som-imx8mm/lowlevel.c new file mode 100644 index 0000000000..26f0f4d3e1 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx8mm/lowlevel.c @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <asm/barebox-arm.h> +#include <boards/phytec/phytec-som-imx8m-detection.h> +#include <common.h> +#include <debug_ll.h> +#include <mach/imx/atf.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/iomux-mx8mm.h> +#include <mach/imx/xload.h> +#include <mfd/bd71837.h> +#include <pbl/i2c.h> +#include <pbl/pmic.h> +#include <soc/imx8m/ddr.h> + +#include "lowlevel.h" + +extern char __dtb_z_imx8mm_phyboard_polis_rdk_start[]; + +#define UART_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_DSE_3P3V_45_OHM) + +static void setup_uart(void) +{ + void __iomem *uart = IOMEM(MX8M_UART3_BASE_ADDR); + + imx8m_early_setup_uart_clock(); + + imx8mm_setup_pad(IMX8MM_PAD_UART3_TXD_UART3_TX | UART_PAD_CTRL); + imx8m_uart_setup(uart); + + pbl_set_putc(imx_uart_putc, uart); + putc_ll('>'); +} + +#define EEPROM_ADDR 0x51 +#define EEPROM_ADDR_FALLBACK 0x59 + +static void phyboard_polis_rdk_ddr_init(enum phytec_imx8m_ddr_size size) +{ + int ret; + + if (size == PHYTEC_IMX8M_DDR_AUTODETECT) { + struct pbl_i2c *i2c; + + imx8mm_setup_pad(IMX8MM_PAD_I2C1_SCL_I2C1_SCL); + imx8mm_setup_pad(IMX8MM_PAD_I2C1_SDA_I2C1_SDA); + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); + i2c = imx8m_i2c_early_init(IOMEM(MX8MM_I2C1_BASE_ADDR)); + + ret = phytec_eeprom_data_setup(i2c, NULL, EEPROM_ADDR, + EEPROM_ADDR_FALLBACK, IMX_CPU_IMX8MM); + if (ret) { + pr_err("Could not detect correct RAM size. Fallback to default.\n"); + } else { + phytec_print_som_info(NULL); + size = phytec_get_imx8m_ddr_size(NULL); + } + } + + switch (size) { + case PHYTEC_IMX8M_DDR_1G: + phyboard_polis_rdk_dram_timing.ddrc_cfg[5].val = 0x2d0087; + phyboard_polis_rdk_dram_timing.ddrc_cfg[21].val = 0x8d; + phyboard_polis_rdk_dram_timing.ddrc_cfg[42].val = 0xf070707; + phyboard_polis_rdk_dram_timing.ddrc_cfg[58].val = 0x60012; + phyboard_polis_rdk_dram_timing.ddrc_cfg[73].val = 0x13; + phyboard_polis_rdk_dram_timing.ddrc_cfg[83].val = 0x30005; + phyboard_polis_rdk_dram_timing.ddrc_cfg[98].val = 0x5; + break; + default: + case PHYTEC_IMX8M_DDR_AUTODETECT: + case PHYTEC_IMX8M_DDR_2G: + break; + case PHYTEC_IMX8M_DDR_4G: + phyboard_polis_rdk_dram_timing.ddrc_cfg[2].val = 0xa3080020; + phyboard_polis_rdk_dram_timing.ddrc_cfg[37].val = 0x17; + phyboard_polis_rdk_dram_timing.fsp_msg[0].fsp_cfg[8].val = 0x310; + phyboard_polis_rdk_dram_timing.fsp_msg[0].fsp_cfg[20].val = 0x3; + phyboard_polis_rdk_dram_timing.fsp_msg[1].fsp_cfg[9].val = 0x310; + phyboard_polis_rdk_dram_timing.fsp_msg[1].fsp_cfg[21].val = 0x3; + phyboard_polis_rdk_dram_timing.fsp_msg[2].fsp_cfg[9].val = 0x310; + phyboard_polis_rdk_dram_timing.fsp_msg[2].fsp_cfg[21].val = 0x3; + phyboard_polis_rdk_dram_timing.fsp_msg[3].fsp_cfg[10].val = 0x310; + phyboard_polis_rdk_dram_timing.fsp_msg[3].fsp_cfg[22].val = 0x3; + break; + } + + imx8mm_ddr_init(&phyboard_polis_rdk_dram_timing, DRAM_TYPE_LPDDR4); +} + +static void start_phyboard_polis_rdk_common(enum phytec_imx8m_ddr_size size) +{ + imx8mm_cpu_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + setup_uart(); + + /* + * If we are in EL3 we are running for the first time out of OCRAM, + * we'll need to initialize the DRAM and run TF-A (BL31). The TF-A + * will then jump to DRAM in EL2 + */ + if (current_el() == 3) { + imx8mm_early_clock_init(); + + phyboard_polis_rdk_ddr_init(size); + + imx8mm_load_and_start_image_via_tfa(); + } + + /* Standard entry we hit once we initialized both DDR and ATF */ + imx8mm_barebox_entry(__dtb_z_imx8mm_phyboard_polis_rdk_start); +} + +ENTRY_FUNCTION(start_phyboard_polis_rdk_ddr_autodetect, r0, r1, r2) +{ + start_phyboard_polis_rdk_common(PHYTEC_IMX8M_DDR_AUTODETECT); +} + +ENTRY_FUNCTION(start_phyboard_polis_rdk_ddr_1g, r0, r1, r2) +{ + start_phyboard_polis_rdk_common(PHYTEC_IMX8M_DDR_1G); +} + +ENTRY_FUNCTION(start_phyboard_polis_rdk_ddr_2g, r0, r1, r2) +{ + start_phyboard_polis_rdk_common(PHYTEC_IMX8M_DDR_1G); +} + +ENTRY_FUNCTION(start_phyboard_polis_rdk_ddr_4g, r0, r1, r2) +{ + start_phyboard_polis_rdk_common(PHYTEC_IMX8M_DDR_4G); +} diff --git a/arch/arm/boards/phytec-som-imx8mm/lowlevel.h b/arch/arm/boards/phytec-som-imx8mm/lowlevel.h new file mode 100644 index 0000000000..9982a822b7 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx8mm/lowlevel.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef PHYBOARD_POLIS_RDK_LOWLEVEL_H_ +#define PHYBOARD_POLIS_RDK_LOWLEVEL_H_ + +extern struct dram_timing_info phyboard_polis_rdk_dram_timing; + +#endif diff --git a/arch/arm/boards/phytec-som-imx8mm/lpddr4-timing.c b/arch/arm/boards/phytec-som-imx8mm/lpddr4-timing.c new file mode 100644 index 0000000000..7d01c181c0 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx8mm/lpddr4-timing.c @@ -0,0 +1,1125 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2019 NXP + * Copyright (C) 2023 PHYTEC Messtechnik GmbH + * + * Generated code from MX8M_DDR_tool + */ + +#include <common.h> +#include <soc/imx8m/ddr.h> + +#define DDR_ONE_RANK +#include <soc/imx8m/lpddr4_define.h> + +#include "lowlevel.h" + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0xa1080020 }, + { 0x3d400020, 0x222 }, + { 0x3d400024, 0x3a980 }, + { 0x3d400064, 0x2d00d2 }, + { 0x3d4000d0, 0xc00305ba }, + { 0x3d4000d4, 0x940000 }, + { 0x3d4000dc, 0xd4002d }, + { 0x3d4000e0, 0x310000 }, + { 0x3d4000e8, 0x66004d }, + { 0x3d4000ec, 0x16004d }, + { 0x3d400100, 0x191e0c20 }, + { 0x3d400104, 0x60630 }, + { 0x3d40010c, 0xb0b000 }, + { 0x3d400110, 0xe04080e }, + { 0x3d400114, 0x2040c0c }, + { 0x3d400118, 0x1010007 }, + { 0x3d40011c, 0x402 }, + { 0x3d400130, 0x20600 }, + { 0x3d400134, 0xc100002 }, + { 0x3d400138, 0xd8 }, + { 0x3d400144, 0x96004b }, + { 0x3d400180, 0x2ee0017 }, + { 0x3d400184, 0x2605b8e }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x497820a }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x170a }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0xdf00e4 }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x11 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x1 }, + { 0x3d4000f4, 0x699 }, + { 0x3d400108, 0x70e1617 }, + { 0x3d400200, 0x1f }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, + { 0x3d400250, 0x29001701 }, + { 0x3d400254, 0x2c }, + { 0x3d40025c, 0x4000030 }, + { 0x3d400264, 0x900093e7 }, + { 0x3d40026c, 0x2005574 }, + { 0x3d400400, 0x111 }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x2100e07 }, + { 0x3d400498, 0x620096 }, + { 0x3d40049c, 0x1100e07 }, + { 0x3d4004a0, 0xc8012c }, + { 0x3d402020, 0x20 }, + { 0x3d402024, 0x7d00 }, + { 0x3d402050, 0x20d040 }, + { 0x3d402064, 0x6001c }, + { 0x3d4020dc, 0x840000 }, + { 0x3d4020e0, 0x310000 }, + { 0x3d4020e8, 0x66004d }, + { 0x3d4020ec, 0x16004d }, + { 0x3d402100, 0xa040105 }, + { 0x3d402104, 0x30407 }, + { 0x3d402108, 0x203060b }, + { 0x3d40210c, 0x505000 }, + { 0x3d402110, 0x2040202 }, + { 0x3d402114, 0x2030202 }, + { 0x3d402118, 0x1010004 }, + { 0x3d40211c, 0x302 }, + { 0x3d402130, 0x20300 }, + { 0x3d402134, 0xa100002 }, + { 0x3d402138, 0x1d }, + { 0x3d402144, 0x14000a }, + { 0x3d402180, 0x640004 }, + { 0x3d402190, 0x3818200 }, + { 0x3d402194, 0x80303 }, + { 0x3d4021b4, 0x100 }, + { 0x3d4020f4, 0x599 }, + { 0x3d403020, 0x20 }, + { 0x3d403024, 0x1f40 }, + { 0x3d403050, 0x20d040 }, + { 0x3d403064, 0x30007 }, + { 0x3d4030dc, 0x840000 }, + { 0x3d4030e0, 0x310000 }, + { 0x3d4030e8, 0x66004d }, + { 0x3d4030ec, 0x16004d }, + { 0x3d403100, 0xa010102 }, + { 0x3d403104, 0x30404 }, + { 0x3d403108, 0x203060b }, + { 0x3d40310c, 0x505000 }, + { 0x3d403110, 0x2040202 }, + { 0x3d403114, 0x2030202 }, + { 0x3d403118, 0x1010004 }, + { 0x3d40311c, 0x302 }, + { 0x3d403130, 0x20300 }, + { 0x3d403134, 0xa100002 }, + { 0x3d403138, 0x8 }, + { 0x3d403144, 0x50003 }, + { 0x3d403180, 0x190004 }, + { 0x3d403190, 0x3818200 }, + { 0x3d403194, 0x80303 }, + { 0x3d4031b4, 0x100 }, + { 0x3d4030f4, 0x599 }, + { 0x3d400028, 0x0 }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x0 }, + { 0x100a1, 0x1 }, + { 0x100a2, 0x2 }, + { 0x100a3, 0x3 }, + { 0x100a4, 0x4 }, + { 0x100a5, 0x5 }, + { 0x100a6, 0x6 }, + { 0x100a7, 0x7 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x1 }, + { 0x110a2, 0x3 }, + { 0x110a3, 0x4 }, + { 0x110a4, 0x5 }, + { 0x110a5, 0x2 }, + { 0x110a6, 0x7 }, + { 0x110a7, 0x6 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x1 }, + { 0x120a2, 0x3 }, + { 0x120a3, 0x2 }, + { 0x120a4, 0x5 }, + { 0x120a5, 0x4 }, + { 0x120a6, 0x7 }, + { 0x120a7, 0x6 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x1 }, + { 0x130a2, 0x2 }, + { 0x130a3, 0x3 }, + { 0x130a4, 0x4 }, + { 0x130a5, 0x5 }, + { 0x130a6, 0x6 }, + { 0x130a7, 0x7 }, + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + { 0x11005f, 0x1ff }, + { 0x11015f, 0x1ff }, + { 0x11105f, 0x1ff }, + { 0x11115f, 0x1ff }, + { 0x11205f, 0x1ff }, + { 0x11215f, 0x1ff }, + { 0x11305f, 0x1ff }, + { 0x11315f, 0x1ff }, + { 0x21005f, 0x1ff }, + { 0x21015f, 0x1ff }, + { 0x21105f, 0x1ff }, + { 0x21115f, 0x1ff }, + { 0x21205f, 0x1ff }, + { 0x21215f, 0x1ff }, + { 0x21305f, 0x1ff }, + { 0x21315f, 0x1ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + { 0x200c5, 0x19 }, + { 0x1200c5, 0x7 }, + { 0x2200c5, 0x7 }, + { 0x2002e, 0x2 }, + { 0x12002e, 0x2 }, + { 0x22002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x20024, 0x1ab }, + { 0x2003a, 0x0 }, + { 0x120024, 0x1ab }, + { 0x2003a, 0x0 }, + { 0x220024, 0x1ab }, + { 0x2003a, 0x0 }, + { 0x20056, 0x3 }, + { 0x120056, 0x3 }, + { 0x220056, 0x3 }, + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x1204d, 0xe00 }, + { 0x1214d, 0xe00 }, + { 0x1304d, 0xe00 }, + { 0x1314d, 0xe00 }, + { 0x11004d, 0xe00 }, + { 0x11014d, 0xe00 }, + { 0x11104d, 0xe00 }, + { 0x11114d, 0xe00 }, + { 0x11204d, 0xe00 }, + { 0x11214d, 0xe00 }, + { 0x11304d, 0xe00 }, + { 0x11314d, 0xe00 }, + { 0x21004d, 0xe00 }, + { 0x21014d, 0xe00 }, + { 0x21104d, 0xe00 }, + { 0x21114d, 0xe00 }, + { 0x21204d, 0xe00 }, + { 0x21214d, 0xe00 }, + { 0x21304d, 0xe00 }, + { 0x21314d, 0xe00 }, + { 0x10049, 0xeba }, + { 0x10149, 0xeba }, + { 0x11049, 0xeba }, + { 0x11149, 0xeba }, + { 0x12049, 0xeba }, + { 0x12149, 0xeba }, + { 0x13049, 0xeba }, + { 0x13149, 0xeba }, + { 0x110049, 0xeba }, + { 0x110149, 0xeba }, + { 0x111049, 0xeba }, + { 0x111149, 0xeba }, + { 0x112049, 0xeba }, + { 0x112149, 0xeba }, + { 0x113049, 0xeba }, + { 0x113149, 0xeba }, + { 0x210049, 0xeba }, + { 0x210149, 0xeba }, + { 0x211049, 0xeba }, + { 0x211149, 0xeba }, + { 0x212049, 0xeba }, + { 0x212149, 0xeba }, + { 0x213049, 0xeba }, + { 0x213149, 0xeba }, + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x2ee }, + { 0x120008, 0x64 }, + { 0x220008, 0x19 }, + { 0x20088, 0x9 }, + { 0x200b2, 0xdc }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + { 0x1200b2, 0xdc }, + { 0x110043, 0x5a1 }, + { 0x110143, 0x5a1 }, + { 0x111043, 0x5a1 }, + { 0x111143, 0x5a1 }, + { 0x112043, 0x5a1 }, + { 0x112143, 0x5a1 }, + { 0x113043, 0x5a1 }, + { 0x113143, 0x5a1 }, + { 0x2200b2, 0xdc }, + { 0x210043, 0x5a1 }, + { 0x210143, 0x5a1 }, + { 0x211043, 0x5a1 }, + { 0x211143, 0x5a1 }, + { 0x212043, 0x5a1 }, + { 0x212143, 0x5a1 }, + { 0x213043, 0x5a1 }, + { 0x213143, 0x5a1 }, + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + { 0x20019, 0x1 }, + { 0x120019, 0x1 }, + { 0x220019, 0x1 }, + { 0x200f0, 0x660 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5665 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x12002d, 0x0 }, + { 0x22002d, 0x0 }, + { 0x200c7, 0x21 }, + { 0x1200c7, 0x21 }, + { 0x2200c7, 0x21 }, + { 0x200ca, 0x24 }, + { 0x1200ca, 0x24 }, + { 0x2200ca, 0x24 }, +}; + +/* P0 message block paremeter for training firmware */ +struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xbb8 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x11 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x54012, 0x110 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, 0x31 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d00 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x2dd4 }, + { 0x54020, 0x31 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d00 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xd400 }, + { 0x54033, 0x312d }, + { 0x54034, 0x6600 }, + { 0x54035, 0x4d }, + { 0x54036, 0x4d }, + { 0x54037, 0x1600 }, + { 0x54038, 0xd400 }, + { 0x54039, 0x312d }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x4d }, + { 0x5403c, 0x4d }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* P1 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp1_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x11 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x31 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d00 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x31 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d00 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3100 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x4d }, + { 0x54036, 0x4d }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3100 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x4d }, + { 0x5403c, 0x4d }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* P2 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp2_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x11 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x31 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d00 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x31 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d00 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3100 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x4d }, + { 0x54036, 0x4d }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3100 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x4d }, + { 0x5403c, 0x4d }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* P0 2D message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xbb8 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x11 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x110 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, 0x31 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d00 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x2dd4 }, + { 0x54020, 0x31 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d00 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xd400 }, + { 0x54033, 0x312d }, + { 0x54034, 0x6600 }, + { 0x54035, 0x4d }, + { 0x54036, 0x4d }, + { 0x54037, 0x1600 }, + { 0x54038, 0xd400 }, + { 0x54039, 0x312d }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x4d }, + { 0x5403c, 0x4d }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xf }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x630 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x630 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x630 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x630 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x630 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x630 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x630 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x630 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x630 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x630 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x630 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x630 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x630 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xa }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x2 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x900a4, 0x10 }, + { 0x900a5, 0x10 }, + { 0x900a6, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x623 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x623 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a7, 0x0 }, + { 0x900a8, 0x790 }, + { 0x900a9, 0x11a }, + { 0x900aa, 0x8 }, + { 0x900ab, 0x7aa }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x10 }, + { 0x900ae, 0x7b2 }, + { 0x900af, 0x2a }, + { 0x900b0, 0x0 }, + { 0x900b1, 0x7c8 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x0 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xc }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x0 }, + { 0x90159, 0x400 }, + { 0x9015a, 0x10e }, + { 0x9015b, 0x8 }, + { 0x9015c, 0xe8 }, + { 0x9015d, 0x109 }, + { 0x9015e, 0x0 }, + { 0x9015f, 0x8140 }, + { 0x90160, 0x10c }, + { 0x90161, 0x10 }, + { 0x90162, 0x8138 }, + { 0x90163, 0x10c }, + { 0x90164, 0x8 }, + { 0x90165, 0x7c8 }, + { 0x90166, 0x101 }, + { 0x90167, 0x8 }, + { 0x90168, 0x0 }, + { 0x90169, 0x8 }, + { 0x9016a, 0x8 }, + { 0x9016b, 0x448 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0xf }, + { 0x9016e, 0x7c0 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x0 }, + { 0x90171, 0xe8 }, + { 0x90172, 0x109 }, + { 0x90173, 0x47 }, + { 0x90174, 0x630 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x618 }, + { 0x90178, 0x109 }, + { 0x90179, 0x8 }, + { 0x9017a, 0xe0 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x7c8 }, + { 0x9017e, 0x109 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x8140 }, + { 0x90181, 0x10c }, + { 0x90182, 0x0 }, + { 0x90183, 0x1 }, + { 0x90184, 0x8 }, + { 0x90185, 0x8 }, + { 0x90186, 0x4 }, + { 0x90187, 0x8 }, + { 0x90188, 0x8 }, + { 0x90189, 0x7c8 }, + { 0x9018a, 0x101 }, + { 0x90006, 0x0 }, + { 0x90007, 0x0 }, + { 0x90008, 0x8 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x0 }, + { 0x9000b, 0x0 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x2a }, + { 0x90026, 0x6a }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x2000b, 0x34b }, + { 0x2000c, 0xbb }, + { 0x2000d, 0x753 }, + { 0x2000e, 0x2c }, + { 0x12000b, 0x70 }, + { 0x12000c, 0x19 }, + { 0x12000d, 0xfa }, + { 0x12000e, 0x10 }, + { 0x22000b, 0x1c }, + { 0x22000c, 0x6 }, + { 0x22000d, 0x3e }, + { 0x22000e, 0x10 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x60 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x120010, 0x5a }, + { 0x120011, 0x3 }, + { 0x220010, 0x5a }, + { 0x220011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x140080, 0xe0 }, + { 0x140081, 0x12 }, + { 0x140082, 0xe0 }, + { 0x140083, 0x12 }, + { 0x140084, 0xe0 }, + { 0x140085, 0x12 }, + { 0x240080, 0xe0 }, + { 0x240081, 0x12 }, + { 0x240082, 0xe0 }, + { 0x240083, 0x12 }, + { 0x240084, 0xe0 }, + { 0x240085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x2003a, 0x2 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3000mts 1D */ + .drate = 3000, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 3000mts 2D */ + .drate = 3000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info phyboard_polis_rdk_dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3000, 400, 100,}, +}; diff --git a/arch/arm/boards/phytec-som-imx8mq/board.c b/arch/arm/boards/phytec-som-imx8mq/board.c index 6d331281e6..45ed9cf5ad 100644 --- a/arch/arm/boards/phytec-som-imx8mq/board.c +++ b/arch/arm/boards/phytec-som-imx8mq/board.c @@ -9,8 +9,9 @@ #include <common.h> #include <init.h> #include <linux/sizes.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <mfd/pfuze.h> +#include <linux/regmap.h> #include <envfs.h> diff --git a/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c b/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c index 2c84a0f5fd..fac9e184ae 100644 --- a/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c +++ b/arch/arm/boards/phytec-som-imx8mq/ddrphy_train.c @@ -12,6 +12,8 @@ void ddr_cfg_phy(void) { unsigned int tmp, tmp_t; + ddr_get_firmware(DRAM_TYPE_LPDDR4); + //Init DDRPHY register... reg32_write(0x3c080440,0x2); reg32_write(0x3c080444,0x3); @@ -146,7 +148,7 @@ void ddr_cfg_phy(void) { //enable APB bus to access DDRPHY RAM reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0000, 0x0); //load the 1D training image - ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_1D_IMAGE); + imx8m_ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_1D_IMAGE); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54003,0xc80); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54004,0x2); @@ -188,7 +190,7 @@ void ddr_cfg_phy(void) { reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x9); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x0); - wait_ddrphy_training_complete(); + imx8m_wait_ddrphy_training_complete(); //configure DDRPHY-FW DMEM structure @clock1... reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); @@ -222,7 +224,7 @@ void ddr_cfg_phy(void) { //enable APB bus to access DDRPHY RAM reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0000, 0x0); //load the 1D training image - ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_1D_IMAGE); + imx8m_ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_1D_IMAGE); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54002,0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54003,0x29c); @@ -265,7 +267,7 @@ void ddr_cfg_phy(void) { reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x9); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x0); - wait_ddrphy_training_complete(); + imx8m_wait_ddrphy_training_complete(); //set the PHY input clock to the desired frequency for pstate 0 reg32_write(0x3038a088,0x7070000); @@ -298,7 +300,7 @@ void ddr_cfg_phy(void) { //enable APB bus to access DDRPHY RAM reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0000, 0x0); //load the 2D training image - ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_2D_IMAGE); + imx8m_ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_2D_IMAGE); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54003,0xc80); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54004,0x2); @@ -341,7 +343,7 @@ void ddr_cfg_phy(void) { reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x9); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x0); - wait_ddrphy_training_complete(); + imx8m_wait_ddrphy_training_complete(); //Halt MPU reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); diff --git a/arch/arm/boards/phytec-som-imx8mq/flash-header-phycore-imx8mq.imxcfg b/arch/arm/boards/phytec-som-imx8mq/flash-header-phycore-imx8mq.imxcfg index 93cf14f26b..f82759f849 100644 --- a/arch/arm/boards/phytec-som-imx8mq/flash-header-phycore-imx8mq.imxcfg +++ b/arch/arm/boards/phytec-som-imx8mq/flash-header-phycore-imx8mq.imxcfg @@ -5,3 +5,5 @@ soc imx8mq loadaddr 0x007E1000 max_load_size 0x3F000 ivtofs 0x400 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c index d35f9b0d39..362b3ed823 100644 --- a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c @@ -6,20 +6,21 @@ #include <common.h> #include <firmware.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx8m-ccm-regs.h> -#include <mach/iomux-mx8mq.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/iomux-mx8mq.h> #include <soc/imx8m/ddr.h> -#include <mach/xload.h> +#include <mach/imx/xload.h> #include <io.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <asm/cache.h> #include <asm/sections.h> #include <asm/mmu.h> -#include <mach/atf.h> -#include <mach/esdctl.h> +#include <mach/imx/atf.h> +#include <mach/imx/esdctl.h> #include "ddr.h" @@ -42,22 +43,6 @@ static void setup_uart(void) putc_ll('>'); } -static void phytec_imx8mq_som_sram_setup(void) -{ - enum bootsource src = BOOTSOURCE_UNKNOWN; - int instance = BOOTSOURCE_INSTANCE_UNKNOWN; - int ret = -ENOTSUPP; - - ddr_init(); - - imx8mq_get_boot_source(&src, &instance); - - if (src == BOOTSOURCE_MMC) - ret = imx8m_esdhc_load_image(instance, true); - - BUG_ON(ret); -} - static __noreturn noinline void phytec_phycore_imx8mq_start(void) { setup_uart(); @@ -69,7 +54,7 @@ static __noreturn noinline void phytec_phycore_imx8mq_start(void) * that means DDR needs to be initialized for the * first time. */ - phytec_imx8mq_som_sram_setup(); + ddr_init(); } /* * Straight from the power-on we are at EL3, so the following @@ -79,13 +64,8 @@ static __noreturn noinline void phytec_phycore_imx8mq_start(void) * initialization routine, it is EL2 which means we'll skip * loadting ATF blob again */ - if (current_el() == 3) { - const u8 *bl31; - size_t bl31_size; - - get_builtin_firmware(imx8mq_bl31_bin, &bl31, &bl31_size); - imx8mq_atf_load_bl31(bl31, bl31_size); - } + if (current_el() == 3) + imx8mq_load_and_start_image_via_tfa(); /* * Standard entry we hit once we initialized both DDR and ATF @@ -108,7 +88,7 @@ static __noreturn noinline void phytec_phycore_imx8mq_start(void) * * 4. BL31 blob is uploaded to OCRAM and the control is transfer to it * - * 5. BL31 exits EL3 into EL2 at address MX8MQ_ATF_BL33_BASE_ADDR, + * 5. BL31 exits EL3 into EL2 at address MX8M_ATF_BL33_BASE_ADDR, * executing start_phytec_phycore_imx8mq() the third time * * 6. Standard barebox boot flow continues diff --git a/arch/arm/boards/phytec-som-rk3288/lowlevel.c b/arch/arm/boards/phytec-som-rk3288/lowlevel.c index 1a60959562..12044b6039 100644 --- a/arch/arm/boards/phytec-som-rk3288/lowlevel.c +++ b/arch/arm/boards/phytec-som-rk3288/lowlevel.c @@ -7,10 +7,11 @@ #include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/rk3288-regs.h> -#include <mach/grf_rk3288.h> -#include <mach/hardware.h> +#include <mach/rockchip/rk3288-regs.h> +#include <mach/rockchip/grf_rk3288.h> +#include <mach/rockchip/hardware.h> #include <debug_ll.h> +#include <mach/rockchip/debug_ll.h> extern char __dtb_rk3288_phycore_som_start[]; @@ -26,7 +27,7 @@ ENTRY_FUNCTION(start_rk3288_phycore_som, r0, r1, r2) GPIO7C6_MASK << GPIO7C6_SHIFT, GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT | GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); - INIT_LL(); + rockchip_debug_ll_init(); } fdt = __dtb_rk3288_phycore_som_start + get_runtime_offset(); diff --git a/arch/arm/boards/pine64-quartz64/.gitignore b/arch/arm/boards/pine64-quartz64/.gitignore new file mode 100644 index 0000000000..f458f794b5 --- /dev/null +++ b/arch/arm/boards/pine64-quartz64/.gitignore @@ -0,0 +1 @@ +sdram-init.bin diff --git a/arch/arm/boards/pine64-quartz64/board.c b/arch/arm/boards/pine64-quartz64/board.c index 981de90dd7..1573dd8674 100644 --- a/arch/arm/boards/pine64-quartz64/board.c +++ b/arch/arm/boards/pine64-quartz64/board.c @@ -7,7 +7,7 @@ struct quartz64_model { const char *shortname; }; -static int quartz64_probe(struct device_d *dev) +static int quartz64_probe(struct device *dev) { const struct quartz64_model *model; @@ -31,8 +31,9 @@ static const struct of_device_id quartz64_of_match[] = { }, { /* sentinel */ }, }; +MODULE_DEVICE_TABLE(of, quartz64_of_match); -static struct driver_d quartz64_board_driver = { +static struct driver quartz64_board_driver = { .name = "board-quartz64", .probe = quartz64_probe, .of_compatible = quartz64_of_match, diff --git a/arch/arm/boards/pine64-quartz64/lowlevel.c b/arch/arm/boards/pine64-quartz64/lowlevel.c index b295885522..7723d47860 100644 --- a/arch/arm/boards/pine64-quartz64/lowlevel.c +++ b/arch/arm/boards/pine64-quartz64/lowlevel.c @@ -1,21 +1,17 @@ // SPDX-License-Identifier: GPL-2.0-only + #include <common.h> -#include <linux/sizes.h> -#include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/hardware.h> -#include <mach/atf.h> +#include <mach/rockchip/hardware.h> +#include <mach/rockchip/atf.h> #include <debug_ll.h> -#include <mach/rockchip.h> extern char __dtb_rk3566_quartz64_a_start[]; -static noinline void start_quartz64(void *fdt) +ENTRY_FUNCTION(start_quartz64a, r0, r1, r2) { - /* - * Image execution starts at 0x0, but this is used for ATF and - * OP-TEE later, so move away from here. - */ + putc_ll('>'); + if (current_el() == 3) relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS); else @@ -23,17 +19,5 @@ static noinline void start_quartz64(void *fdt) setup_c(); - if (current_el() == 3) { - rk3568_lowlevel_init(); - rk3568_atf_load_bl31(fdt); - /* not reached */ - } - - barebox_arm_entry(RK3568_DRAM_BOTTOM, 0x80000000 - RK3568_DRAM_BOTTOM, - fdt); -} - -ENTRY_FUNCTION(start_quartz64a, r0, r1, r2) -{ - start_quartz64(__dtb_rk3566_quartz64_a_start); + rk3568_barebox_entry(__dtb_rk3566_quartz64_a_start); } diff --git a/arch/arm/boards/plathome-openblocks-a6/lowlevel.c b/arch/arm/boards/plathome-openblocks-a6/lowlevel.c index a480c966a4..8a58d692d8 100644 --- a/arch/arm/boards/plathome-openblocks-a6/lowlevel.c +++ b/arch/arm/boards/plathome-openblocks-a6/lowlevel.c @@ -3,12 +3,12 @@ #include <common.h> #include <linux/sizes.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> extern char __dtb_kirkwood_openblocks_a6_bb_start[]; -ENTRY_FUNCTION(start_plathome_openblocks_a6, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_plathome_openblocks_a6, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c b/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c index 42b291df9f..35888a0b83 100644 --- a/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c +++ b/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c @@ -4,12 +4,12 @@ #include <common.h> #include <linux/sizes.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> extern char __dtb_armada_xp_openblocks_ax3_4_bb_start[]; -ENTRY_FUNCTION(start_plathome_openblocks_ax3, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_plathome_openblocks_ax3, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/pm9261/init.c b/arch/arm/boards/pm9261/init.c index b316b85d7d..e87c8ad27b 100644 --- a/arch/arm/boards/pm9261/init.c +++ b/arch/arm/boards/pm9261/init.c @@ -8,20 +8,19 @@ #include <gpio.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/at91_pmc.h> -#include <mach/board.h> -#include <mach/iomux.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/board.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91sam9_smc.h> #include <platform_data/eth-dm9000.h> #include <linux/w1-gpio.h> #include <w1_mac_address.h> diff --git a/arch/arm/boards/pm9261/lowlevel_init.c b/arch/arm/boards/pm9261/lowlevel_init.c index b18cd067b7..6a44981cc1 100644 --- a/arch/arm/boards/pm9261/lowlevel_init.c +++ b/arch/arm/boards/pm9261/lowlevel_init.c @@ -4,10 +4,9 @@ * Under GPLv2 */ -#include <asm/barebox-arm.h> - -#include <mach/at91sam926x_board_init.h> -#include <mach/at91sam9261_matrix.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam926x_board_init.h> +#include <mach/at91/at91sam9261_matrix.h> #define MASTER_PLL_DIV 15 #define MASTER_PLL_MUL 162 @@ -111,7 +110,7 @@ static void __bare_init pm9261_init(void) NULL); } -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_pm9261, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/pm9263/init.c b/arch/arm/boards/pm9263/init.c index bce612d001..026a8bfe8d 100644 --- a/arch/arm/boards/pm9263/init.c +++ b/arch/arm/boards/pm9263/init.c @@ -7,20 +7,19 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <gpio.h> #include <fcntl.h> #include <io.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/at91_pmc.h> -#include <mach/board.h> -#include <mach/iomux.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/board.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91sam9_smc.h> #include <linux/w1-gpio.h> #include <w1_mac_address.h> diff --git a/arch/arm/boards/pm9263/lowlevel_init.c b/arch/arm/boards/pm9263/lowlevel_init.c index 8f44adee99..d06573d1cc 100644 --- a/arch/arm/boards/pm9263/lowlevel_init.c +++ b/arch/arm/boards/pm9263/lowlevel_init.c @@ -6,10 +6,9 @@ #include <linux/sizes.h> -#include <asm/barebox-arm.h> - -#include <mach/at91sam926x_board_init.h> -#include <mach/at91sam9263_matrix.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam926x_board_init.h> +#include <mach/at91/at91sam9263_matrix.h> #define MASTER_PLL_DIV 6 #define MASTER_PLL_MUL 65 @@ -132,7 +131,7 @@ static void __bare_init pm9263_board_init(void) NULL); } -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_pm9263, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/pm9g45/init.c b/arch/arm/boards/pm9g45/init.c index b347de4157..ee60cf8f00 100644 --- a/arch/arm/boards/pm9g45/init.c +++ b/arch/arm/boards/pm9g45/init.c @@ -7,21 +7,20 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <gpio.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/at91_pmc.h> -#include <mach/board.h> -#include <mach/iomux.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/board.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91sam9_smc.h> #include <linux/w1-gpio.h> #include <w1_mac_address.h> diff --git a/arch/arm/boards/pm9g45/lowlevel.c b/arch/arm/boards/pm9g45/lowlevel.c index 5f66b28254..9cdc2711e6 100644 --- a/arch/arm/boards/pm9g45/lowlevel.c +++ b/arch/arm/boards/pm9g45/lowlevel.c @@ -7,14 +7,11 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91_ddrsdrc.h> +#include <mach/at91/hardware.h> -#include <mach/at91_ddrsdrc.h> - -#include <mach/hardware.h> - -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_pm9g45, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/polyhex-debix/8g-lpddr4-timing.c b/arch/arm/boards/polyhex-debix/8g-lpddr4-timing.c new file mode 100644 index 0000000000..db75a424b7 --- /dev/null +++ b/arch/arm/boards/polyhex-debix/8g-lpddr4-timing.c @@ -0,0 +1,1125 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2019 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Generated code from MX8M_DDR_tool + */ + +#include <common.h> +#include <soc/imx8m/ddr.h> +#include <soc/imx8m/lpddr4_define.h> + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0xa3080020 }, + { 0x3d400020, 0x1323 }, + { 0x3d400024, 0x1e84800 }, + { 0x3d400064, 0x7a017c }, + { 0x3d400070, 0x7027f90 }, + { 0x3d400074, 0x790 }, + { 0x3d4000d0, 0xc00307a3 }, + { 0x3d4000d4, 0xc50000 }, + { 0x3d4000dc, 0xf4003f }, + { 0x3d4000e0, 0x330000 }, + { 0x3d4000e8, 0x660048 }, + { 0x3d4000ec, 0x160048 }, + { 0x3d400100, 0x2028222a }, + { 0x3d400104, 0x8083f }, + { 0x3d40010c, 0xe0e000 }, + { 0x3d400110, 0x12040a12 }, + { 0x3d400114, 0x2050f0f }, + { 0x3d400118, 0x1010009 }, + { 0x3d40011c, 0x501 }, + { 0x3d400130, 0x20800 }, + { 0x3d400134, 0xe100002 }, + { 0x3d400138, 0x184 }, + { 0x3d400144, 0xc80064 }, + { 0x3d400180, 0x3e8001e }, + { 0x3d400184, 0x3207a12 }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x49f820e }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x1f0e }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0xdf00e4 }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x11 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x1 }, + { 0x3d4000f4, 0xc99 }, + { 0x3d400108, 0x9121c1c }, + { 0x3d400200, 0x18 }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf07 }, + { 0x3d400250, 0x1705 }, + { 0x3d400254, 0x2c }, + { 0x3d40025c, 0x4000030 }, + { 0x3d400264, 0x900093e7 }, + { 0x3d40026c, 0x2005574 }, + { 0x3d400400, 0x111 }, + { 0x3d400404, 0x72ff }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x2100e07 }, + { 0x3d400498, 0x620096 }, + { 0x3d40049c, 0x1100e07 }, + { 0x3d4004a0, 0xc8012c }, + { 0x3d402020, 0x1021 }, + { 0x3d402024, 0x30d400 }, + { 0x3d402050, 0x20d000 }, + { 0x3d402064, 0xc0026 }, + { 0x3d4020dc, 0x840000 }, + { 0x3d4020e0, 0x330000 }, + { 0x3d4020e8, 0x660048 }, + { 0x3d4020ec, 0x160048 }, + { 0x3d402100, 0xa040305 }, + { 0x3d402104, 0x30407 }, + { 0x3d402108, 0x203060b }, + { 0x3d40210c, 0x505000 }, + { 0x3d402110, 0x2040202 }, + { 0x3d402114, 0x2030202 }, + { 0x3d402118, 0x1010004 }, + { 0x3d40211c, 0x301 }, + { 0x3d402130, 0x20300 }, + { 0x3d402134, 0xa100002 }, + { 0x3d402138, 0x27 }, + { 0x3d402144, 0x14000a }, + { 0x3d402180, 0x640004 }, + { 0x3d402190, 0x3818200 }, + { 0x3d402194, 0x80303 }, + { 0x3d4021b4, 0x100 }, + { 0x3d4020f4, 0xc99 }, + { 0x3d403020, 0x1021 }, + { 0x3d403024, 0xc3500 }, + { 0x3d403050, 0x20d000 }, + { 0x3d403064, 0x3000a }, + { 0x3d4030dc, 0x840000 }, + { 0x3d4030e0, 0x330000 }, + { 0x3d4030e8, 0x660048 }, + { 0x3d4030ec, 0x160048 }, + { 0x3d403100, 0xa010102 }, + { 0x3d403104, 0x30404 }, + { 0x3d403108, 0x203060b }, + { 0x3d40310c, 0x505000 }, + { 0x3d403110, 0x2040202 }, + { 0x3d403114, 0x2030202 }, + { 0x3d403118, 0x1010004 }, + { 0x3d40311c, 0x301 }, + { 0x3d403130, 0x20300 }, + { 0x3d403134, 0xa100002 }, + { 0x3d403138, 0xa }, + { 0x3d403144, 0x50003 }, + { 0x3d403180, 0x190004 }, + { 0x3d403190, 0x3818200 }, + { 0x3d403194, 0x80303 }, + { 0x3d4031b4, 0x100 }, + { 0x3d4030f4, 0xc99 }, + { 0x3d400028, 0x0 }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x0 }, + { 0x100a1, 0x1 }, + { 0x100a2, 0x2 }, + { 0x100a3, 0x3 }, + { 0x100a4, 0x4 }, + { 0x100a5, 0x5 }, + { 0x100a6, 0x6 }, + { 0x100a7, 0x7 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x1 }, + { 0x110a2, 0x3 }, + { 0x110a3, 0x4 }, + { 0x110a4, 0x5 }, + { 0x110a5, 0x2 }, + { 0x110a6, 0x7 }, + { 0x110a7, 0x6 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x1 }, + { 0x120a2, 0x3 }, + { 0x120a3, 0x2 }, + { 0x120a4, 0x5 }, + { 0x120a5, 0x4 }, + { 0x120a6, 0x7 }, + { 0x120a7, 0x6 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x1 }, + { 0x130a2, 0x2 }, + { 0x130a3, 0x3 }, + { 0x130a4, 0x4 }, + { 0x130a5, 0x5 }, + { 0x130a6, 0x6 }, + { 0x130a7, 0x7 }, + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + { 0x11005f, 0x1ff }, + { 0x11015f, 0x1ff }, + { 0x11105f, 0x1ff }, + { 0x11115f, 0x1ff }, + { 0x11205f, 0x1ff }, + { 0x11215f, 0x1ff }, + { 0x11305f, 0x1ff }, + { 0x11315f, 0x1ff }, + { 0x21005f, 0x1ff }, + { 0x21015f, 0x1ff }, + { 0x21105f, 0x1ff }, + { 0x21115f, 0x1ff }, + { 0x21205f, 0x1ff }, + { 0x21215f, 0x1ff }, + { 0x21305f, 0x1ff }, + { 0x21315f, 0x1ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + { 0x200c5, 0x18 }, + { 0x1200c5, 0x7 }, + { 0x2200c5, 0x7 }, + { 0x2002e, 0x2 }, + { 0x12002e, 0x2 }, + { 0x22002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x20024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x120024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x220024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x20056, 0x3 }, + { 0x120056, 0x3 }, + { 0x220056, 0x3 }, + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x1204d, 0xe00 }, + { 0x1214d, 0xe00 }, + { 0x1304d, 0xe00 }, + { 0x1314d, 0xe00 }, + { 0x11004d, 0xe00 }, + { 0x11014d, 0xe00 }, + { 0x11104d, 0xe00 }, + { 0x11114d, 0xe00 }, + { 0x11204d, 0xe00 }, + { 0x11214d, 0xe00 }, + { 0x11304d, 0xe00 }, + { 0x11314d, 0xe00 }, + { 0x21004d, 0xe00 }, + { 0x21014d, 0xe00 }, + { 0x21104d, 0xe00 }, + { 0x21114d, 0xe00 }, + { 0x21204d, 0xe00 }, + { 0x21214d, 0xe00 }, + { 0x21304d, 0xe00 }, + { 0x21314d, 0xe00 }, + { 0x10049, 0xeba }, + { 0x10149, 0xeba }, + { 0x11049, 0xeba }, + { 0x11149, 0xeba }, + { 0x12049, 0xeba }, + { 0x12149, 0xeba }, + { 0x13049, 0xeba }, + { 0x13149, 0xeba }, + { 0x110049, 0xeba }, + { 0x110149, 0xeba }, + { 0x111049, 0xeba }, + { 0x111149, 0xeba }, + { 0x112049, 0xeba }, + { 0x112149, 0xeba }, + { 0x113049, 0xeba }, + { 0x113149, 0xeba }, + { 0x210049, 0xeba }, + { 0x210149, 0xeba }, + { 0x211049, 0xeba }, + { 0x211149, 0xeba }, + { 0x212049, 0xeba }, + { 0x212149, 0xeba }, + { 0x213049, 0xeba }, + { 0x213149, 0xeba }, + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x3e8 }, + { 0x120008, 0x64 }, + { 0x220008, 0x19 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x104 }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + { 0x1200b2, 0x104 }, + { 0x110043, 0x5a1 }, + { 0x110143, 0x5a1 }, + { 0x111043, 0x5a1 }, + { 0x111143, 0x5a1 }, + { 0x112043, 0x5a1 }, + { 0x112143, 0x5a1 }, + { 0x113043, 0x5a1 }, + { 0x113143, 0x5a1 }, + { 0x2200b2, 0x104 }, + { 0x210043, 0x5a1 }, + { 0x210143, 0x5a1 }, + { 0x211043, 0x5a1 }, + { 0x211143, 0x5a1 }, + { 0x212043, 0x5a1 }, + { 0x212143, 0x5a1 }, + { 0x213043, 0x5a1 }, + { 0x213143, 0x5a1 }, + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + { 0x20019, 0x1 }, + { 0x120019, 0x1 }, + { 0x220019, 0x1 }, + { 0x200f0, 0x660 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5665 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x12002d, 0x0 }, + { 0x22002d, 0x0 }, + { 0x2007d, 0x212 }, + { 0x12007d, 0x212 }, + { 0x22007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x12007c, 0x61 }, + { 0x22007c, 0x61 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x1204a, 0x500 }, + { 0x1304a, 0x500 }, + { 0x2002c, 0x0 }, +}; + +/* P0 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x333f }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x333f }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P1 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp1_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P2 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp2_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P0 2D message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x310 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x333f }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x333f }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x633 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x633 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x633 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x633 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x633 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x633 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xb }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x1 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a4, 0x0 }, + { 0x900a5, 0x790 }, + { 0x900a6, 0x11a }, + { 0x900a7, 0x8 }, + { 0x900a8, 0x7aa }, + { 0x900a9, 0x2a }, + { 0x900aa, 0x10 }, + { 0x900ab, 0x7b2 }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x0 }, + { 0x900ae, 0x7c8 }, + { 0x900af, 0x109 }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x10 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x1 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xd }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x8 }, + { 0x90159, 0xe8 }, + { 0x9015a, 0x109 }, + { 0x9015b, 0x0 }, + { 0x9015c, 0x8140 }, + { 0x9015d, 0x10c }, + { 0x9015e, 0x10 }, + { 0x9015f, 0x8138 }, + { 0x90160, 0x104 }, + { 0x90161, 0x8 }, + { 0x90162, 0x448 }, + { 0x90163, 0x109 }, + { 0x90164, 0xf }, + { 0x90165, 0x7c0 }, + { 0x90166, 0x109 }, + { 0x90167, 0x0 }, + { 0x90168, 0xe8 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x47 }, + { 0x9016b, 0x630 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x8 }, + { 0x9016e, 0x618 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0xe0 }, + { 0x90172, 0x109 }, + { 0x90173, 0x0 }, + { 0x90174, 0x7c8 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x8140 }, + { 0x90178, 0x10c }, + { 0x90179, 0x0 }, + { 0x9017a, 0x478 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x1 }, + { 0x9017e, 0x8 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x4 }, + { 0x90181, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x29 }, + { 0x90026, 0x68 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x465 }, + { 0x2000c, 0xfa }, + { 0x2000d, 0x9c4 }, + { 0x2000e, 0x2c }, + { 0x12000b, 0x70 }, + { 0x12000c, 0x19 }, + { 0x12000d, 0xfa }, + { 0x12000e, 0x10 }, + { 0x22000b, 0x1c }, + { 0x22000c, 0x6 }, + { 0x22000d, 0x3e }, + { 0x22000e, 0x10 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x140080, 0xe0 }, + { 0x140081, 0x12 }, + { 0x140082, 0xe0 }, + { 0x140083, 0x12 }, + { 0x140084, 0xe0 }, + { 0x140085, 0x12 }, + { 0x240080, 0xe0 }, + { 0x240081, 0x12 }, + { 0x240082, 0xe0 }, + { 0x240083, 0x12 }, + { 0x240084, 0xe0 }, + { 0x240085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 } +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 4000mts 1D */ + .drate = 4000, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 4000mts 2D */ + .drate = 4000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info imx8mp_debix_8g_dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 4000, 400, 100, }, +}; diff --git a/arch/arm/boards/polyhex-debix/Makefile b/arch/arm/boards/polyhex-debix/Makefile new file mode 100644 index 0000000000..725cb1f8b5 --- /dev/null +++ b/arch/arm/boards/polyhex-debix/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +obj-y += board.o +lwl-y += lowlevel.o lpddr4-timing.o 8g-lpddr4-timing.o diff --git a/arch/arm/boards/polyhex-debix/board.c b/arch/arm/boards/polyhex-debix/board.c new file mode 100644 index 0000000000..ea4fc26a0c --- /dev/null +++ b/arch/arm/boards/polyhex-debix/board.c @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <envfs.h> +#include <init.h> +#include <io.h> +#include <linux/nvmem-consumer.h> +#include <mach/imx/bbu.h> +#include <mach/imx/iomux-mx8mp.h> +#include <net.h> + +struct debix_polyhex_machine_data { + void (*ethernet_setup)(void); +}; + +#define ETH_ALEN_ASCII 12 + +static int polyhex_debix_eth_register_ethaddr(struct device_node *np) +{ + u8 mac[ETH_ALEN]; + u8 *data; + int ret; + + data = nvmem_cell_get_and_read(np, "mac-address", ETH_ALEN_ASCII); + if (IS_ERR(data)) + return PTR_ERR(data); + + ret = hex2bin(mac, data, ETH_ALEN); + if (ret) + goto err; + + of_eth_register_ethaddr(np, mac); +err: + free(data); + + return ret; +} + +static void polyhex_debix_ethernet_init(void) +{ + static const char * const aliases[] = { "ethernet0", "ethernet1" }; + struct device_node *np, *root; + unsigned int i; + + root = of_get_root_node(); + + for (i = 0; i < ARRAY_SIZE(aliases); i++) { + const char *alias = aliases[i]; + int ret; + + np = of_find_node_by_alias(root, alias); + if (!np) { + pr_warn("Failed to find %s\n", alias); + continue; + } + + ret = polyhex_debix_eth_register_ethaddr(np); + if (ret) { + pr_warn("Failed to register MAC for %s\n", alias); + continue; + } + } +} + +static int polyhex_debix_probe(struct device *dev) +{ + const struct debix_polyhex_machine_data *machine_data; + int emmc_bbu_flag = 0; + int sd_bbu_flag = 0; + u32 val; + + if (bootsource_get() == BOOTSOURCE_MMC && bootsource_get_instance() == 1) { + of_device_enable_path("/chosen/environment-sd"); + sd_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } else { + of_device_enable_path("/chosen/environment-emmc"); + emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } + + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); + imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + + /* Enable RGMII TX clk output */ + val = readl(MX8MP_IOMUXC_GPR_BASE_ADDR + MX8MP_IOMUXC_GPR1); + val |= MX8MP_IOMUXC_GPR1_ENET1_RGMII_EN | + MX8MP_IOMUXC_GPR1_ENET_QOS_RGMII_EN; + writel(val, MX8MP_IOMUXC_GPR_BASE_ADDR + MX8MP_IOMUXC_GPR1); + + machine_data = device_get_match_data(dev); + if (machine_data && machine_data->ethernet_setup) + machine_data->ethernet_setup(); + + return 0; +} + +static const struct debix_polyhex_machine_data debix_som_a_bmb_08 = { + .ethernet_setup = polyhex_debix_ethernet_init, +}; + +static const struct of_device_id polyhex_debix_of_match[] = { + { .compatible = "polyhex,imx8mp-debix" }, + { .compatible = "polyhex,imx8mp-debix-som-a-bmb-08", .data = &debix_som_a_bmb_08 }, + { /* Sentinel */ } +}; +BAREBOX_DEEP_PROBE_ENABLE(polyhex_debix_of_match); + +static struct driver polyhex_debix_board_driver = { + .name = "board-imx8mp-debix", + .probe = polyhex_debix_probe, + .of_compatible = polyhex_debix_of_match, +}; +coredevice_platform_driver(polyhex_debix_board_driver); diff --git a/arch/arm/boards/polyhex-debix/flash-header-polyhex-debix.imxcfg b/arch/arm/boards/polyhex-debix/flash-header-polyhex-debix.imxcfg new file mode 100644 index 0000000000..6ea2e6c68e --- /dev/null +++ b/arch/arm/boards/polyhex-debix/flash-header-polyhex-debix.imxcfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-only + +soc imx8mp + +loadaddr 0x920000 +max_load_size 0x3f000 +ivtofs 0x0 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/polyhex-debix/lowlevel.c b/arch/arm/boards/polyhex-debix/lowlevel.c new file mode 100644 index 0000000000..fa49fcb5c1 --- /dev/null +++ b/arch/arm/boards/polyhex-debix/lowlevel.c @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> +#include <common.h> +#include <debug_ll.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/atf.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/imx8mp-regs.h> +#include <mach/imx/iomux-mx8mp.h> +#include <mach/imx/xload.h> +#include <mfd/pca9450.h> +#include <pbl/i2c.h> +#include <pbl/pmic.h> +#include <soc/imx8m/ddr.h> + +extern char __dtb_z_imx8mp_debix_model_a_start[]; +extern char __dtb_z_imx8mp_debix_som_a_bmb_08_start[]; + +#define UART_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_FSEL | \ + MX8MP_PAD_CTL_PUE | \ + MX8MP_PAD_CTL_PE) + +#define I2C_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_HYS | \ + MX8MP_PAD_CTL_PUE | \ + MX8MP_PAD_CTL_PE) + +static void setup_uart(void) +{ + void __iomem *uart = IOMEM(MX8M_UART2_BASE_ADDR); + + imx8m_early_setup_uart_clock(); + + imx8mp_setup_pad(MX8MP_PAD_UART2_TXD__UART2_DCE_TX | UART_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_UART2_RXD__UART2_DCE_RX | UART_PAD_CTRL); + imx8m_uart_setup(uart); + + pbl_set_putc(imx_uart_putc, uart); + + putc_ll('>'); +} + +static struct pmic_config pca9450_cfg[] = { + /* BUCKxOUT_DVS0/1 control BUCK123 output */ + { PCA9450_BUCK123_DVS, 0x29 }, + /* + * increase VDD_SOC to typical value 0.95V before first + * DRAM access, set DVS1 to 0.85v for suspend. + * Enable DVS control through PMIC_STBY_REQ and + * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) + */ + { PCA9450_BUCK1OUT_DVS0, 0x1C }, + { PCA9450_BUCK1OUT_DVS1, 0x14 }, + { PCA9450_BUCK1CTRL, 0x59 }, + /* + * Increase VDD_ARM to 0.95V to avoid issues in case software after + * Barebox switches to the OD ARM frequency without reprogramming the + * PMIC first. + */ + { PCA9450_BUCK2OUT_DVS0, 0x1C }, + /* set WDOG_B_CFG to cold reset */ + { PCA9450_RESET_CTRL, 0xA1 }, +}; + +static void power_init_board(void) +{ + struct pbl_i2c *i2c; + + imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL); + + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); + + i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR)); + + pmic_configure(i2c, 0x25, pca9450_cfg, ARRAY_SIZE(pca9450_cfg)); +} + +extern struct dram_timing_info imx8mp_debix_dram_timing; +extern struct dram_timing_info imx8mp_debix_8g_dram_timing; + +static void start_atf(struct dram_timing_info *dram_timing) +{ + /* + * If we are in EL3 we are running for the first time and need to + * initialize the DRAM and run TF-A (BL31). The TF-A will then jump + * to DRAM in EL2. + */ + if (current_el() != 3) + return; + + imx8mp_early_clock_init(); + + power_init_board(); + + imx8mp_ddr_init(dram_timing, DRAM_TYPE_LPDDR4); + + imx8mp_load_and_start_image_via_tfa(); +} + +/* + * Power-on execution flow of start_imx8mp_debix() might not be + * obvious for a very first read, so here's, hopefully helpful, + * summary: + * + * 1. MaskROM uploads PBL into OCRAM and that's where this function is + * executed for the first time. At entry the exception level is EL3. + * + * 2. DDR is initialized and the image is loaded from storage into DRAM. The PBL + * part is copied from OCRAM to the TF-A return address in DRAM. + * + * 3. TF-A is executed and exits into the PBL code in DRAM. TF-A has taken us + * from EL3 to EL2. + * + * 4. Standard barebox boot flow continues + */ +static __noreturn noinline void +imx8mp_debix_start(struct dram_timing_info *dram_timing, void *dtb) +{ + setup_uart(); + + start_atf(dram_timing); + + /* + * Standard entry we hit once we initialized both DDR and ATF + */ + imx8mp_barebox_entry(dtb); +} + +ENTRY_FUNCTION(start_polyhex_debix, r0, r1, r2) +{ + imx8mp_cpu_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + imx8mp_debix_start(&imx8mp_debix_dram_timing, + __dtb_z_imx8mp_debix_model_a_start); +} + +ENTRY_FUNCTION(start_polyhex_debix_som_a_8g, r0, r1, r2) +{ + imx8mp_cpu_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + imx8mp_debix_start(&imx8mp_debix_8g_dram_timing, + __dtb_z_imx8mp_debix_som_a_bmb_08_start); +} diff --git a/arch/arm/boards/polyhex-debix/lpddr4-timing.c b/arch/arm/boards/polyhex-debix/lpddr4-timing.c new file mode 100644 index 0000000000..2724b893d6 --- /dev/null +++ b/arch/arm/boards/polyhex-debix/lpddr4-timing.c @@ -0,0 +1,1123 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2019 NXP + * + * Generated code from MX8M_DDR_tool + */ + +#include <common.h> +#include <soc/imx8m/ddr.h> +#include <soc/imx8m/lpddr4_define.h> + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0xa1080020 }, + { 0x3d400020, 0x1323 }, + { 0x3d400024, 0x1c61a00 }, + { 0x3d400064, 0x710105 }, + { 0x3d400070, 0x61027f10 }, + { 0x3d400074, 0x7b0 }, + { 0x3d4000d0, 0xc003071a }, + { 0x3d4000d4, 0xb70000 }, + { 0x3d4000dc, 0xe40036 }, + { 0x3d4000e0, 0x330000 }, + { 0x3d4000e8, 0x660048 }, + { 0x3d4000ec, 0x160048 }, + { 0x3d400100, 0x1e261f28 }, + { 0x3d400104, 0x7073b }, + { 0x3d40010c, 0xe0e000 }, + { 0x3d400110, 0x11040a11 }, + { 0x3d400114, 0x2050e0e }, + { 0x3d400118, 0x1010008 }, + { 0x3d40011c, 0x501 }, + { 0x3d400130, 0x20700 }, + { 0x3d400134, 0xe100002 }, + { 0x3d400138, 0x10c }, + { 0x3d400144, 0xba005d }, + { 0x3d400180, 0x3a2001c }, + { 0x3d400184, 0x2f07187 }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x49b820c }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x1b0c }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0xdf00e4 }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x11 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x1 }, + { 0x3d4000f4, 0xc99 }, + { 0x3d400108, 0x810191a }, + { 0x3d400200, 0x1f }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, + { 0x3d400250, 0x1705 }, + { 0x3d400254, 0x2c }, + { 0x3d40025c, 0x4000030 }, + { 0x3d400264, 0x900093e7 }, + { 0x3d40026c, 0x2005574 }, + { 0x3d400400, 0x111 }, + { 0x3d400404, 0x72ff }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x2100e07 }, + { 0x3d400498, 0x620096 }, + { 0x3d40049c, 0x1100e07 }, + { 0x3d4004a0, 0xc8012c }, + { 0x3d402020, 0x1021 }, + { 0x3d402024, 0x30d400 }, + { 0x3d402050, 0x20d000 }, + { 0x3d402064, 0xc001c }, + { 0x3d4020dc, 0x840000 }, + { 0x3d4020e0, 0x330000 }, + { 0x3d4020e8, 0x660048 }, + { 0x3d4020ec, 0x160048 }, + { 0x3d402100, 0xa040305 }, + { 0x3d402104, 0x30407 }, + { 0x3d402108, 0x203060b }, + { 0x3d40210c, 0x505000 }, + { 0x3d402110, 0x2040202 }, + { 0x3d402114, 0x2030202 }, + { 0x3d402118, 0x1010004 }, + { 0x3d40211c, 0x301 }, + { 0x3d402130, 0x20300 }, + { 0x3d402134, 0xa100002 }, + { 0x3d402138, 0x1d }, + { 0x3d402144, 0x14000a }, + { 0x3d402180, 0x640004 }, + { 0x3d402190, 0x3818200 }, + { 0x3d402194, 0x80303 }, + { 0x3d4021b4, 0x100 }, + { 0x3d4020f4, 0xc99 }, + { 0x3d403020, 0x1021 }, + { 0x3d403024, 0xc3500 }, + { 0x3d403050, 0x20d000 }, + { 0x3d403064, 0x30007 }, + { 0x3d4030dc, 0x840000 }, + { 0x3d4030e0, 0x330000 }, + { 0x3d4030e8, 0x660048 }, + { 0x3d4030ec, 0x160048 }, + { 0x3d403100, 0xa010102 }, + { 0x3d403104, 0x30404 }, + { 0x3d403108, 0x203060b }, + { 0x3d40310c, 0x505000 }, + { 0x3d403110, 0x2040202 }, + { 0x3d403114, 0x2030202 }, + { 0x3d403118, 0x1010004 }, + { 0x3d40311c, 0x301 }, + { 0x3d403130, 0x20300 }, + { 0x3d403134, 0xa100002 }, + { 0x3d403138, 0x8 }, + { 0x3d403144, 0x50003 }, + { 0x3d403180, 0x190004 }, + { 0x3d403190, 0x3818200 }, + { 0x3d403194, 0x80303 }, + { 0x3d4031b4, 0x100 }, + { 0x3d4030f4, 0xc99 }, + { 0x3d400028, 0x0 }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x0 }, + { 0x100a1, 0x1 }, + { 0x100a2, 0x2 }, + { 0x100a3, 0x3 }, + { 0x100a4, 0x4 }, + { 0x100a5, 0x5 }, + { 0x100a6, 0x6 }, + { 0x100a7, 0x7 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x1 }, + { 0x110a2, 0x3 }, + { 0x110a3, 0x4 }, + { 0x110a4, 0x5 }, + { 0x110a5, 0x2 }, + { 0x110a6, 0x7 }, + { 0x110a7, 0x6 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x1 }, + { 0x120a2, 0x3 }, + { 0x120a3, 0x2 }, + { 0x120a4, 0x5 }, + { 0x120a5, 0x4 }, + { 0x120a6, 0x7 }, + { 0x120a7, 0x6 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x1 }, + { 0x130a2, 0x2 }, + { 0x130a3, 0x3 }, + { 0x130a4, 0x4 }, + { 0x130a5, 0x5 }, + { 0x130a6, 0x6 }, + { 0x130a7, 0x7 }, + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + { 0x11005f, 0x1ff }, + { 0x11015f, 0x1ff }, + { 0x11105f, 0x1ff }, + { 0x11115f, 0x1ff }, + { 0x11205f, 0x1ff }, + { 0x11215f, 0x1ff }, + { 0x11305f, 0x1ff }, + { 0x11315f, 0x1ff }, + { 0x21005f, 0x1ff }, + { 0x21015f, 0x1ff }, + { 0x21105f, 0x1ff }, + { 0x21115f, 0x1ff }, + { 0x21205f, 0x1ff }, + { 0x21215f, 0x1ff }, + { 0x21305f, 0x1ff }, + { 0x21315f, 0x1ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + { 0x200c5, 0x19 }, + { 0x1200c5, 0x7 }, + { 0x2200c5, 0x7 }, + { 0x2002e, 0x2 }, + { 0x12002e, 0x2 }, + { 0x22002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x20024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x120024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x220024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x20056, 0x3 }, + { 0x120056, 0x3 }, + { 0x220056, 0x3 }, + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x1204d, 0xe00 }, + { 0x1214d, 0xe00 }, + { 0x1304d, 0xe00 }, + { 0x1314d, 0xe00 }, + { 0x11004d, 0xe00 }, + { 0x11014d, 0xe00 }, + { 0x11104d, 0xe00 }, + { 0x11114d, 0xe00 }, + { 0x11204d, 0xe00 }, + { 0x11214d, 0xe00 }, + { 0x11304d, 0xe00 }, + { 0x11314d, 0xe00 }, + { 0x21004d, 0xe00 }, + { 0x21014d, 0xe00 }, + { 0x21104d, 0xe00 }, + { 0x21114d, 0xe00 }, + { 0x21204d, 0xe00 }, + { 0x21214d, 0xe00 }, + { 0x21304d, 0xe00 }, + { 0x21314d, 0xe00 }, + { 0x10049, 0xeba }, + { 0x10149, 0xeba }, + { 0x11049, 0xeba }, + { 0x11149, 0xeba }, + { 0x12049, 0xeba }, + { 0x12149, 0xeba }, + { 0x13049, 0xeba }, + { 0x13149, 0xeba }, + { 0x110049, 0xeba }, + { 0x110149, 0xeba }, + { 0x111049, 0xeba }, + { 0x111149, 0xeba }, + { 0x112049, 0xeba }, + { 0x112149, 0xeba }, + { 0x113049, 0xeba }, + { 0x113149, 0xeba }, + { 0x210049, 0xeba }, + { 0x210149, 0xeba }, + { 0x211049, 0xeba }, + { 0x211149, 0xeba }, + { 0x212049, 0xeba }, + { 0x212149, 0xeba }, + { 0x213049, 0xeba }, + { 0x213149, 0xeba }, + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x3a2 }, + { 0x120008, 0x64 }, + { 0x220008, 0x19 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x104 }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + { 0x1200b2, 0x104 }, + { 0x110043, 0x5a1 }, + { 0x110143, 0x5a1 }, + { 0x111043, 0x5a1 }, + { 0x111143, 0x5a1 }, + { 0x112043, 0x5a1 }, + { 0x112143, 0x5a1 }, + { 0x113043, 0x5a1 }, + { 0x113143, 0x5a1 }, + { 0x2200b2, 0x104 }, + { 0x210043, 0x5a1 }, + { 0x210143, 0x5a1 }, + { 0x211043, 0x5a1 }, + { 0x211143, 0x5a1 }, + { 0x212043, 0x5a1 }, + { 0x212143, 0x5a1 }, + { 0x213043, 0x5a1 }, + { 0x213143, 0x5a1 }, + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + { 0x20019, 0x1 }, + { 0x120019, 0x1 }, + { 0x220019, 0x1 }, + { 0x200f0, 0x660 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5665 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x12002d, 0x0 }, + { 0x22002d, 0x0 }, + { 0x2007d, 0x212 }, + { 0x12007d, 0x212 }, + { 0x22007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x12007c, 0x61 }, + { 0x22007c, 0x61 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x1204a, 0x500 }, + { 0x1304a, 0x500 }, + { 0x2002c, 0x0 }, +}; + +/* P0 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xe88 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x36e4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x36e4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xe400 }, + { 0x54033, 0x3336 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xe400 }, + { 0x54039, 0x3336 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P1 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp1_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P2 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp2_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P0 2D message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xe88 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x110 }, + { 0x54019, 0x36e4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x36e4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xe400 }, + { 0x54033, 0x3336 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xe400 }, + { 0x54039, 0x3336 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x633 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x633 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x633 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x633 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x633 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x633 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xb }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x1 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a4, 0x0 }, + { 0x900a5, 0x790 }, + { 0x900a6, 0x11a }, + { 0x900a7, 0x8 }, + { 0x900a8, 0x7aa }, + { 0x900a9, 0x2a }, + { 0x900aa, 0x10 }, + { 0x900ab, 0x7b2 }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x0 }, + { 0x900ae, 0x7c8 }, + { 0x900af, 0x109 }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x10 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x1 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xd }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x8 }, + { 0x90159, 0xe8 }, + { 0x9015a, 0x109 }, + { 0x9015b, 0x0 }, + { 0x9015c, 0x8140 }, + { 0x9015d, 0x10c }, + { 0x9015e, 0x10 }, + { 0x9015f, 0x8138 }, + { 0x90160, 0x104 }, + { 0x90161, 0x8 }, + { 0x90162, 0x448 }, + { 0x90163, 0x109 }, + { 0x90164, 0xf }, + { 0x90165, 0x7c0 }, + { 0x90166, 0x109 }, + { 0x90167, 0x0 }, + { 0x90168, 0xe8 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x47 }, + { 0x9016b, 0x630 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x8 }, + { 0x9016e, 0x618 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0xe0 }, + { 0x90172, 0x109 }, + { 0x90173, 0x0 }, + { 0x90174, 0x7c8 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x8140 }, + { 0x90178, 0x10c }, + { 0x90179, 0x0 }, + { 0x9017a, 0x478 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x1 }, + { 0x9017e, 0x8 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x4 }, + { 0x90181, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x29 }, + { 0x90026, 0x68 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x74 }, + { 0x2000c, 0xe8 }, + { 0x2000d, 0x915 }, + { 0x2000e, 0x2c }, + { 0x12000b, 0xc }, + { 0x12000c, 0x19 }, + { 0x12000d, 0xfa }, + { 0x12000e, 0x10 }, + { 0x22000b, 0x3 }, + { 0x22000c, 0x6 }, + { 0x22000d, 0x3e }, + { 0x22000e, 0x10 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x140080, 0xe0 }, + { 0x140081, 0x12 }, + { 0x140082, 0xe0 }, + { 0x140083, 0x12 }, + { 0x140084, 0xe0 }, + { 0x140085, 0x12 }, + { 0x240080, 0xe0 }, + { 0x240081, 0x12 }, + { 0x240082, 0xe0 }, + { 0x240083, 0x12 }, + { 0x240084, 0xe0 }, + { 0x240085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 } +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3720mts 1D */ + .drate = 3720, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 3720mts 2D */ + .drate = 3720, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* Samsung K4F6E3S4HM-MGCJ ddr timing config params */ +struct dram_timing_info imx8mp_debix_dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3720, 400, 100, }, +}; diff --git a/arch/arm/boards/protonic-imx6/board.c b/arch/arm/boards/protonic-imx6/board.c index a0dec5b1e2..9e62dc1544 100644 --- a/arch/arm/boards/protonic-imx6/board.c +++ b/arch/arm/boards/protonic-imx6/board.c @@ -13,18 +13,18 @@ #include <globalvar.h> #include <gpio.h> #include <i2c/i2c.h> -#include <mach/bbu.h> -#include <mach/imx6.h> -#include <mach/ocotp-fusemap.h> +#include <mach/imx/bbu.h> +#include <mach/imx/imx6.h> +#include <mach/imx/ocotp-fusemap.h> #include <mfd/imx6q-iomuxc-gpr.h> #include <mfd/syscon.h> #include <net.h> #include <of_device.h> -#include <regmap.h> +#include <linux/regmap.h> #include <sys/mount.h> #include <sys/stat.h> #include <unistd.h> -#include <usb/usb.h> +#include <linux/usb/usb.h> #define GPIO_HW_REV_ID {\ {IMX_GPIO_NR(2, 8), GPIOF_DIR_IN | GPIOF_ACTIVE_LOW, "rev_id0"}, \ @@ -84,7 +84,7 @@ struct prt_machine_data { }; struct prt_imx6_priv { - struct device_d *dev; + struct device *dev; const struct prt_machine_data *dcfg; unsigned int hw_id; unsigned int hw_rev; @@ -147,7 +147,7 @@ static int prt_imx6_read_rfid(struct prt_imx6_priv *priv, void *buf, size_t size) { const struct prt_machine_data *dcfg = priv->dcfg; - struct device_d *dev = priv->dev; + struct device *dev = priv->dev; struct i2c_client cl; int ret; @@ -187,7 +187,7 @@ static u8 prt_imx6_calc_rfid_cs(void *buf, size_t size) static int prt_imx6_set_mac(struct prt_imx6_priv *priv, struct prti6q_rfid_contents *rfid) { - struct device_d *dev = priv->dev; + struct device *dev = priv->dev; struct device_node *node; node = of_find_node_by_alias(of_get_root_node(), "ethernet0"); @@ -200,10 +200,7 @@ static int prt_imx6_set_mac(struct prt_imx6_priv *priv, return 0; if (!is_valid_ether_addr(&rfid->mac[0])) { - unsigned char ethaddr_str[sizeof("xx:xx:xx:xx:xx:xx")]; - - ethaddr_to_string(&rfid->mac[0], ethaddr_str); - dev_err(dev, "bad MAC addr: %s\n", ethaddr_str); + dev_err(dev, "bad MAC addr: %pM\n", &rfid->mac[0]); return -EILSEQ; } @@ -224,7 +221,7 @@ static int prt_imx6_set_serial(struct prt_imx6_priv *priv, char *serial) static int prt_imx6_read_i2c_mac_serial(struct prt_imx6_priv *priv) { - struct device_d *dev = priv->dev; + struct device *dev = priv->dev; struct prti6q_rfid_contents rfid; int ret; @@ -294,7 +291,7 @@ static int prt_imx6_set_ocotp_serial(struct param_d *param, void *driver_priv) static int prt_imx6_usb_mount(struct prt_imx6_priv *priv) { - struct device_d *dev = priv->dev; + struct device *dev = priv->dev; const char *path; struct stat s; int ret; @@ -333,7 +330,7 @@ exit_usb_mount: static int prt_imx6_usb_boot(struct bootentry *entry, int verbose, int dryrun) { struct prt_imx6_priv *priv = prt_priv; - struct device_d *dev = priv->dev; + struct device *dev = priv->dev; char *second_word; char buf[sizeof("vicut1q recovery")] = {}; struct bootm_data bootm_data = {}; @@ -465,7 +462,7 @@ static int prt_imx6_bootentry_provider(struct bootentries *bootentries, static int prt_imx6_env_init(struct prt_imx6_priv *priv) { const struct prt_machine_data *dcfg = priv->dcfg; - struct device_d *dev = priv->dev; + struct device *dev = priv->dev; char *delay, *bootsrc, *boot_targets; unsigned int autoboot_timeout; int ret; @@ -530,7 +527,7 @@ static int prt_imx6_bbu(struct prt_imx6_priv *priv) emmc_flags = BBU_HANDLER_FLAG_DEFAULT; } - devicefile = basprintf("mmc%d", dcfg->emmc_usdhc); + devicefile = basprintf("/dev/mmc%d", dcfg->emmc_usdhc); if (!devicefile) { ret = -ENOMEM; goto exit_bbu; @@ -540,7 +537,7 @@ static int prt_imx6_bbu(struct prt_imx6_priv *priv) if (ret) goto exit_bbu; - devicefile = basprintf("mmc%d", dcfg->sd_usdhc); + devicefile = basprintf("/dev/mmc%d", dcfg->sd_usdhc); if (!devicefile) { ret = -ENOMEM; goto exit_bbu; @@ -559,7 +556,7 @@ exit_bbu: static int prt_imx6_devices_init(void) { struct prt_imx6_priv *priv = prt_priv; - struct device_d *ocotp_dev; + struct device *ocotp_dev; struct param_d *p; if (!priv) @@ -615,7 +612,7 @@ static int prt_imx6_yaco_set_kvg_power_mode(struct prt_imx6_priv *priv, const char *serial) { static const char command[] = "{\"command\":\"mode\",\"value\":\"kvg\",\"on2\":true}"; - struct device_d *dev = priv->dev; + struct device *dev = priv->dev; struct console_device *yccon; int ret; @@ -914,7 +911,7 @@ exit_get_dcfg: return ret; } -static int prt_imx6_probe(struct device_d *dev) +static int prt_imx6_probe(struct device *dev) { struct prt_imx6_priv *priv; struct param_d *p; @@ -1262,7 +1259,7 @@ static const struct of_device_id prt_imx6_of_match[] = { { .compatible = "kvg,vicut1", .data = &prt_imx6_cfg_vicut1 }, { .compatible = "kvg,vicut1q", .data = &prt_imx6_cfg_vicut1q }, { .compatible = "kvg,vicutp", .data = &prt_imx6_cfg_vicutp }, - { .compatible = "lan,lanmcu", .data = &prt_imx6_cfg_lanmcu }, + { .compatible = "vdl,lanmcu", .data = &prt_imx6_cfg_lanmcu }, { .compatible = "ply,plybas", .data = &prt_imx6_cfg_plybas }, { .compatible = "ply,plym2m", .data = &prt_imx6_cfg_plym2m }, { .compatible = "prt,prti6g", .data = &prt_imx6_cfg_prti6g }, @@ -1277,7 +1274,7 @@ static const struct of_device_id prt_imx6_of_match[] = { }; BAREBOX_DEEP_PROBE_ENABLE(prt_imx6_of_match); -static struct driver_d prt_imx6_board_driver = { +static struct driver prt_imx6_board_driver = { .name = "board-protonic-imx6", .probe = prt_imx6_probe, .of_compatible = DRV_OF_COMPAT(prt_imx6_of_match), diff --git a/arch/arm/boards/protonic-imx6/flash-header-lanmcu.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-lanmcu.imxcfg index e6e37672aa..7deaaa9b7b 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-lanmcu.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-lanmcu.imxcfg @@ -61,7 +61,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/flash-header-plybas.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-plybas.imxcfg index 16f2f596c7..c9c9d076f5 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-plybas.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-plybas.imxcfg @@ -63,7 +63,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/flash-header-plym2m.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-plym2m.imxcfg index 1692c1e087..71df95b968 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-plym2m.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-plym2m.imxcfg @@ -63,7 +63,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/flash-header-prti6q.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-prti6q.imxcfg index 2d0064e8c1..deced6901b 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-prti6q.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-prti6q.imxcfg @@ -65,7 +65,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/flash-header-prtmvt.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-prtmvt.imxcfg index 887811fa42..58530910fc 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-prtmvt.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-prtmvt.imxcfg @@ -63,7 +63,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/flash-header-prtrvt.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-prtrvt.imxcfg index 16f2f596c7..c9c9d076f5 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-prtrvt.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-prtrvt.imxcfg @@ -63,7 +63,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/flash-header-prtvt7.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-prtvt7.imxcfg index 7f2662567e..5073458a03 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-prtvt7.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-prtvt7.imxcfg @@ -61,7 +61,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/flash-header-vicut1.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-vicut1.imxcfg index b86a32be0c..a879229923 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-vicut1.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-vicut1.imxcfg @@ -63,7 +63,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/flash-header-vicut1q.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-vicut1q.imxcfg index 3abb21b70e..8e41a410df 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-vicut1q.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-vicut1q.imxcfg @@ -66,7 +66,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/flash-header-vicutp.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-vicutp.imxcfg index a8178fe258..54a86a0008 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-vicutp.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-vicutp.imxcfg @@ -126,7 +126,7 @@ wm 32 0x021b001c 0x04008040 /* MPZQHWCTRL */ wm 32 0x021b0800 0xa1390003 /* ZQ mode = 3 force calibration */ -wm 32 0x021b4800 0xa1390003 +wm 32 0x021b4800 0xa1390003 wm 32 0x021b0020 MDREF_64KHZ diff --git a/arch/arm/boards/protonic-imx6/lowlevel.c b/arch/arm/boards/protonic-imx6/lowlevel.c index ef8e7016d1..38e65037e6 100644 --- a/arch/arm/boards/protonic-imx6/lowlevel.c +++ b/arch/arm/boards/protonic-imx6/lowlevel.c @@ -6,8 +6,8 @@ #include <asm/barebox-arm.h> #include <common.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> extern char __dtb_z_imx6q_prti6q_start[]; extern char __dtb_z_imx6q_prtwd2_start[]; diff --git a/arch/arm/boards/protonic-imx8m/board.c b/arch/arm/boards/protonic-imx8m/board.c index 87264f0c97..d4bacbc6f0 100644 --- a/arch/arm/boards/protonic-imx8m/board.c +++ b/arch/arm/boards/protonic-imx8m/board.c @@ -7,7 +7,7 @@ #include <environment.h> #include <i2c/i2c.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> static int prt_prt8mm_init_power(void) { @@ -39,7 +39,7 @@ static int prt_prt8mm_init_power(void) return 0; } -static int prt_prt8mm_probe(struct device_d *dev) +static int prt_prt8mm_probe(struct device *dev) { int emmc_bbu_flag = 0; int sd_bbu_flag = 0; @@ -75,8 +75,9 @@ static const struct of_device_id prt_imx8mm_of_match[] = { { .compatible = "prt,prt8mm", }, { /* sentinel */ }, }; +MODULE_DEVICE_TABLE(of, prt_imx8mm_of_match); -static struct driver_d prt_prt8mm_board_driver = { +static struct driver prt_prt8mm_board_driver = { .name = "board-protonic-imx8mm", .probe = prt_prt8mm_probe, .of_compatible = DRV_OF_COMPAT(prt_imx8mm_of_match), diff --git a/arch/arm/boards/protonic-imx8m/flash-header-prt8mm.imxcfg b/arch/arm/boards/protonic-imx8m/flash-header-prt8mm.imxcfg index 10606ce29c..8aff991618 100644 --- a/arch/arm/boards/protonic-imx8m/flash-header-prt8mm.imxcfg +++ b/arch/arm/boards/protonic-imx8m/flash-header-prt8mm.imxcfg @@ -5,3 +5,5 @@ soc imx8mm loadaddr 0x007e1000 max_load_size 0x3f000 ivtofs 0x400 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c b/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c index bfae39ea52..711316ae4b 100644 --- a/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c +++ b/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c @@ -2,16 +2,16 @@ #include <asm/barebox-arm.h> #include <common.h> -#include <image-metadata.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <firmware.h> -#include <mach/atf.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <mach/imx8m-ccm-regs.h> -#include <mach/imx8mm-regs.h> -#include <mach/iomux-mx8mm.h> -#include <mach/xload.h> +#include <mach/imx/atf.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/imx8mm-regs.h> +#include <mach/imx/iomux-mx8mm.h> +#include <mach/imx/xload.h> #include <soc/fsl/fsl_udc.h> #include <soc/imx8m/ddr.h> @@ -87,7 +87,5 @@ ENTRY_FUNCTION(start_prt_prt8mm, r0, r1, r2) relocate_to_current_adr(); setup_c(); - IMD_USED_OF(imx8mm_prt8mm); - prt_prt8mm_start(); } diff --git a/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8mm.c b/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8mm.c index 2c55e7d451..6fea2f0625 100644 --- a/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8mm.c +++ b/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8mm.c @@ -336,729 +336,6 @@ static struct dram_cfg_param lpddr4_ddrphy_cfg[] = { { 0x2200ca, 0x24 }, }; -/* ddr phy trained csr */ -static struct dram_cfg_param lpddr4_ddrphy_trained_csr[] = { - { 0x200b2, 0x0 }, - { 0x1200b2, 0x0 }, - { 0x2200b2, 0x0 }, - { 0x200cb, 0x0 }, - { 0x10043, 0x0 }, - { 0x110043, 0x0 }, - { 0x210043, 0x0 }, - { 0x10143, 0x0 }, - { 0x110143, 0x0 }, - { 0x210143, 0x0 }, - { 0x11043, 0x0 }, - { 0x111043, 0x0 }, - { 0x211043, 0x0 }, - { 0x11143, 0x0 }, - { 0x111143, 0x0 }, - { 0x211143, 0x0 }, - { 0x12043, 0x0 }, - { 0x112043, 0x0 }, - { 0x212043, 0x0 }, - { 0x12143, 0x0 }, - { 0x112143, 0x0 }, - { 0x212143, 0x0 }, - { 0x13043, 0x0 }, - { 0x113043, 0x0 }, - { 0x213043, 0x0 }, - { 0x13143, 0x0 }, - { 0x113143, 0x0 }, - { 0x213143, 0x0 }, - { 0x80, 0x0 }, - { 0x100080, 0x0 }, - { 0x200080, 0x0 }, - { 0x1080, 0x0 }, - { 0x101080, 0x0 }, - { 0x201080, 0x0 }, - { 0x2080, 0x0 }, - { 0x102080, 0x0 }, - { 0x202080, 0x0 }, - { 0x3080, 0x0 }, - { 0x103080, 0x0 }, - { 0x203080, 0x0 }, - { 0x4080, 0x0 }, - { 0x104080, 0x0 }, - { 0x204080, 0x0 }, - { 0x5080, 0x0 }, - { 0x105080, 0x0 }, - { 0x205080, 0x0 }, - { 0x6080, 0x0 }, - { 0x106080, 0x0 }, - { 0x206080, 0x0 }, - { 0x7080, 0x0 }, - { 0x107080, 0x0 }, - { 0x207080, 0x0 }, - { 0x8080, 0x0 }, - { 0x108080, 0x0 }, - { 0x208080, 0x0 }, - { 0x9080, 0x0 }, - { 0x109080, 0x0 }, - { 0x209080, 0x0 }, - { 0x10080, 0x0 }, - { 0x110080, 0x0 }, - { 0x210080, 0x0 }, - { 0x10180, 0x0 }, - { 0x110180, 0x0 }, - { 0x210180, 0x0 }, - { 0x11080, 0x0 }, - { 0x111080, 0x0 }, - { 0x211080, 0x0 }, - { 0x11180, 0x0 }, - { 0x111180, 0x0 }, - { 0x211180, 0x0 }, - { 0x12080, 0x0 }, - { 0x112080, 0x0 }, - { 0x212080, 0x0 }, - { 0x12180, 0x0 }, - { 0x112180, 0x0 }, - { 0x212180, 0x0 }, - { 0x13080, 0x0 }, - { 0x113080, 0x0 }, - { 0x213080, 0x0 }, - { 0x13180, 0x0 }, - { 0x113180, 0x0 }, - { 0x213180, 0x0 }, - { 0x10081, 0x0 }, - { 0x110081, 0x0 }, - { 0x210081, 0x0 }, - { 0x10181, 0x0 }, - { 0x110181, 0x0 }, - { 0x210181, 0x0 }, - { 0x11081, 0x0 }, - { 0x111081, 0x0 }, - { 0x211081, 0x0 }, - { 0x11181, 0x0 }, - { 0x111181, 0x0 }, - { 0x211181, 0x0 }, - { 0x12081, 0x0 }, - { 0x112081, 0x0 }, - { 0x212081, 0x0 }, - { 0x12181, 0x0 }, - { 0x112181, 0x0 }, - { 0x212181, 0x0 }, - { 0x13081, 0x0 }, - { 0x113081, 0x0 }, - { 0x213081, 0x0 }, - { 0x13181, 0x0 }, - { 0x113181, 0x0 }, - { 0x213181, 0x0 }, - { 0x100d0, 0x0 }, - { 0x1100d0, 0x0 }, - { 0x2100d0, 0x0 }, - { 0x101d0, 0x0 }, - { 0x1101d0, 0x0 }, - { 0x2101d0, 0x0 }, - { 0x110d0, 0x0 }, - { 0x1110d0, 0x0 }, - { 0x2110d0, 0x0 }, - { 0x111d0, 0x0 }, - { 0x1111d0, 0x0 }, - { 0x2111d0, 0x0 }, - { 0x120d0, 0x0 }, - { 0x1120d0, 0x0 }, - { 0x2120d0, 0x0 }, - { 0x121d0, 0x0 }, - { 0x1121d0, 0x0 }, - { 0x2121d0, 0x0 }, - { 0x130d0, 0x0 }, - { 0x1130d0, 0x0 }, - { 0x2130d0, 0x0 }, - { 0x131d0, 0x0 }, - { 0x1131d0, 0x0 }, - { 0x2131d0, 0x0 }, - { 0x100d1, 0x0 }, - { 0x1100d1, 0x0 }, - { 0x2100d1, 0x0 }, - { 0x101d1, 0x0 }, - { 0x1101d1, 0x0 }, - { 0x2101d1, 0x0 }, - { 0x110d1, 0x0 }, - { 0x1110d1, 0x0 }, - { 0x2110d1, 0x0 }, - { 0x111d1, 0x0 }, - { 0x1111d1, 0x0 }, - { 0x2111d1, 0x0 }, - { 0x120d1, 0x0 }, - { 0x1120d1, 0x0 }, - { 0x2120d1, 0x0 }, - { 0x121d1, 0x0 }, - { 0x1121d1, 0x0 }, - { 0x2121d1, 0x0 }, - { 0x130d1, 0x0 }, - { 0x1130d1, 0x0 }, - { 0x2130d1, 0x0 }, - { 0x131d1, 0x0 }, - { 0x1131d1, 0x0 }, - { 0x2131d1, 0x0 }, - { 0x10068, 0x0 }, - { 0x10168, 0x0 }, - { 0x10268, 0x0 }, - { 0x10368, 0x0 }, - { 0x10468, 0x0 }, - { 0x10568, 0x0 }, - { 0x10668, 0x0 }, - { 0x10768, 0x0 }, - { 0x10868, 0x0 }, - { 0x11068, 0x0 }, - { 0x11168, 0x0 }, - { 0x11268, 0x0 }, - { 0x11368, 0x0 }, - { 0x11468, 0x0 }, - { 0x11568, 0x0 }, - { 0x11668, 0x0 }, - { 0x11768, 0x0 }, - { 0x11868, 0x0 }, - { 0x12068, 0x0 }, - { 0x12168, 0x0 }, - { 0x12268, 0x0 }, - { 0x12368, 0x0 }, - { 0x12468, 0x0 }, - { 0x12568, 0x0 }, - { 0x12668, 0x0 }, - { 0x12768, 0x0 }, - { 0x12868, 0x0 }, - { 0x13068, 0x0 }, - { 0x13168, 0x0 }, - { 0x13268, 0x0 }, - { 0x13368, 0x0 }, - { 0x13468, 0x0 }, - { 0x13568, 0x0 }, - { 0x13668, 0x0 }, - { 0x13768, 0x0 }, - { 0x13868, 0x0 }, - { 0x10069, 0x0 }, - { 0x10169, 0x0 }, - { 0x10269, 0x0 }, - { 0x10369, 0x0 }, - { 0x10469, 0x0 }, - { 0x10569, 0x0 }, - { 0x10669, 0x0 }, - { 0x10769, 0x0 }, - { 0x10869, 0x0 }, - { 0x11069, 0x0 }, - { 0x11169, 0x0 }, - { 0x11269, 0x0 }, - { 0x11369, 0x0 }, - { 0x11469, 0x0 }, - { 0x11569, 0x0 }, - { 0x11669, 0x0 }, - { 0x11769, 0x0 }, - { 0x11869, 0x0 }, - { 0x12069, 0x0 }, - { 0x12169, 0x0 }, - { 0x12269, 0x0 }, - { 0x12369, 0x0 }, - { 0x12469, 0x0 }, - { 0x12569, 0x0 }, - { 0x12669, 0x0 }, - { 0x12769, 0x0 }, - { 0x12869, 0x0 }, - { 0x13069, 0x0 }, - { 0x13169, 0x0 }, - { 0x13269, 0x0 }, - { 0x13369, 0x0 }, - { 0x13469, 0x0 }, - { 0x13569, 0x0 }, - { 0x13669, 0x0 }, - { 0x13769, 0x0 }, - { 0x13869, 0x0 }, - { 0x1008c, 0x0 }, - { 0x11008c, 0x0 }, - { 0x21008c, 0x0 }, - { 0x1018c, 0x0 }, - { 0x11018c, 0x0 }, - { 0x21018c, 0x0 }, - { 0x1108c, 0x0 }, - { 0x11108c, 0x0 }, - { 0x21108c, 0x0 }, - { 0x1118c, 0x0 }, - { 0x11118c, 0x0 }, - { 0x21118c, 0x0 }, - { 0x1208c, 0x0 }, - { 0x11208c, 0x0 }, - { 0x21208c, 0x0 }, - { 0x1218c, 0x0 }, - { 0x11218c, 0x0 }, - { 0x21218c, 0x0 }, - { 0x1308c, 0x0 }, - { 0x11308c, 0x0 }, - { 0x21308c, 0x0 }, - { 0x1318c, 0x0 }, - { 0x11318c, 0x0 }, - { 0x21318c, 0x0 }, - { 0x1008d, 0x0 }, - { 0x11008d, 0x0 }, - { 0x21008d, 0x0 }, - { 0x1018d, 0x0 }, - { 0x11018d, 0x0 }, - { 0x21018d, 0x0 }, - { 0x1108d, 0x0 }, - { 0x11108d, 0x0 }, - { 0x21108d, 0x0 }, - { 0x1118d, 0x0 }, - { 0x11118d, 0x0 }, - { 0x21118d, 0x0 }, - { 0x1208d, 0x0 }, - { 0x11208d, 0x0 }, - { 0x21208d, 0x0 }, - { 0x1218d, 0x0 }, - { 0x11218d, 0x0 }, - { 0x21218d, 0x0 }, - { 0x1308d, 0x0 }, - { 0x11308d, 0x0 }, - { 0x21308d, 0x0 }, - { 0x1318d, 0x0 }, - { 0x11318d, 0x0 }, - { 0x21318d, 0x0 }, - { 0x100c0, 0x0 }, - { 0x1100c0, 0x0 }, - { 0x2100c0, 0x0 }, - { 0x101c0, 0x0 }, - { 0x1101c0, 0x0 }, - { 0x2101c0, 0x0 }, - { 0x102c0, 0x0 }, - { 0x1102c0, 0x0 }, - { 0x2102c0, 0x0 }, - { 0x103c0, 0x0 }, - { 0x1103c0, 0x0 }, - { 0x2103c0, 0x0 }, - { 0x104c0, 0x0 }, - { 0x1104c0, 0x0 }, - { 0x2104c0, 0x0 }, - { 0x105c0, 0x0 }, - { 0x1105c0, 0x0 }, - { 0x2105c0, 0x0 }, - { 0x106c0, 0x0 }, - { 0x1106c0, 0x0 }, - { 0x2106c0, 0x0 }, - { 0x107c0, 0x0 }, - { 0x1107c0, 0x0 }, - { 0x2107c0, 0x0 }, - { 0x108c0, 0x0 }, - { 0x1108c0, 0x0 }, - { 0x2108c0, 0x0 }, - { 0x110c0, 0x0 }, - { 0x1110c0, 0x0 }, - { 0x2110c0, 0x0 }, - { 0x111c0, 0x0 }, - { 0x1111c0, 0x0 }, - { 0x2111c0, 0x0 }, - { 0x112c0, 0x0 }, - { 0x1112c0, 0x0 }, - { 0x2112c0, 0x0 }, - { 0x113c0, 0x0 }, - { 0x1113c0, 0x0 }, - { 0x2113c0, 0x0 }, - { 0x114c0, 0x0 }, - { 0x1114c0, 0x0 }, - { 0x2114c0, 0x0 }, - { 0x115c0, 0x0 }, - { 0x1115c0, 0x0 }, - { 0x2115c0, 0x0 }, - { 0x116c0, 0x0 }, - { 0x1116c0, 0x0 }, - { 0x2116c0, 0x0 }, - { 0x117c0, 0x0 }, - { 0x1117c0, 0x0 }, - { 0x2117c0, 0x0 }, - { 0x118c0, 0x0 }, - { 0x1118c0, 0x0 }, - { 0x2118c0, 0x0 }, - { 0x120c0, 0x0 }, - { 0x1120c0, 0x0 }, - { 0x2120c0, 0x0 }, - { 0x121c0, 0x0 }, - { 0x1121c0, 0x0 }, - { 0x2121c0, 0x0 }, - { 0x122c0, 0x0 }, - { 0x1122c0, 0x0 }, - { 0x2122c0, 0x0 }, - { 0x123c0, 0x0 }, - { 0x1123c0, 0x0 }, - { 0x2123c0, 0x0 }, - { 0x124c0, 0x0 }, - { 0x1124c0, 0x0 }, - { 0x2124c0, 0x0 }, - { 0x125c0, 0x0 }, - { 0x1125c0, 0x0 }, - { 0x2125c0, 0x0 }, - { 0x126c0, 0x0 }, - { 0x1126c0, 0x0 }, - { 0x2126c0, 0x0 }, - { 0x127c0, 0x0 }, - { 0x1127c0, 0x0 }, - { 0x2127c0, 0x0 }, - { 0x128c0, 0x0 }, - { 0x1128c0, 0x0 }, - { 0x2128c0, 0x0 }, - { 0x130c0, 0x0 }, - { 0x1130c0, 0x0 }, - { 0x2130c0, 0x0 }, - { 0x131c0, 0x0 }, - { 0x1131c0, 0x0 }, - { 0x2131c0, 0x0 }, - { 0x132c0, 0x0 }, - { 0x1132c0, 0x0 }, - { 0x2132c0, 0x0 }, - { 0x133c0, 0x0 }, - { 0x1133c0, 0x0 }, - { 0x2133c0, 0x0 }, - { 0x134c0, 0x0 }, - { 0x1134c0, 0x0 }, - { 0x2134c0, 0x0 }, - { 0x135c0, 0x0 }, - { 0x1135c0, 0x0 }, - { 0x2135c0, 0x0 }, - { 0x136c0, 0x0 }, - { 0x1136c0, 0x0 }, - { 0x2136c0, 0x0 }, - { 0x137c0, 0x0 }, - { 0x1137c0, 0x0 }, - { 0x2137c0, 0x0 }, - { 0x138c0, 0x0 }, - { 0x1138c0, 0x0 }, - { 0x2138c0, 0x0 }, - { 0x100c1, 0x0 }, - { 0x1100c1, 0x0 }, - { 0x2100c1, 0x0 }, - { 0x101c1, 0x0 }, - { 0x1101c1, 0x0 }, - { 0x2101c1, 0x0 }, - { 0x102c1, 0x0 }, - { 0x1102c1, 0x0 }, - { 0x2102c1, 0x0 }, - { 0x103c1, 0x0 }, - { 0x1103c1, 0x0 }, - { 0x2103c1, 0x0 }, - { 0x104c1, 0x0 }, - { 0x1104c1, 0x0 }, - { 0x2104c1, 0x0 }, - { 0x105c1, 0x0 }, - { 0x1105c1, 0x0 }, - { 0x2105c1, 0x0 }, - { 0x106c1, 0x0 }, - { 0x1106c1, 0x0 }, - { 0x2106c1, 0x0 }, - { 0x107c1, 0x0 }, - { 0x1107c1, 0x0 }, - { 0x2107c1, 0x0 }, - { 0x108c1, 0x0 }, - { 0x1108c1, 0x0 }, - { 0x2108c1, 0x0 }, - { 0x110c1, 0x0 }, - { 0x1110c1, 0x0 }, - { 0x2110c1, 0x0 }, - { 0x111c1, 0x0 }, - { 0x1111c1, 0x0 }, - { 0x2111c1, 0x0 }, - { 0x112c1, 0x0 }, - { 0x1112c1, 0x0 }, - { 0x2112c1, 0x0 }, - { 0x113c1, 0x0 }, - { 0x1113c1, 0x0 }, - { 0x2113c1, 0x0 }, - { 0x114c1, 0x0 }, - { 0x1114c1, 0x0 }, - { 0x2114c1, 0x0 }, - { 0x115c1, 0x0 }, - { 0x1115c1, 0x0 }, - { 0x2115c1, 0x0 }, - { 0x116c1, 0x0 }, - { 0x1116c1, 0x0 }, - { 0x2116c1, 0x0 }, - { 0x117c1, 0x0 }, - { 0x1117c1, 0x0 }, - { 0x2117c1, 0x0 }, - { 0x118c1, 0x0 }, - { 0x1118c1, 0x0 }, - { 0x2118c1, 0x0 }, - { 0x120c1, 0x0 }, - { 0x1120c1, 0x0 }, - { 0x2120c1, 0x0 }, - { 0x121c1, 0x0 }, - { 0x1121c1, 0x0 }, - { 0x2121c1, 0x0 }, - { 0x122c1, 0x0 }, - { 0x1122c1, 0x0 }, - { 0x2122c1, 0x0 }, - { 0x123c1, 0x0 }, - { 0x1123c1, 0x0 }, - { 0x2123c1, 0x0 }, - { 0x124c1, 0x0 }, - { 0x1124c1, 0x0 }, - { 0x2124c1, 0x0 }, - { 0x125c1, 0x0 }, - { 0x1125c1, 0x0 }, - { 0x2125c1, 0x0 }, - { 0x126c1, 0x0 }, - { 0x1126c1, 0x0 }, - { 0x2126c1, 0x0 }, - { 0x127c1, 0x0 }, - { 0x1127c1, 0x0 }, - { 0x2127c1, 0x0 }, - { 0x128c1, 0x0 }, - { 0x1128c1, 0x0 }, - { 0x2128c1, 0x0 }, - { 0x130c1, 0x0 }, - { 0x1130c1, 0x0 }, - { 0x2130c1, 0x0 }, - { 0x131c1, 0x0 }, - { 0x1131c1, 0x0 }, - { 0x2131c1, 0x0 }, - { 0x132c1, 0x0 }, - { 0x1132c1, 0x0 }, - { 0x2132c1, 0x0 }, - { 0x133c1, 0x0 }, - { 0x1133c1, 0x0 }, - { 0x2133c1, 0x0 }, - { 0x134c1, 0x0 }, - { 0x1134c1, 0x0 }, - { 0x2134c1, 0x0 }, - { 0x135c1, 0x0 }, - { 0x1135c1, 0x0 }, - { 0x2135c1, 0x0 }, - { 0x136c1, 0x0 }, - { 0x1136c1, 0x0 }, - { 0x2136c1, 0x0 }, - { 0x137c1, 0x0 }, - { 0x1137c1, 0x0 }, - { 0x2137c1, 0x0 }, - { 0x138c1, 0x0 }, - { 0x1138c1, 0x0 }, - { 0x2138c1, 0x0 }, - { 0x10020, 0x0 }, - { 0x110020, 0x0 }, - { 0x210020, 0x0 }, - { 0x11020, 0x0 }, - { 0x111020, 0x0 }, - { 0x211020, 0x0 }, - { 0x12020, 0x0 }, - { 0x112020, 0x0 }, - { 0x212020, 0x0 }, - { 0x13020, 0x0 }, - { 0x113020, 0x0 }, - { 0x213020, 0x0 }, - { 0x20072, 0x0 }, - { 0x20073, 0x0 }, - { 0x20074, 0x0 }, - { 0x100aa, 0x0 }, - { 0x110aa, 0x0 }, - { 0x120aa, 0x0 }, - { 0x130aa, 0x0 }, - { 0x20010, 0x0 }, - { 0x120010, 0x0 }, - { 0x220010, 0x0 }, - { 0x20011, 0x0 }, - { 0x120011, 0x0 }, - { 0x220011, 0x0 }, - { 0x100ae, 0x0 }, - { 0x1100ae, 0x0 }, - { 0x2100ae, 0x0 }, - { 0x100af, 0x0 }, - { 0x1100af, 0x0 }, - { 0x2100af, 0x0 }, - { 0x110ae, 0x0 }, - { 0x1110ae, 0x0 }, - { 0x2110ae, 0x0 }, - { 0x110af, 0x0 }, - { 0x1110af, 0x0 }, - { 0x2110af, 0x0 }, - { 0x120ae, 0x0 }, - { 0x1120ae, 0x0 }, - { 0x2120ae, 0x0 }, - { 0x120af, 0x0 }, - { 0x1120af, 0x0 }, - { 0x2120af, 0x0 }, - { 0x130ae, 0x0 }, - { 0x1130ae, 0x0 }, - { 0x2130ae, 0x0 }, - { 0x130af, 0x0 }, - { 0x1130af, 0x0 }, - { 0x2130af, 0x0 }, - { 0x20020, 0x0 }, - { 0x120020, 0x0 }, - { 0x220020, 0x0 }, - { 0x100a0, 0x0 }, - { 0x100a1, 0x0 }, - { 0x100a2, 0x0 }, - { 0x100a3, 0x0 }, - { 0x100a4, 0x0 }, - { 0x100a5, 0x0 }, - { 0x100a6, 0x0 }, - { 0x100a7, 0x0 }, - { 0x110a0, 0x0 }, - { 0x110a1, 0x0 }, - { 0x110a2, 0x0 }, - { 0x110a3, 0x0 }, - { 0x110a4, 0x0 }, - { 0x110a5, 0x0 }, - { 0x110a6, 0x0 }, - { 0x110a7, 0x0 }, - { 0x120a0, 0x0 }, - { 0x120a1, 0x0 }, - { 0x120a2, 0x0 }, - { 0x120a3, 0x0 }, - { 0x120a4, 0x0 }, - { 0x120a5, 0x0 }, - { 0x120a6, 0x0 }, - { 0x120a7, 0x0 }, - { 0x130a0, 0x0 }, - { 0x130a1, 0x0 }, - { 0x130a2, 0x0 }, - { 0x130a3, 0x0 }, - { 0x130a4, 0x0 }, - { 0x130a5, 0x0 }, - { 0x130a6, 0x0 }, - { 0x130a7, 0x0 }, - { 0x2007c, 0x0 }, - { 0x12007c, 0x0 }, - { 0x22007c, 0x0 }, - { 0x2007d, 0x0 }, - { 0x12007d, 0x0 }, - { 0x22007d, 0x0 }, - { 0x400fd, 0x0 }, - { 0x400c0, 0x0 }, - { 0x90201, 0x0 }, - { 0x190201, 0x0 }, - { 0x290201, 0x0 }, - { 0x90202, 0x0 }, - { 0x190202, 0x0 }, - { 0x290202, 0x0 }, - { 0x90203, 0x0 }, - { 0x190203, 0x0 }, - { 0x290203, 0x0 }, - { 0x90204, 0x0 }, - { 0x190204, 0x0 }, - { 0x290204, 0x0 }, - { 0x90205, 0x0 }, - { 0x190205, 0x0 }, - { 0x290205, 0x0 }, - { 0x90206, 0x0 }, - { 0x190206, 0x0 }, - { 0x290206, 0x0 }, - { 0x90207, 0x0 }, - { 0x190207, 0x0 }, - { 0x290207, 0x0 }, - { 0x90208, 0x0 }, - { 0x190208, 0x0 }, - { 0x290208, 0x0 }, - { 0x10062, 0x0 }, - { 0x10162, 0x0 }, - { 0x10262, 0x0 }, - { 0x10362, 0x0 }, - { 0x10462, 0x0 }, - { 0x10562, 0x0 }, - { 0x10662, 0x0 }, - { 0x10762, 0x0 }, - { 0x10862, 0x0 }, - { 0x11062, 0x0 }, - { 0x11162, 0x0 }, - { 0x11262, 0x0 }, - { 0x11362, 0x0 }, - { 0x11462, 0x0 }, - { 0x11562, 0x0 }, - { 0x11662, 0x0 }, - { 0x11762, 0x0 }, - { 0x11862, 0x0 }, - { 0x12062, 0x0 }, - { 0x12162, 0x0 }, - { 0x12262, 0x0 }, - { 0x12362, 0x0 }, - { 0x12462, 0x0 }, - { 0x12562, 0x0 }, - { 0x12662, 0x0 }, - { 0x12762, 0x0 }, - { 0x12862, 0x0 }, - { 0x13062, 0x0 }, - { 0x13162, 0x0 }, - { 0x13262, 0x0 }, - { 0x13362, 0x0 }, - { 0x13462, 0x0 }, - { 0x13562, 0x0 }, - { 0x13662, 0x0 }, - { 0x13762, 0x0 }, - { 0x13862, 0x0 }, - { 0x20077, 0x0 }, - { 0x10001, 0x0 }, - { 0x11001, 0x0 }, - { 0x12001, 0x0 }, - { 0x13001, 0x0 }, - { 0x10040, 0x0 }, - { 0x10140, 0x0 }, - { 0x10240, 0x0 }, - { 0x10340, 0x0 }, - { 0x10440, 0x0 }, - { 0x10540, 0x0 }, - { 0x10640, 0x0 }, - { 0x10740, 0x0 }, - { 0x10840, 0x0 }, - { 0x10030, 0x0 }, - { 0x10130, 0x0 }, - { 0x10230, 0x0 }, - { 0x10330, 0x0 }, - { 0x10430, 0x0 }, - { 0x10530, 0x0 }, - { 0x10630, 0x0 }, - { 0x10730, 0x0 }, - { 0x10830, 0x0 }, - { 0x11040, 0x0 }, - { 0x11140, 0x0 }, - { 0x11240, 0x0 }, - { 0x11340, 0x0 }, - { 0x11440, 0x0 }, - { 0x11540, 0x0 }, - { 0x11640, 0x0 }, - { 0x11740, 0x0 }, - { 0x11840, 0x0 }, - { 0x11030, 0x0 }, - { 0x11130, 0x0 }, - { 0x11230, 0x0 }, - { 0x11330, 0x0 }, - { 0x11430, 0x0 }, - { 0x11530, 0x0 }, - { 0x11630, 0x0 }, - { 0x11730, 0x0 }, - { 0x11830, 0x0 }, - { 0x12040, 0x0 }, - { 0x12140, 0x0 }, - { 0x12240, 0x0 }, - { 0x12340, 0x0 }, - { 0x12440, 0x0 }, - { 0x12540, 0x0 }, - { 0x12640, 0x0 }, - { 0x12740, 0x0 }, - { 0x12840, 0x0 }, - { 0x12030, 0x0 }, - { 0x12130, 0x0 }, - { 0x12230, 0x0 }, - { 0x12330, 0x0 }, - { 0x12430, 0x0 }, - { 0x12530, 0x0 }, - { 0x12630, 0x0 }, - { 0x12730, 0x0 }, - { 0x12830, 0x0 }, - { 0x13040, 0x0 }, - { 0x13140, 0x0 }, - { 0x13240, 0x0 }, - { 0x13340, 0x0 }, - { 0x13440, 0x0 }, - { 0x13540, 0x0 }, - { 0x13640, 0x0 }, - { 0x13740, 0x0 }, - { 0x13840, 0x0 }, - { 0x13030, 0x0 }, - { 0x13130, 0x0 }, - { 0x13230, 0x0 }, - { 0x13330, 0x0 }, - { 0x13430, 0x0 }, - { 0x13530, 0x0 }, - { 0x13630, 0x0 }, - { 0x13730, 0x0 }, - { 0x13830, 0x0 }, -}; - /* P0 message block paremeter for training firmware */ static struct dram_cfg_param lpddr4_fsp0_cfg[] = { { 0xd0000, 0x0 }, @@ -1987,8 +1264,6 @@ struct dram_timing_info prt8mm_dram_timing = { .ddrphy_cfg_num = ARRAY_SIZE(lpddr4_ddrphy_cfg), .fsp_msg = lpddr4_dram_fsp_msg, .fsp_msg_num = ARRAY_SIZE(lpddr4_dram_fsp_msg), - .ddrphy_trained_csr = lpddr4_ddrphy_trained_csr, - .ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr), .ddrphy_pie = lpddr4_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie), }; diff --git a/arch/arm/boards/protonic-mecsbc/Makefile b/arch/arm/boards/protonic-mecsbc/Makefile new file mode 100644 index 0000000000..b37b6c870b --- /dev/null +++ b/arch/arm/boards/protonic-mecsbc/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/protonic-mecsbc/board.c b/arch/arm/boards/protonic-mecsbc/board.c new file mode 100644 index 0000000000..56f7ca393a --- /dev/null +++ b/arch/arm/boards/protonic-mecsbc/board.c @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#define pr_fmt(fmt) "MECSBC: " fmt + +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <init.h> +#include <mach/rockchip/bbu.h> +#include <environment.h> +#include <param.h> +#include <of_device.h> +#include <aiodev.h> +#include <globalvar.h> + +struct mecsbc_model { + const char *name; + const char *shortname; +}; + +struct mecsbc_priv { + int hw_id; + int hw_rev; +}; + +static struct mecsbc_priv mecsbc_data; + +static int saradc_get_value(const char *chan) +{ + int ret, voltage; + + ret = aiochannel_name_get_value(chan, &voltage); + if (ret) { + pr_warn_once("Cannot read ADC %s: %pe\n", chan, ERR_PTR(ret)); + return 0; + } + + return voltage; +} + +static int mecsbc_get_vin_mv(void) +{ + return saradc_get_value("aiodev0.in_value2_mV") * 22; +} + +static bool mecsbc_get_usb_boot(void) +{ + return saradc_get_value("aiodev0.in_value0_mV") < 74; +} + +static int mecsbc_adc_id_values[] = { + 1800, 1662, 1521, 1354, 1214, 1059, 900, 742, 335, 589, 278, 137, 0 +}; + +static int mecsbc_get_adc_id(const char *chan) +{ + int val; + unsigned int t; + + val = saradc_get_value(chan) + 74; + + for (t = 0; t < ARRAY_SIZE(mecsbc_adc_id_values); t++) { + if (val > mecsbc_adc_id_values[t]) + return t; + } + + return t; +} + +static void mecsbc_process_adc(struct device *dev) +{ + mecsbc_data.hw_id = mecsbc_get_adc_id("aiodev0.in_value1_mV"); + mecsbc_data.hw_rev = mecsbc_get_adc_id("aiodev0.in_value3_mV"); + + dev_add_param_uint32_ro(dev, "boardrev", &mecsbc_data.hw_rev, "%u"); + dev_add_param_uint32_ro(dev, "boardid", &mecsbc_data.hw_id, "%u"); + + /* Check if we need to enable the USB gadget instead of booting */ + if (mecsbc_get_usb_boot()) { + globalvar_add_simple("boot.default", "net"); + globalvar_add_simple("usbgadget.acm", "1"); + globalvar_add_simple("usbgadget.autostart", "1"); + globalvar_add_simple("system.partitions", "/dev/mmc0(mmc0)"); + pr_info("MECSBC: Enter USB recovery\n"); + } else { + globalvar_add_simple("boot.default", "bootchooser"); + } + + pr_info("Board id: %d, revision %d\n", mecsbc_data.hw_id, mecsbc_data.hw_rev); + pr_info("VIN = %d V\n", mecsbc_get_vin_mv() / 1000); +} + +static int mecsbc_sd_of_fixup(struct device_node *root, void *context) +{ + struct device *dev = context; + struct device_node *np; + + dev_info(dev, "Fixing up /regulator-sd\n"); + + np = of_find_node_by_path_from(root, "/regulator-sd"); + if (!np) { + dev_err(dev, "Cannot find /regulator-sd node\n"); + return 0; + } + + of_property_write_u32(np, "regulator-min-microvolt", 3300000); + + return 0; +} + +static int mecsbc_of_fixup_hwrev(struct device *dev) +{ + const char *compat; + char *buf; + + compat = of_device_get_match_compatible(dev); + + buf = xasprintf("%s-m%u-r%u", compat, mecsbc_data.hw_id, + mecsbc_data.hw_rev); + barebox_set_of_machine_compatible(buf); + + free(buf); + + if (mecsbc_data.hw_id == 0 && mecsbc_data.hw_rev == 0) + of_register_fixup(mecsbc_sd_of_fixup, dev); + + return 0; +} + +static int mecsbc_probe(struct device *dev) +{ + int ret = 0; + enum bootsource bootsource = bootsource_get(); + int instance = bootsource_get_instance(); + const struct mecsbc_model *model; + struct device_node *np; + + np = of_find_node_by_name_address(NULL, "saradc@fe720000"); + of_device_ensure_probed(np); + + model = device_get_match_data(dev); + + barebox_set_model(model->name); + barebox_set_hostname(model->shortname); + + if (bootsource == BOOTSOURCE_MMC && instance == 1) + of_device_enable_path("/chosen/environment-sd"); + else + of_device_enable_path("/chosen/environment-emmc"); + + rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/mmc0"); + rk3568_bbu_mmc_register("sd", 0, "/dev/mmc1"); + + mecsbc_process_adc(dev); + mecsbc_of_fixup_hwrev(dev); + + return ret; +} + +static const struct mecsbc_model mecsbc = { + .name = "Protonic MECSBC board", + .shortname = "mecsbc", +}; + +static const struct of_device_id mecsbc_of_match[] = { + { + .compatible = "prt,mecsbc", + .data = &mecsbc, + }, + { /* sentinel */ }, +}; + +static struct driver mecsbc_board_driver = { + .name = "board-mecsbc", + .probe = mecsbc_probe, + .of_compatible = mecsbc_of_match, +}; +coredevice_platform_driver(mecsbc_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(mecsbc_of_match); diff --git a/arch/arm/boards/protonic-mecsbc/lowlevel.c b/arch/arm/boards/protonic-mecsbc/lowlevel.c new file mode 100644 index 0000000000..830d708b6e --- /dev/null +++ b/arch/arm/boards/protonic-mecsbc/lowlevel.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <common.h> +#include <asm/barebox-arm.h> +#include <mach/rockchip/hardware.h> +#include <mach/rockchip/atf.h> +#include <debug_ll.h> + +extern char __dtb_rk3568_mecsbc_start[]; + +ENTRY_FUNCTION(start_mecsbc, r0, r1, r2) +{ + /* + * MECSBC IO domain voltages are all +3.3V, except VCCIO4 and VCCIO6 + * Both GMAC interfaces need this to work properly. + * FIXME: This is done by the io-domain driver as well, but there + * currently is no mechanism to make sure the driver gets probed + * before its consumers. Remove this setup once this issue is + * resolved. + */ + writel(RK_SETBITS(0x50), 0xfdc20140); + + putc_ll('>'); + + if (current_el() == 3) + relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS); + else + relocate_to_current_adr(); + + setup_c(); + + rk3568_barebox_entry(__dtb_rk3568_mecsbc_start); +} diff --git a/arch/arm/boards/protonic-stm32mp1/board.c b/arch/arm/boards/protonic-stm32mp1/board.c index 174454ed27..68297debab 100644 --- a/arch/arm/boards/protonic-stm32mp1/board.c +++ b/arch/arm/boards/protonic-stm32mp1/board.c @@ -5,7 +5,7 @@ #include <bootsource.h> #include <common.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/stm32mp/bbu.h> #include <of_device.h> #include <deep-probe.h> @@ -54,7 +54,7 @@ static const struct prt_stm32_boot_dev prt_stm32_boot_devs[] = { }, }; -static int prt_stm32_probe(struct device_d *dev) +static int prt_stm32_probe(struct device *dev) { const struct prt_stm32_machine_data *dcfg; char *env_path_back = NULL, *env_path = NULL; @@ -121,7 +121,7 @@ static const struct of_device_id prt_stm32_of_match[] = { }; BAREBOX_DEEP_PROBE_ENABLE(prt_stm32_of_match); -static struct driver_d prt_stm32_board_driver = { +static struct driver prt_stm32_board_driver = { .name = "board-protonic-stm32", .probe = prt_stm32_probe, .of_compatible = prt_stm32_of_match, diff --git a/arch/arm/boards/protonic-stm32mp1/lowlevel.c b/arch/arm/boards/protonic-stm32mp1/lowlevel.c index 583f72dfe7..2fd7f8ba8b 100644 --- a/arch/arm/boards/protonic-stm32mp1/lowlevel.c +++ b/arch/arm/boards/protonic-stm32mp1/lowlevel.c @@ -3,7 +3,7 @@ #include <common.h> #include <debug_ll.h> -#include <mach/entry.h> +#include <mach/stm32mp/entry.h> extern char __dtb_z_stm32mp151_prtt1a_start[]; extern char __dtb_z_stm32mp151_prtt1c_start[]; diff --git a/arch/arm/boards/qil-a926x/init.c b/arch/arm/boards/qil-a926x/init.c index 63c7089d7d..988657b354 100644 --- a/arch/arm/boards/qil-a926x/init.c +++ b/arch/arm/boards/qil-a926x/init.c @@ -10,25 +10,24 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> #include <linux/clk.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> #include <led.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> static void qil_a9260_set_board_type(void) { diff --git a/arch/arm/boards/qil-a926x/lowlevel.c b/arch/arm/boards/qil-a926x/lowlevel.c index 7f52f824df..314980e84c 100644 --- a/arch/arm/boards/qil-a926x/lowlevel.c +++ b/arch/arm/boards/qil-a926x/lowlevel.c @@ -7,14 +7,23 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> -#include <mach/at91sam9_sdramc.h> -#include <mach/at91sam9260.h> -#include <mach/hardware.h> +AT91_ENTRY_FUNCTION(start_qil_a926x, r0, r1, r2) +{ + arm_cpu_lowlevel_init(); + + arm_setup_stack(AT91SAM9260_SRAM_BASE + AT91SAM9260_SRAM_SIZE); + + barebox_arm_entry(AT91_CHIPSELECT_1, + at91_get_sdram_size(IOMEM(AT91SAM9260_BASE_SDRAMC)), + NULL); +} -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_qil_a9g20, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/radxa-cm3/.gitignore b/arch/arm/boards/radxa-cm3/.gitignore new file mode 100644 index 0000000000..f458f794b5 --- /dev/null +++ b/arch/arm/boards/radxa-cm3/.gitignore @@ -0,0 +1 @@ +sdram-init.bin diff --git a/arch/arm/boards/radxa-cm3/Makefile b/arch/arm/boards/radxa-cm3/Makefile new file mode 100644 index 0000000000..b37b6c870b --- /dev/null +++ b/arch/arm/boards/radxa-cm3/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/radxa-cm3/board.c b/arch/arm/boards/radxa-cm3/board.c new file mode 100644 index 0000000000..19d37e31d9 --- /dev/null +++ b/arch/arm/boards/radxa-cm3/board.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <init.h> +#include <mach/rockchip/bbu.h> + +struct cm3_model { + const char *name; + const char *shortname; +}; + +static int cm3_probe(struct device *dev) +{ + enum bootsource bootsource = bootsource_get(); + int instance = bootsource_get_instance(); + const struct cm3_model *model; + + model = device_get_match_data(dev); + + barebox_set_model(model->name); + barebox_set_hostname(model->shortname); + + if (bootsource == BOOTSOURCE_MMC && instance == 1) + of_device_enable_path("/chosen/environment-sd"); + else + of_device_enable_path("/chosen/environment-emmc"); + + rockchip_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, + "/dev/mmc0"); + rockchip_bbu_mmc_register("sd", 0, "/dev/mmc1"); + + return 0; +} + +static const struct cm3_model cm3_io = { + .name = "Radxa CM3 on IO Board", + .shortname = "cm3-io", +}; + +static const struct of_device_id cm3_of_match[] = { + { + .compatible = "radxa,cm3-io", + .data = &cm3_io, + }, + { /* sentinel */ }, +}; + +static struct driver cm3_io_board_driver = { + .name = "board-cm3-io", + .probe = cm3_probe, + .of_compatible = cm3_of_match, +}; +coredevice_platform_driver(cm3_io_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(cm3_of_match); diff --git a/arch/arm/boards/radxa-cm3/lowlevel.c b/arch/arm/boards/radxa-cm3/lowlevel.c new file mode 100644 index 0000000000..e1b453f21f --- /dev/null +++ b/arch/arm/boards/radxa-cm3/lowlevel.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include <common.h> +#include <asm/barebox-arm.h> +#include <mach/rockchip/hardware.h> +#include <mach/rockchip/atf.h> +#include <debug_ll.h> + +extern char __dtb_rk3566_cm3_io_start[]; + +ENTRY_FUNCTION(start_radxa_cm3_io, r0, r1, r2) +{ + /* + * Enable vccio4 1.8V and vccio6 1.8V + * Needed for GMAC to work. + * FIXME: This is done by the io-domain driver as well, but there + * currently is no mechanism to make sure the driver gets probed + * before its consumers. Remove this setup once this issue is + * resolved. + */ + writel(RK_SETBITS(0x50), 0xfdc20140); + + putc_ll('>'); + + if (current_el() == 3) + relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS); + else + relocate_to_current_adr(); + + setup_c(); + + rk3568_barebox_entry(__dtb_rk3566_cm3_io_start); +} diff --git a/arch/arm/boards/radxa-rock/board.c b/arch/arm/boards/radxa-rock/board.c index 0ada54a849..1c93d6e522 100644 --- a/arch/arm/boards/radxa-rock/board.c +++ b/arch/arm/boards/radxa-rock/board.c @@ -7,7 +7,7 @@ #include <envfs.h> #include <i2c/i2c.h> #include <i2c/i2c-gpio.h> -#include <mach/rk3188-regs.h> +#include <mach/rockchip/rk3188-regs.h> #include <mfd/act8846.h> #include <asm/armlinux.h> diff --git a/arch/arm/boards/radxa-rock3/board.c b/arch/arm/boards/radxa-rock3/board.c index cea00b9773..df99eded2c 100644 --- a/arch/arm/boards/radxa-rock3/board.c +++ b/arch/arm/boards/radxa-rock3/board.c @@ -3,14 +3,14 @@ #include <common.h> #include <deep-probe.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/rockchip/bbu.h> struct rock3_model { const char *name; const char *shortname; }; -static int rock3_probe(struct device_d *dev) +static int rock3_probe(struct device *dev) { enum bootsource bootsource = bootsource_get(); int instance = bootsource_get_instance(); @@ -21,14 +21,13 @@ static int rock3_probe(struct device_d *dev) barebox_set_model(model->name); barebox_set_hostname(model->shortname); - if (bootsource == BOOTSOURCE_MMC && instance == 0) + if (bootsource == BOOTSOURCE_MMC && instance == 1) of_device_enable_path("/chosen/environment-sd"); else of_device_enable_path("/chosen/environment-emmc"); - rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, - "/dev/mmc1"); - rk3568_bbu_mmc_register("sd", 0, "/dev/mmc0"); + rockchip_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/mmc0"); + rockchip_bbu_mmc_register("sd", 0, "/dev/mmc1"); return 0; } @@ -46,7 +45,7 @@ static const struct of_device_id rock3_of_match[] = { { /* sentinel */ }, }; -static struct driver_d rock3_board_driver = { +static struct driver rock3_board_driver = { .name = "board-rock3", .probe = rock3_probe, .of_compatible = rock3_of_match, diff --git a/arch/arm/boards/radxa-rock3/lowlevel.c b/arch/arm/boards/radxa-rock3/lowlevel.c index 00a68889cd..ec407404b9 100644 --- a/arch/arm/boards/radxa-rock3/lowlevel.c +++ b/arch/arm/boards/radxa-rock3/lowlevel.c @@ -1,21 +1,27 @@ // SPDX-License-Identifier: GPL-2.0-only + #include <common.h> -#include <linux/sizes.h> -#include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/hardware.h> -#include <mach/atf.h> +#include <mach/rockchip/hardware.h> +#include <mach/rockchip/atf.h> #include <debug_ll.h> -#include <mach/rockchip.h> extern char __dtb_rk3568_rock_3a_start[]; -static noinline void rk3568_start(void *fdt) +ENTRY_FUNCTION(start_rock3a, r0, r1, r2) { /* - * Image execution starts at 0x0, but this is used for ATF and - * OP-TEE later, so move away from here. + * Enable vccio4 1.8V and vccio6 1.8V + * Needed for GMAC to work. + * FIXME: This is done by the io-domain driver as well, but there + * currently is no mechanism to make sure the driver gets probed + * before its consumers. Remove this setup once this issue is + * resolved. */ + writel(RK_SETBITS(0x50), 0xfdc20140); + + putc_ll('>'); + if (current_el() == 3) relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS); else @@ -23,22 +29,5 @@ static noinline void rk3568_start(void *fdt) setup_c(); - /* - * Enable vccio4 1.8V and vccio6 1.8V - * Needed for GMAC to work. - */ - writel(RK_SETBITS(0x50), 0xfdc20140); - - if (current_el() == 3) { - rk3568_lowlevel_init(); - rk3568_atf_load_bl31(fdt); - /* not reached */ - } - - barebox_arm_entry(RK3568_DRAM_BOTTOM, 0x80000000 - RK3568_DRAM_BOTTOM, fdt); -} - -ENTRY_FUNCTION(start_rock3a, r0, r1, r2) -{ - rk3568_start(__dtb_rk3568_rock_3a_start); + rk3568_barebox_entry(__dtb_rk3568_rock_3a_start); } diff --git a/arch/arm/boards/radxa-rock5/.gitignore b/arch/arm/boards/radxa-rock5/.gitignore new file mode 100644 index 0000000000..f458f794b5 --- /dev/null +++ b/arch/arm/boards/radxa-rock5/.gitignore @@ -0,0 +1 @@ +sdram-init.bin diff --git a/arch/arm/boards/radxa-rock5/Makefile b/arch/arm/boards/radxa-rock5/Makefile new file mode 100644 index 0000000000..b37b6c870b --- /dev/null +++ b/arch/arm/boards/radxa-rock5/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/radxa-rock5/board.c b/arch/arm/boards/radxa-rock5/board.c new file mode 100644 index 0000000000..eab0c01040 --- /dev/null +++ b/arch/arm/boards/radxa-rock5/board.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <init.h> +#include <mach/rockchip/bbu.h> + +struct rock5_model { + const char *name; + const char *shortname; +}; + +static int rock5_probe(struct device *dev) +{ + enum bootsource bootsource = bootsource_get(); + int instance = bootsource_get_instance(); + const struct rock5_model *model; + + model = device_get_match_data(dev); + + if (bootsource == BOOTSOURCE_MMC && instance == 1) + of_device_enable_path("/chosen/environment-sd"); + else + of_device_enable_path("/chosen/environment-emmc"); + + rockchip_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/mmc0"); + rockchip_bbu_mmc_register("sd", 0, "/dev/mmc1"); + + return 0; +} + +static const struct rock5_model rock5b = { + .name = "Radxa ROCK5 Model B", + .shortname = "rock5b", +}; + +static const struct of_device_id rock5_of_match[] = { + { + .compatible = "radxa,rock-5b", + .data = &rock5b, + }, + { /* sentinel */ }, +}; + +static struct driver rock5_board_driver = { + .name = "board-rock5", + .probe = rock5_probe, + .of_compatible = rock5_of_match, +}; +coredevice_platform_driver(rock5_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(rock5_of_match); diff --git a/arch/arm/boards/radxa-rock5/lowlevel.c b/arch/arm/boards/radxa-rock5/lowlevel.c new file mode 100644 index 0000000000..6f0ac732cc --- /dev/null +++ b/arch/arm/boards/radxa-rock5/lowlevel.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include <common.h> +#include <linux/sizes.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <mach/rockchip/hardware.h> +#include <mach/rockchip/atf.h> +#include <debug_ll.h> +#include <mach/rockchip/rockchip.h> + +extern char __dtb_rk3588_rock_5b_start[]; + +ENTRY_FUNCTION(start_rock5b, r0, r1, r2) +{ + putc_ll('>'); + + if (current_el() == 3) + relocate_to_adr_full(RK3588_BAREBOX_LOAD_ADDRESS); + else + relocate_to_current_adr(); + + setup_c(); + + rk3588_barebox_entry(__dtb_rk3588_rock_5b_start); +} diff --git a/arch/arm/boards/raspberry-pi/lowlevel.c b/arch/arm/boards/raspberry-pi/lowlevel.c index 5ead895767..b3727d930f 100644 --- a/arch/arm/boards/raspberry-pi/lowlevel.c +++ b/arch/arm/boards/raspberry-pi/lowlevel.c @@ -5,9 +5,10 @@ #include <common.h> #include <linux/sizes.h> #include <asm/unaligned.h> -#include <mach/platform.h> +#include <mach/bcm283x/platform.h> #include <debug_ll.h> -#include <mach/mbox.h> +#include <mach/bcm283x/debug_ll.h> +#include <mach/bcm283x/mbox.h> #include <of.h> #include "lowlevel.h" @@ -36,31 +37,33 @@ static void copy_vc_fdt(void *dest, void *src, unsigned long max_size) memmove(dest, src, size); } -/* A pointer to the FDT created by VideoCore was passed to us in x0/r2. We - * reserve some memory just above the region used for Barebox and copy - * this FDT there. We fetch it from there later in rpi_devices_init(). - */ -#define rpi_stack_top(memsize) \ - arm_mem_stack_top(BCM2835_SDRAM_BASE, BCM2835_SDRAM_BASE + memsize - VIDEOCORE_FDT_SZ) - static inline void start_raspberry_pi(unsigned long memsize, void *fdt, void *vc_fdt) { - unsigned long endmem = rpi_stack_top(memsize); + unsigned long endmem; + + /* + * A pointer to the FDT created by VideoCore was passed to us in x0/r2. We + * reserve some memory at the end of SDRAM copy this FDT there. We fetch it + * from there later in rpi_devices_init(). + */ + memsize -= VIDEOCORE_FDT_SZ; + endmem = BCM2835_SDRAM_BASE + memsize; - copy_vc_fdt((void *)endmem, vc_fdt, VIDEOCORE_FDT_SZ); + /* leave SZ_1K for the initial stack */ + copy_vc_fdt((void *)endmem, vc_fdt, VIDEOCORE_FDT_SZ - SZ_1K); fdt += get_runtime_offset(); - barebox_arm_entry(BCM2835_SDRAM_BASE, endmem - BCM2835_SDRAM_BASE, fdt); + barebox_arm_entry(BCM2835_SDRAM_BASE, memsize, fdt); } #ifdef CONFIG_CPU_V8 #define RPI_ENTRY_FUNCTION(name, memsize, fdt) \ - ENTRY_FUNCTION_WITHSTACK(name, rpi_stack_top(memsize), fdt, __x1, __x2) + ENTRY_FUNCTION_WITHSTACK(name, BCM2835_SDRAM_BASE + (memsize), fdt, __x1, __x2) #else #define RPI_ENTRY_FUNCTION(name, memsize, fdt) \ - ENTRY_FUNCTION_WITHSTACK(name, rpi_stack_top(memsize), __r0, __r1, fdt) + ENTRY_FUNCTION_WITHSTACK(name, BCM2835_SDRAM_BASE + (memsize), __r0, __r1, fdt) #endif extern char __dtb_z_bcm2835_rpi_start[]; @@ -68,6 +71,9 @@ extern char __dtb_z_bcm2836_rpi_2_start[]; extern char __dtb_z_bcm2837_rpi_3_start[]; extern char __dtb_z_bcm2837_rpi_cm3_start[]; extern char __dtb_z_bcm2711_rpi_4_start[]; +extern char __dtb_z_bcm2711_rpi_400_start[]; +extern char __dtb_z_bcm2711_rpi_cm4_io_start[]; +extern char __dtb_z_bcm2711_rpi_cm4s_io_start[]; RPI_ENTRY_FUNCTION(start_raspberry_pi1, SZ_128M, fdt) { @@ -129,9 +135,13 @@ static void *rpi_get_board_fdt(int rev) return DT_IF_ENABLED(__dtb_z_bcm2837_rpi_cm3_start, CONFIG_MACH_RPI_CM3); case BCM2711_BOARD_REV_4_B: + return DT_IF_ENABLED(__dtb_z_bcm2711_rpi_4_start, CONFIG_MACH_RPI4); case BCM2711_BOARD_REV_400: + return DT_IF_ENABLED(__dtb_z_bcm2711_rpi_400_start, CONFIG_MACH_RPI4); case BCM2711_BOARD_REV_CM4: - return DT_IF_ENABLED(__dtb_z_bcm2711_rpi_4_start, CONFIG_MACH_RPI4); + return DT_IF_ENABLED(__dtb_z_bcm2711_rpi_cm4_io_start, CONFIG_MACH_RPI4); + case BCM2711_BOARD_REV_CM4_S: + return DT_IF_ENABLED(__dtb_z_bcm2711_rpi_cm4s_io_start, CONFIG_MACH_RPI4); } return NULL; diff --git a/arch/arm/boards/raspberry-pi/mbox-helpers.c b/arch/arm/boards/raspberry-pi/mbox-helpers.c index 9f252c68ff..3a76ac2b01 100644 --- a/arch/arm/boards/raspberry-pi/mbox-helpers.c +++ b/arch/arm/boards/raspberry-pi/mbox-helpers.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later // SPDX-FileCopyrightText: 2009 Carlo Caione <carlo@carlocaione.org> -#include <mach/mbox.h> +#include <mach/bcm283x/mbox.h> #include "lowlevel.h" struct msg_get_arm_mem { diff --git a/arch/arm/boards/raspberry-pi/rpi-common.c b/arch/arm/boards/raspberry-pi/rpi-common.c index 77935e5c88..628f657ea2 100644 --- a/arch/arm/boards/raspberry-pi/rpi-common.c +++ b/arch/arm/boards/raspberry-pi/rpi-common.c @@ -19,15 +19,15 @@ #include <led.h> #include <asm/armlinux.h> #include <asm/barebox-arm.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <linux/sizes.h> #include <globalvar.h> #include <asm/system_info.h> #include <reset_source.h> -#include <mach/core.h> -#include <mach/mbox.h> -#include <mach/platform.h> +#include <mach/bcm283x/core.h> +#include <mach/bcm283x/mbox.h> +#include <mach/bcm283x/platform.h> #include <soc/bcm283x/wdt.h> @@ -54,12 +54,17 @@ struct rpi_machine_data { }; struct rpi_priv { - struct device_d *dev; + struct device *dev; const struct rpi_machine_data *dcfg; unsigned int hw_id; const char *name; }; +struct rpi_property_fixup_data { + const struct device_node* vc_node; + const char *propname; +}; + static void rpi_set_usbethaddr(void) { u8 mac[ETH_ALEN]; @@ -110,6 +115,12 @@ static void rpi_add_led(void) led_set_trigger(LED_TRIGGER_HEARTBEAT, &l->led); } +static int rpi_eth_init(struct rpi_priv *priv) +{ + rpi_set_usbethaddr(); + return 0; +} + static int rpi_b_init(struct rpi_priv *priv) { rpi_leds[0].gpio = 16; @@ -161,6 +172,12 @@ static int rpi_mem_init(void) { ssize_t size; + if (!of_machine_is_compatible("brcm,bcm2837") && + !of_machine_is_compatible("brcm,bcm2835") && + !of_machine_is_compatible("brcm,bcm2711") && + !of_machine_is_compatible("brcm,bcm2836")) + return 0; + size = rpi_get_arm_mem(); if (size < 0) { printf("could not query ARM memory size\n"); @@ -176,14 +193,21 @@ mem_initcall(rpi_mem_init); static int rpi_env_init(void) { struct stat s; - const char *diskdev = "/dev/disk0.0"; + const char *diskdev; int ret; device_detect_by_name("mci0"); + device_detect_by_name("mci1"); + diskdev = "/dev/disk0.0"; ret = stat(diskdev, &s); if (ret) { - printf("no %s. using default env\n", diskdev); + device_detect_by_name("mmc0"); + diskdev = "/dev/mmc0.0"; + ret = stat(diskdev, &s); + } + if (ret) { + printf("no /dev/disk0.0 or /dev/mmc0.0. using default env\n"); return 0; } @@ -213,8 +237,8 @@ static char *of_read_vc_string(struct device_node *node, str = of_get_property(node, prop_name, &len); if (!str) { - pr_warn("no property '%s' found in vc fdt's '%s' node\n", - prop_name, node->full_name); + pr_warn("no property '%s' found in vc fdt's '%pOF' node\n", + prop_name, node); return NULL; } return xstrndup(str, len); @@ -250,21 +274,91 @@ static enum reset_src_type rpi_decode_pm_rsts(struct device_node *chosen, return RESET_UKWN; } +static int rpi_vc_fdt_fixup(struct device_node *root, void *data) +{ + const struct device_node *vc_node = data; + struct device_node *node; + struct property *pp; + + node = of_create_node(root, vc_node->full_name); + if (!node) + return -ENOMEM; + + for_each_property_of_node(vc_node, pp) + of_copy_property(vc_node, pp->name, node); + + return 0; +} + +static struct device_node *register_vc_fixup(struct device_node *root, + const char *path) +{ + struct device_node *ret, *tmp; + + ret = of_find_node_by_path_from(root, path); + if (ret) { + tmp = of_dup(ret); + tmp->full_name = xstrdup(ret->full_name); + of_register_fixup(rpi_vc_fdt_fixup, tmp); + } else { + pr_info("no '%s' node found in vc fdt\n", path); + } + + return ret; +} + +static int rpi_vc_fdt_fixup_property(struct device_node *root, void *data) +{ + const struct rpi_property_fixup_data *fixup = data; + struct device_node *node; + struct property *prop; + + node = of_create_node(root, fixup->vc_node->full_name); + if (!node) + return -ENOMEM; + + prop = of_find_property(fixup->vc_node, fixup->propname, NULL); + if (!prop) + return -ENOENT; + + return of_set_property(node, prop->name, + of_property_get_value(prop), prop->length, 1); +} + +static int register_vc_property_fixup(struct device_node *root, + const char *path, const char *propname) +{ + struct device_node *node, *tmp; + struct rpi_property_fixup_data* fixup_data; + + node = of_find_node_by_path_from(root, path); + if (node) { + tmp = of_dup(node); + tmp->full_name = xstrdup(node->full_name); + fixup_data = xzalloc(sizeof(*fixup_data)); + fixup_data->vc_node = tmp; + fixup_data->propname = xstrdup(propname); + + of_register_fixup(rpi_vc_fdt_fixup_property, fixup_data); + } else { + pr_info("no '%s' node found in vc fdt\n", path); + return -ENOENT; + } + + return 0; +} + static u32 rpi_boot_mode, rpi_boot_part; /* Extract useful information from the VideoCore FDT we got. * Some parameters are defined here: * https://www.raspberrypi.com/documentation/computers/configuration.html#part4 */ -static void rpi_vc_fdt_parse(void *fdt) +static void rpi_vc_fdt_parse(struct device_node *root) { int ret; - struct device_node *root, *chosen, *bootloader; + struct device_node *chosen, *bootloader, *memory; char *str; - root = of_unflatten_dtb(fdt, INT_MAX); - if (IS_ERR(root)) - return; - str = of_read_vc_string(root, "serial-number"); if (str) { barebox_set_serial_number(str); @@ -277,10 +371,17 @@ static void rpi_vc_fdt_parse(void *fdt) free(str); } - chosen = of_find_node_by_path_from(root, "/chosen"); + register_vc_fixup(root, "/system"); + register_vc_fixup(root, "/axi"); + register_vc_property_fixup(root, "/reserved-memory/nvram@0", "reg"); + register_vc_property_fixup(root, "/reserved-memory/nvram@0", "status"); + register_vc_fixup(root, "/hat"); + register_vc_property_fixup(root, "/emmc2bus", "dma-ranges"); + register_vc_fixup(root, "/chosen/bootloader"); + chosen = register_vc_fixup(root, "/chosen"); if (!chosen) { pr_err("no '/chosen' node found in vc fdt\n"); - goto out; + return; } bootloader = of_find_node_by_name(chosen, "bootloader"); @@ -324,13 +425,30 @@ static void rpi_vc_fdt_parse(void *fdt) if (IS_ENABLED(CONFIG_RESET_SOURCE)) reset_source_set(rpi_decode_pm_rsts(chosen, bootloader)); -out: - if (root) - of_delete_node(root); - return; + /* Parse all available nodes with "memory" device_type */ + memory = root; + while (1) { + memory = of_find_node_by_type(memory, "memory"); + if (!memory) + break; + + of_add_memory(memory, false); + } } -static void rpi_vc_fdt(void) +/** + * rpi_vc_fdt - unflatten VideoCore provided DT + * + * If configured via config.txt, the VideoCore firmware will pass barebox PBL + * a device-tree in a register. This is saved to a handover memory area by + * the Raspberry Pi PBL, which is parsed here. barebox-dt-2nd doesn't + * populate this area, instead it uses the VideoCore DT as its own DT. + * + * Return: an unflattened DT on success, an error pointer if parsing the DT + * fails and NULL if a Raspberry Pi PBL has run, but no VideoCore FDT was + * saved. + */ +static struct device_node *rpi_vc_fdt(void) { void *saved_vc_fdt; struct fdt_header *oftree; @@ -346,17 +464,17 @@ static void rpi_vc_fdt(void) if (oftree->totalsize) pr_err("there was an error copying fdt in pbl: %d\n", be32_to_cpu(oftree->totalsize)); - return; + return NULL; } if (magic != FDT_MAGIC) - return; + return ERR_PTR(-EINVAL); size = be32_to_cpu(oftree->totalsize); if (write_file("/vc.dtb", saved_vc_fdt, size)) pr_err("failed to save videocore fdt to a file\n"); - rpi_vc_fdt_parse(saved_vc_fdt); + return of_unflatten_dtb(saved_vc_fdt, INT_MAX); } static void rpi_set_kernel_name(void) { @@ -414,11 +532,12 @@ static const struct rpi_machine_data *rpi_get_dcfg(struct rpi_priv *priv) return ERR_PTR(-ENODEV); } -static int rpi_devices_probe(struct device_d *dev) +static int rpi_devices_probe(struct device *dev) { const struct rpi_machine_data *dcfg; struct regulator *reg; struct rpi_priv *priv; + struct device_node *vc_root; const char *name, *ptr; char *hostname; int ret; @@ -447,7 +566,24 @@ static int rpi_devices_probe(struct device_d *dev) bcm2835_register_fb(); armlinux_set_architecture(MACH_TYPE_BCM2708); rpi_env_init(); - rpi_vc_fdt(); + + vc_root = rpi_vc_fdt(); + if (!vc_root) { + dev_dbg(dev, "No VideoCore FDT was provided\n"); + } else if (!IS_ERR(vc_root)) { + dev_dbg(dev, "VideoCore FDT was provided\n"); + rpi_vc_fdt_parse(vc_root); + of_delete_node(vc_root); + } else if (IS_ERR(vc_root)) { + /* This is intentionally at a higher logging level, because we can't + * be sure that the external DT is indeed a barebox DT (and not a + * kernel DT that happened to be in the partition). So for ease + * of debugging, we report this at info log level. + */ + dev_info(dev, "barebox FDT will be used for VideoCore FDT\n"); + rpi_vc_fdt_parse(priv->dev->device_node); + } + rpi_set_kernel_name(); if (dcfg && dcfg->init) @@ -566,6 +702,7 @@ static const struct rpi_machine_data rpi_3_ids[] = { .init = rpi_b_plus_init, }, { .hw_id = BCM2837_BOARD_REV_CM3, + .init = rpi_eth_init, }, { .hw_id = BCM2837B0_BOARD_REV_CM3_PLUS, }, { @@ -578,10 +715,16 @@ static const struct rpi_machine_data rpi_3_ids[] = { static const struct rpi_machine_data rpi_4_ids[] = { { .hw_id = BCM2711_BOARD_REV_4_B, + .init = rpi_eth_init, }, { .hw_id = BCM2711_BOARD_REV_400, + .init = rpi_eth_init, }, { .hw_id = BCM2711_BOARD_REV_CM4, + .init = rpi_eth_init, + }, { + .hw_id = BCM2711_BOARD_REV_CM4_S, + .init = rpi_eth_init, }, { .hw_id = U8_MAX }, @@ -614,13 +757,14 @@ static const struct of_device_id rpi_of_match[] = { /* BCM2711 based Boards */ { .compatible = "raspberrypi,4-model-b", .data = rpi_4_ids }, { .compatible = "raspberrypi,4-compute-module", .data = rpi_4_ids }, + { .compatible = "raspberrypi,4-compute-module-s", .data = rpi_4_ids }, { .compatible = "raspberrypi,400", .data = rpi_4_ids }, { /* sentinel */ }, }; BAREBOX_DEEP_PROBE_ENABLE(rpi_of_match); -static struct driver_d rpi_board_driver = { +static struct driver rpi_board_driver = { .name = "board-rpi", .probe = rpi_devices_probe, .of_compatible = DRV_OF_COMPAT(rpi_of_match), diff --git a/arch/arm/boards/reflex-achilles/board.c b/arch/arm/boards/reflex-achilles/board.c index 0fbb967ff9..96da18f22e 100644 --- a/arch/arm/boards/reflex-achilles/board.c +++ b/arch/arm/boards/reflex-achilles/board.c @@ -4,7 +4,7 @@ #include <init.h> #include <io.h> #include <bbu.h> -#include <mach/arria10-system-manager.h> +#include <mach/socfpga/arria10-system-manager.h> static int achilles_init(void) { diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c b/arch/arm/boards/reflex-achilles/lowlevel.c index 511b41fd01..12ead6d6dd 100644 --- a/arch/arm/boards/reflex-achilles/lowlevel.c +++ b/arch/arm/boards/reflex-achilles/lowlevel.c @@ -10,16 +10,16 @@ #include <asm/unaligned.h> #include <debug_ll.h> #include <pbl.h> -#include <mach/arria10-sdram.h> -#include <mach/arria10-regs.h> -#include <mach/arria10-reset-manager.h> -#include <mach/arria10-clock-manager.h> -#include <mach/arria10-pinmux.h> -#include <mach/arria10-fpga.h> -#include <mach/init.h> +#include <mach/socfpga/arria10-sdram.h> +#include <mach/socfpga/arria10-regs.h> +#include <mach/socfpga/arria10-reset-manager.h> +#include <mach/socfpga/arria10-clock-manager.h> +#include <mach/socfpga/arria10-pinmux.h> +#include <mach/socfpga/arria10-fpga.h> +#include <mach/socfpga/init.h> #include "pll-config-arria10.c" #include "pinmux-config-arria10.c" -#include <mach/generic.h> +#include <mach/socfpga/generic.h> #define BAREBOX_PART 0 #define BITSTREAM_PART 1 diff --git a/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c b/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c index 146bb5405d..aa65770fdd 100644 --- a/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c +++ b/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only -#include <mach/arria10-pinmux.h> +#include <mach/socfpga/arria10-pinmux.h> static uint32_t pinmux[] = { [arria10_pinmux_shared_io_q4_12] = 8, diff --git a/arch/arm/boards/reflex-achilles/pll-config-arria10.c b/arch/arm/boards/reflex-achilles/pll-config-arria10.c index 27dbe01b58..35d475bcfb 100644 --- a/arch/arm/boards/reflex-achilles/pll-config-arria10.c +++ b/arch/arm/boards/reflex-achilles/pll-config-arria10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only -#include <mach/arria10-clock-manager.h> +#include <mach/socfpga/arria10-clock-manager.h> static struct arria10_mainpll_cfg mainpll_cfg = { .cntr15clk_cnt = 900, diff --git a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/board.c b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/board.c index b5d406576f..7178c02d8f 100644 --- a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/board.c +++ b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/board.c @@ -4,7 +4,7 @@ #include <common.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/rockchip/bbu.h> #include <aiodev.h> #include <bootsource.h> #include <environment.h> @@ -14,7 +14,7 @@ static bool machine_is_bpi_r2pro = false; -static int rk3568_bpi_r2pro_probe(struct device_d *dev) +static int rk3568_bpi_r2pro_probe(struct device *dev) { enum bootsource bootsource = bootsource_get(); int instance = bootsource_get_instance(); @@ -28,9 +28,8 @@ static int rk3568_bpi_r2pro_probe(struct device_d *dev) else of_device_enable_path("/chosen/environment-emmc"); - rk3568_bbu_mmc_register("sd", 0, "/dev/mmc0"); - rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, - "/dev/mmc1"); + rockchip_bbu_mmc_register("sd", 0, "/dev/mmc0"); + rockchip_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/mmc1"); return 0; } @@ -40,7 +39,7 @@ static const struct of_device_id rk3568_bpi_r2pro_of_match[] = { { /* Sentinel */}, }; -static struct driver_d rk3568_bpi_r2pro_board_driver = { +static struct driver rk3568_bpi_r2pro_board_driver = { .name = "board-rk3568-bpi-r2pro", .probe = rk3568_bpi_r2pro_probe, .of_compatible = rk3568_bpi_r2pro_of_match, diff --git a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c index f79f975080..12c2445287 100644 --- a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c +++ b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c @@ -1,46 +1,31 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> -#include <linux/sizes.h> -#include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/hardware.h> -#include <mach/atf.h> +#include <mach/rockchip/hardware.h> +#include <mach/rockchip/atf.h> #include <debug_ll.h> -#include <mach/rockchip.h> +#include <mach/rockchip/rockchip.h> extern char __dtb_rk3568_bpi_r2_pro_start[]; -static noinline void rk3568_start(void) +ENTRY_FUNCTION(start_rk3568_bpi_r2pro, r0, r1, r2) { - void *fdt; + putc_ll('>'); /* * set iodomain vccio6 to 1.8V needed for GMAC1 to work. * vccio4 (gmac0/switch) needs to stay at 3v3 (default) + * FIXME: This is done by the io-domain driver as well, but there + * currently is no mechanism to make sure the driver gets probed + * before its consumers. Remove this setup once this issue is + * resolved. */ //set bit 6 in PMU_GRF_IO_VSEL0 for vccio6 1v8 writel(RK_SETBITS(BIT(6)), PMU_GRF_IO_VSEL0); //clear bit 6 for 3v3 as it was set to 1v8 writel(RK_CLRBITS(BIT(6)), PMU_GRF_IO_VSEL1); - fdt = __dtb_rk3568_bpi_r2_pro_start; - - if (current_el() == 3) { - rk3568_lowlevel_init(); - rk3568_atf_load_bl31(fdt); - /* not reached */ - } - - barebox_arm_entry(RK3568_DRAM_BOTTOM, 0x80000000 - RK3568_DRAM_BOTTOM, fdt); -} - -ENTRY_FUNCTION(start_rk3568_bpi_r2pro, r0, r1, r2) -{ - /* - * Image execution starts at 0x0, but this is used for ATF and - * OP-TEE later, so move away from here. - */ if (current_el() == 3) relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS); else @@ -48,5 +33,5 @@ ENTRY_FUNCTION(start_rk3568_bpi_r2pro, r0, r1, r2) setup_c(); - rk3568_start(); + rk3568_barebox_entry(__dtb_rk3568_bpi_r2_pro_start); } diff --git a/arch/arm/boards/rockchip-rk3568-evb/board.c b/arch/arm/boards/rockchip-rk3568-evb/board.c index 212c801c93..9659bd69c5 100644 --- a/arch/arm/boards/rockchip-rk3568-evb/board.c +++ b/arch/arm/boards/rockchip-rk3568-evb/board.c @@ -4,7 +4,7 @@ #include <common.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/rockchip/bbu.h> #include <aiodev.h> #include <bootsource.h> #include <environment.h> @@ -14,7 +14,7 @@ static bool machine_is_rk3568_evb = false; -static int rk3568_evb_probe(struct device_d *dev) +static int rk3568_evb_probe(struct device *dev) { enum bootsource bootsource = bootsource_get(); int instance = bootsource_get_instance(); @@ -28,9 +28,8 @@ static int rk3568_evb_probe(struct device_d *dev) else of_device_enable_path("/chosen/environment-emmc"); - rk3568_bbu_mmc_register("sd", 0, "/dev/mmc0"); - rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, - "/dev/mmc1"); + rockchip_bbu_mmc_register("sd", 0, "/dev/mmc0"); + rockchip_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/mmc1"); return 0; } @@ -40,7 +39,7 @@ static const struct of_device_id rk3568_evb_of_match[] = { { /* Sentinel */}, }; -static struct driver_d rk3568_evb_board_driver = { +static struct driver rk3568_evb_board_driver = { .name = "board-rk3568-evb", .probe = rk3568_evb_probe, .of_compatible = rk3568_evb_of_match, @@ -94,7 +93,7 @@ static int rk3568_evb_detect_hwid(void) return 0; err_hwid: - pr_err("couldn't retrieve hardware ID"); + pr_err("couldn't retrieve hardware ID\n"); return ret; } late_initcall(rk3568_evb_detect_hwid); diff --git a/arch/arm/boards/rockchip-rk3568-evb/lowlevel.c b/arch/arm/boards/rockchip-rk3568-evb/lowlevel.c index 363639d21b..d5ae70049e 100644 --- a/arch/arm/boards/rockchip-rk3568-evb/lowlevel.c +++ b/arch/arm/boards/rockchip-rk3568-evb/lowlevel.c @@ -1,43 +1,27 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> -#include <linux/sizes.h> -#include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/hardware.h> -#include <mach/atf.h> +#include <mach/rockchip/hardware.h> +#include <mach/rockchip/atf.h> #include <debug_ll.h> -#include <mach/rockchip.h> extern char __dtb_rk3568_evb1_v10_start[]; -static noinline void rk3568_start(void) +ENTRY_FUNCTION(start_rk3568_evb, r0, r1, r2) { - void *fdt; - /* * Enable vccio4 1.8V and vccio6 1.8V * Needed for GMAC to work. + * FIXME: This is done by the io-domain driver as well, but there + * currently is no mechanism to make sure the driver gets probed + * before its consumers. Remove this setup once this issue is + * resolved. */ writel(RK_SETBITS(0x50), 0xfdc20140); - fdt = __dtb_rk3568_evb1_v10_start; - - if (current_el() == 3) { - rk3568_lowlevel_init(); - rk3568_atf_load_bl31(fdt); - /* not reached */ - } - - barebox_arm_entry(RK3568_DRAM_BOTTOM, 0x80000000 - RK3568_DRAM_BOTTOM, fdt); -} + putc_ll('>'); -ENTRY_FUNCTION(start_rk3568_evb, r0, r1, r2) -{ - /* - * Image execution starts at 0x0, but this is used for ATF and - * OP-TEE later, so move away from here. - */ if (current_el() == 3) relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS); else @@ -45,5 +29,5 @@ ENTRY_FUNCTION(start_rk3568_evb, r0, r1, r2) setup_c(); - rk3568_start(); + rk3568_barebox_entry(__dtb_rk3568_evb1_v10_start); } diff --git a/arch/arm/boards/sama5d27-giantboard/lowlevel.c b/arch/arm/boards/sama5d27-giantboard/lowlevel.c index ee8297fa45..49540bede0 100644 --- a/arch/arm/boards/sama5d27-giantboard/lowlevel.c +++ b/arch/arm/boards/sama5d27-giantboard/lowlevel.c @@ -5,17 +5,17 @@ #include <common.h> #include <init.h> -#include <mach/barebox-arm.h> -#include <mach/sama5d2_ll.h> -#include <mach/xload.h> -#include <mach/sama5d2-sip-ddramc.h> -#include <mach/iomux.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/sama5d2_ll.h> +#include <mach/at91/xload.h> +#include <mach/at91/sama5d2-sip-ddramc.h> +#include <mach/at91/iomux.h> #include <debug_ll.h> /* PCK = 492MHz, MCK = 164MHz */ #define MASTER_CLOCK 164000000 -SAMA5_ENTRY_FUNCTION(start_sama5d27_giantboard_xload_mmc, r4) +SAMA5D2_ENTRY_FUNCTION(start_sama5d27_giantboard_xload_mmc, r4) { void __iomem *dbgu_base; @@ -36,7 +36,7 @@ SAMA5_ENTRY_FUNCTION(start_sama5d27_giantboard_xload_mmc, r4) extern char __dtb_z_at91_sama5d27_giantboard_start[]; -SAMA5_ENTRY_FUNCTION(start_sama5d27_giantboard, r4) +SAMA5D2_ENTRY_FUNCTION(start_sama5d27_giantboard, r4) { void *fdt; diff --git a/arch/arm/boards/sama5d27-som1/Makefile b/arch/arm/boards/sama5d27-som1/Makefile index 5678718188..96cd8f520f 100644 --- a/arch/arm/boards/sama5d27-som1/Makefile +++ b/arch/arm/boards/sama5d27-som1/Makefile @@ -2,3 +2,4 @@ lwl-y += lowlevel.o obj-y += board.o +bbenv-$(CONFIG_DEFAULT_ENVIRONMENT) += defaultenv-sama5d27-som1 diff --git a/arch/arm/boards/sama5d27-som1/board.c b/arch/arm/boards/sama5d27-som1/board.c index 00c0e92a5d..6fa903bca4 100644 --- a/arch/arm/boards/sama5d27-som1/board.c +++ b/arch/arm/boards/sama5d27-som1/board.c @@ -5,6 +5,7 @@ #include <init.h> #include <asm/memory.h> #include <bbu.h> +#include <envfs.h> #include <bootsource.h> #include <of.h> @@ -30,6 +31,9 @@ static int ek_device_init(void) filetype_arm_barebox); bbu_register_std_file_update("microSD", flags_usd, "/mnt/mmc1.0/barebox.bin", filetype_arm_barebox); + + defaultenv_append_directory(defaultenv_sama5d27_som1); + return 0; } device_initcall(ek_device_init); diff --git a/arch/arm/boards/sama5d27-som1/defaultenv-sama5d27-som1/nv/dev.wdog0.autoping b/arch/arm/boards/sama5d27-som1/defaultenv-sama5d27-som1/nv/dev.wdog0.autoping new file mode 100644 index 0000000000..d00491fd7e --- /dev/null +++ b/arch/arm/boards/sama5d27-som1/defaultenv-sama5d27-som1/nv/dev.wdog0.autoping @@ -0,0 +1 @@ +1 diff --git a/arch/arm/boards/sama5d27-som1/lowlevel.c b/arch/arm/boards/sama5d27-som1/lowlevel.c index b093711918..67300587fe 100644 --- a/arch/arm/boards/sama5d27-som1/lowlevel.c +++ b/arch/arm/boards/sama5d27-som1/lowlevel.c @@ -5,12 +5,12 @@ #include <common.h> #include <init.h> -#include <mach/barebox-arm.h> -#include <mach/sama5d2_ll.h> -#include <mach/iomux.h> -#include <mach/xload.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/sama5d2_ll.h> +#include <mach/at91/iomux.h> +#include <mach/at91/xload.h> #include <debug_ll.h> -#include <mach/sama5d2-sip-ddramc.h> +#include <mach/at91/sama5d2-sip-ddramc.h> #define RGB_LED_GREEN (1 << 0) #define RGB_LED_RED (1 << 1) @@ -39,7 +39,7 @@ static void ek_turn_led(unsigned color) } } -SAMA5_ENTRY_FUNCTION(start_sama5d27_som1_ek_xload_mmc, r4) +SAMA5D2_ENTRY_FUNCTION(start_sama5d27_som1_ek_xload_mmc, r4) { void __iomem *dbgu_base; sama5d2_lowlevel_init(); @@ -60,7 +60,7 @@ SAMA5_ENTRY_FUNCTION(start_sama5d27_som1_ek_xload_mmc, r4) extern char __dtb_z_at91_sama5d27_som1_ek_start[]; -SAMA5_ENTRY_FUNCTION(start_sama5d27_som1_ek, r4) +SAMA5D2_ENTRY_FUNCTION(start_sama5d27_som1_ek, r4) { void *fdt; diff --git a/arch/arm/boards/sama5d3_xplained/board.c b/arch/arm/boards/sama5d3_xplained/board.c index 69357df0fb..4d908e6b9f 100644 --- a/arch/arm/boards/sama5d3_xplained/board.c +++ b/arch/arm/boards/sama5d3_xplained/board.c @@ -3,8 +3,8 @@ #include <common.h> #include <init.h> #include <envfs.h> -#include <mach/at91sam9_smc.h> -#include <mach/hardware.h> +#include <mach/at91/at91sam9_smc.h> +#include <mach/at91/hardware.h> #include <linux/clk.h> static struct sam9_smc_config sama5d3_xplained_nand_smc_config = { @@ -35,7 +35,7 @@ static struct sam9_smc_config sama5d3_xplained_nand_smc_config = { .nfsel = 1 }; -static int sama5d3_xplained_probe(struct device_d *dev) +static int sama5d3_xplained_probe(struct device *dev) { struct clk *clk; @@ -64,8 +64,9 @@ static const struct of_device_id sama5d3_xplained_of_match[] = { { .compatible = "atmel,sama5d3-xplained" }, { /* sentinel */ }, }; +MODULE_DEVICE_TABLE(of, sama5d3_xplained_of_match); -static struct driver_d sama5d3_xplained_board_driver = { +static struct driver sama5d3_xplained_board_driver = { .name = "board-sama5d3_xplained", .probe = sama5d3_xplained_probe, .of_compatible = sama5d3_xplained_of_match, diff --git a/arch/arm/boards/sama5d3_xplained/lowlevel.c b/arch/arm/boards/sama5d3_xplained/lowlevel.c index df561af36d..d66b10fa8f 100644 --- a/arch/arm/boards/sama5d3_xplained/lowlevel.c +++ b/arch/arm/boards/sama5d3_xplained/lowlevel.c @@ -9,11 +9,11 @@ #include <asm/barebox-arm-head.h> #include <debug_ll.h> -#include <mach/barebox-arm.h> -#include <mach/iomux.h> -#include <mach/sama5d3.h> -#include <mach/sama5d3-xplained-ddramc.h> -#include <mach/xload.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/iomux.h> +#include <mach/at91/sama5d3.h> +#include <mach/at91/sama5d3-xplained-ddramc.h> +#include <mach/at91/xload.h> /* PCK = 528MHz, MCK = 132MHz */ #define MASTER_CLOCK 132000000 @@ -33,7 +33,7 @@ static void dbgu_init(void) pbl_set_putc(at91_dbgu_putc, IOMEM(AT91_BASE_DBGU1)); } -SAMA5_ENTRY_FUNCTION(start_sama5d3_xplained_xload_mmc, r4) +SAMA5D3_ENTRY_FUNCTION(start_sama5d3_xplained_xload_mmc, r4) { sama5d3_lowlevel_init(); @@ -50,12 +50,10 @@ SAMA5_ENTRY_FUNCTION(start_sama5d3_xplained_xload_mmc, r4) extern char __dtb_z_at91_sama5d3_xplained_start[]; -SAMA5_ENTRY_FUNCTION(start_sama5d3_xplained, r4) +SAMA5D3_ENTRY_FUNCTION(start_sama5d3_xplained, r4) { void *fdt; - arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE); - if (IS_ENABLED(CONFIG_DEBUG_LL)) dbgu_init(); diff --git a/arch/arm/boards/sama5d3xek/hw_version.c b/arch/arm/boards/sama5d3xek/hw_version.c index 03c8df2cad..c64d4566c6 100644 --- a/arch/arm/boards/sama5d3xek/hw_version.c +++ b/arch/arm/boards/sama5d3xek/hw_version.c @@ -151,7 +151,7 @@ static void at91sama5d3xek_devices_detect_one(const char *name) struct one_wire_info info; struct board_info* binfo; struct vendor_info* vinfo; - struct device_d *dev = NULL; + struct device *dev = NULL; char str[16]; char *bname, *vname; u8 vendor_id = 0; diff --git a/arch/arm/boards/sama5d3xek/init.c b/arch/arm/boards/sama5d3xek/init.c index 6e8fbea4c8..b75856198e 100644 --- a/arch/arm/boards/sama5d3xek/init.c +++ b/arch/arm/boards/sama5d3xek/init.c @@ -6,24 +6,23 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> -#include <mach/at91sam9x5_matrix.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> +#include <mach/at91/at91sam9x5_matrix.h> #include <input/qt1070.h> #include <readkey.h> #include <poller.h> diff --git a/arch/arm/boards/sama5d3xek/lowlevel.c b/arch/arm/boards/sama5d3xek/lowlevel.c index 28c07d5053..fe5f172127 100644 --- a/arch/arm/boards/sama5d3xek/lowlevel.c +++ b/arch/arm/boards/sama5d3xek/lowlevel.c @@ -10,8 +10,8 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/at91_ddrsdrc.h> -#include <mach/hardware.h> +#include <mach/at91/at91_ddrsdrc.h> +#include <mach/at91/hardware.h> void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) { diff --git a/arch/arm/boards/sama5d4_wifx/Makefile b/arch/arm/boards/sama5d4_wifx/Makefile new file mode 100644 index 0000000000..5678718188 --- /dev/null +++ b/arch/arm/boards/sama5d4_wifx/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +lwl-y += lowlevel.o +obj-y += board.o diff --git a/arch/arm/boards/sama5d4_wifx/board.c b/arch/arm/boards/sama5d4_wifx/board.c new file mode 100644 index 0000000000..028bedcfb0 --- /dev/null +++ b/arch/arm/boards/sama5d4_wifx/board.c @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <deep-probe.h> +#include <bootsource.h> +#include <driver.h> +#include <init.h> +#include <bbu.h> +#include <of.h> + +static int wifx_l1_probe(struct device *dev) +{ + int flags_sd = 0; + + if (bootsource_get() == BOOTSOURCE_NAND) { + of_device_enable_path("/chosen/environment-nand"); + } else { + of_device_enable_path("/chosen/environment-microsd"); + flags_sd = BBU_HANDLER_FLAG_DEFAULT; + } + + bbu_register_std_file_update("sd", flags_sd, "/mnt/mmc1.0/barebox.bin", + filetype_arm_barebox); + + return 0; +} + +static const struct of_device_id wifx_l1_of_match[] = { + { .compatible = "wifx,l1" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(wifx_l1_of_match); + +static struct driver wifx_l1_board_driver = { + .name = "board-lxa-mc1", + .probe = wifx_l1_probe, + .of_compatible = wifx_l1_of_match, +}; +device_platform_driver(wifx_l1_board_driver); diff --git a/arch/arm/boards/sama5d4_wifx/lowlevel.c b/arch/arm/boards/sama5d4_wifx/lowlevel.c new file mode 100644 index 0000000000..c47b14c55b --- /dev/null +++ b/arch/arm/boards/sama5d4_wifx/lowlevel.c @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2022 Ahmad Fatoum, Pengutronix + +#include <debug_ll.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/ddramc.h> + +SAMA5D4_ENTRY_FUNCTION(start_sama5d4_wifx_l1, r4) +{ + extern char __dtb_z_at91_sama5d4_wifx_l1_start[]; + void *fdt; + + putc_ll('>'); + + fdt = __dtb_z_at91_sama5d4_wifx_l1_start + get_runtime_offset(); + + sama5d4_barebox_entry(r4, fdt); +} diff --git a/arch/arm/boards/sama5d4_xplained/lowlevel.c b/arch/arm/boards/sama5d4_xplained/lowlevel.c index 3c58a08f3b..183bd9c5a9 100644 --- a/arch/arm/boards/sama5d4_xplained/lowlevel.c +++ b/arch/arm/boards/sama5d4_xplained/lowlevel.c @@ -10,8 +10,8 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/at91_ddrsdrc.h> -#include <mach/hardware.h> +#include <mach/at91/at91_ddrsdrc.h> +#include <mach/at91/hardware.h> void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) { diff --git a/arch/arm/boards/sama5d4_xplained/sama5d4_xplained.c b/arch/arm/boards/sama5d4_xplained/sama5d4_xplained.c index b7c9c49ded..c88f0d090a 100644 --- a/arch/arm/boards/sama5d4_xplained/sama5d4_xplained.c +++ b/arch/arm/boards/sama5d4_xplained/sama5d4_xplained.c @@ -12,22 +12,21 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <partition.h> #include <fs.h> #include <fcntl.h> #include <io.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> -#include <mach/at91sam9x5_matrix.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> +#include <mach/at91/at91sam9x5_matrix.h> #include <input/qt1070.h> #include <readkey.h> #include <spi/spi.h> diff --git a/arch/arm/boards/sama5d4ek/lowlevel.c b/arch/arm/boards/sama5d4ek/lowlevel.c index 3c58a08f3b..183bd9c5a9 100644 --- a/arch/arm/boards/sama5d4ek/lowlevel.c +++ b/arch/arm/boards/sama5d4ek/lowlevel.c @@ -10,8 +10,8 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/at91_ddrsdrc.h> -#include <mach/hardware.h> +#include <mach/at91/at91_ddrsdrc.h> +#include <mach/at91/hardware.h> void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) { diff --git a/arch/arm/boards/sama5d4ek/sama5d4ek.c b/arch/arm/boards/sama5d4ek/sama5d4ek.c index 3673d4816b..0dda34614a 100644 --- a/arch/arm/boards/sama5d4ek/sama5d4ek.c +++ b/arch/arm/boards/sama5d4ek/sama5d4ek.c @@ -12,22 +12,21 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <partition.h> #include <fs.h> #include <fcntl.h> #include <io.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> -#include <mach/at91sam9x5_matrix.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> +#include <mach/at91/at91sam9x5_matrix.h> #include <input/qt1070.h> #include <readkey.h> #include <spi/spi.h> diff --git a/arch/arm/boards/scb9328/lowlevel.c b/arch/arm/boards/scb9328/lowlevel.c index a2057f0c6b..d8b0d1cf18 100644 --- a/arch/arm/boards/scb9328/lowlevel.c +++ b/arch/arm/boards/scb9328/lowlevel.c @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 #include <common.h> -#include <mach/imx1-regs.h> -#include <mach/iomux-v1.h> -#include <mach/iomux-mx1.h> +#include <mach/imx/imx1-regs.h> +#include <mach/imx/iomux-v1.h> +#include <mach/imx/iomux-mx1.h> #include <asm/barebox-arm.h> -#include <mach/esdctl.h> +#include <mach/imx/esdctl.h> extern char __dtb_imx1_scb9328_start[]; diff --git a/arch/arm/boards/scb9328/lowlevel_init.S b/arch/arm/boards/scb9328/lowlevel_init.S index eff5a5088f..6c23d2cfea 100644 --- a/arch/arm/boards/scb9328/lowlevel_init.S +++ b/arch/arm/boards/scb9328/lowlevel_init.S @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later // SPDX-FileCopyrightText: 2004 Sascha Hauer, Synertronixx GmbH -#include <mach/imx1-regs.h> +#include <mach/imx/imx1-regs.h> #include <asm/barebox-arm-head.h> #define CFG_MPCTL0_VAL 0x00321431 diff --git a/arch/arm/boards/scb9328/scb9328.c b/arch/arm/boards/scb9328/scb9328.c index 1c78fac441..c2475476fd 100644 --- a/arch/arm/boards/scb9328/scb9328.c +++ b/arch/arm/boards/scb9328/scb9328.c @@ -5,16 +5,14 @@ #include <net.h> #include <init.h> #include <environment.h> -#include <generated/mach-types.h> -#include <mach/imx1-regs.h> +#include <asm/mach-types.h> +#include <mach/imx/imx1-regs.h> #include <asm/armlinux.h> -#include <mach/weim.h> +#include <mach/imx/weim.h> #include <io.h> -#include <partition.h> #include <fs.h> #include <envfs.h> -#include <mach/iomux-mx1.h> -#include <mach/devices-imx1.h> +#include <mach/imx/iomux-mx1.h> static int scb9328_devices_init(void) { diff --git a/arch/arm/boards/seeed-odyssey/board.c b/arch/arm/boards/seeed-odyssey/board.c index 8c011898a3..5befd32664 100644 --- a/arch/arm/boards/seeed-odyssey/board.c +++ b/arch/arm/boards/seeed-odyssey/board.c @@ -3,11 +3,11 @@ #include <linux/sizes.h> #include <init.h> #include <asm/memory.h> -#include <mach/bbu.h> +#include <mach/stm32mp/bbu.h> #include <bootsource.h> #include <of.h> -static int odyssey_som_probe(struct device_d *dev) +static int odyssey_som_probe(struct device *dev) { int flags; int instance = bootsource_get_instance(); @@ -31,8 +31,9 @@ static const struct of_device_id odyssey_som_of_match[] = { { .compatible = "seeed,stm32mp157c-odyssey-som" }, { /* sentinel */ }, }; +MODULE_DEVICE_TABLE(of, odyssey_som_of_match); -static struct driver_d odyssey_som_driver = { +static struct driver odyssey_som_driver = { .name = "odyssey-som", .probe = odyssey_som_probe, .of_compatible = odyssey_som_of_match, diff --git a/arch/arm/boards/seeed-odyssey/lowlevel.c b/arch/arm/boards/seeed-odyssey/lowlevel.c index 5ab1639dfe..a0e6173d49 100644 --- a/arch/arm/boards/seeed-odyssey/lowlevel.c +++ b/arch/arm/boards/seeed-odyssey/lowlevel.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ #include <common.h> -#include <mach/entry.h> +#include <mach/stm32mp/entry.h> #include <debug_ll.h> extern char __dtb_z_stm32mp157c_odyssey_start[]; diff --git a/arch/arm/boards/skov-arm9cpu/board.c b/arch/arm/boards/skov-arm9cpu/board.c index 8d5eadbb9a..20507922cb 100644 --- a/arch/arm/boards/skov-arm9cpu/board.c +++ b/arch/arm/boards/skov-arm9cpu/board.c @@ -7,32 +7,42 @@ #include <envfs.h> #include <init.h> #include <gpio.h> +#include <bootsource.h> #include <linux/sizes.h> -#include <mach/at91sam9263_matrix.h> -#include <mach/at91sam9_sdramc.h> -#include <mach/at91sam9_smc.h> -#include <mach/hardware.h> -#include <mach/iomux.h> +#include <mach/at91/at91sam9263_matrix.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9_smc.h> +#include <mach/at91/hardware.h> +#include <mach/at91/iomux.h> -static struct sam9_smc_config ek_nand_smc_config = { - .ncs_read_setup = 0, - .nrd_setup = 1, +static struct sam9_smc_config skov_nor_smc_config = { + /* Setup time is 2 cycles after the CS signal */ + .nwe_setup = 2, .ncs_write_setup = 0, - .nwe_setup = 1, + .nrd_setup = 2, + .ncs_read_setup = 0, - .ncs_read_pulse = 3, - .nrd_pulse = 3, - .ncs_write_pulse = 3, - .nwe_pulse = 3, + /* Set pulse long enough - pulse should be a bit shorter than the cycle */ + .nwe_pulse = 10, + .ncs_write_pulse = 12, + .nrd_pulse = 10, + .ncs_read_pulse = 12, - .read_cycle = 5, - .write_cycle = 5, + /* Set cycle long enougth at least 12 Cycles->120ns plus a little extra */ + .write_cycle = 0x13, + .read_cycle = 0x13, + /* Set mode: 16Bit bus width, enable read and write + * Note: pagemode + 32 byte pages do not work with the 29GL512P flash + */ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE, - .tdf_cycles = 2, + AT91_SMC_EXNWMODE_DISABLE | + AT91_SMC_BAT_WRITE | + AT91_SMC_DBW_16 | + AT91_SMC_TDFMODE, + .tdf_cycles = 1, }; BAREBOX_MAGICVAR(board.mem, "The detected memory size in MiB"); @@ -45,26 +55,29 @@ static int mem; * But is required before we start the other drives. * Use device_initcall() to maintain this order. */ -static int skov_arm9_probe(struct device_d *dev) +static int skov_arm9_probe(struct device *dev) { - unsigned long csa; + barebox_set_hostname("skov-arm9cpu"); add_generic_device("at91sam9-smc", 0, NULL, AT91SAM9263_BASE_SMC0, 0x200, IORESOURCE_MEM, NULL); add_generic_device("at91sam9-smc", 1, NULL, AT91SAM9263_BASE_SMC1, 0x200, IORESOURCE_MEM, NULL); - csa = readl(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA); - csa |= AT91SAM9263_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA; - writel(csa, AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA); - - /* configure chip-select 3 (NAND) */ - sam9_smc_configure(0, 3, &ek_nand_smc_config); + /* configure chip-select 0 (NOR) */ + sam9_smc_configure(0, 0, &skov_nor_smc_config); mem = at91_get_sdram_size(IOMEM(AT91SAM9263_BASE_SDRAMC0)); mem = mem / SZ_1M; globalvar_add_simple_int("board.mem", &mem, "%u"); + /* + * NOR first stage bootloader is at91bootstrap, so if we find traces + * of barebox in on-chip SRAM, it must mean we have booted from SD + */ + if (is_barebox_arm_head((void *)AT91SAM9263_SRAM0_BASE)) + bootsource_set_raw(BOOTSOURCE_MMC, BOOTSOURCE_INSTANCE_UNKNOWN); + return 0; } @@ -75,10 +88,11 @@ static __maybe_unused struct of_device_id skov_arm9_ids[] = { /* sentinel */ } }; +MODULE_DEVICE_TABLE(of, skov_arm9_ids); -static struct driver_d skov_arm9_driver = { +static struct driver skov_arm9_driver = { .name = "skov-arm9", .probe = skov_arm9_probe, .of_compatible = DRV_OF_COMPAT(skov_arm9_ids), }; -device_platform_driver(skov_arm9_driver); +coredevice_platform_driver(skov_arm9_driver); diff --git a/arch/arm/boards/skov-arm9cpu/lowlevel.c b/arch/arm/boards/skov-arm9cpu/lowlevel.c index d335953a73..baf0b7bfc9 100644 --- a/arch/arm/boards/skov-arm9cpu/lowlevel.c +++ b/arch/arm/boards/skov-arm9cpu/lowlevel.c @@ -1,127 +1,133 @@ // SPDX-License-Identifier: GPL-2.0 -// PDX-FileCopyrightText: 2018 Sam Ravnborg <sam@ravnborg.org> - -#include <linux/sizes.h> - -#include <asm/barebox-arm.h> - -#include <mach/at91sam926x_board_init.h> -#include <mach/at91sam9263_matrix.h> - -#define MASTER_PLL_MUL 171 -#define MASTER_PLL_DIV 14 +// SPDX-FileCopyrightText: 2022 Sam Ravnborg <sam@ravnborg.org> + +#include <mach/at91/at91sam926x_board_init.h> +#include <mach/at91/at91sam9263_matrix.h> +#include <mach/at91/sam92_ll.h> +#include <mach/at91/xload.h> +#include <mach/at91/barebox-arm.h> +#include <linux/build_bug.h> + +/* MCK = 20 MHz */ +#define MAIN_CLOCK 200000000 +#define MASTER_CLOCK (MAIN_CLOCK / 2) /* PMC_MCKR divides by 2 */ + +#define PLLA_SETTINGS (AT91_PMC_PLLA_WR_ERRATA | AT91_PMC_MUL_(49) | AT91_PMC_OUT_2 | \ + AT91_PMC_PLLCOUNT_(48) | AT91_PMC_DIV_(4)) +static_assert(PLLA_SETTINGS == 0x2031B004); + +#define PLLB_SETTINGS (AT91_PMC_USBDIV_2 | AT91_PMC_MUL_(5) | AT91_PMC_OUT_0 | \ + AT91_PMC_PLLCOUNT_(48) | AT91_PMC_DIV_BYPASS) +static_assert(PLLB_SETTINGS == 0x10053001); + +/* + * Check if target is 64 or 128 MB and adjust AT91_SDRAMC_CR + * accordingly. + * Size Start Size(hex) + * 64 MB => 0x20000000 0x4000000 + * 128 MB => 0x20000000 0x8000000 + * + * If 64 MiB RAM with NC_10 set, then we see holes in the memory, which + * is how we detect if memory is 64 or 128 MiB + */ +static int check_if_128mb(void) +{ + unsigned int *test_adr = (unsigned int *)AT91_CHIPSELECT_1; + unsigned int test_val = 0xdeadbee0; + unsigned int *p; + int i; + + /* Fill up memory with a known pattern */ + p = test_adr; + for (i = 0; i < 0xb00; i++) + *p++ = test_val + i; + + /* + * Check that we can read back the values just written + * If one or more fails, we have only 64 MB + */ + p = test_adr; + for (i = 0; i < 0xb00; i++) + if (*p++ != (test_val + i)) + return false; + + return true; +} -static void __bare_init skovarm9cpu_board_config(struct at91sam926x_board_cfg *cfg) +static void sam9263_sdramc_init(void) { - /* Disable Watchdog */ - cfg->wdt_mr = - AT91_WDT_WDIDLEHLT | AT91_WDT_WDDBGHLT | - AT91_WDT_WDV | - AT91_WDT_WDDIS | - AT91_WDT_WDD; - - /* define PDC[31:16] as DATA[31:16] */ - cfg->ebi_pio_pdr = 0xFFFF0000; - /* no pull-up for D[31:16] */ - cfg->ebi_pio_ppudr = 0xFFFF0000; - /* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */ - cfg->ebi_csa = - AT91SAM9263_MATRIX_EBI0_DBPUC | AT91SAM9263_MATRIX_EBI0_VDDIOMSEL_3_3V | - AT91SAM9263_MATRIX_EBI0_CS1A_SDRAMC; - - cfg->smc_cs = 0; - cfg->smc_mode = - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_DBW_16 | - AT91_SMC_TDFMODE | - AT91_SMC_TDF_(6); - cfg->smc_cycle = - AT91_SMC_NWECYCLE_(22) | AT91_SMC_NRDCYCLE_(22); - cfg->smc_pulse = - AT91_SMC_NWEPULSE_(11) | AT91_SMC_NCS_WRPULSE_(11) | - AT91_SMC_NRDPULSE_(11) | AT91_SMC_NCS_RDPULSE_(11); - cfg->smc_setup = - AT91_SMC_NWESETUP_(10) | AT91_SMC_NCS_WRSETUP_(10) | - AT91_SMC_NRDSETUP_(10) | AT91_SMC_NCS_RDSETUP_(10); - - cfg->pmc_mor = - AT91_PMC_MOSCEN | - (255 << 8); /* Main Oscillator Start-up Time */ - cfg->pmc_pllar = - AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */ - AT91_PMC_OUT | - AT91_PMC_PLLCOUNT | /* PLL Counter */ - (2 << 28) | /* PLL Clock Frequency Range */ - ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV); - /* PCK/2 = MCK Master Clock from PLLA */ - cfg->pmc_mckr1 = - AT91_PMC_CSS_SLOW | - AT91_PMC_PRES_1 | - AT91SAM9_PMC_MDIV_2 | - AT91_PMC_PDIV_1; - /* PCK/2 = MCK Master Clock from PLLA */ - cfg->pmc_mckr2 = - AT91_PMC_CSS_PLLA | - AT91_PMC_PRES_1 | - AT91SAM9_PMC_MDIV_2 | - AT91_PMC_PDIV_1; - - /* SDRAM */ - /* SDRAMC_TR - Refresh Timer register */ - cfg->sdrc_tr1 = 0x13C; - /* SDRAMC_CR - Configuration register*/ - cfg->sdrc_cr = - AT91_SDRAMC_NC_10 | /* Assume 128MiB */ - AT91_SDRAMC_NR_13 | - AT91_SDRAMC_NB_4 | - AT91_SDRAMC_CAS_3 | - AT91_SDRAMC_DBW_32 | - (1 << 8) | /* Write Recovery Delay */ - (7 << 12) | /* Row Cycle Delay */ - (2 << 16) | /* Row Precharge Delay */ - (2 << 20) | /* Row to Column Delay */ - (5 << 24) | /* Active to Precharge Delay */ - (1 << 28); /* Exit Self Refresh to Active Delay */ - - /* Memory Device Register -> SDRAM */ - cfg->sdrc_mdr = AT91_SDRAMC_MD_SDRAM; - /* SDRAM_TR */ - cfg->sdrc_tr2 = 1200; - - /* user reset enable */ - cfg->rstc_rmr = - AT91_RSTC_KEY | - AT91_RSTC_PROCRST | - AT91_RSTC_RSTTYP_WAKEUP | - AT91_RSTC_RSTTYP_WATCHDOG; + void __iomem *piod = IOMEM(AT91SAM9263_BASE_PIOD); + static struct at91sam9_sdramc_config config = { + .sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0), + .mr = 0, + .tr = (MASTER_CLOCK * 7) / 1000000, // TODO 140 versus 0x13c (316)? + .cr = AT91_SDRAMC_NC_10 | AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_2 + | AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 + | AT91_SDRAMC_TWR_2 | AT91_SDRAMC_TRC_7 + | AT91_SDRAMC_TRP_2 | AT91_SDRAMC_TRCD_2 + | AT91_SDRAMC_TRAS_5 | AT91_SDRAMC_TXSR_8, + .lpr = 0, + .mdr = AT91_SDRAMC_MD_SDRAM, + }; + + /* Define PD[31:16] as DATA[31:16] */ + at91_mux_gpio_disable(piod, GENMASK(31, 16)); + /* No pull-up for D[31:16] */ + at91_mux_set_pullup(piod, GENMASK(31, 16), false); + /* PD16 to PD31 are pheripheral A */ + at91_mux_set_A_periph(piod, GENMASK(31, 16)); + + /* EBI0_CSA, CS1 SDRAM, 3.3V memories */ + setbits_le32(IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA), + AT91SAM9263_MATRIX_EBI0_VDDIOMSEL_3_3V | AT91SAM9263_MATRIX_EBI0_CS1A_SDRAMC); + + at91sam9_sdramc_initialize(&config, AT91SAM9263_BASE_EBI0_CS1); + + if (!check_if_128mb()) { + /* Change number of columns to 9 for 64MB ram. */ + /* Other parameters does not need to be changed due to chip size. */ + + pr_debug("64M variant detected\n"); + + /* Clear NC bits */ + config.cr &= ~AT91_SDRAMC_NC; + config.cr |= AT91_SDRAMC_NC_9; + at91sam9_sdramc_initialize(&config, AT91SAM9263_BASE_EBI0_CS1); + } } -static void __bare_init skov_arm9cpu_init(void *fdt) +static noinline void continue_skov_arm9cpu_xload_mmc(void) { - struct at91sam926x_board_cfg cfg; + sam9263_lowlevel_init(PLLA_SETTINGS, PLLB_SETTINGS); + sam92_dbgu_setup_ll(MASTER_CLOCK); - cfg.pio = IOMEM(AT91SAM9263_BASE_PIOD); - cfg.sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0); - cfg.ebi_pio_is_peripha = true; - cfg.matrix_csa = IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA); + sam92_udelay_init(MASTER_CLOCK); + sam9263_sdramc_init(); + sam9263_atmci_start_image(1, MASTER_CLOCK, 0); +} - skovarm9cpu_board_config(&cfg); - at91sam9263_board_init(&cfg); +SAM9_ENTRY_FUNCTION(start_skov_arm9cpu_xload_mmc) +{ + /* Configure system so we are less constrained */ + arm_cpu_lowlevel_init(); + relocate_to_current_adr(); + setup_c(); - barebox_arm_entry(AT91_CHIPSELECT_1, at91_get_sdram_size(cfg.sdramc), - fdt); + continue_skov_arm9cpu_xload_mmc(); } extern char __dtb_at91_skov_arm9cpu_start[]; -ENTRY_FUNCTION(start_skov_arm9cpu, r0, r1, r2) +AT91_ENTRY_FUNCTION(start_skov_arm9cpu, r0, r1, r2) { void *fdt; + /* + * We may be running after at91bootstrap, so redo the initialization to + * be sure, everything is as we expect it. + */ arm_cpu_lowlevel_init(); - arm_setup_stack(AT91SAM9263_SRAM0_BASE + AT91SAM9263_SRAM0_SIZE); fdt = __dtb_at91_skov_arm9cpu_start + get_runtime_offset(); - - skov_arm9cpu_init(fdt); + barebox_arm_entry(AT91_CHIPSELECT_1, at91sam9263_get_sdram_size(0), fdt); } diff --git a/arch/arm/boards/skov-imx6/board.c b/arch/arm/boards/skov-imx6/board.c index bceb215a01..8ebb4a6e58 100644 --- a/arch/arm/boards/skov-imx6/board.c +++ b/arch/arm/boards/skov-imx6/board.c @@ -11,12 +11,18 @@ #include <gpio.h> #include <init.h> #include <linux/micrel_phy.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <net.h> #include <of_gpio.h> #include "version.h" +struct skov_imx6_priv { + struct device *dev; +}; + +static struct skov_imx6_priv *skov_priv; + static int eth_of_fixup_node(struct device_node *root, const char *node_path, const u8 *ethaddr) { @@ -24,24 +30,21 @@ static int eth_of_fixup_node(struct device_node *root, const char *node_path, int ret; if (!is_valid_ether_addr(ethaddr)) { - unsigned char ethaddr_str[sizeof("xx:xx:xx:xx:xx:xx")]; - - ethaddr_to_string(ethaddr, ethaddr_str); - pr_err("The mac-address %s is invalid.\n", ethaddr_str); + dev_err(skov_priv->dev, "The mac-address %pM is invalid.\n", ethaddr); return -EINVAL; } node = of_find_node_by_path_from(root, node_path); if (!node) { - pr_err("Did not find node %s to fix up with stored mac-address.\n", - node_path); + dev_err(skov_priv->dev, "Did not find node %s to fix up with stored mac-address.\n", + node_path); return -ENOENT; } ret = of_set_property(node, "mac-address", ethaddr, ETH_ALEN, 1); if (ret) - pr_err("Setting mac-address property of %s failed with: %s.\n", - node->full_name, strerror(-ret)); + dev_err(skov_priv->dev, "Setting mac-address property of %pOF failed with: %s.\n", + node, strerror(-ret)); return ret; } @@ -54,7 +57,7 @@ static int eth_of_fixup_node_from_eth_device(struct device_node *root, edev = eth_get_byname(ethname); if (!edev) { - pr_err("Did not find eth device \"%s\" to copy mac-address from.\n", ethname); + dev_err(skov_priv->dev, "Did not find eth device \"%s\" to copy mac-address from.\n", ethname); return -ENOENT; } @@ -68,14 +71,14 @@ static int get_mac_address_from_env_variable(const char *env, u8 ethaddr[ETH_ALE ethaddr_str = getenv(env); if (!ethaddr_str) { - pr_err("State variable %s storing the mac-address not found.\n", env); + dev_err(skov_priv->dev, "State variable %s storing the mac-address not found.\n", env); return -ENOENT; } ret = string_to_ethaddr(ethaddr_str, ethaddr); if (ret < 0) { - pr_err("Could not convert \"%s\" in state variable %s into mac-address.\n", - ethaddr_str, env); + dev_err(skov_priv->dev, "Could not convert \"%s\" in state variable %s into mac-address.\n", + ethaddr_str, env); return -EINVAL; } @@ -90,13 +93,13 @@ static int get_default_mac_address_from_state_node(const char *state_node_path, node = of_find_node_by_path(state_node_path); if (!node) { - pr_err("Node %s defining the state variable not found.\n", state_node_path); + dev_err(skov_priv->dev, "Node %s defining the state variable not found.\n", state_node_path); return -ENOENT; } ret = of_property_read_u8_array(node, "default", ethaddr, ETH_ALEN); if (ret) { - pr_err("Node %s has no property \"default\" of proper type.\n", state_node_path); + dev_err(skov_priv->dev, "Node %s has no property \"default\" of proper type.\n", state_node_path); return -ENOENT; } @@ -133,9 +136,6 @@ copy_mac_from_eth0: return eth_of_fixup_node_from_eth_device(root, node_path, ethname); } -#define SKOV_GPIO_MDIO_BUS 0 -#define SKOV_LAN1_PHY_ADDR 1 - #define MAX_V_GPIO 8 struct board_description { @@ -343,18 +343,18 @@ static void skov_imx6_no_switch(struct device_node *root) if (node) { ret = of_device_disable(node); if (ret) - pr_warn("Can't disable %s\n", fec_alias); + dev_warn(skov_priv->dev, "Can't disable %s\n", fec_alias); } else { - pr_warn("Can't find node by alias: %s\n", fec_alias); + dev_warn(skov_priv->dev, "Can't find node by alias: %s\n", fec_alias); } node = of_find_node_by_alias(root, "mdio-gpio0"); if (node) { ret = of_device_disable(node); if (ret) - pr_warn("Can't disable mdio-gpio0 node\n"); + dev_warn(skov_priv->dev, "Can't disable mdio-gpio0 node\n"); } else { - pr_warn("Can't find mdio-gpio0 node\n"); + dev_warn(skov_priv->dev, "Can't find mdio-gpio0 node\n"); } } @@ -401,7 +401,7 @@ static void skov_imx6_switch(struct device_node *root) if (ret) { ret = skov_imx6_switch_port(root, old); if (ret) - pr_err("Filed to set mac address\n"); + dev_err(skov_priv->dev, "Filed to set mac address\n"); } } @@ -426,7 +426,7 @@ static int skov_imx6_fixup(struct device_node *root, void *unused) default: val = getenv("state.display.brightness"); if (!val) { - pr_err("could not get default display brightness\n"); + dev_err(skov_priv->dev, "could not get default display brightness\n"); return 0; } @@ -437,7 +437,7 @@ static int skov_imx6_fixup(struct device_node *root, void *unused) for_each_compatible_node_from(node, root, NULL, "pwm-backlight") { ret = of_property_write_u32(node, "default-brightness-level", brightness); if (ret) - pr_err("error %d while setting default-brightness-level property on node %s to %d\n", + dev_err(skov_priv->dev, "error %d while setting default-brightness-level property on node %s to %d\n", ret, node->name, brightness); } @@ -448,6 +448,40 @@ static int skov_imx6_fixup(struct device_node *root, void *unused) return 0; } +static void skov_init_parallel_lcd(void) +{ + struct device_node *lcd; + + lcd = of_find_compatible_node(NULL, NULL, "fsl,imx-parallel-display"); + if (!lcd) { + dev_err(skov_priv->dev, "Cannot find \"fsl,imx-parallel-display\" node\n"); + return; + } + + of_device_enable_and_register(lcd); +} + +static void skov_init_ldb(void) +{ + struct device_node *ldb, *chan; + + ldb = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ldb"); + if (!ldb) { + dev_err(skov_priv->dev, "Cannot find \"fsl,imx6q-ldb\" node\n"); + return; + } + + /* First enable channel 0, prior to enabling parent */ + chan = of_find_node_by_name_address(ldb, "lvds-channel@0"); + if (chan) + of_device_enable(chan); + else + dev_err(skov_priv->dev, "Cannot find \"lvds-channel@0\" node\n"); + + /* Now probe will see the expected device tree */ + of_device_enable_and_register(ldb); +} + /* * Some variants need tweaks to make them work * @@ -458,7 +492,6 @@ static int skov_imx6_fixup(struct device_node *root, void *unused) static void skov_init_board(const struct board_description *variant) { struct device_node *gpio_np = NULL; - struct device_node *np; char *environment_path, *envdev; int ret; @@ -466,9 +499,9 @@ static void skov_init_board(const struct board_description *variant) if (gpio_np) { ret = of_device_ensure_probed(gpio_np); if (ret) - pr_warn("Can't probe GPIO node\n"); + dev_warn(skov_priv->dev, "Can't probe GPIO node\n"); } else { - pr_warn("Can't get GPIO node\n"); + dev_warn(skov_priv->dev, "Can't get GPIO node\n"); } imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0.barebox", @@ -487,12 +520,12 @@ static void skov_init_board(const struct board_description *variant) break; } - pr_notice("Using environment in %s\n", envdev); + dev_notice(skov_priv->dev, "Using environment in %s\n", envdev); ret = of_device_enable_path(environment_path); if (ret < 0) - pr_warn("Failed to enable environment partition '%s' (%d)\n", - environment_path, ret); + dev_warn(skov_priv->dev, "Failed to enable environment partition '%s' (%d)\n", + environment_path, ret); if (variant->flags & SKOV_NEED_ENABLE_RMII) { /* @@ -501,11 +534,13 @@ static void skov_init_board(const struct board_description *variant) */ gpio_request(24, "must_be_low"); gpio_direction_output(24, 0); + gpio_free(24); } /* SD card handling */ gpio_request(205, "mmc io supply"); gpio_direction_output(205, 0); /* select 3.3 V IO voltage */ + gpio_free(205); if (variant->flags & SKOV_ENABLE_MMC_POWER) { /* @@ -516,78 +551,89 @@ static void skov_init_board(const struct board_description *variant) gpio_direction_output(200, 0); /* switch on */ mdelay(1); gpio_direction_output(200, 1); /* switch on */ + gpio_free(200); } - if (variant->flags & SKOV_DISPLAY_PARALLEL) { - np = of_find_compatible_node(NULL, NULL, "fsl,imx-parallel-display"); - if (np) - of_device_enable_and_register(np); - else - pr_err("Cannot find \"fsl,imx-parallel-display\" node\n"); + if (variant->flags & SKOV_DISPLAY_PARALLEL) + skov_init_parallel_lcd(); + + if (variant->flags & SKOV_DISPLAY_LVDS) + skov_init_ldb(); +} + +static int skov_set_switch_lan2_mac(struct skov_imx6_priv *priv) +{ + const char *state = "/state/ethaddr/eth2"; + struct device_node *lan2_np; + u8 ethaddr[ETH_ALEN]; + int ret; + + ret = get_mac_address_from_env_variable("state.ethaddr.eth2", ethaddr); + if (ret || !is_valid_ether_addr(ethaddr)) { + ret = get_default_mac_address_from_state_node(state, ethaddr); + if (ret || !is_valid_ether_addr(ethaddr)) { + dev_err(priv->dev, "can't get MAC for LAN2\n"); + return -ENODEV; + } } - if (variant->flags & SKOV_DISPLAY_LVDS) { - np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ldb"); - if (np) - of_device_enable_and_register(np); - else - pr_err("Cannot find \"fsl,imx6q-ldb\" node\n"); - - /* ... as well as its channel 0 */ - np = of_find_node_by_name_address(np, "lvds-channel@0"); - if (np) - of_device_enable(np); - else - pr_err("Cannot find \"lvds-channel@0\" node\n"); + lan2_np = of_find_node_by_path("/mdio/switch@0/ports/ports@1"); + if (!lan2_np) { + dev_err(priv->dev, "LAN2 node not found\n"); + return -ENODEV; } + + of_eth_register_ethaddr(lan2_np, ethaddr); + + return 0; } static int skov_switch_test(void) { - struct phy_device *phydev; - struct device_d *eth0; - struct mii_bus *mii; + struct device *sw_dev; + struct device *eth0; int ret; if (skov_board_no < 0) return 0; - /* On this boards, we have only one MDIO bus. So, it is enough to take - * the first one. - */ - mii = mdiobus_get_bus(SKOV_GPIO_MDIO_BUS); - /* We can't read the switch ID, but we get get ID of the first PHY, - * which is enough to test if the switch is attached. + /* Driver should be able to detect if device do actually + * exist. So, we need only to detect if driver is actually + * probed. */ - phydev = get_phy_device(mii, SKOV_LAN1_PHY_ADDR); - if (IS_ERR(phydev)) - goto no_switch; - - if (phydev->phy_id != PHY_ID_KSZ886X) + sw_dev = of_find_device_by_node_path("/mdio/switch@0"); + if (!sw_dev) { + dev_err(skov_priv->dev, "switch@0 device was not created!\n"); goto no_switch; + } - return 0; + if (dev_is_probed(sw_dev)) { + skov_set_switch_lan2_mac(skov_priv); + /* even if we fail, continue to boot as good as possible */ + return 0; + } no_switch: skov_have_switch = false; - pr_notice("No-switch variant is detected\n"); + dev_notice(skov_priv->dev, "No-switch variant is detected\n"); eth0 = get_device_by_name("eth0"); if (eth0) { ret = dev_set_param(eth0, "mode", "disabled"); if (ret) - pr_warn("Can't set eth0 mode\n"); + dev_warn(skov_priv->dev, "Can't set eth0 mode\n"); } else { - pr_warn("Can't disable eth0\n"); + dev_warn(skov_priv->dev, "Can't disable eth0\n"); } return 0; } late_initcall(skov_switch_test); -static int skov_imx6_probe(struct device_d *dev) +static int skov_imx6_probe(struct device *dev) { + struct skov_imx6_priv *priv; unsigned v = 0; const struct board_description *variant; @@ -607,6 +653,10 @@ static int skov_imx6_probe(struct device_d *dev) skov_board_no = v; + priv = xzalloc(sizeof(*priv)); + priv->dev = dev; + skov_priv = priv; + globalvar_add_simple_int("board.no", &skov_board_no, "%u"); globalvar_add_simple("board.variant", variant->variant); globalvar_add_simple("board.revision",variant->revision); @@ -632,7 +682,7 @@ static __maybe_unused struct of_device_id skov_version_ids[] = { }; BAREBOX_DEEP_PROBE_ENABLE(skov_version_ids); -static struct driver_d skov_version_driver = { +static struct driver skov_version_driver = { .name = "skov-imx6", .probe = skov_imx6_probe, .of_compatible = DRV_OF_COMPAT(skov_version_ids), @@ -648,7 +698,7 @@ static void skov_imx6_devices_shutdown(void) external = getenv("state.display.external"); if (!external) { - pr_err("could not get state variable display.external\n"); + dev_err(skov_priv->dev, "could not get state variable display.external\n"); return; } diff --git a/arch/arm/boards/skov-imx6/lowlevel.c b/arch/arm/boards/skov-imx6/lowlevel.c index ea6de36a36..16809dd4a6 100644 --- a/arch/arm/boards/skov-imx6/lowlevel.c +++ b/arch/arm/boards/skov-imx6/lowlevel.c @@ -3,19 +3,20 @@ #define pr_fmt(fmt) "skov-imx6: " fmt #include <common.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <io.h> -#include <mach/imx6-mmdc.h> -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6.h> -#include <mach/xload.h> -#include <mach/esdctl.h> +#include <mach/imx/imx6-mmdc.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6.h> +#include <mach/imx/xload.h> +#include <mach/imx/esdctl.h> #include <serial/imx-uart.h> -#include <mach/iomux-mx6.h> -#include <mach/imx-gpio.h> +#include <mach/imx/iomux-mx6.h> +#include <mach/imx/imx-gpio.h> #include "version.h" static void __udelay(int us) @@ -28,122 +29,6 @@ static void __udelay(int us) /* ------------------------------------------------------------------------ */ /* - * Micron MT41K512M16HA-125 IT:E -> 8 GBit = 64 Meg x 16 x 8 banks - * - * Speed Grade Data Rate (MT/s) tRCD-tRP-CL tRCD(ns) tRP(ns) CL(ns) - * -125 1600 11-11-11 13.75 13.75 13.75 - * (=800 MHz) - * - * Memory configuration used by variant: - * - "Max Performance", 64 bit data bus, 1066 MHz, 4 GiB memory - */ -static const struct mx6_ddr3_cfg skov_imx6_cfg_4x512Mb_1066MHz = { - .mem_speed = 1066, - .density = 8, /* GiBit */ - .width = 16, /* 16 bit data per device */ - .banks = 8, - .rowaddr = 16, /* 64 k */ - .coladdr = 10, /* 1 k */ - .pagesz = 2, /* [kiB] */ - .trcd = 1375, /* 13.75 ns = 11 clocks @ 1.6 GHz */ - .trcmin = 4875, /* 48.75 ns = 39 clocks @ 1.6 GHz */ - .trasmin = 3500, /* 35 ns = 28 clocks @ 1.6 GHz */ - .SRT = 0, -}; - -static const struct mx6_ddr_sysinfo skov_imx6_sysinfo_4x512Mb_1066MHz = { - .dsize = 2, /* 64 bit wide = 4 devices, 16 bit each */ - .cs_density = 32, /* four 8 GBit devices connected */ - .ncs = 1, /* one CS line for all devices */ - .cs1_mirror = 1, /* TODO */ - .bi_on = 1, /* TODO */ - .rtt_nom = 1, /* MX6_MMDC_P0_MPODTCTRL -> 0x00022227 */ - .rtt_wr = 0, /* is LW_EN is 0 in their code */ - .ralat = 5, /* TODO */ - .walat = 1, /* TODO */ - .mif3_mode = 3, /* TODO */ - .rst_to_cke = 0x23, /* used in their code as well */ - .sde_to_rst = 0x10, /* used in their code as well */ - .pd_fast_exit = 0, /* TODO */ -}; - -static const struct mx6_mmdc_calibration skov_imx6_calib_4x512Mb_1066MHz = { - .p0_mpwldectrl0 = 0x001a0017, - .p0_mpwldectrl1 = 0x001F001F, - .p0_mpdgctrl0 = 0x43040319, - .p0_mpdgctrl1 = 0x03040279, - .p0_mprddlctl = 0x4d434248, - .p0_mpwrdlctl = 0x34424543, - - .p1_mpwldectrl0 = 0x00170027, - .p1_mpwldectrl1 = 0x000a001f, - .p1_mpdgctrl0 = 0x43040321, - .p1_mpdgctrl1 = 0x03030251, - .p1_mprddlctl = 0x42413c4d, - .p1_mpwrdlctl = 0x49324933, -}; - -/* ------------------------------------------------------------------------ */ - -/* - * Micron MT41K256M16HA-125 IT:E -> 4 GBit = 32 Meg x 16 x 8 banks - * - * Speed Grade Data Rate (MT/s) tRCD-tRP-CL tRCD(ns) tRP(ns) CL(ns) - * -125 1600 11-11-11 13.75 13.75 13.75 - * (=800 MHz) - * - * Memory configuration used by variant: - * - "Max Performance", 64 bit data bus, 1066 MHz, 2 GiB memory - */ -static const struct mx6_ddr3_cfg skov_imx6_cfg_4x256Mb_1066MHz = { - .mem_speed = 1066, - .density = 4, /* GiBit */ - .width = 16, /* 16 bit data per device */ - .banks = 8, - .rowaddr = 15, /* 32 k */ - .coladdr = 10, /* 1 k */ - .pagesz = 2, /* [kiB] */ - .trcd = 1375, /* 13.75 ns = 11 clocks @ 1.6 GHz */ - .trcmin = 4875, /* 48.75 ns = 39 clocks @ 1.6 GHz */ - .trasmin = 3500, /* 35 ns = 28 clocks @ 1.6 GHz */ - .SRT = 0, -}; - -static const struct mx6_ddr_sysinfo skov_imx6_sysinfo_4x256Mb_1066MHz = { - .dsize = 2, /* 64 bit wide = 4 devices, 16 bit each */ - .cs_density = 16, /* four 4 GBit devices connected */ - .ncs = 1, /* one CS line for all devices */ - .cs1_mirror = 1, /* TODO */ - .bi_on = 1, /* TODO */ - .rtt_nom = 1, /* MX6_MMDC_P0_MPODTCTRL -> 0x00022227 */ - .rtt_wr = 0, /* is LW_EN is 0 in their code */ - .ralat = 5, /* TODO */ - .walat = 1, /* TODO */ - .mif3_mode = 3, /* TODO */ - .rst_to_cke = 0x23, /* used in their code as well */ - .sde_to_rst = 0x10, /* used in their code as well */ - .pd_fast_exit = 0, /* TODO */ -}; - -static const struct mx6_mmdc_calibration skov_imx6_calib_4x256Mb_1066MHz = { - .p0_mpwldectrl0 = 0x001a0017, - .p0_mpwldectrl1 = 0x001F001F, - .p0_mpdgctrl0 = 0x43040319, - .p0_mpdgctrl1 = 0x03040279, - .p0_mprddlctl = 0x4d434248, - .p0_mpwrdlctl = 0x34424543, - - .p1_mpwldectrl0 = 0x00170027, - .p1_mpwldectrl1 = 0x000a001f, - .p1_mpdgctrl0 = 0x43040321, - .p1_mpdgctrl1 = 0x03030251, - .p1_mprddlctl = 0x42413c4d, - .p1_mpwrdlctl = 0x49324933, -}; - -/* ------------------------------------------------------------------------ */ - -/* * Micron MT41K128M16JT-125 IT:K -> 2 GBit = 16 Meg x 16 x 8 banks * * Speed Grade Data Rate (MT/s) tRCD-tRP-CL tRCD(ns) tRP(ns) CL(ns) @@ -174,33 +59,33 @@ static const struct mx6_ddr_sysinfo skov_imx6_sysinfo_4x128Mb_1066MHz = { .dsize = 2, /* 64 bit wide = 4 devices, 16 bit each */ .cs_density = 8, /* four 2 GBit devices connected */ .ncs = 1, /* one CS line for all devices */ - .cs1_mirror = 1, /* TODO */ - .bi_on = 1, /* TODO */ + .cs1_mirror = 1, + .bi_on = 1, .rtt_nom = 1, /* MX6_MMDC_P0_MPODTCTRL -> 0x00022227 */ .rtt_wr = 0, /* is LW_EN is 0 in their code */ - .ralat = 5, /* TODO */ - .walat = 1, /* TODO */ - .mif3_mode = 3, /* TODO */ - .rst_to_cke = 0x23, /* used in their code as well */ - .sde_to_rst = 0x10, /* used in their code as well */ - .pd_fast_exit = 0, /* TODO */ + .ralat = 5, + .walat = 0, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, + .pd_fast_exit = 1, }; /* calibration info for the "max performance" and "high performance" */ static const struct mx6_mmdc_calibration skov_imx6_calib_4x128Mb_1066MHz = { - .p0_mpwldectrl0 = 0x0011000E, - .p0_mpwldectrl1 = 0x000E001B, - .p0_mpdgctrl0 = 0x42720306, - .p0_mpdgctrl1 = 0x026F0266, - .p0_mprddlctl = 0x45393B3E, - .p0_mpwrdlctl = 0x40434541, - - .p1_mpwldectrl0 = 0x00190015, - .p1_mpwldectrl1 = 0x00070018, - .p1_mpdgctrl0 = 0x4273030A, - .p1_mpdgctrl1 = 0x02740240, - .p1_mprddlctl = 0x403A3747, - .p1_mpwrdlctl = 0x473E4A3B, + .p0_mpwldectrl0 = 0x00230023, + .p0_mpwldectrl1 = 0x0029001E, + .p0_mpdgctrl0 = 0x43400350, + .p0_mpdgctrl1 = 0x03380330, + .p0_mprddlctl = 0x3E323638, + .p0_mpwrdlctl = 0x383A3E3A, + + .p1_mpwldectrl0 = 0x001F002A, + .p1_mpwldectrl1 = 0x001A0028, + .p1_mpdgctrl0 = 0x43300340, + .p1_mpdgctrl1 = 0x03340300, + .p1_mprddlctl = 0x383A3242, + .p1_mpwrdlctl = 0x4232463A, }; /* ------------------------------------------------------------------------ */ @@ -214,21 +99,21 @@ static struct mx6dq_iomux_ddr_regs ddr_iomux_q = { .dram_sdqs5 = 0x00000030, .dram_sdqs6 = 0x00000030, .dram_sdqs7 = 0x00000030, - .dram_dqm0 = 0x00020030, - .dram_dqm1 = 0x00020030, - .dram_dqm2 = 0x00020030, - .dram_dqm3 = 0x00020030, - .dram_dqm4 = 0x00020030, - .dram_dqm5 = 0x00020030, - .dram_dqm6 = 0x00020030, - .dram_dqm7 = 0x00020030, - .dram_cas = 0x00020030, - .dram_ras = 0x00020030, - .dram_sdclk_0 = 0x00020030, - .dram_sdclk_1 = 0x00020030, + .dram_dqm0 = 0x00000030, + .dram_dqm1 = 0x00000030, + .dram_dqm2 = 0x00000030, + .dram_dqm3 = 0x00000030, + .dram_dqm4 = 0x00000030, + .dram_dqm5 = 0x00000030, + .dram_dqm6 = 0x00000030, + .dram_dqm7 = 0x00000030, + .dram_cas = 0x00000030, + .dram_ras = 0x00000030, + .dram_sdclk_0 = 0x00000030, + .dram_sdclk_1 = 0x00000030, .dram_sdcke0 = 0x00003000, .dram_sdcke1 = 0x00003000, - .dram_reset = 0x00020030, + .dram_reset = 0x00000030, .dram_sdba2 = 0x00000000, .dram_sdodt0 = 0x00003030, .dram_sdodt1 = 0x00003030, @@ -295,25 +180,25 @@ static const struct mx6_ddr_sysinfo skov_imx6_sysinfo_2x128Mb_800MHz = { .dsize = 1, /* 32 bit wide = 2 devices, 16 bit each */ .cs_density = 4, /* two 2 GBit devices connected */ .ncs = 1, /* one CS line for all devices */ - .cs1_mirror = 1, /* TODO */ - .bi_on = 1, /* TODO */ + .cs1_mirror = 1, + .bi_on = 1, .rtt_nom = 1, /* MX6_MMDC_P0_MPODTCTRL -> 0x00022227 */ .rtt_wr = 0, /* is LW_EN is 0 in their code */ - .ralat = 5, /* TODO */ - .walat = 1, /* TODO */ - .mif3_mode = 3, /* TODO */ - .rst_to_cke = 0x23, /* used in their code as well */ - .sde_to_rst = 0x10, /* used in their code as well */ - .pd_fast_exit = 0, /* TODO */ + .ralat = 5, + .walat = 0, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, + .pd_fast_exit = 1, }; static const struct mx6_mmdc_calibration skov_imx6_calib_2x128Mb_800MHz = { - .p0_mpwldectrl0 = 0x0040003C, - .p0_mpwldectrl1 = 0x0032003E, - .p0_mpdgctrl0 = 0x42350231, - .p0_mpdgctrl1 = 0x021A0218, - .p0_mprddlctl = 0x4B4B4E49, - .p0_mpwrdlctl = 0x3F3F3035, + .p0_mpwldectrl0 = 0x004A004B, + .p0_mpwldectrl1 = 0x00420046, + .p0_mpdgctrl0 = 0x42400240, + .p0_mpdgctrl1 = 0x02300230, + .p0_mprddlctl = 0x464A4A4A, + .p0_mpwrdlctl = 0x32342A32, }; /* ------------------------------------------------------------------------ */ @@ -327,21 +212,21 @@ static const struct mx6sdl_iomux_ddr_regs ddr_iomux_s = { .dram_sdqs5 = 0x00000030, .dram_sdqs6 = 0x00000030, .dram_sdqs7 = 0x00000030, - .dram_dqm0 = 0x00020030, - .dram_dqm1 = 0x00020030, - .dram_dqm2 = 0x00020030, - .dram_dqm3 = 0x00020030, - .dram_dqm4 = 0x00020030, - .dram_dqm5 = 0x00020030, - .dram_dqm6 = 0x00020030, - .dram_dqm7 = 0x00020030, - .dram_cas = 0x00020030, - .dram_ras = 0x00020030, - .dram_sdclk_0 = 0x00020030, - .dram_sdclk_1 = 0x00020030, + .dram_dqm0 = 0x00000030, + .dram_dqm1 = 0x00000030, + .dram_dqm2 = 0x00000030, + .dram_dqm3 = 0x00000030, + .dram_dqm4 = 0x00000030, + .dram_dqm5 = 0x00000030, + .dram_dqm6 = 0x00000030, + .dram_dqm7 = 0x00000030, + .dram_cas = 0x00000030, + .dram_ras = 0x00000030, + .dram_sdclk_0 = 0x00000030, + .dram_sdclk_1 = 0x0000030, .dram_sdcke0 = 0x00003000, .dram_sdcke1 = 0x00003000, - .dram_reset = 0x00020030, + .dram_reset = 0x00000030, .dram_sdba2 = 0x00000000, .dram_sdodt0 = 0x00003030, .dram_sdodt1 = 0x00003030, @@ -529,26 +414,6 @@ static void skov_imx6_init(int cpu_type, unsigned board_variant) int instance; switch (board_variant) { - case 12: /* P2 i.MX6Q, max performance */ - if (cpu_type != IMX6_CPUTYPE_IMX6Q) { - pr_err("Invalid SoC! i.MX6Q expected\n"); - return; - } - pr_debug("Initializing a P2 max performance system...\n"); - spl_imx6q_dram_init(&skov_imx6_sysinfo_4x256Mb_1066MHz, - &skov_imx6_calib_4x256Mb_1066MHz, - &skov_imx6_cfg_4x256Mb_1066MHz); - break; - case 18: /* i.MX6Q+ */ - if (cpu_type != IMX6_CPUTYPE_IMX6Q) { - pr_err("Invalid SoC! i.MX6Q expected\n"); - return; - } - pr_debug("Initializing board variant 18\n"); - spl_imx6q_dram_init(&skov_imx6_sysinfo_4x512Mb_1066MHz, - &skov_imx6_calib_4x512Mb_1066MHz, - &skov_imx6_cfg_4x512Mb_1066MHz); - break; case 19: /* i.MX6S "Solo_R512M_F2G" */ if (cpu_type != IMX6_CPUTYPE_IMX6S) { pr_err("Invalid SoC! i.MX6S expected\n"); @@ -658,7 +523,7 @@ static noinline void skov_imx6_start(void) ENTRY_FUNCTION(start_imx6_skov_imx6, r0, r1, r2) { - arm_cpu_lowlevel_init(); + imx6_cpu_lowlevel_init(); relocate_to_current_adr(); setup_c(); diff --git a/arch/arm/boards/skov-imx6/version.c b/arch/arm/boards/skov-imx6/version.c index 5a6a0625ca..503a60366f 100644 --- a/arch/arm/boards/skov-imx6/version.c +++ b/arch/arm/boards/skov-imx6/version.c @@ -3,9 +3,9 @@ #define pr_fmt(fmt) "skov-imx6: " fmt #include <common.h> -#include <mach/iomux-mx6.h> -#include <mach/imx-gpio.h> -#include <mach/imx6.h> +#include <mach/imx/iomux-mx6.h> +#include <mach/imx/imx-gpio.h> +#include <mach/imx/imx6.h> #include "version.h" diff --git a/arch/arm/boards/skov-imx8mp/Makefile b/arch/arm/boards/skov-imx8mp/Makefile new file mode 100644 index 0000000000..35d8640087 --- /dev/null +++ b/arch/arm/boards/skov-imx8mp/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +obj-y += board.o +lwl-y += lowlevel.o lpddr4-timing.o diff --git a/arch/arm/boards/skov-imx8mp/board.c b/arch/arm/boards/skov-imx8mp/board.c new file mode 100644 index 0000000000..3cb7a8752a --- /dev/null +++ b/arch/arm/boards/skov-imx8mp/board.c @@ -0,0 +1,300 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include "linux/kernel.h" +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <envfs.h> +#include <environment.h> +#include <globalvar.h> +#include <gpio.h> +#include <init.h> +#include <io.h> +#include <mach/imx/bbu.h> +#include <mach/imx/generic.h> +#include <mach/imx/iomux-mx8mp.h> + +struct skov_imx8mp_priv { + struct device *dev; + int variant_id; +}; + +static struct skov_imx8mp_priv *skov_imx8mp_priv; + +#define GPIO_HW_VARIANT {\ + {IMX_GPIO_NR(1, 8), GPIOF_DIR_IN | GPIOF_ACTIVE_HIGH, "var0"}, \ + {IMX_GPIO_NR(1, 9), GPIOF_DIR_IN | GPIOF_ACTIVE_HIGH, "var1"}, \ + {IMX_GPIO_NR(1, 10), GPIOF_DIR_IN | GPIOF_ACTIVE_HIGH, "var2"}, \ + {IMX_GPIO_NR(1, 11), GPIOF_DIR_IN | GPIOF_ACTIVE_HIGH, "var3"}, \ + {IMX_GPIO_NR(1, 12), GPIOF_DIR_IN | GPIOF_ACTIVE_HIGH, "var4"}, \ + {IMX_GPIO_NR(1, 13), GPIOF_DIR_IN | GPIOF_ACTIVE_HIGH, "var5"}, \ + {IMX_GPIO_NR(1, 14), GPIOF_DIR_IN | GPIOF_ACTIVE_HIGH, "var6"}, \ + {IMX_GPIO_NR(1, 15), GPIOF_DIR_IN | GPIOF_ACTIVE_HIGH, "var7"}, \ +} + +struct skov_imx8mp_storage { + const char *name; + const char *env_path; + const char *dev_path; + enum bootsource bootsource; + int bootsource_ext_id; + bool mmc_boot_part; +}; + +enum skov_imx8mp_boot_source { + SKOV_BOOT_SOURCE_EMMC, + SKOV_BOOT_SOURCE_SD, + SKOV_BOOT_SOURCE_UNKNOWN, +}; + +static const struct skov_imx8mp_storage skov_imx8mp_storages[] = { + [SKOV_BOOT_SOURCE_EMMC] = { + /* default boot source */ + .name = "eMMC", + .env_path = "/chosen/environment-emmc", + .dev_path = "/dev/mmc2", + .bootsource = BOOTSOURCE_MMC, + .bootsource_ext_id = 2, + .mmc_boot_part = true, + }, + [SKOV_BOOT_SOURCE_SD] = { + .name = "SD", + .env_path = "/chosen/environment-sd", + .dev_path = "/dev/mmc1.barebox", + .bootsource = BOOTSOURCE_MMC, + .bootsource_ext_id = 1, + }, +}; + +struct board_description { + const char *dts_compatible; + const char *dts_compatible_hdmi; + unsigned flags; +}; + +#define SKOV_IMX8MP_HAS_HDMI BIT(0) + +static const struct board_description imx8mp_variants[] = { + [0] = { + .dts_compatible = "skov,imx8mp-skov-revb-lt6", + }, + [1] = { + .dts_compatible = "skov,imx8mp-skov-revb-mi1010ait-1cp1", + .dts_compatible_hdmi = "skov,imx8mp-skov-revb-hdmi", + .flags = SKOV_IMX8MP_HAS_HDMI, + }, + [2] = { + .dts_compatible = "skov,imx8mp-skov-revc-bd500", + }, +}; + +static const struct board_description imx8mp_basic_variant = { + .dts_compatible = "skov,imx8mp-skov-basic", +}; + +static int skov_imx8mp_fixup(struct device_node *root, void *data) +{ + struct device_node *chosen = of_create_node(root, "/chosen"); + const char *of_board = "skov,imx8mp-board-version"; + struct skov_imx8mp_priv *priv = data; + struct device *dev = priv->dev; + int ret; + + ret = of_property_write_u32(chosen, of_board, priv->variant_id); + if (ret) + dev_err(dev, "Failed to fixup %s: %pe\n", of_board, + ERR_PTR(ret)); + + return 0; +} + +static int skov_imx8mp_get_variant_id(uint *id) +{ + struct gpio gpios_rev[] = GPIO_HW_VARIANT; + struct device_node *gpio_np; + u32 hw_rev; + int ret; + + gpio_np = of_find_node_by_name_address(NULL, "gpio@30200000"); + if (!gpio_np) + return -ENODEV; + + ret = of_device_ensure_probed(gpio_np); + if (ret) + return ret; + + ret = gpio_array_to_id(gpios_rev, ARRAY_SIZE(gpios_rev), &hw_rev); + if (ret) + goto exit_get_id; + + *id = hw_rev; + + return 0; +exit_get_id: + pr_err("Failed to read gpio ID: %pe\n", ERR_PTR(ret)); + return ret; +} + +static int skov_imx8mp_get_hdmi(struct device *dev) +{ + const char *env = "state.display.external"; + struct device_node *state_np; + unsigned int val = 0; + int ret; + + state_np = of_find_node_by_name_address(NULL, "state"); + if (!state_np) { + dev_err(dev, "Failed to find state node\n"); + return -ENODEV; + } + + ret = of_device_ensure_probed(state_np); + if (ret) { + dev_err(dev, "Failed to probe state node: %pe\n", ERR_PTR(ret)); + return ret; + } + + ret = getenv_uint(env, &val); + if (ret) { + dev_err(dev, "Failed to read %s: %pe\n", env, ERR_PTR(ret)); + return ret; + } + + return val; +} + +static int skov_imx8mp_init_variant(struct skov_imx8mp_priv *priv) +{ + const struct board_description *variant; + struct device *dev = priv->dev; + const char *compatible; + unsigned int v = 0; + int ret; + + ret = skov_imx8mp_get_variant_id(&v); + if (ret) + return ret; + + priv->variant_id = v; + + if (v >= ARRAY_SIZE(imx8mp_variants)) { + dev_warn(dev, "Unsupported variant %u. Fall back to basic variant\n", v); + variant = &imx8mp_basic_variant; + } else { + variant = &imx8mp_variants[v]; + } + + if (variant->flags & SKOV_IMX8MP_HAS_HDMI) { + ret = skov_imx8mp_get_hdmi(dev); + if (ret < 0) + return ret; + + if (ret) + compatible = variant->dts_compatible_hdmi; + else + compatible = variant->dts_compatible; + } else { + compatible = variant->dts_compatible; + } + + of_prepend_machine_compatible(NULL, compatible); + + return 0; +} + +static void skov_imx8mp_enable_env(struct device *dev, + const struct skov_imx8mp_storage *st, + bool *enabled) +{ + int ret; + + if (bootsource_get() != st->bootsource || + bootsource_get_instance() != st->bootsource_ext_id) + return; + + ret = of_device_enable_path(st->env_path); + if (ret) { + dev_err(dev, "Failed to enable environment path: %s, %pe\n", + st->env_path, ERR_PTR(ret)); + return; + } + + *enabled = true; +} + +static void skov_imx8mp_add_bbu(struct device *dev, + const struct skov_imx8mp_storage *st, + bool default_env) +{ + unsigned long flags = 0; + int ret; + + if (default_env) + flags |= BBU_HANDLER_FLAG_DEFAULT; + + if (st->mmc_boot_part) { + ret = imx8m_bbu_internal_mmcboot_register_handler(st->name, + st->dev_path, + flags); + } else { + ret = imx8m_bbu_internal_mmc_register_handler(st->name, + st->dev_path, + flags); + } + if (ret) + dev_err(dev, "Failed to register %s BBU handler: %pe\n", + st->name, ERR_PTR(ret)); +} + +static void skov_imx8mp_init_storage(struct device *dev) +{ + int default_boot_src = SKOV_BOOT_SOURCE_EMMC; + int i; + + for (i = 0; i < ARRAY_SIZE(skov_imx8mp_storages); i++) { + bool enabled_env = false; + + skov_imx8mp_enable_env(dev, &skov_imx8mp_storages[i], + &enabled_env); + if (enabled_env) + default_boot_src = i; + } + + for (i = 0; i < ARRAY_SIZE(skov_imx8mp_storages); i++) + skov_imx8mp_add_bbu(dev, &skov_imx8mp_storages[i], + i == default_boot_src); +} + +static int skov_imx8mp_probe(struct device *dev) +{ + struct skov_imx8mp_priv *priv; + int ret; + + priv = xzalloc(sizeof(*priv)); + priv->dev = dev; + skov_imx8mp_priv = priv; + + skov_imx8mp_init_storage(dev); + + skov_imx8mp_init_variant(priv); + + ret = of_register_fixup(skov_imx8mp_fixup, priv); + if (ret) + dev_err(dev, "Failed to register fixup: %pe\n", ERR_PTR(ret)); + + return 0; +} + +static const struct of_device_id skov_imx8mp_of_match[] = { + /* generic, barebox specific compatible for all board variants */ + { .compatible = "skov,imx8mp" }, + { /* Sentinel */ } +}; +BAREBOX_DEEP_PROBE_ENABLE(skov_imx8mp_of_match); + +static struct driver skov_imx8mp_board_driver = { + .name = "skov-imx8m", + .probe = skov_imx8mp_probe, + .of_compatible = skov_imx8mp_of_match, +}; +coredevice_platform_driver(skov_imx8mp_board_driver); diff --git a/arch/arm/boards/skov-imx8mp/flash-header-skov-imx8mp.imxcfg b/arch/arm/boards/skov-imx8mp/flash-header-skov-imx8mp.imxcfg new file mode 100644 index 0000000000..6ea2e6c68e --- /dev/null +++ b/arch/arm/boards/skov-imx8mp/flash-header-skov-imx8mp.imxcfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-only + +soc imx8mp + +loadaddr 0x920000 +max_load_size 0x3f000 +ivtofs 0x0 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/skov-imx8mp/lowlevel.c b/arch/arm/boards/skov-imx8mp/lowlevel.c new file mode 100644 index 0000000000..c35ffe526d --- /dev/null +++ b/arch/arm/boards/skov-imx8mp/lowlevel.c @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> +#include <common.h> +#include <debug_ll.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/atf.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/imx8mp-regs.h> +#include <mach/imx/iomux-mx8mp.h> +#include <mach/imx/xload.h> +#include <mfd/pca9450.h> +#include <pbl/i2c.h> +#include <pbl/pmic.h> +#include <soc/imx8m/ddr.h> + +extern char __dtb_z_imx8mp_skov_start[]; + +#define UART_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_FSEL | \ + MX8MP_PAD_CTL_PUE | \ + MX8MP_PAD_CTL_PE) + +#define I2C_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_HYS | \ + MX8MP_PAD_CTL_PUE | \ + MX8MP_PAD_CTL_PE) + +static void setup_uart(void) +{ + void __iomem *uart = IOMEM(MX8M_UART2_BASE_ADDR); + + imx8m_early_setup_uart_clock(); + + imx8mp_setup_pad(MX8MP_PAD_UART2_TXD__UART2_DCE_TX | UART_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_UART2_RXD__UART2_DCE_RX | UART_PAD_CTRL); + imx8m_uart_setup(uart); + + pbl_set_putc(imx_uart_putc, uart); + + putc_ll('>'); +} + +static struct pmic_config pca9450_cfg[] = { + /* BUCKxOUT_DVS0/1 control BUCK123 output */ + { PCA9450_BUCK123_DVS, 0x29 }, + /* + * increase VDD_SOC to typical value 0.95V before first + * DRAM access, set DVS1 to 0.85v for suspend. + * Enable DVS control through PMIC_STBY_REQ and + * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) + */ + { PCA9450_BUCK1OUT_DVS0, 0x1C }, + { PCA9450_BUCK1OUT_DVS1, 0x14 }, + { PCA9450_BUCK1CTRL, 0x59 }, + /* + * Increase VDD_ARM to 0.95V to avoid issues in case software after + * Barebox switches to the OD ARM frequency without reprogramming the + * PMIC first. + */ + { PCA9450_BUCK2OUT_DVS0, 0x1C }, + /* set WDOG_B_CFG to cold reset */ + { PCA9450_RESET_CTRL, 0xA1 }, +}; + +static void power_init_board(void) +{ + struct pbl_i2c *i2c; + + imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL); + + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); + + i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR)); + + pmic_configure(i2c, 0x25, pca9450_cfg, ARRAY_SIZE(pca9450_cfg)); +} + +extern struct dram_timing_info imx8mp_skov_dram_timing; + +static void start_atf(struct dram_timing_info *dram_timing) +{ + /* + * If we are in EL3 we are running for the first time and need to + * initialize the DRAM and run TF-A (BL31). The TF-A will then jump + * to DRAM in EL2. + */ + if (current_el() != 3) + return; + + imx8mp_early_clock_init(); + + power_init_board(); + + imx8mp_ddr_init(dram_timing, DRAM_TYPE_LPDDR4); + + imx8mp_load_and_start_image_via_tfa(); +} + +/* + * Power-on execution flow of imx8mp_skov_start() might not be + * obvious for a very first read, so here's, hopefully helpful, + * summary: + * + * 1. MaskROM uploads PBL into OCRAM and that's where this function is + * executed for the first time. At entry the exception level is EL3. + * + * 2. DDR is initialized and the image is loaded from storage into DRAM. The PBL + * part is copied from OCRAM to the TF-A return address in DRAM. + * + * 3. TF-A is executed and exits into the PBL code in DRAM. TF-A has taken us + * from EL3 to EL2. + * + * 4. Standard barebox boot flow continues + */ +static __noreturn noinline void +imx8mp_skov_start(struct dram_timing_info *dram_timing, void *dtb) +{ + setup_uart(); + + start_atf(dram_timing); + + /* + * Standard entry we hit once we initialized both DDR and ATF + */ + imx8mp_barebox_entry(dtb); +} + +ENTRY_FUNCTION(start_skov_imx8mp, r0, r1, r2) +{ + imx8mp_cpu_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + imx8mp_skov_start(&imx8mp_skov_dram_timing, + __dtb_z_imx8mp_skov_start); +} diff --git a/arch/arm/boards/skov-imx8mp/lpddr4-timing.c b/arch/arm/boards/skov-imx8mp/lpddr4-timing.c new file mode 100644 index 0000000000..a93506b0bd --- /dev/null +++ b/arch/arm/boards/skov-imx8mp/lpddr4-timing.c @@ -0,0 +1,1125 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2019 NXP + * + * Generated code from MX8M_DDR_tool + */ + +#include <common.h> +#include <soc/imx8m/ddr.h> +#include <soc/imx8m/lpddr4_define.h> + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0xa1080020 }, + { 0x3d400020, 0x1223 }, + { 0x3d400024, 0x16e3600 }, + { 0x3d400064, 0x5b00d2 }, + { 0x3d400070, 0x7027f90 }, + { 0x3d400074, 0x790 }, + { 0x3d4000d0, 0xc00305ba }, + { 0x3d4000d4, 0x940000 }, + { 0x3d4000dc, 0xd4002d }, + { 0x3d4000e0, 0x310000 }, + { 0x3d4000e8, 0x660048 }, + { 0x3d4000ec, 0x160048 }, + { 0x3d400100, 0x191e1920 }, + { 0x3d400104, 0x60630 }, + { 0x3d40010c, 0xb0b000 }, + { 0x3d400110, 0xe04080e }, + { 0x3d400114, 0x2040c0c }, + { 0x3d400118, 0x1010007 }, + { 0x3d40011c, 0x402 }, + { 0x3d400130, 0x20600 }, + { 0x3d400134, 0xc100002 }, + { 0x3d400138, 0xd8 }, + { 0x3d400144, 0x96004b }, + { 0x3d400180, 0x2ee0017 }, + { 0x3d400184, 0x2605b8e }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x497820a }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x170a }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0xdf00e4 }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x11 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x1 }, + { 0x3d4000f4, 0x699 }, + { 0x3d400108, 0x70e1617 }, + { 0x3d400200, 0x1f }, + { 0x3d400208, 0x0 }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, + { 0x3d400250, 0x1705 }, + { 0x3d400254, 0x2c }, + { 0x3d40025c, 0x4000030 }, + { 0x3d400264, 0x900093e7 }, + { 0x3d40026c, 0x2005574 }, + { 0x3d400400, 0x111 }, + { 0x3d400404, 0x72ff }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x2100e07 }, + { 0x3d400498, 0x620096 }, + { 0x3d40049c, 0x1100e07 }, + { 0x3d4004a0, 0xc8012c }, + { 0x3d402020, 0x1021 }, + { 0x3d402024, 0x30d400 }, + { 0x3d402050, 0x20d000 }, + { 0x3d402064, 0xc001c }, + { 0x3d4020dc, 0x840000 }, + { 0x3d4020e0, 0x330000 }, + { 0x3d4020e8, 0x660048 }, + { 0x3d4020ec, 0x160048 }, + { 0x3d402100, 0xa040305 }, + { 0x3d402104, 0x30407 }, + { 0x3d402108, 0x203060b }, + { 0x3d40210c, 0x505000 }, + { 0x3d402110, 0x2040202 }, + { 0x3d402114, 0x2030202 }, + { 0x3d402118, 0x1010004 }, + { 0x3d40211c, 0x302 }, + { 0x3d402130, 0x20300 }, + { 0x3d402134, 0xa100002 }, + { 0x3d402138, 0x1d }, + { 0x3d402144, 0x14000a }, + { 0x3d402180, 0x640004 }, + { 0x3d402190, 0x3818200 }, + { 0x3d402194, 0x80303 }, + { 0x3d4021b4, 0x100 }, + { 0x3d4020f4, 0x599 }, + { 0x3d403020, 0x1021 }, + { 0x3d403024, 0xc3500 }, + { 0x3d403050, 0x20d000 }, + { 0x3d403064, 0x30007 }, + { 0x3d4030dc, 0x840000 }, + { 0x3d4030e0, 0x330000 }, + { 0x3d4030e8, 0x660048 }, + { 0x3d4030ec, 0x160048 }, + { 0x3d403100, 0xa010102 }, + { 0x3d403104, 0x30404 }, + { 0x3d403108, 0x203060b }, + { 0x3d40310c, 0x505000 }, + { 0x3d403110, 0x2040202 }, + { 0x3d403114, 0x2030202 }, + { 0x3d403118, 0x1010004 }, + { 0x3d40311c, 0x302 }, + { 0x3d403130, 0x20300 }, + { 0x3d403134, 0xa100002 }, + { 0x3d403138, 0x8 }, + { 0x3d403144, 0x50003 }, + { 0x3d403180, 0x190004 }, + { 0x3d403190, 0x3818200 }, + { 0x3d403194, 0x80303 }, + { 0x3d4031b4, 0x100 }, + { 0x3d4030f4, 0x599 }, + { 0x3d400028, 0x0 }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x0 }, + { 0x100a1, 0x1 }, + { 0x100a2, 0x2 }, + { 0x100a3, 0x3 }, + { 0x100a4, 0x4 }, + { 0x100a5, 0x5 }, + { 0x100a6, 0x6 }, + { 0x100a7, 0x7 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x1 }, + { 0x110a2, 0x3 }, + { 0x110a3, 0x4 }, + { 0x110a4, 0x5 }, + { 0x110a5, 0x2 }, + { 0x110a6, 0x7 }, + { 0x110a7, 0x6 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x1 }, + { 0x120a2, 0x3 }, + { 0x120a3, 0x2 }, + { 0x120a4, 0x5 }, + { 0x120a5, 0x4 }, + { 0x120a6, 0x7 }, + { 0x120a7, 0x6 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x1 }, + { 0x130a2, 0x2 }, + { 0x130a3, 0x3 }, + { 0x130a4, 0x4 }, + { 0x130a5, 0x5 }, + { 0x130a6, 0x6 }, + { 0x130a7, 0x7 }, + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + { 0x11005f, 0x1ff }, + { 0x11015f, 0x1ff }, + { 0x11105f, 0x1ff }, + { 0x11115f, 0x1ff }, + { 0x11205f, 0x1ff }, + { 0x11215f, 0x1ff }, + { 0x11305f, 0x1ff }, + { 0x11315f, 0x1ff }, + { 0x21005f, 0x1ff }, + { 0x21015f, 0x1ff }, + { 0x21105f, 0x1ff }, + { 0x21115f, 0x1ff }, + { 0x21205f, 0x1ff }, + { 0x21215f, 0x1ff }, + { 0x21305f, 0x1ff }, + { 0x21315f, 0x1ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + { 0x200c5, 0x19 }, + { 0x1200c5, 0x7 }, + { 0x2200c5, 0x7 }, + { 0x2002e, 0x2 }, + { 0x12002e, 0x2 }, + { 0x22002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x20024, 0x1a3 }, + { 0x2003a, 0x2 }, + { 0x120024, 0x1a3 }, + { 0x2003a, 0x2 }, + { 0x220024, 0x1a3 }, + { 0x2003a, 0x2 }, + { 0x20056, 0x3 }, + { 0x120056, 0x3 }, + { 0x220056, 0x3 }, + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x1204d, 0xe00 }, + { 0x1214d, 0xe00 }, + { 0x1304d, 0xe00 }, + { 0x1314d, 0xe00 }, + { 0x11004d, 0xe00 }, + { 0x11014d, 0xe00 }, + { 0x11104d, 0xe00 }, + { 0x11114d, 0xe00 }, + { 0x11204d, 0xe00 }, + { 0x11214d, 0xe00 }, + { 0x11304d, 0xe00 }, + { 0x11314d, 0xe00 }, + { 0x21004d, 0xe00 }, + { 0x21014d, 0xe00 }, + { 0x21104d, 0xe00 }, + { 0x21114d, 0xe00 }, + { 0x21204d, 0xe00 }, + { 0x21214d, 0xe00 }, + { 0x21304d, 0xe00 }, + { 0x21314d, 0xe00 }, + { 0x10049, 0xeba }, + { 0x10149, 0xeba }, + { 0x11049, 0xeba }, + { 0x11149, 0xeba }, + { 0x12049, 0xeba }, + { 0x12149, 0xeba }, + { 0x13049, 0xeba }, + { 0x13149, 0xeba }, + { 0x110049, 0xeba }, + { 0x110149, 0xeba }, + { 0x111049, 0xeba }, + { 0x111149, 0xeba }, + { 0x112049, 0xeba }, + { 0x112149, 0xeba }, + { 0x113049, 0xeba }, + { 0x113149, 0xeba }, + { 0x210049, 0xeba }, + { 0x210149, 0xeba }, + { 0x211049, 0xeba }, + { 0x211149, 0xeba }, + { 0x212049, 0xeba }, + { 0x212149, 0xeba }, + { 0x213049, 0xeba }, + { 0x213149, 0xeba }, + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x2ee }, + { 0x120008, 0x64 }, + { 0x220008, 0x19 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x104 }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + { 0x1200b2, 0x104 }, + { 0x110043, 0x5a1 }, + { 0x110143, 0x5a1 }, + { 0x111043, 0x5a1 }, + { 0x111143, 0x5a1 }, + { 0x112043, 0x5a1 }, + { 0x112143, 0x5a1 }, + { 0x113043, 0x5a1 }, + { 0x113143, 0x5a1 }, + { 0x2200b2, 0x104 }, + { 0x210043, 0x5a1 }, + { 0x210143, 0x5a1 }, + { 0x211043, 0x5a1 }, + { 0x211143, 0x5a1 }, + { 0x212043, 0x5a1 }, + { 0x212143, 0x5a1 }, + { 0x213043, 0x5a1 }, + { 0x213143, 0x5a1 }, + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + { 0x20019, 0x1 }, + { 0x120019, 0x1 }, + { 0x220019, 0x1 }, + { 0x200f0, 0x660 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5665 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x12002d, 0x0 }, + { 0x22002d, 0x0 }, + { 0x2007d, 0x212 }, + { 0x12007d, 0x212 }, + { 0x22007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x12007c, 0x61 }, + { 0x22007c, 0x61 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x1204a, 0x500 }, + { 0x1304a, 0x500 }, + { 0x2002c, 0x0 }, +}; + +/* P0 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xbb8 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, 0x31 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x2dd4 }, + { 0x54020, 0x31 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xd400 }, + { 0x54033, 0x312d }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xd400 }, + { 0x54039, 0x312d }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P1 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp1_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P2 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp2_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + + +/* P0 2D message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xbb8 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x110 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, 0x31 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x2dd4 }, + { 0x54020, 0x31 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xd400 }, + { 0x54033, 0x312d }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xd400 }, + { 0x54039, 0x312d }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x633 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x633 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x633 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x633 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x633 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x633 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xb }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x1 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a4, 0x0 }, + { 0x900a5, 0x790 }, + { 0x900a6, 0x11a }, + { 0x900a7, 0x8 }, + { 0x900a8, 0x7aa }, + { 0x900a9, 0x2a }, + { 0x900aa, 0x10 }, + { 0x900ab, 0x7b2 }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x0 }, + { 0x900ae, 0x7c8 }, + { 0x900af, 0x109 }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x10 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x1 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xd }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x8 }, + { 0x90159, 0xe8 }, + { 0x9015a, 0x109 }, + { 0x9015b, 0x0 }, + { 0x9015c, 0x8140 }, + { 0x9015d, 0x10c }, + { 0x9015e, 0x10 }, + { 0x9015f, 0x8138 }, + { 0x90160, 0x104 }, + { 0x90161, 0x8 }, + { 0x90162, 0x448 }, + { 0x90163, 0x109 }, + { 0x90164, 0xf }, + { 0x90165, 0x7c0 }, + { 0x90166, 0x109 }, + { 0x90167, 0x0 }, + { 0x90168, 0xe8 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x47 }, + { 0x9016b, 0x630 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x8 }, + { 0x9016e, 0x618 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0xe0 }, + { 0x90172, 0x109 }, + { 0x90173, 0x0 }, + { 0x90174, 0x7c8 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x8140 }, + { 0x90178, 0x10c }, + { 0x90179, 0x0 }, + { 0x9017a, 0x478 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x1 }, + { 0x9017e, 0x8 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x4 }, + { 0x90181, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x29 }, + { 0x90026, 0x68 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x34b }, + { 0x2000c, 0xbb }, + { 0x2000d, 0x753 }, + { 0x2000e, 0x2c }, + { 0x12000b, 0x70 }, + { 0x12000c, 0x19 }, + { 0x12000d, 0xfa }, + { 0x12000e, 0x10 }, + { 0x22000b, 0x1c }, + { 0x22000c, 0x6 }, + { 0x22000d, 0x3e }, + { 0x22000e, 0x10 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x140080, 0xe0 }, + { 0x140081, 0x12 }, + { 0x140082, 0xe0 }, + { 0x140083, 0x12 }, + { 0x140084, 0xe0 }, + { 0x140085, 0x12 }, + { 0x240080, 0xe0 }, + { 0x240081, 0x12 }, + { 0x240082, 0xe0 }, + { 0x240083, 0x12 }, + { 0x240084, 0xe0 }, + { 0x240085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 } +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3000mts 1D */ + .drate = 3000, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 3000mts 2D */ + .drate = 3000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* Samsung K4F6E3S4HB-MGCL ddr timing config params */ +struct dram_timing_info imx8mp_skov_dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3000, 400, 100, }, +}; + diff --git a/arch/arm/boards/solidrun-cubox/board.c b/arch/arm/boards/solidrun-cubox/board.c index f3cb5c92f5..3c12c28594 100644 --- a/arch/arm/boards/solidrun-cubox/board.c +++ b/arch/arm/boards/solidrun-cubox/board.c @@ -3,7 +3,7 @@ #include <common.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/mvebu/bbu.h> static int cubox_devices_init(void) { diff --git a/arch/arm/boards/solidrun-cubox/lowlevel.c b/arch/arm/boards/solidrun-cubox/lowlevel.c index 94ed9a4fd7..8f1515e3b2 100644 --- a/arch/arm/boards/solidrun-cubox/lowlevel.c +++ b/arch/arm/boards/solidrun-cubox/lowlevel.c @@ -5,12 +5,12 @@ #include <common.h> #include <linux/sizes.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> extern char __dtb_dove_cubox_bb_start[]; -ENTRY_FUNCTION(start_solidrun_cubox, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_solidrun_cubox, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/solidrun-microsom/board.c b/arch/arm/boards/solidrun-microsom/board.c index 85e1ab4250..c55dcdd74f 100644 --- a/arch/arm/boards/solidrun-microsom/board.c +++ b/arch/arm/boards/solidrun-microsom/board.c @@ -9,10 +9,10 @@ #include <envfs.h> #include <gpio.h> #include <init.h> -#include <mach/bbu.h> -#include <mach/generic.h> -#include <mach/imx6-regs.h> -#include <mach/imx6.h> +#include <mach/imx/bbu.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx6.h> #include <mfd/imx6q-iomuxc-gpr.h> #include <linux/clk.h> #include <linux/sizes.h> diff --git a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i1.imxcfg b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i1.imxcfg index 374ea2e8a2..b049cfc746 100644 --- a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i1.imxcfg +++ b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i1.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x10000000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> #include "800mhz-32b.imxcfg" #include "800mhz-2x128mx16.imxcfg" diff --git a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2.imxcfg b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2.imxcfg index 7c1b17f6f2..b6634446f3 100644 --- a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2.imxcfg +++ b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x10000000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> #include "800mhz-64b.imxcfg" #include "800mhz-4x128mx16.imxcfg" diff --git a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2eX.imxcfg b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2eX.imxcfg index f777784e44..e1447b9d5a 100644 --- a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2eX.imxcfg +++ b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2eX.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x10000000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> #include "1066mhz-64b.imxcfg" #include "1066mhz-4x128mx16.imxcfg" diff --git a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i4.imxcfg b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i4.imxcfg index 2a12b05340..ec9c3e385e 100644 --- a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i4.imxcfg +++ b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i4.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x10000000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> #include "1066mhz-64b.imxcfg" #include "1066mhz-4x256mx16.imxcfg" diff --git a/arch/arm/boards/solidrun-microsom/lowlevel.c b/arch/arm/boards/solidrun-microsom/lowlevel.c index b8f68fa22c..801678e777 100644 --- a/arch/arm/boards/solidrun-microsom/lowlevel.c +++ b/arch/arm/boards/solidrun-microsom/lowlevel.c @@ -2,8 +2,8 @@ #include <asm/barebox-arm.h> #include <common.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> extern char __dtb_imx6dl_hummingboard_start[]; extern char __dtb_imx6q_hummingboard_start[]; diff --git a/arch/arm/boards/stm32mp13xx-dk/Makefile b/arch/arm/boards/stm32mp13xx-dk/Makefile index 9961af02a3..a031ae91bd 100644 --- a/arch/arm/boards/stm32mp13xx-dk/Makefile +++ b/arch/arm/boards/stm32mp13xx-dk/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -lwl-y += lowlevel.o +obj-y += board.o diff --git a/arch/arm/boards/stm32mp13xx-dk/board.c b/arch/arm/boards/stm32mp13xx-dk/board.c new file mode 100644 index 0000000000..a13d934a27 --- /dev/null +++ b/arch/arm/boards/stm32mp13xx-dk/board.c @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <driver.h> +#include <init.h> +#include <mach/stm32mp/bbu.h> +#include <deep-probe.h> +#include <asm/mach-types.h> + +static int stm32mp13xx_dk_probe(struct device *dev) +{ + if (machine_is_pcaaxs1()) + return 1; + stm32mp_bbu_mmc_fip_register("sd", "/dev/mmc0", BBU_HANDLER_FLAG_DEFAULT); + return 0; +} + +static const struct of_device_id stm32mp13xx_dk_of_match[] = { + { .compatible = "st,stm32mp135f-dk" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(stm32mp13xx_dk_of_match); + +static struct driver stm32mp13xx_dk_board_driver = { + .name = "board-stm32mp13xx_dk", + .probe = stm32mp13xx_dk_probe, + .of_compatible = stm32mp13xx_dk_of_match, +} ; +device_platform_driver(stm32mp13xx_dk_board_driver); diff --git a/arch/arm/boards/stm32mp13xx-dk/lowlevel.c b/arch/arm/boards/stm32mp13xx-dk/lowlevel.c deleted file mode 100644 index ac4fa40e19..0000000000 --- a/arch/arm/boards/stm32mp13xx-dk/lowlevel.c +++ /dev/null @@ -1,19 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ - -#include <mach/entry.h> -#include <debug_ll.h> - -extern char __dtb_z_stm32mp135f_dk_start[]; - -ENTRY_FUNCTION(start_stm32mp13xx_dk, r0, r1, r2) -{ - void *fdt; - - stm32mp_cpu_lowlevel_init(); - - putc_ll('>'); - - fdt = __dtb_z_stm32mp135f_dk_start + get_runtime_offset(); - - stm32mp1_barebox_entry(fdt); -} diff --git a/arch/arm/boards/stm32mp15x-ev1/board.c b/arch/arm/boards/stm32mp15x-ev1/board.c index b8e26cd37b..fd58e2817b 100644 --- a/arch/arm/boards/stm32mp15x-ev1/board.c +++ b/arch/arm/boards/stm32mp15x-ev1/board.c @@ -2,10 +2,11 @@ #include <bootsource.h> #include <common.h> +#include <deep-probe.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/stm32mp/bbu.h> -static int ed1_probe(struct device_d *dev) +static int ed1_probe(struct device *dev) { int flags; @@ -30,8 +31,9 @@ static const struct of_device_id ed1_of_match[] = { { .compatible = "st,stm32mp157c-ed1" }, { /* sentinel */ }, }; +BAREBOX_DEEP_PROBE_ENABLE(ed1_of_match); -static struct driver_d ed1_board_driver = { +static struct driver ed1_board_driver = { .name = "board-stm32mp15x-ed1", .probe = ed1_probe, .of_compatible = ed1_of_match, diff --git a/arch/arm/boards/stm32mp15x-ev1/lowlevel.c b/arch/arm/boards/stm32mp15x-ev1/lowlevel.c index 06ff6291b8..13f16f8dcb 100644 --- a/arch/arm/boards/stm32mp15x-ev1/lowlevel.c +++ b/arch/arm/boards/stm32mp15x-ev1/lowlevel.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ #include <common.h> -#include <mach/entry.h> +#include <mach/stm32mp/entry.h> #include <debug_ll.h> extern char __dtb_z_stm32mp157c_ev1_start[]; diff --git a/arch/arm/boards/stm32mp15xx-dkx/board.c b/arch/arm/boards/stm32mp15xx-dkx/board.c index 1ddfee698d..1783c5ca17 100644 --- a/arch/arm/boards/stm32mp15xx-dkx/board.c +++ b/arch/arm/boards/stm32mp15xx-dkx/board.c @@ -1,9 +1,10 @@ // SPDX-License-Identifier: GPL-2.0+ #include <common.h> #include <init.h> -#include <mach/bbu.h> +#include <mach/stm32mp/bbu.h> +#include <deep-probe.h> -static int dkx_probe(struct device_d *dev) +static int dkx_probe(struct device *dev) { const void *model; @@ -23,8 +24,9 @@ static const struct of_device_id dkx_of_match[] = { { .compatible = "st,stm32mp157c-dk2", .data = "STM32MP157C-DK2" }, { /* sentinel */ }, }; +BAREBOX_DEEP_PROBE_ENABLE(dkx_of_match); -static struct driver_d dkx_board_driver = { +static struct driver dkx_board_driver = { .name = "board-stm32mp15xx-dkx", .probe = dkx_probe, .of_compatible = dkx_of_match, diff --git a/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c b/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c index 65f4bbb4da..402658d592 100644 --- a/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c +++ b/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ #include <common.h> -#include <mach/entry.h> +#include <mach/stm32mp/entry.h> #include <debug_ll.h> -#include <mach/revision.h> +#include <mach/stm32mp/revision.h> extern char __dtb_z_stm32mp157c_dk2_start[]; extern char __dtb_z_stm32mp157a_dk1_start[]; @@ -24,7 +24,7 @@ ENTRY_FUNCTION(start_stm32mp15xx_dkx, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - err = __stm32mp_get_cpu_type(&cputype); + err = __stm32mp15_get_cpu_type(&cputype); if (!err && cputype == CPU_STM32MP157Axx) fdt = __dtb_z_stm32mp157a_dk1_start; else diff --git a/arch/arm/boards/technexion-pico-hobbit/board.c b/arch/arm/boards/technexion-pico-hobbit/board.c index a190959d0a..202b76bc8e 100644 --- a/arch/arm/boards/technexion-pico-hobbit/board.c +++ b/arch/arm/boards/technexion-pico-hobbit/board.c @@ -9,10 +9,10 @@ #include <envfs.h> #include <gpio.h> #include <init.h> -#include <mach/generic.h> -#include <mach/imx6-regs.h> -#include <mach/imx6.h> -#include <mach/bbu.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx6.h> +#include <mach/imx/bbu.h> #include <linux/sizes.h> #include <linux/phy.h> #include <mfd/imx6q-iomuxc-gpr.h> diff --git a/arch/arm/boards/technexion-pico-hobbit/lowlevel.c b/arch/arm/boards/technexion-pico-hobbit/lowlevel.c index 43259675b0..7cc7c12d84 100644 --- a/arch/arm/boards/technexion-pico-hobbit/lowlevel.c +++ b/arch/arm/boards/technexion-pico-hobbit/lowlevel.c @@ -2,13 +2,14 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx6-regs.h> +#include <mach/imx/imx6-regs.h> #include <io.h> #include <debug_ll.h> -#include <mach/esdctl.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/esdctl.h> #include <asm/cache.h> #include <asm/sections.h> #include <image-metadata.h> diff --git a/arch/arm/boards/technexion-wandboard/board.c b/arch/arm/boards/technexion-wandboard/board.c index 8d63b9fff7..a594adb411 100644 --- a/arch/arm/boards/technexion-wandboard/board.c +++ b/arch/arm/boards/technexion-wandboard/board.c @@ -8,10 +8,10 @@ #include <envfs.h> #include <gpio.h> #include <init.h> -#include <mach/bbu.h> -#include <mach/generic.h> -#include <mach/imx6-regs.h> -#include <mach/imx6.h> +#include <mach/imx/bbu.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx6.h> #include <mfd/imx6q-iomuxc-gpr.h> #include <linux/sizes.h> #include <linux/phy.h> diff --git a/arch/arm/boards/technexion-wandboard/lowlevel.c b/arch/arm/boards/technexion-wandboard/lowlevel.c index 33babbbb2f..d29e2c9b24 100644 --- a/arch/arm/boards/technexion-wandboard/lowlevel.c +++ b/arch/arm/boards/technexion-wandboard/lowlevel.c @@ -1,16 +1,17 @@ // SPDX-License-Identifier: GPL-2.0-only #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx6-mmdc.h> -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6.h> -#include <mach/xload.h> -#include <mach/esdctl.h> +#include <mach/imx/imx6-mmdc.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6.h> +#include <mach/imx/xload.h> +#include <mach/imx/esdctl.h> #include <serial/imx-uart.h> static void __udelay(int us) diff --git a/arch/arm/boards/telit-evk-pro3/init.c b/arch/arm/boards/telit-evk-pro3/init.c index 4c853c647c..43f9cbdf3a 100644 --- a/arch/arm/boards/telit-evk-pro3/init.c +++ b/arch/arm/boards/telit-evk-pro3/init.c @@ -9,10 +9,10 @@ #include <linux/clk.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> -#include <mach/at91_rstc.h> -#include <mach/at91sam9_smc.h> -#include <mach/board.h> -#include <mach/iomux.h> +#include <mach/at91/at91_rstc.h> +#include <mach/at91/at91sam9_smc.h> +#include <mach/at91/board.h> +#include <mach/at91/iomux.h> #include <nand.h> #define BOOTSTRAP_SIZE 0xC0000 diff --git a/arch/arm/boards/telit-evk-pro3/lowlevel.c b/arch/arm/boards/telit-evk-pro3/lowlevel.c index 7f52f824df..550a0740c5 100644 --- a/arch/arm/boards/telit-evk-pro3/lowlevel.c +++ b/arch/arm/boards/telit-evk-pro3/lowlevel.c @@ -7,14 +7,12 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> -#include <mach/at91sam9_sdramc.h> -#include <mach/at91sam9260.h> -#include <mach/hardware.h> - -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_telit_evk_pro3, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c b/arch/arm/boards/terasic-de0-nano-soc/board.c index 4019dae6a4..b4502f552a 100644 --- a/arch/arm/boards/terasic-de0-nano-soc/board.c +++ b/arch/arm/boards/terasic-de0-nano-soc/board.c @@ -5,12 +5,13 @@ #include <driver.h> #include <init.h> #include <asm/armlinux.h> +#include <linux/mdio.h> #include <linux/micrel_phy.h> #include <linux/phy.h> #include <linux/sizes.h> #include <fcntl.h> #include <fs.h> -#include <mach/cyclone5-regs.h> +#include <mach/socfpga/cyclone5-regs.h> static int phy_fixup(struct phy_device *dev) { @@ -18,9 +19,9 @@ static int phy_fixup(struct phy_device *dev) * min rx data delay, max rx/tx clock delay, * min rx/tx control delay */ - phy_write_mmd_indirect(dev, 4, 2, 0); - phy_write_mmd_indirect(dev, 5, 2, 0); - phy_write_mmd_indirect(dev, 8, 2, 0x003ff); + phy_write_mmd(dev, MDIO_MMD_WIS, 4, 0); + phy_write_mmd(dev, MDIO_MMD_WIS, 5, 0); + phy_write_mmd(dev, MDIO_MMD_WIS, 8, 0x003ff); return 0; } diff --git a/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c b/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c index 1458e76ba8..27af250232 100644 --- a/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c +++ b/arch/arm/boards/terasic-de0-nano-soc/iocsr_config_cyclone5.c @@ -27,7 +27,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/cyclone5-scan-manager.h> +#include <mach/socfpga/cyclone5-scan-manager.h> static const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { 0x00000000, diff --git a/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c b/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c index 91bfd1a776..71121b6d4c 100644 --- a/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c +++ b/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c @@ -9,7 +9,7 @@ #include "sequencer_auto_ac_init.c" #include "iocsr_config_cyclone5.c" -#include <mach/lowlevel.h> +#include <mach/socfpga/lowlevel.h> SOCFPGA_C5_ENTRY(start_socfpga_de0_nano_soc, socfpga_cyclone5_de0_nano_soc, SZ_1G); SOCFPGA_C5_XLOAD_ENTRY(start_socfpga_de0_nano_soc_xload, SZ_1G); diff --git a/arch/arm/boards/terasic-de10-nano/board.c b/arch/arm/boards/terasic-de10-nano/board.c index f8df37eadf..e553e26da8 100644 --- a/arch/arm/boards/terasic-de10-nano/board.c +++ b/arch/arm/boards/terasic-de10-nano/board.c @@ -5,12 +5,13 @@ #include <driver.h> #include <init.h> #include <asm/armlinux.h> +#include <linux/mdio.h> #include <linux/micrel_phy.h> #include <linux/phy.h> #include <linux/sizes.h> #include <fcntl.h> #include <fs.h> -#include <mach/cyclone5-regs.h> +#include <mach/socfpga/cyclone5-regs.h> static int phy_fixup(struct phy_device *dev) { @@ -18,9 +19,9 @@ static int phy_fixup(struct phy_device *dev) * min rx data delay, max rx/tx clock delay, * min rx/tx control delay */ - phy_write_mmd_indirect(dev, 4, 2, 0); - phy_write_mmd_indirect(dev, 5, 2, 0); - phy_write_mmd_indirect(dev, 8, 2, 0x003ff); + phy_write_mmd(dev, MDIO_MMD_WIS, 4, 0); + phy_write_mmd(dev, MDIO_MMD_WIS, 5, 0); + phy_write_mmd(dev, MDIO_MMD_WIS, 8, 0x003ff); return 0; } diff --git a/arch/arm/boards/terasic-de10-nano/iocsr_config_cyclone5.c b/arch/arm/boards/terasic-de10-nano/iocsr_config_cyclone5.c index c1291dea40..2f30d836d6 100644 --- a/arch/arm/boards/terasic-de10-nano/iocsr_config_cyclone5.c +++ b/arch/arm/boards/terasic-de10-nano/iocsr_config_cyclone5.c @@ -27,7 +27,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/cyclone5-scan-manager.h> +#include <mach/socfpga/cyclone5-scan-manager.h> static const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { diff --git a/arch/arm/boards/terasic-de10-nano/lowlevel.c b/arch/arm/boards/terasic-de10-nano/lowlevel.c index f6a3e39634..74c8aec99d 100644 --- a/arch/arm/boards/terasic-de10-nano/lowlevel.c +++ b/arch/arm/boards/terasic-de10-nano/lowlevel.c @@ -9,7 +9,7 @@ #include "sequencer_auto_ac_init.c" #include "iocsr_config_cyclone5.c" -#include <mach/lowlevel.h> +#include <mach/socfpga/lowlevel.h> SOCFPGA_C5_ENTRY(start_socfpga_de10_nano, socfpga_cyclone5_de10_nano, SZ_1G); SOCFPGA_C5_XLOAD_ENTRY(start_socfpga_de10_nano_xload, SZ_1G); diff --git a/arch/arm/boards/terasic-sockit/iocsr_config_cyclone5.c b/arch/arm/boards/terasic-sockit/iocsr_config_cyclone5.c index 9367b0d110..8e5b02be2f 100644 --- a/arch/arm/boards/terasic-sockit/iocsr_config_cyclone5.c +++ b/arch/arm/boards/terasic-sockit/iocsr_config_cyclone5.c @@ -27,7 +27,7 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include <mach/cyclone5-scan-manager.h> +#include <mach/socfpga/cyclone5-scan-manager.h> static const unsigned long iocsr_scan_chain0_table[((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)] = { 0x00000000, diff --git a/arch/arm/boards/terasic-sockit/lowlevel.c b/arch/arm/boards/terasic-sockit/lowlevel.c index dbe99ac1df..9ce0fd4423 100644 --- a/arch/arm/boards/terasic-sockit/lowlevel.c +++ b/arch/arm/boards/terasic-sockit/lowlevel.c @@ -9,7 +9,7 @@ #include "sequencer_auto_ac_init.c" #include "iocsr_config_cyclone5.c" -#include <mach/lowlevel.h> +#include <mach/socfpga/lowlevel.h> static inline void ledon(int led) { diff --git a/arch/arm/boards/tny-a926x/init.c b/arch/arm/boards/tny-a926x/init.c index 2df8efd448..0a448aa822 100644 --- a/arch/arm/boards/tny-a926x/init.c +++ b/arch/arm/boards/tny-a926x/init.c @@ -6,25 +6,24 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> #include <linux/clk.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> -#include <mach/at91sam9_sdramc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> +#include <mach/at91/at91sam9_sdramc.h> #include <gpio.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> #include <spi/eeprom.h> static void tny_a9260_set_board_type(void) diff --git a/arch/arm/boards/tny-a926x/tny_a9260_lowlevel.c b/arch/arm/boards/tny-a926x/tny_a9260_lowlevel.c index 7f52f824df..91bf68e798 100644 --- a/arch/arm/boards/tny-a926x/tny_a9260_lowlevel.c +++ b/arch/arm/boards/tny-a926x/tny_a9260_lowlevel.c @@ -7,14 +7,23 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> -#include <mach/at91sam9_sdramc.h> -#include <mach/at91sam9260.h> -#include <mach/hardware.h> +AT91_ENTRY_FUNCTION(start_tny_a9260, r0, r1, r2) +{ + arm_cpu_lowlevel_init(); + + arm_setup_stack(AT91SAM9260_SRAM_BASE + AT91SAM9260_SRAM_SIZE); + + barebox_arm_entry(AT91_CHIPSELECT_1, + at91_get_sdram_size(IOMEM(AT91SAM9260_BASE_SDRAMC)), + NULL); +} -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_tny_a9g20, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/tny-a926x/tny_a9263_bootstrap.c b/arch/arm/boards/tny-a926x/tny_a9263_bootstrap.c index f26f1eaecb..5739b0f2da 100644 --- a/arch/arm/boards/tny-a926x/tny_a9263_bootstrap.c +++ b/arch/arm/boards/tny-a926x/tny_a9263_bootstrap.c @@ -6,7 +6,7 @@ #include <common.h> #include <bootstrap.h> -#include <mach/bootstrap.h> +#include <mach/at91/bootstrap.h> #ifdef CONFIG_MTD_DATAFLASH void * bootstrap_board_read_dataflash(void) diff --git a/arch/arm/boards/tny-a926x/tny_a9263_lowlevel.c b/arch/arm/boards/tny-a926x/tny_a9263_lowlevel.c index 565ba438d2..d20ffe9c71 100644 --- a/arch/arm/boards/tny-a926x/tny_a9263_lowlevel.c +++ b/arch/arm/boards/tny-a926x/tny_a9263_lowlevel.c @@ -7,11 +7,9 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> - -#include <mach/at91sam926x_board_init.h> -#include <mach/at91sam9263_matrix.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam926x_board_init.h> +#include <mach/at91/at91sam9263_matrix.h> #define MASTER_CLOCK 180 @@ -118,7 +116,7 @@ static void __bare_init tny_a9263_init(void) NULL); } -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_tny_a9263, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/toradex-colibri-t20/entry.c b/arch/arm/boards/toradex-colibri-t20/entry.c index 955052f03f..af55689402 100644 --- a/arch/arm/boards/toradex-colibri-t20/entry.c +++ b/arch/arm/boards/toradex-colibri-t20/entry.c @@ -2,7 +2,7 @@ // SPDX-FileCopyrightText: 2013 Lucas Stach <l.stach@pengutronix.de> #include <common.h> -#include <mach/lowlevel.h> +#include <mach/tegra/lowlevel.h> extern char __dtb_tegra20_colibri_iris_start[]; diff --git a/arch/arm/boards/toshiba-ac100/board.c b/arch/arm/boards/toshiba-ac100/board.c index 01aaf47034..7fb70ca6c9 100644 --- a/arch/arm/boards/toshiba-ac100/board.c +++ b/arch/arm/boards/toshiba-ac100/board.c @@ -5,8 +5,8 @@ #include <common.h> #include <init.h> -#include <usb/ehci.h> -#include <mach/iomap.h> +#include <linux/usb/ehci.h> +#include <mach/tegra/iomap.h> static struct ehci_platform_data ehci_pdata = { .flags = EHCI_HAS_TT, diff --git a/arch/arm/boards/toshiba-ac100/entry.c b/arch/arm/boards/toshiba-ac100/entry.c index 918ca4b9d8..1cb5b1c0d0 100644 --- a/arch/arm/boards/toshiba-ac100/entry.c +++ b/arch/arm/boards/toshiba-ac100/entry.c @@ -2,7 +2,7 @@ // SPDX-FileCopyrightText: 2013 Lucas Stach <l.stach@pengutronix.de> #include <common.h> -#include <mach/lowlevel.h> +#include <mach/tegra/lowlevel.h> extern char __dtb_tegra20_paz00_start[]; diff --git a/arch/arm/boards/tqma53/board.c b/arch/arm/boards/tqma53/board.c index 14e514ee78..7d81594df8 100644 --- a/arch/arm/boards/tqma53/board.c +++ b/arch/arm/boards/tqma53/board.c @@ -7,8 +7,8 @@ #include <init.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <mach/bbu.h> +#include <asm/mach-types.h> +#include <mach/imx/bbu.h> static int tqma53_devices_init(void) { diff --git a/arch/arm/boards/tqma53/lowlevel.c b/arch/arm/boards/tqma53/lowlevel.c index 37a0984161..898b251d66 100644 --- a/arch/arm/boards/tqma53/lowlevel.c +++ b/arch/arm/boards/tqma53/lowlevel.c @@ -3,12 +3,12 @@ #include <common.h> #include <debug_ll.h> #include <io.h> -#include <mach/esdctl.h> +#include <mach/imx/esdctl.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx5.h> -#include <mach/imx53-regs.h> -#include <mach/generic.h> +#include <mach/imx/imx5.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/generic.h> #include <image-metadata.h> extern char __dtb_imx53_mba53_start[]; diff --git a/arch/arm/boards/tqma6ulx/board.c b/arch/arm/boards/tqma6ulx/board.c index 06b5e1322c..c559568880 100644 --- a/arch/arm/boards/tqma6ulx/board.c +++ b/arch/arm/boards/tqma6ulx/board.c @@ -2,25 +2,89 @@ /* * Copyright (C) 2021 Rouven Czerwinski, Pengutronix */ +#define pr_fmt(fmt) "tqma6ul: " fmt #include <common.h> #include <bootsource.h> #include <init.h> -#include <mach/generic.h> -#include <mach/bbu.h> +#include <mach/imx/generic.h> +#include <mach/imx/bbu.h> #include <of.h> #include <string.h> +#include <linux/clk.h> +#include <asm/optee.h> +#include <asm-generic/memory_layout.h> -static int mba6ulx_probe(struct device_d *dev) +#include "tqma6ulx.h" + +static const struct of_device_id mba6ulx_of_match[] = { + { .compatible = "tq,imx6ul-tqma6ul2l" }, + { .compatible = "tq,imx6ul-tqma6ul2" }, + { .compatible = "tq,imx6ull-tqma6ull2" }, + { .compatible = "tq,imx6ull-tqma6ull2l" }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, mba6ulx_of_match); + +#ifdef CONFIG_FIRMWARE_TQMA6UL_OPTEE + +static int mba6ulx_optee_fixup(void) +{ + struct device_node *overlay; + struct fdt_header *fdt; + struct device_node *root = of_get_root_node(); + int ret; + + if (!of_match_node(mba6ulx_of_match, root)) + return 0; + + fdt = (void*)OPTEE_OVERLAY_LOCATION; + overlay = of_unflatten_dtb(fdt, INT_MAX); + + if (IS_ERR(overlay)) + return PTR_ERR(overlay); + + /* register the overlay for fixing up the kernel device tree */ + ret = of_register_overlay(overlay); + if (ret) { + printf("cannot apply oftree overlay: %s\n", strerror(-ret)); + goto err; + } + + /* + * Apply the overlay to the live tree to enable OP-TEE support + * for barebox and to reserve the SDRAM regions occupied by + * OP-TEE + */ + of_overlay_apply_tree(root, overlay); + + return 0; +err: + of_delete_node(overlay); + + return ret; +} +postcore_initcall(mba6ulx_optee_fixup); + +#endif + +static int mba6ulx_probe(struct device *dev) { int flags; + struct clk *clk; - /* the bootloader is stored in one of the two boot partitions */ - flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0; - imx6_bbu_internal_mmc_register_handler("SD", "/dev/mmc0.barebox", flags); + clk = clk_lookup("enet_ref_125m"); + if (IS_ERR(clk)) + pr_err("Cannot find enet_ref_125m: %pe\n", clk); + else + clk_enable(clk); + /* the bootloader is stored in one of the two boot partitions */ flags = bootsource_get_instance() == 1 ? BBU_HANDLER_FLAG_DEFAULT : 0; - imx6_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc1", flags); + imx6_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", flags); + + flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0; + imx6_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc0", flags); if (bootsource_get_instance() == 0) of_device_enable_path("/chosen/environment-sd"); @@ -30,14 +94,11 @@ static int mba6ulx_probe(struct device_d *dev) return 0; } -static const struct of_device_id mba6ulx_of_match[] = { - { .compatible = "tq,mba6ulx" }, - { /* sentinel */ }, -}; - -static struct driver_d mba6ulx_board_driver = { +static struct driver mba6ulx_board_driver = { .name = "board-mba6ulx", .probe = mba6ulx_probe, .of_compatible = mba6ulx_of_match, }; device_platform_driver(mba6ulx_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(mba6ulx_of_match); diff --git a/arch/arm/boards/tqma6ulx/flash-header-imx6ul-tqma6ulx.imxcfg b/arch/arm/boards/tqma6ulx/flash-header-imx6ul-tqma6ulx.imxcfg index 4f71136149..ac4b853ced 100644 --- a/arch/arm/boards/tqma6ulx/flash-header-imx6ul-tqma6ulx.imxcfg +++ b/arch/arm/boards/tqma6ulx/flash-header-imx6ul-tqma6ulx.imxcfg @@ -99,4 +99,7 @@ wm 32 0x021B0004 0x0002552D /* MMDC0_MDPDC now SDCTL power down enabled */ wm 32 0x021B0404 0x00011006 /* MMDC0_MAPSR ADOPT power down enabled */ wm 32 0x021B001C 0x00000000 /* MMDC0_MDSCR, clear this register (especially the configuration bit as initialization is complete) */ -#include <mach/habv4-imx6-gencsf.h> +/* Disable TZASC bypass */ +wm 32 0x020E4024 0x00000001 + +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/tqma6ulx/lowlevel.c b/arch/arm/boards/tqma6ulx/lowlevel.c index db77d1f532..5fd997d2ec 100644 --- a/arch/arm/boards/tqma6ulx/lowlevel.c +++ b/arch/arm/boards/tqma6ulx/lowlevel.c @@ -2,17 +2,27 @@ /* * Copyright (C) 2019 Rouven Czerwinski, Pengutronix */ +#define pr_fmt(fmt) "tqma6ul: " fmt #include <common.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <firmware.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm.h> -#include <mach/esdctl.h> -#include <mach/iomux-mx6ul.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/iomux-mx6ul.h> #include <asm/cache.h> +#include <pbl/i2c.h> +#include <boards/tq/tq_eeprom.h> +#include <tee/optee.h> -extern char __dtb_z_imx6ul_mba6ulx_start[]; +#include "tqma6ulx.h" + +extern char __dtb_z_imx6ul_tqma6ul2_mba6ulx_start[]; +extern char __dtb_z_imx6ul_tqma6ul2l_mba6ulx_start[]; +extern char __dtb_z_imx6ull_tqma6ull2_mba6ulx_start[]; +extern char __dtb_z_imx6ull_tqma6ull2l_mba6ulx_start[]; static void setup_uart(void) { @@ -28,11 +38,62 @@ static void setup_uart(void) } -static void noinline start_mba6ulx(void) +static void *read_eeprom(void) +{ + struct pbl_i2c *i2c; + struct tq_eeprom *eeprom; + void __iomem *iomux = (void *)MX6_IOMUXC_BASE_ADDR; + void *fdt = __dtb_z_imx6ul_tqma6ul2l_mba6ulx_start; + + imx_setup_pad(iomux, MX6_PAD_UART2_TX_DATA__I2C4_SCL | MUX_PAD_CTRL(0x1b8b0)); + imx_setup_pad(iomux, MX6_PAD_UART2_RX_DATA__I2C4_SDA | MUX_PAD_CTRL(0x1b8b0)); + + i2c = imx6_i2c_early_init(IOMEM(MX6_I2C4_BASE_ADDR)); + + eeprom = pbl_tq_read_eeprom(i2c, 0x50, I2C_ADDR_16_BIT); + if (!eeprom) { + pr_err("Cannot read EEPROM\n"); + goto out; + } + + pr_info("Board: %s\n", eeprom->id); + + if (!strcmp(eeprom->id, "TQMa6UL2L-AB.0202")) + fdt = __dtb_z_imx6ul_tqma6ul2l_mba6ulx_start; + else + pr_err("Unknown board type\n"); +out: + return fdt; +} + +static void noinline start_mba6ulx(u32 r0) { + void *fdt; + int tee_size; + void *tee; + setup_uart(); - imx6ul_barebox_entry(__dtb_z_imx6ul_mba6ulx_start); + fdt = read_eeprom(); + + /* Enable normal/secure r/w for TZC380 region0 */ + writel(0xf0000000, 0x021D0108); + + /* + * Chainloading barebox will pass a device tree within the RAM in r0, + * skip OP-TEE early loading in this case + */ + if (IS_ENABLED(CONFIG_FIRMWARE_TQMA6UL_OPTEE) && + !(r0 > MX6_MMDC_P0_BASE_ADDR && + r0 < MX6_MMDC_P0_BASE_ADDR + SZ_256M)) { + get_builtin_firmware(mba6ul_optee_bin, &tee, &tee_size); + + memset((void *)OPTEE_OVERLAY_LOCATION, 0, 0x1000); + + start_optee_early(NULL, tee); + } + + imx6ul_barebox_entry(fdt); } ENTRY_FUNCTION(start_imx6ul_mba6ulx, r0, r1, r2) @@ -51,5 +112,5 @@ ENTRY_FUNCTION(start_imx6ul_mba6ulx, r0, r1, r2) setup_c(); barrier(); - start_mba6ulx(); + start_mba6ulx(r0); } diff --git a/arch/arm/boards/tqma6ulx/tqma6ulx.h b/arch/arm/boards/tqma6ulx/tqma6ulx.h new file mode 100644 index 0000000000..843ad00d31 --- /dev/null +++ b/arch/arm/boards/tqma6ulx/tqma6ulx.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * tqma6ulx.h - common defines between OP-TEE and barebox + * + * Copyright (c) 2019 Rouven Czerwinski <r.czerwinski@pengutronix.de>, Pengutronix + * + */ +#ifndef __TQMA6ULX_H_ +#define __TQMA6ULX_H_ + +/* MX6UL_MMDC_PORT0_BASE_ADDR + SZ_64M */ +#define OPTEE_OVERLAY_LOCATION 0x84000000 + +#endif // __TQMA6ULX_H_ diff --git a/arch/arm/boards/tqma6x/board.c b/arch/arm/boards/tqma6x/board.c index 10faadf5a1..a2363913e2 100644 --- a/arch/arm/boards/tqma6x/board.c +++ b/arch/arm/boards/tqma6x/board.c @@ -1,10 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-or-later // SPDX-FileCopyrightText: 2013 Sascha Hauer, Pengutronix -#include <generated/mach-types.h> +#include <asm/mach-types.h> #include <environment.h> #include <bootsource.h> -#include <partition.h> #include <common.h> #include <envfs.h> #include <linux/sizes.h> @@ -12,18 +11,19 @@ #include <gpio.h> #include <of.h> +#include <linux/mdio.h> +#include <linux/phy.h> #include <linux/micrel_phy.h> #include <mfd/stmpe-i2c.h> #include <asm/armlinux.h> #include <asm/io.h> -#include <mach/devices-imx6.h> -#include <mach/imx6-regs.h> -#include <mach/iomux-mx6.h> -#include <mach/generic.h> -#include <mach/imx6.h> -#include <mach/bbu.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/iomux-mx6.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6.h> +#include <mach/imx/bbu.h> #define RQ7_GPIO_ENET_PHYADD2 IMX_GPIO_NR(6, 30) #define RQ7_GPIO_ENET_MODE0 IMX_GPIO_NR(6, 25) @@ -47,14 +47,14 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev) * min rx data delay, max rx/tx clock delay, * min rx/tx control delay */ - phy_write_mmd_indirect(dev, 4, 2, 0); - phy_write_mmd_indirect(dev, 5, 2, 0); - phy_write_mmd_indirect(dev, 8, 2, 0x003ff); + phy_write_mmd(dev, MDIO_MMD_WIS, 4, 0); + phy_write_mmd(dev, MDIO_MMD_WIS, 5, 0); + phy_write_mmd(dev, MDIO_MMD_WIS, 8, 0x003ff); return 0; } -static int tqma6x_enet_init(void) +static int tq_mba6x_enet_init(void) { if (!of_machine_is_compatible("tq,mba6x")) return 0; @@ -78,20 +78,25 @@ static int tqma6x_enet_init(void) return 0; } -fs_initcall(tqma6x_enet_init); +fs_initcall(tq_mba6x_enet_init); -static int tqma6x_env_init(void) +static int tqma6x_init(void) { - if (!of_machine_is_compatible("tq,mba6x")) - return 0; - - devfs_add_partition("m25p0", 0, SZ_512K, DEVFS_PARTITION_FIXED, "m25p0.barebox"); - imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0.barebox", BBU_HANDLER_FLAG_DEFAULT); imx6_bbu_internal_mmcboot_register_handler("emmc", "mmc2", 0); - device_detect_by_name("mmc2"); + device_detect_by_name("mmc2"); // eMMC + + return 0; +} + +static int tq_mba6x_env_init(void) +{ + if (!of_machine_is_compatible("tq,mba6x")) + return 0; + + tqma6x_init(); default_environment_path_set("/dev/mmc2.boot1"); @@ -99,4 +104,4 @@ static int tqma6x_env_init(void) return 0; } -late_initcall(tqma6x_env_init); +late_initcall(tq_mba6x_env_init); diff --git a/arch/arm/boards/tqma6x/flash-header-tqma6dl.imxcfg b/arch/arm/boards/tqma6x/flash-header-tqma6dl.imxcfg index 9f8d9c0d26..e93d53ed79 100644 --- a/arch/arm/boards/tqma6x/flash-header-tqma6dl.imxcfg +++ b/arch/arm/boards/tqma6x/flash-header-tqma6dl.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6dl-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6dl-ddr-regs.h> wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 wm 32 MX6_IOM_DRAM_SDQS1 0x00000030 diff --git a/arch/arm/boards/tqma6x/flash-header-tqma6q.imxcfg b/arch/arm/boards/tqma6x/flash-header-tqma6q.imxcfg index b0923e77f9..ec682e0109 100644 --- a/arch/arm/boards/tqma6x/flash-header-tqma6q.imxcfg +++ b/arch/arm/boards/tqma6x/flash-header-tqma6q.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 wm 32 MX6_IOM_DRAM_SDQS1 0x00000030 diff --git a/arch/arm/boards/tqma6x/lowlevel.c b/arch/arm/boards/tqma6x/lowlevel.c index 845390642b..6e9c9bed0b 100644 --- a/arch/arm/boards/tqma6x/lowlevel.c +++ b/arch/arm/boards/tqma6x/lowlevel.c @@ -2,6 +2,7 @@ // SPDX-FileCopyrightText: 2013 Sascha Hauer <s.hauer@pengutronix.de> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <linux/sizes.h> #include <io.h> @@ -10,19 +11,17 @@ #include <asm/sections.h> #include <asm/cache.h> #include <asm/mmu.h> -#include <mach/imx6.h> +#include <mach/imx/imx6.h> extern char __dtb_imx6q_mba6x_start[]; extern char __dtb_imx6dl_mba6x_start[]; -ENTRY_FUNCTION(start_imx6q_mba6x, r0, r1, r2) +ENTRY_FUNCTION_WITHSTACK(start_imx6q_mba6x, 0x00920000, r0, r1, r2) { void *fdt; imx6_cpu_lowlevel_init(); - arm_setup_stack(0x00920000); - if (IS_ENABLED(CONFIG_DEBUG_LL)) { writel(0x2, 0x020e0338); imx6_uart_setup_ll(); @@ -36,14 +35,12 @@ ENTRY_FUNCTION(start_imx6q_mba6x, r0, r1, r2) barebox_arm_entry(0x10000000, SZ_1G, fdt); } -ENTRY_FUNCTION(start_imx6dl_mba6x, r0, r1, r2) +ENTRY_FUNCTION_WITHSTACK(start_imx6dl_mba6x, 0x00920000, r0, r1, r2) { void *fdt; imx6_cpu_lowlevel_init(); - arm_setup_stack(0x00920000); - if (IS_ENABLED(CONFIG_DEBUG_LL)) { writel(0x2, 0x020e035c); imx6_uart_setup_ll(); diff --git a/arch/arm/boards/tqma8mpxl/Makefile b/arch/arm/boards/tqma8mpxl/Makefile new file mode 100644 index 0000000000..35d8640087 --- /dev/null +++ b/arch/arm/boards/tqma8mpxl/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +obj-y += board.o +lwl-y += lowlevel.o lpddr4-timing.o diff --git a/arch/arm/boards/tqma8mpxl/board.c b/arch/arm/boards/tqma8mpxl/board.c new file mode 100644 index 0000000000..39d1bd24d4 --- /dev/null +++ b/arch/arm/boards/tqma8mpxl/board.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Holger Assmann <h.assmann@pengutronix.de> + */ + +#include <asm/memory.h> +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <init.h> +#include <linux/phy.h> +#include <linux/sizes.h> +#include <mach/imx/bbu.h> +#include <mach/imx/iomux-mx8mp.h> +#include <gpio.h> +#include <envfs.h> + +static int tqma8mpxl_probe(struct device *dev) +{ + int emmc_bbu_flag = 0; + int sd_bbu_flag = 0; + + if (bootsource_get() == BOOTSOURCE_MMC && bootsource_get_instance() == 1) { + of_device_enable_path("/chosen/environment-sd"); + sd_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } else { + of_device_enable_path("/chosen/environment-emmc"); + emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } + + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); + imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + + return 0; +} + +static const struct of_device_id tqma8mpxl_of_match[] = { + { .compatible = "tq,imx8mp-tqma8mpdl-mba8mpxl"}, + { .compatible = "tq,imx8mp-tqma8mpql-mba8mpxl"}, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(tqma8mpxl_of_match); + +static struct driver tqma8mpxl_board_driver = { + .name = "board-tqma8mpxl", + .probe = tqma8mpxl_probe, + .of_compatible = DRV_OF_COMPAT(tqma8mpxl_of_match), +}; +device_platform_driver(tqma8mpxl_board_driver); diff --git a/arch/arm/boards/tqma8mpxl/flash-header-tqma8mpxl.imxcfg b/arch/arm/boards/tqma8mpxl/flash-header-tqma8mpxl.imxcfg new file mode 100644 index 0000000000..6ea2e6c68e --- /dev/null +++ b/arch/arm/boards/tqma8mpxl/flash-header-tqma8mpxl.imxcfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-only + +soc imx8mp + +loadaddr 0x920000 +max_load_size 0x3f000 +ivtofs 0x0 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/tqma8mpxl/lowlevel.c b/arch/arm/boards/tqma8mpxl/lowlevel.c new file mode 100644 index 0000000000..e0a0f17d3a --- /dev/null +++ b/arch/arm/boards/tqma8mpxl/lowlevel.c @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <io.h> +#include <common.h> +#include <firmware.h> +#include <asm/mmu.h> +#include <asm/cache.h> +#include <asm/sections.h> +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> +#include <linux/sizes.h> +#include <mach/imx/atf.h> +#include <mach/imx/xload.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8mp-regs.h> +#include <mach/imx/iomux-mx8mp.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/debug_ll.h> +#include <mfd/pca9450.h> +#include <pbl/i2c.h> +#include <pbl/pmic.h> +#include <soc/imx8m/ddr.h> + +#define UART_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_FSEL) + +#define I2C_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_HYS | \ + MX8MP_PAD_CTL_PUE | \ + MX8MP_PAD_CTL_PE) + +static void setup_uart(void) +{ + void __iomem *uart = IOMEM(MX8M_UART4_BASE_ADDR); + + imx8m_early_setup_uart_clock(); + + imx8mp_setup_pad(MX8MP_PAD_UART4_TXD__UART4_DCE_TX | UART_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_UART4_RXD__UART4_DCE_RX | UART_PAD_CTRL); + imx8m_uart_setup(uart); + + pbl_set_putc(imx_uart_putc, uart); + + putc_ll('>'); +} + +static struct pmic_config pca9450_cfg[] = { + /* BUCKxOUT_DVS0/1 control BUCK123 output */ + { PCA9450_BUCK123_DVS, 0x29 }, + /* + * increase VDD_SOC to typical value 0.95V before first + * DRAM access, set DVS1 to 0.85v for suspend. + * Enable DVS control through PMIC_STBY_REQ and + * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) + */ + { PCA9450_BUCK1OUT_DVS0, 0x1C }, + { PCA9450_BUCK1OUT_DVS1, 0x14 }, + { PCA9450_BUCK1CTRL, 0x59 }, + /* + * Kernel uses OD/OD freq for SOC + * To avoid timing risk from SOC to ARM,increase VDD_ARM to OD + * voltage 0.95v + */ + { PCA9450_BUCK2OUT_DVS0, 0x1C }, + /* set WDOG_B_CFG to cold reset */ + { PCA9450_RESET_CTRL, 0xA1 }, +}; + +static void power_init_board(void) +{ + struct pbl_i2c *i2c; + + imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL); + + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); + + i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR)); + + pmic_configure(i2c, 0x25, pca9450_cfg, ARRAY_SIZE(pca9450_cfg)); +} + +static __noreturn noinline void tqma8mpxl_start(void) +{ + extern char __dtb_z_imx8mp_tqma8mpql_mba8mpxl_start[]; + + setup_uart(); + + if (current_el() == 3) { + extern struct dram_timing_info dram_timing_2gb_no_ecc; + + imx8mp_early_clock_init(); + + power_init_board(); + + imx8mp_ddr_init(&dram_timing_2gb_no_ecc, DRAM_TYPE_LPDDR4); + + imx8mp_load_and_start_image_via_tfa(); + } + + imx8mp_barebox_entry(__dtb_z_imx8mp_tqma8mpql_mba8mpxl_start); +} + +ENTRY_FUNCTION(start_tqma8mpxl, x0, x1, x2) +{ + imx8mp_cpu_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + tqma8mpxl_start(); +} diff --git a/arch/arm/boards/tqma8mpxl/lpddr4-timing.c b/arch/arm/boards/tqma8mpxl/lpddr4-timing.c new file mode 100644 index 0000000000..85e21bf69d --- /dev/null +++ b/arch/arm/boards/tqma8mpxl/lpddr4-timing.c @@ -0,0 +1,1131 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2019 NXP + * + * Generated code from MX8M_DDR_tool + * + * Align with uboot version: + * imx_v2019.04_5.4.x and above version + * For imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.1.0_ga: + * please replace #include <asm/arch/ddr.h> with #include <asm/arch/imx8m_ddr.h> + * + * TQMa8MPxL.2GByte.RAM-Timing.0004.xlsx / 2.0 GHz + */ + +#include <common.h> +#include <soc/imx8m/ddr.h> +#include <soc/imx8m/lpddr4_define.h> + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0xa1080020 }, + { 0x3d400020, 0x1303 }, + { 0x3d400024, 0x1e84800 }, + { 0x3d400064, 0x7a0118 }, + { 0x3d400070, 0x7027f90 }, + { 0x3d400074, 0x790 }, + { 0x3d4000d0, 0xc00307a3 }, + { 0x3d4000d4, 0xc50000 }, + { 0x3d4000dc, 0xf4003f }, + { 0x3d4000e0, 0x2b0000 }, + { 0x3d4000e8, 0x550048 }, + { 0x3d4000ec, 0x150048 }, + { 0x3d400100, 0x201e222a }, + { 0x3d400104, 0x8083f }, + { 0x3d40010c, 0xe0e000 }, + { 0x3d400110, 0x12040a12 }, + { 0x3d400114, 0x2050f0f }, + { 0x3d400118, 0x1010009 }, + { 0x3d40011c, 0x501 }, + { 0x3d400130, 0x20800 }, + { 0x3d400134, 0xe100002 }, + { 0x3d400138, 0x120 }, + { 0x3d400144, 0xc80064 }, + { 0x3d400180, 0x3e8001e }, + { 0x3d400184, 0x3207a12 }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x49f820e }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x1f0e }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0xdf00e4 }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x11 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x1 }, + { 0x3d4000f4, 0xc99 }, + { 0x3d400108, 0x9121c1c }, + { 0x3d400200, 0x1f }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, + { 0x3d400250, 0x1705 }, + { 0x3d400254, 0x2c }, + { 0x3d40025c, 0x4000030 }, + { 0x3d400264, 0x900093e7 }, + { 0x3d40026c, 0x2005574 }, + { 0x3d400400, 0x111 }, + { 0x3d400404, 0x72ff }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x2100e07 }, + { 0x3d400498, 0x620096 }, + { 0x3d40049c, 0x1100e07 }, + { 0x3d4004a0, 0xc8012c }, + { 0x3d402020, 0x1001 }, + { 0x3d402024, 0x30d400 }, + { 0x3d402050, 0x20d000 }, + { 0x3d402064, 0xc001c }, + { 0x3d4020dc, 0x840000 }, + { 0x3d4020e0, 0x2b0000 }, + { 0x3d4020e8, 0x550048 }, + { 0x3d4020ec, 0x150048 }, + { 0x3d402100, 0xa030305 }, + { 0x3d402104, 0x30407 }, + { 0x3d402108, 0x203060b }, + { 0x3d40210c, 0x505000 }, + { 0x3d402110, 0x2040202 }, + { 0x3d402114, 0x2030202 }, + { 0x3d402118, 0x1010004 }, + { 0x3d40211c, 0x301 }, + { 0x3d402130, 0x20300 }, + { 0x3d402134, 0xa100002 }, + { 0x3d402138, 0x1d }, + { 0x3d402144, 0x14000a }, + { 0x3d402180, 0x640004 }, + { 0x3d402190, 0x3818200 }, + { 0x3d402194, 0x80303 }, + { 0x3d4021b4, 0x100 }, + { 0x3d4020f4, 0xc99 }, + { 0x3d403020, 0x1001 }, + { 0x3d403024, 0xc3500 }, + { 0x3d403050, 0x20d000 }, + { 0x3d403064, 0x30007 }, + { 0x3d4030dc, 0x840000 }, + { 0x3d4030e0, 0x2b0000 }, + { 0x3d4030e8, 0x550048 }, + { 0x3d4030ec, 0x150048 }, + { 0x3d403100, 0xa010102 }, + { 0x3d403104, 0x30404 }, + { 0x3d403108, 0x203060b }, + { 0x3d40310c, 0x505000 }, + { 0x3d403110, 0x2040202 }, + { 0x3d403114, 0x2030202 }, + { 0x3d403118, 0x1010004 }, + { 0x3d40311c, 0x301 }, + { 0x3d403130, 0x20300 }, + { 0x3d403134, 0xa100002 }, + { 0x3d403138, 0x8 }, + { 0x3d403144, 0x50003 }, + { 0x3d403180, 0x190004 }, + { 0x3d403190, 0x3818200 }, + { 0x3d403194, 0x80303 }, + { 0x3d4031b4, 0x100 }, + { 0x3d4030f4, 0xc99 }, + { 0x3d400028, 0x0 }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x0 }, + { 0x100a1, 0x1 }, + { 0x100a2, 0x2 }, + { 0x100a3, 0x3 }, + { 0x100a4, 0x4 }, + { 0x100a5, 0x6 }, + { 0x100a6, 0x7 }, + { 0x100a7, 0x5 }, + { 0x110a0, 0x6 }, + { 0x110a1, 0x0 }, + { 0x110a2, 0x2 }, + { 0x110a3, 0x3 }, + { 0x110a4, 0x4 }, + { 0x110a5, 0x5 }, + { 0x110a6, 0x1 }, + { 0x110a7, 0x7 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x6 }, + { 0x120a2, 0x4 }, + { 0x120a3, 0x3 }, + { 0x120a4, 0x5 }, + { 0x120a5, 0x2 }, + { 0x120a6, 0x1 }, + { 0x120a7, 0x7 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x1 }, + { 0x130a2, 0x5 }, + { 0x130a3, 0x4 }, + { 0x130a4, 0x3 }, + { 0x130a5, 0x2 }, + { 0x130a6, 0x6 }, + { 0x130a7, 0x7 }, + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + { 0x11005f, 0x1ff }, + { 0x11015f, 0x1ff }, + { 0x11105f, 0x1ff }, + { 0x11115f, 0x1ff }, + { 0x11205f, 0x1ff }, + { 0x11215f, 0x1ff }, + { 0x11305f, 0x1ff }, + { 0x11315f, 0x1ff }, + { 0x21005f, 0x1ff }, + { 0x21015f, 0x1ff }, + { 0x21105f, 0x1ff }, + { 0x21115f, 0x1ff }, + { 0x21205f, 0x1ff }, + { 0x21215f, 0x1ff }, + { 0x21305f, 0x1ff }, + { 0x21315f, 0x1ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + { 0x200c5, 0x18 }, + { 0x1200c5, 0x7 }, + { 0x2200c5, 0x7 }, + { 0x2002e, 0x2 }, + { 0x12002e, 0x2 }, + { 0x22002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x20024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x120024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x220024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x20056, 0x3 }, + { 0x120056, 0x3 }, + { 0x220056, 0x3 }, + { 0x1004d, 0x600 }, + { 0x1014d, 0x600 }, + { 0x1104d, 0x600 }, + { 0x1114d, 0x600 }, + { 0x1204d, 0x600 }, + { 0x1214d, 0x600 }, + { 0x1304d, 0x600 }, + { 0x1314d, 0x600 }, + { 0x11004d, 0x600 }, + { 0x11014d, 0x600 }, + { 0x11104d, 0x600 }, + { 0x11114d, 0x600 }, + { 0x11204d, 0x600 }, + { 0x11214d, 0x600 }, + { 0x11304d, 0x600 }, + { 0x11314d, 0x600 }, + { 0x21004d, 0x600 }, + { 0x21014d, 0x600 }, + { 0x21104d, 0x600 }, + { 0x21114d, 0x600 }, + { 0x21204d, 0x600 }, + { 0x21214d, 0x600 }, + { 0x21304d, 0x600 }, + { 0x21314d, 0x600 }, + { 0x10049, 0x69a }, + { 0x10149, 0x69a }, + { 0x11049, 0x69a }, + { 0x11149, 0x69a }, + { 0x12049, 0x69a }, + { 0x12149, 0x69a }, + { 0x13049, 0x69a }, + { 0x13149, 0x69a }, + { 0x110049, 0x69a }, + { 0x110149, 0x69a }, + { 0x111049, 0x69a }, + { 0x111149, 0x69a }, + { 0x112049, 0x69a }, + { 0x112149, 0x69a }, + { 0x113049, 0x69a }, + { 0x113149, 0x69a }, + { 0x210049, 0x69a }, + { 0x210149, 0x69a }, + { 0x211049, 0x69a }, + { 0x211149, 0x69a }, + { 0x212049, 0x69a }, + { 0x212149, 0x69a }, + { 0x213049, 0x69a }, + { 0x213149, 0x69a }, + { 0x43, 0x21 }, + { 0x1043, 0x21 }, + { 0x2043, 0x21 }, + { 0x3043, 0x21 }, + { 0x4043, 0x21 }, + { 0x5043, 0x21 }, + { 0x6043, 0x21 }, + { 0x7043, 0x21 }, + { 0x8043, 0x21 }, + { 0x9043, 0x21 }, + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x3e8 }, + { 0x120008, 0x64 }, + { 0x220008, 0x19 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x104 }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + { 0x1200b2, 0x104 }, + { 0x110043, 0x5a1 }, + { 0x110143, 0x5a1 }, + { 0x111043, 0x5a1 }, + { 0x111143, 0x5a1 }, + { 0x112043, 0x5a1 }, + { 0x112143, 0x5a1 }, + { 0x113043, 0x5a1 }, + { 0x113143, 0x5a1 }, + { 0x2200b2, 0x104 }, + { 0x210043, 0x5a1 }, + { 0x210143, 0x5a1 }, + { 0x211043, 0x5a1 }, + { 0x211143, 0x5a1 }, + { 0x212043, 0x5a1 }, + { 0x212143, 0x5a1 }, + { 0x213043, 0x5a1 }, + { 0x213143, 0x5a1 }, + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + { 0x20019, 0x1 }, + { 0x120019, 0x1 }, + { 0x220019, 0x1 }, + { 0x200f0, 0x660 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5665 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x12002d, 0x0 }, + { 0x22002d, 0x0 }, + { 0x2007d, 0x212 }, + { 0x12007d, 0x212 }, + { 0x22007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x12007c, 0x61 }, + { 0x22007c, 0x61 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x1204a, 0x500 }, + { 0x1304a, 0x500 }, + { 0x2002c, 0x0 }, +}; + +/* P0 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x303c }, + { 0x54006, 0x14 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x2b }, + { 0x5401b, 0x4855 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x15 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x2b }, + { 0x54021, 0x4855 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x15 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x2b3f }, + { 0x54034, 0x5500 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1500 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x2b3f }, + { 0x5403a, 0x5500 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1500 }, + { 0xd0000, 0x1 }, +}; + +/* P1 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp1_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, 0x303c }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x2b }, + { 0x5401b, 0x4855 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x15 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x2b }, + { 0x54021, 0x4855 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x15 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x2b00 }, + { 0x54034, 0x5500 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1500 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x2b00 }, + { 0x5403a, 0x5500 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1500 }, + { 0xd0000, 0x1 }, +}; + +/* P2 message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp2_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, 0x303c }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x2b }, + { 0x5401b, 0x4855 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x15 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x2b }, + { 0x54021, 0x4855 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x15 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x2b00 }, + { 0x54034, 0x5500 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1500 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x2b00 }, + { 0x5403a, 0x5500 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1500 }, + { 0xd0000, 0x1 }, +}; + +/* P0 2D message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x303c }, + { 0x54006, 0x14 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x110 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x2b }, + { 0x5401b, 0x4855 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x15 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x2b }, + { 0x54021, 0x4855 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x15 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x1 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x2b3f }, + { 0x54034, 0x5500 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1500 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x2b3f }, + { 0x5403a, 0x5500 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1500 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x633 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x633 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x633 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x633 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x633 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x633 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xb }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x1 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a4, 0x0 }, + { 0x900a5, 0x790 }, + { 0x900a6, 0x11a }, + { 0x900a7, 0x8 }, + { 0x900a8, 0x7aa }, + { 0x900a9, 0x2a }, + { 0x900aa, 0x10 }, + { 0x900ab, 0x7b2 }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x0 }, + { 0x900ae, 0x7c8 }, + { 0x900af, 0x109 }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x10 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x1 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xd }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x8 }, + { 0x90159, 0xe8 }, + { 0x9015a, 0x109 }, + { 0x9015b, 0x0 }, + { 0x9015c, 0x8140 }, + { 0x9015d, 0x10c }, + { 0x9015e, 0x10 }, + { 0x9015f, 0x8138 }, + { 0x90160, 0x104 }, + { 0x90161, 0x8 }, + { 0x90162, 0x448 }, + { 0x90163, 0x109 }, + { 0x90164, 0xf }, + { 0x90165, 0x7c0 }, + { 0x90166, 0x109 }, + { 0x90167, 0x0 }, + { 0x90168, 0xe8 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x47 }, + { 0x9016b, 0x630 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x8 }, + { 0x9016e, 0x618 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0xe0 }, + { 0x90172, 0x109 }, + { 0x90173, 0x0 }, + { 0x90174, 0x7c8 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x8140 }, + { 0x90178, 0x10c }, + { 0x90179, 0x0 }, + { 0x9017a, 0x478 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x1 }, + { 0x9017e, 0x8 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x4 }, + { 0x90181, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x29 }, + { 0x90026, 0x68 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x465 }, + { 0x2000c, 0xfa }, + { 0x2000d, 0x9c4 }, + { 0x2000e, 0x2c }, + { 0x12000b, 0x70 }, + { 0x12000c, 0x19 }, + { 0x12000d, 0xfa }, + { 0x12000e, 0x10 }, + { 0x22000b, 0x1c }, + { 0x22000c, 0x6 }, + { 0x22000d, 0x3e }, + { 0x22000e, 0x10 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x140080, 0xe0 }, + { 0x140081, 0x12 }, + { 0x140082, 0xe0 }, + { 0x140083, 0x12 }, + { 0x140084, 0xe0 }, + { 0x140085, 0x12 }, + { 0x240080, 0xe0 }, + { 0x240081, 0x12 }, + { 0x240082, 0xe0 }, + { 0x240083, 0x12 }, + { 0x240084, 0xe0 }, + { 0x240085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 } +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 4000mts 1D */ + .drate = 4000, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 4000mts 2D */ + .drate = 4000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info dram_timing_2gb_no_ecc = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 4000, 400, 100, }, +}; + +#ifdef CONFIG_IMX8M_DRAM_INLINE_ECC +#error +#endif diff --git a/arch/arm/boards/tqma93xx/Makefile b/arch/arm/boards/tqma93xx/Makefile new file mode 100644 index 0000000000..1bef9e284d --- /dev/null +++ b/arch/arm/boards/tqma93xx/Makefile @@ -0,0 +1,2 @@ +lwl-y += lowlevel.o lpddr4x_tqma93xxca_timing.o lpddr4x_tqma93xxla_timing.o +obj-y += board.o diff --git a/arch/arm/boards/tqma93xx/board.c b/arch/arm/boards/tqma93xx/board.c new file mode 100644 index 0000000000..b181784079 --- /dev/null +++ b/arch/arm/boards/tqma93xx/board.c @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0 + +#define pr_fmt(fmt) "TQMa93xx: " fmt + +#include <common.h> +#include <gpio.h> +#include <init.h> +#include <i2c/i2c.h> +#include <linux/clk.h> +#include <linux/kernel.h> +#include <environment.h> +#include <mfd/pca9450.h> +#include <deep-probe.h> +#include <mach/imx/bbu.h> + +static void tqma93xx_init_pmic(struct regmap *map) +{ + /* BUCKxOUT_DVS0/1 control BUCK123 output */ + regmap_write(map, PCA9450_BUCK123_DVS, 0x29); + /* enable DVS control through PMIC_STBY_REQ */ + regmap_write(map, PCA9450_BUCK1CTRL, 0x59); + /* 0.9 V */ + regmap_write(map, PCA9450_BUCK1OUT_DVS0, 0x18); + regmap_write(map, PCA9450_BUCK3OUT_DVS0, 0x18); + /* set standby voltage to 0.65v */ + regmap_write(map, PCA9450_BUCK1OUT_DVS1, 0x4); + + /* I2C_LT_EN*/ + regmap_write(map, 0xa, 0x3); + + /* set WDOG_B_CFG to cold reset */ + regmap_write(map, PCA9450_RESET_CTRL, 0xA1); +} + +static int tqma93xx_probe(struct device *dev) +{ + pca9450_register_init_callback(tqma93xx_init_pmic); + + imx9_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc0", 0); + + return 0; +} + +static const struct of_device_id tqma93xx_of_match[] = { + { + .compatible = "tq,imx93-tqma9352", + }, + { /* sentinel */ }, +}; + +static struct driver tqma93xx_board_driver = { + .name = "board-tqma93xx", + .probe = tqma93xx_probe, + .of_compatible = tqma93xx_of_match, +}; +coredevice_platform_driver(tqma93xx_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(tqma93xx_of_match); diff --git a/arch/arm/boards/tqma93xx/lowlevel.c b/arch/arm/boards/tqma93xx/lowlevel.c new file mode 100644 index 0000000000..8d89ee530f --- /dev/null +++ b/arch/arm/boards/tqma93xx/lowlevel.c @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <common.h> +#include <debug_ll.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/generic.h> +#include <mach/imx/xload.h> +#include <asm/barebox-arm.h> +#include <soc/imx9/ddr.h> +#include <mach/imx/atf.h> +#include <mach/imx/xload.h> +#include <mach/imx/romapi.h> +#include <mach/imx/esdctl.h> +#include <pbl/i2c.h> +#include <boards/tq/tq_eeprom.h> + +extern char __dtb_z_imx93_tqma9352_mba93xxca_start[]; +extern char __dtb_z_imx93_tqma9352_mba93xxla_start[]; +extern struct dram_timing_info tqma93xxca_dram_timing; +extern struct dram_timing_info tqma93xxla_dram_timing; + +static int tqma93xx_get_formfactor(void) +{ + struct pbl_i2c *i2c; + struct tq_eeprom *eeprom; + phys_size_t ramsize; + int formfactor; + + i2c = imx93_i2c_early_init(IOMEM(MX9_I2C1_BASE_ADDR)); + + eeprom = pbl_tq_read_eeprom(i2c, 0x53, 0); + if (!eeprom) + return VARD_FORMFACTOR_TYPE_CONNECTOR; + + ramsize = tq_vard_ramsize(&eeprom->vard); + if (ramsize != SZ_1G) + pr_err("unsupported ram size 0x%08llx\n", ramsize); + + formfactor = tq_vard_get_formfactor(&eeprom->vard); + + switch (formfactor) { + case VARD_FORMFACTOR_TYPE_LGA: + pr_debug("LGA board type\n"); + break; + case VARD_FORMFACTOR_TYPE_CONNECTOR: + pr_debug("CONNECTOR board type\n"); + break; + default: + pr_err("Unknown formfactor\n"); + formfactor = VARD_FORMFACTOR_TYPE_CONNECTOR; + } + + return formfactor; +} + +static noinline void tqma93xx_continue(void) +{ + void *base = IOMEM(MX9_UART1_BASE_ADDR); + void *muxbase = IOMEM(MX9_IOMUXC_BASE_ADDR); + int formfactor; + void *fdt; + + writel(0x10, muxbase + 0x170); + writel(0x10, muxbase + 0x174); + writel(0x0, muxbase + 0x184); + writel(0xb9e, muxbase + 0x320); + writel(0xb9e, muxbase + 0x324); + + imx9_uart_setup(IOMEM(base)); + pbl_set_putc(lpuart32_putc, base + 0x10); + + formfactor = tqma93xx_get_formfactor(); + + if (current_el() == 3) { + switch (formfactor) { + case VARD_FORMFACTOR_TYPE_LGA: + imx93_ddr_init(&tqma93xxla_dram_timing, DRAM_TYPE_LPDDR4); + break; + case VARD_FORMFACTOR_TYPE_CONNECTOR: + imx93_ddr_init(&tqma93xxca_dram_timing, DRAM_TYPE_LPDDR4); + break; + } + + imx93_romapi_load_image(); + imx93_load_and_start_image_via_tfa(); + } + + switch (formfactor) { + case VARD_FORMFACTOR_TYPE_LGA: + fdt = __dtb_z_imx93_tqma9352_mba93xxla_start; + break; + case VARD_FORMFACTOR_TYPE_CONNECTOR: + fdt = __dtb_z_imx93_tqma9352_mba93xxca_start; + break; + } + + imx93_barebox_entry(fdt); +} + +ENTRY_FUNCTION(start_imx93_tqma93xx, r0, r1, r2) +{ + if (current_el() == 3) + imx93_cpu_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + tqma93xx_continue(); +} diff --git a/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxca_timing.c b/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxca_timing.c new file mode 100644 index 0000000000..68d8da3b5b --- /dev/null +++ b/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxca_timing.c @@ -0,0 +1,755 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2023 NXP + */ + +#include <common.h> +#include <soc/imx9/ddr.h> + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x4e300110, 0x44100001 }, + { 0x4e300000, 0x8000bf }, + { 0x4e300008, 0x0 }, + { 0x4e300080, 0x80000412 }, + { 0x4e300084, 0x0 }, + { 0x4e300100, 0x24a0321b }, + { 0x4e300104, 0xa8ee001b }, + { 0x4e300108, 0x2f2e3233 }, + { 0x4e30010c, 0x85c18b }, + { 0x4e300114, 0x1002 }, + { 0x4e300124, 0x1c77071d }, + { 0x4e300160, 0x5402 }, + { 0x4e30016c, 0x35f00000 }, + { 0x4e300170, 0x8b0b0608 }, + { 0x4e300250, 0x28 }, + { 0x4e300254, 0x0 }, + { 0x4e30025c, 0x400 }, + { 0x4e300260, 0x0 }, + { 0x4e300300, 0x14281114 }, + { 0x4e300304, 0x106110a }, + { 0x4e300308, 0xa200e3c }, + { 0x4e300f04, 0x80 }, + { 0x4e300800, 0x39300002 }, + { 0x4e300804, 0x1f1f1f1f }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x4 }, + { 0x100a1, 0x5 }, + { 0x100a2, 0x6 }, + { 0x100a3, 0x7 }, + { 0x100a4, 0x0 }, + { 0x100a5, 0x1 }, + { 0x100a6, 0x2 }, + { 0x100a7, 0x3 }, + { 0x110a0, 0x3 }, + { 0x110a1, 0x2 }, + { 0x110a2, 0x0 }, + { 0x110a3, 0x1 }, + { 0x110a4, 0x7 }, + { 0x110a5, 0x6 }, + { 0x110a6, 0x4 }, + { 0x110a7, 0x5 }, + { 0x1005f, 0x5ff }, + { 0x1015f, 0x5ff }, + { 0x1105f, 0x5ff }, + { 0x1115f, 0x5ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x200c5, 0x19 }, + { 0x2002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x20024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x2007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x20056, 0x3 }, + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x10049, 0xe00 }, + { 0x10149, 0xe00 }, + { 0x11049, 0xe00 }, + { 0x11149, 0xe00 }, + { 0x43, 0x60 }, + { 0x1043, 0x60 }, + { 0x2043, 0x60 }, + { 0x20018, 0x1 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x2009b, 0x2 }, + { 0x20008, 0x3a5 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x10c }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x200fa, 0x2 }, + { 0x20019, 0x1 }, + { 0x200f0, 0x0 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5555 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x2002c, 0x0 }, +}; + +/* P0 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xe94 }, + { 0x54004, 0x4 }, + { 0x54006, 0x15 }, + { 0x54008, 0x131f }, + { 0x54009, 0xff }, + { 0x5400b, 0x4 }, + { 0x5400c, 0x1 }, + { 0x5400d, 0x100 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x36e4 }, + { 0x5401a, 0x32 }, + { 0x5401b, 0x1146 }, + { 0x5401c, 0x1108 }, + { 0x5401e, 0x6 }, + { 0x5401f, 0x36e4 }, + { 0x54020, 0x32 }, + { 0x54021, 0x1146 }, + { 0x54022, 0x1108 }, + { 0x54024, 0x6 }, + { 0x54032, 0xe400 }, + { 0x54033, 0x3236 }, + { 0x54034, 0x4600 }, + { 0x54035, 0x811 }, + { 0x54036, 0x11 }, + { 0x54037, 0x600 }, + { 0x54038, 0xe400 }, + { 0x54039, 0x3236 }, + { 0x5403a, 0x4600 }, + { 0x5403b, 0x811 }, + { 0x5403c, 0x11 }, + { 0x5403d, 0x600 }, + { 0xd0000, 0x1 } +}; + +/* P0 2D message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xe94 }, + { 0x54004, 0x4 }, + { 0x54006, 0x15 }, + { 0x54008, 0x61 }, + { 0x54009, 0xff }, + { 0x5400b, 0x4 }, + { 0x5400c, 0x1 }, + { 0x5400d, 0x100 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x2080 }, + { 0x54012, 0x110 }, + { 0x54019, 0x36e4 }, + { 0x5401a, 0x32 }, + { 0x5401b, 0x1146 }, + { 0x5401c, 0x1108 }, + { 0x5401e, 0x6 }, + { 0x5401f, 0x36e4 }, + { 0x54020, 0x32 }, + { 0x54021, 0x1146 }, + { 0x54022, 0x1108 }, + { 0x54024, 0x6 }, + { 0x54032, 0xe400 }, + { 0x54033, 0x3236 }, + { 0x54034, 0x4600 }, + { 0x54035, 0x811 }, + { 0x54036, 0x11 }, + { 0x54037, 0x600 }, + { 0x54038, 0xe400 }, + { 0x54039, 0x3236 }, + { 0x5403a, 0x4600 }, + { 0x5403b, 0x811 }, + { 0x5403c, 0x11 }, + { 0x5403d, 0x600 }, + { 0xd0000, 0x1 } +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x30 }, + { 0x90051, 0x65a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x45a }, + { 0x90055, 0x9 }, + { 0x90056, 0x0 }, + { 0x90057, 0x448 }, + { 0x90058, 0x109 }, + { 0x90059, 0x40 }, + { 0x9005a, 0x633 }, + { 0x9005b, 0x179 }, + { 0x9005c, 0x1 }, + { 0x9005d, 0x618 }, + { 0x9005e, 0x109 }, + { 0x9005f, 0x40c0 }, + { 0x90060, 0x633 }, + { 0x90061, 0x149 }, + { 0x90062, 0x8 }, + { 0x90063, 0x4 }, + { 0x90064, 0x48 }, + { 0x90065, 0x4040 }, + { 0x90066, 0x633 }, + { 0x90067, 0x149 }, + { 0x90068, 0x0 }, + { 0x90069, 0x4 }, + { 0x9006a, 0x48 }, + { 0x9006b, 0x40 }, + { 0x9006c, 0x633 }, + { 0x9006d, 0x149 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x658 }, + { 0x90070, 0x109 }, + { 0x90071, 0x10 }, + { 0x90072, 0x4 }, + { 0x90073, 0x18 }, + { 0x90074, 0x0 }, + { 0x90075, 0x4 }, + { 0x90076, 0x78 }, + { 0x90077, 0x549 }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0xd49 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x159 }, + { 0x9007d, 0x94a }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x159 }, + { 0x90080, 0x441 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x42 }, + { 0x90084, 0x633 }, + { 0x90085, 0x149 }, + { 0x90086, 0x1 }, + { 0x90087, 0x633 }, + { 0x90088, 0x149 }, + { 0x90089, 0x0 }, + { 0x9008a, 0xe0 }, + { 0x9008b, 0x109 }, + { 0x9008c, 0xa }, + { 0x9008d, 0x10 }, + { 0x9008e, 0x109 }, + { 0x9008f, 0x9 }, + { 0x90090, 0x3c0 }, + { 0x90091, 0x149 }, + { 0x90092, 0x9 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x159 }, + { 0x90095, 0x18 }, + { 0x90096, 0x10 }, + { 0x90097, 0x109 }, + { 0x90098, 0x0 }, + { 0x90099, 0x3c0 }, + { 0x9009a, 0x109 }, + { 0x9009b, 0x18 }, + { 0x9009c, 0x4 }, + { 0x9009d, 0x48 }, + { 0x9009e, 0x18 }, + { 0x9009f, 0x4 }, + { 0x900a0, 0x58 }, + { 0x900a1, 0xb }, + { 0x900a2, 0x10 }, + { 0x900a3, 0x109 }, + { 0x900a4, 0x1 }, + { 0x900a5, 0x10 }, + { 0x900a6, 0x109 }, + { 0x900a7, 0x5 }, + { 0x900a8, 0x7c0 }, + { 0x900a9, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900aa, 0x0 }, + { 0x900ab, 0x790 }, + { 0x900ac, 0x11a }, + { 0x900ad, 0x8 }, + { 0x900ae, 0x7aa }, + { 0x900af, 0x2a }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x7b2 }, + { 0x900b2, 0x2a }, + { 0x900b3, 0x0 }, + { 0x900b4, 0x7c8 }, + { 0x900b5, 0x109 }, + { 0x900b6, 0x10 }, + { 0x900b7, 0x10 }, + { 0x900b8, 0x109 }, + { 0x900b9, 0x10 }, + { 0x900ba, 0x2a8 }, + { 0x900bb, 0x129 }, + { 0x900bc, 0x8 }, + { 0x900bd, 0x370 }, + { 0x900be, 0x129 }, + { 0x900bf, 0xa }, + { 0x900c0, 0x3c8 }, + { 0x900c1, 0x1a9 }, + { 0x900c2, 0xc }, + { 0x900c3, 0x408 }, + { 0x900c4, 0x199 }, + { 0x900c5, 0x14 }, + { 0x900c6, 0x790 }, + { 0x900c7, 0x11a }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x4 }, + { 0x900ca, 0x18 }, + { 0x900cb, 0xe }, + { 0x900cc, 0x408 }, + { 0x900cd, 0x199 }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x8568 }, + { 0x900d0, 0x108 }, + { 0x900d1, 0x18 }, + { 0x900d2, 0x790 }, + { 0x900d3, 0x16a }, + { 0x900d4, 0x8 }, + { 0x900d5, 0x1d8 }, + { 0x900d6, 0x169 }, + { 0x900d7, 0x10 }, + { 0x900d8, 0x8558 }, + { 0x900d9, 0x168 }, + { 0x900da, 0x1ff8 }, + { 0x900db, 0x85a8 }, + { 0x900dc, 0x1e8 }, + { 0x900dd, 0x50 }, + { 0x900de, 0x798 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x60 }, + { 0x900e1, 0x7a0 }, + { 0x900e2, 0x16a }, + { 0x900e3, 0x8 }, + { 0x900e4, 0x8310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0x8 }, + { 0x900e7, 0xa310 }, + { 0x900e8, 0x168 }, + { 0x900e9, 0xa }, + { 0x900ea, 0x408 }, + { 0x900eb, 0x169 }, + { 0x900ec, 0x6e }, + { 0x900ed, 0x0 }, + { 0x900ee, 0x68 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x408 }, + { 0x900f1, 0x169 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0x8310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x0 }, + { 0x900f6, 0xa310 }, + { 0x900f7, 0x168 }, + { 0x900f8, 0x1ff8 }, + { 0x900f9, 0x85a8 }, + { 0x900fa, 0x1e8 }, + { 0x900fb, 0x68 }, + { 0x900fc, 0x798 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x78 }, + { 0x900ff, 0x7a0 }, + { 0x90100, 0x16a }, + { 0x90101, 0x68 }, + { 0x90102, 0x790 }, + { 0x90103, 0x16a }, + { 0x90104, 0x8 }, + { 0x90105, 0x8b10 }, + { 0x90106, 0x168 }, + { 0x90107, 0x8 }, + { 0x90108, 0xab10 }, + { 0x90109, 0x168 }, + { 0x9010a, 0xa }, + { 0x9010b, 0x408 }, + { 0x9010c, 0x169 }, + { 0x9010d, 0x58 }, + { 0x9010e, 0x0 }, + { 0x9010f, 0x68 }, + { 0x90110, 0x0 }, + { 0x90111, 0x408 }, + { 0x90112, 0x169 }, + { 0x90113, 0x0 }, + { 0x90114, 0x8b10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x1 }, + { 0x90117, 0xab10 }, + { 0x90118, 0x168 }, + { 0x90119, 0x0 }, + { 0x9011a, 0x1d8 }, + { 0x9011b, 0x169 }, + { 0x9011c, 0x80 }, + { 0x9011d, 0x790 }, + { 0x9011e, 0x16a }, + { 0x9011f, 0x18 }, + { 0x90120, 0x7aa }, + { 0x90121, 0x6a }, + { 0x90122, 0xa }, + { 0x90123, 0x0 }, + { 0x90124, 0x1e9 }, + { 0x90125, 0x8 }, + { 0x90126, 0x8080 }, + { 0x90127, 0x108 }, + { 0x90128, 0xf }, + { 0x90129, 0x408 }, + { 0x9012a, 0x169 }, + { 0x9012b, 0xc }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x68 }, + { 0x9012e, 0x9 }, + { 0x9012f, 0x0 }, + { 0x90130, 0x1a9 }, + { 0x90131, 0x0 }, + { 0x90132, 0x408 }, + { 0x90133, 0x169 }, + { 0x90134, 0x0 }, + { 0x90135, 0x8080 }, + { 0x90136, 0x108 }, + { 0x90137, 0x8 }, + { 0x90138, 0x7aa }, + { 0x90139, 0x6a }, + { 0x9013a, 0x0 }, + { 0x9013b, 0x8568 }, + { 0x9013c, 0x108 }, + { 0x9013d, 0xb7 }, + { 0x9013e, 0x790 }, + { 0x9013f, 0x16a }, + { 0x90140, 0x1f }, + { 0x90141, 0x0 }, + { 0x90142, 0x68 }, + { 0x90143, 0x8 }, + { 0x90144, 0x8558 }, + { 0x90145, 0x168 }, + { 0x90146, 0xf }, + { 0x90147, 0x408 }, + { 0x90148, 0x169 }, + { 0x90149, 0xd }, + { 0x9014a, 0x0 }, + { 0x9014b, 0x68 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x408 }, + { 0x9014e, 0x169 }, + { 0x9014f, 0x0 }, + { 0x90150, 0x8558 }, + { 0x90151, 0x168 }, + { 0x90152, 0x8 }, + { 0x90153, 0x3c8 }, + { 0x90154, 0x1a9 }, + { 0x90155, 0x3 }, + { 0x90156, 0x370 }, + { 0x90157, 0x129 }, + { 0x90158, 0x20 }, + { 0x90159, 0x2aa }, + { 0x9015a, 0x9 }, + { 0x9015b, 0x8 }, + { 0x9015c, 0xe8 }, + { 0x9015d, 0x109 }, + { 0x9015e, 0x0 }, + { 0x9015f, 0x8140 }, + { 0x90160, 0x10c }, + { 0x90161, 0x10 }, + { 0x90162, 0x8138 }, + { 0x90163, 0x104 }, + { 0x90164, 0x8 }, + { 0x90165, 0x448 }, + { 0x90166, 0x109 }, + { 0x90167, 0xf }, + { 0x90168, 0x7c0 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x0 }, + { 0x9016b, 0xe8 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x47 }, + { 0x9016e, 0x630 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0x618 }, + { 0x90172, 0x109 }, + { 0x90173, 0x8 }, + { 0x90174, 0xe0 }, + { 0x90175, 0x109 }, + { 0x90176, 0x0 }, + { 0x90177, 0x7c8 }, + { 0x90178, 0x109 }, + { 0x90179, 0x8 }, + { 0x9017a, 0x8140 }, + { 0x9017b, 0x10c }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x478 }, + { 0x9017e, 0x109 }, + { 0x9017f, 0x0 }, + { 0x90180, 0x1 }, + { 0x90181, 0x8 }, + { 0x90182, 0x8 }, + { 0x90183, 0x4 }, + { 0x90184, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x2b }, + { 0x90026, 0x69 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x75 }, + { 0x2000c, 0xe9 }, + { 0x2000d, 0x91c }, + { 0x2000e, 0x2c }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x400fd, 0xf }, + { 0x400f1, 0xe }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x0 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3733mts 1D */ + .drate = 3733, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P0 3733mts 2D */ + .drate = 3733, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info tqma93xxca_dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3733, }, +}; diff --git a/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxla_timing.c b/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxla_timing.c new file mode 100644 index 0000000000..7ca8c3aedc --- /dev/null +++ b/arch/arm/boards/tqma93xx/lpddr4x_tqma93xxla_timing.c @@ -0,0 +1,1482 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2022 NXP + */ + +/* generated from TQMa9xxxLA.DDR-Timing.Beta.0001.mex */ + +#include <common.h> +#include <soc/imx9/ddr.h> + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x4e300110, 0x44100001 }, + { 0x4e300000, 0x8000bf }, + { 0x4e300008, 0x0 }, + { 0x4e300080, 0x80000412 }, + { 0x4e300084, 0x0 }, + { 0x4e300100, 0x24a0321b }, + { 0x4e300104, 0xa8ee001b }, + { 0x4e300108, 0x2f2e3233 }, + { 0x4e30010c, 0x85c18b }, + { 0x4e300114, 0x1002 }, + { 0x4e300124, 0x1c77071d }, + { 0x4e300160, 0x5402 }, + { 0x4e30016c, 0x35f00000 }, + { 0x4e300170, 0x8b0b0608 }, + { 0x4e300250, 0x28 }, + { 0x4e300254, 0x0 }, + { 0x4e30025c, 0x400 }, + { 0x4e300260, 0x0 }, + { 0x4e300300, 0x14281114 }, + { 0x4e300304, 0x106110a }, + { 0x4e300308, 0xa200e3c }, + { 0x4e300f04, 0x80 }, + { 0x4e300800, 0x39300002 }, + { 0x4e300804, 0x1f1f1f1f }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x2 }, + { 0x100a1, 0x1 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x4 }, + { 0x100a4, 0x3 }, + { 0x100a5, 0x5 }, + { 0x100a6, 0x6 }, + { 0x100a7, 0x7 }, + { 0x110a0, 0x4 }, + { 0x110a1, 0x0 }, + { 0x110a2, 0x2 }, + { 0x110a3, 0x3 }, + { 0x110a4, 0x1 }, + { 0x110a5, 0x5 }, + { 0x110a6, 0x7 }, + { 0x110a7, 0x6 }, + { 0x1005f, 0x5ff }, + { 0x1015f, 0x5ff }, + { 0x1105f, 0x5ff }, + { 0x1115f, 0x5ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x200c5, 0x19 }, + { 0x2002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x20024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x2007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x20056, 0x3 }, + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x10049, 0xe00 }, + { 0x10149, 0xe00 }, + { 0x11049, 0xe00 }, + { 0x11149, 0xe00 }, + { 0x43, 0x60 }, + { 0x1043, 0x60 }, + { 0x2043, 0x60 }, + { 0x20018, 0x1 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x2009b, 0x2 }, + { 0x20008, 0x3a5 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x10c }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x200fa, 0x2 }, + { 0x20019, 0x1 }, + { 0x200f0, 0x0 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5555 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x2002c, 0x0 }, +}; + +/* ddr phy trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { + { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, + { 0x200cb, 0x0 }, + { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, + { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, + { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, + { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, + { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, + { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, + { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, + { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, + { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, + { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, + { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, + { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, + { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, + { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, + { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, + { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, + { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, + { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, + { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, + { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, + { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, + { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, + { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, + { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, + { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, + { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, + { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, + { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, + { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, + { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, + { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, + { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, + { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, + { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, + { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, + { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, + { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, + { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, + { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, + { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, + { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, + { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, + { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, + { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, + { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, + { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, + { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, + { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, + { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, + { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, + { 0x10168, 0x0 }, + { 0x10268, 0x0 }, + { 0x10368, 0x0 }, + { 0x10468, 0x0 }, + { 0x10568, 0x0 }, + { 0x10668, 0x0 }, + { 0x10768, 0x0 }, + { 0x10868, 0x0 }, + { 0x11068, 0x0 }, + { 0x11168, 0x0 }, + { 0x11268, 0x0 }, + { 0x11368, 0x0 }, + { 0x11468, 0x0 }, + { 0x11568, 0x0 }, + { 0x11668, 0x0 }, + { 0x11768, 0x0 }, + { 0x11868, 0x0 }, + { 0x12068, 0x0 }, + { 0x12168, 0x0 }, + { 0x12268, 0x0 }, + { 0x12368, 0x0 }, + { 0x12468, 0x0 }, + { 0x12568, 0x0 }, + { 0x12668, 0x0 }, + { 0x12768, 0x0 }, + { 0x12868, 0x0 }, + { 0x13068, 0x0 }, + { 0x13168, 0x0 }, + { 0x13268, 0x0 }, + { 0x13368, 0x0 }, + { 0x13468, 0x0 }, + { 0x13568, 0x0 }, + { 0x13668, 0x0 }, + { 0x13768, 0x0 }, + { 0x13868, 0x0 }, + { 0x10069, 0x0 }, + { 0x10169, 0x0 }, + { 0x10269, 0x0 }, + { 0x10369, 0x0 }, + { 0x10469, 0x0 }, + { 0x10569, 0x0 }, + { 0x10669, 0x0 }, + { 0x10769, 0x0 }, + { 0x10869, 0x0 }, + { 0x11069, 0x0 }, + { 0x11169, 0x0 }, + { 0x11269, 0x0 }, + { 0x11369, 0x0 }, + { 0x11469, 0x0 }, + { 0x11569, 0x0 }, + { 0x11669, 0x0 }, + { 0x11769, 0x0 }, + { 0x11869, 0x0 }, + { 0x12069, 0x0 }, + { 0x12169, 0x0 }, + { 0x12269, 0x0 }, + { 0x12369, 0x0 }, + { 0x12469, 0x0 }, + { 0x12569, 0x0 }, + { 0x12669, 0x0 }, + { 0x12769, 0x0 }, + { 0x12869, 0x0 }, + { 0x13069, 0x0 }, + { 0x13169, 0x0 }, + { 0x13269, 0x0 }, + { 0x13369, 0x0 }, + { 0x13469, 0x0 }, + { 0x13569, 0x0 }, + { 0x13669, 0x0 }, + { 0x13769, 0x0 }, + { 0x13869, 0x0 }, + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, + { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, + { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, + { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, + { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, + { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, + { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, + { 0x1318c, 0x0 }, + { 0x11318c, 0x0 }, + { 0x21318c, 0x0 }, + { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, + { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, + { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, + { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, + { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, + { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, + { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, + { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, + { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, + { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, + { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, + { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, + { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, + { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, + { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, + { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, + { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, + { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, + { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, + { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, + { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, + { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, + { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, + { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, + { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, + { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, + { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, + { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, + { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, + { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, + { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, + { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, + { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, + { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, + { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, + { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, + { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, + { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, + { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, + { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, + { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, + { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, + { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, + { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, + { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, + { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, + { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, + { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, + { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, + { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, + { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, + { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, + { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, + { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, + { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, + { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, + { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, + { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, + { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, + { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, + { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, + { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, + { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, + { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, + { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, + { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, + { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, + { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, + { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, + { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, + { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, + { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, + { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, + { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, + { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, + { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, + { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, + { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, + { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, + { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, + { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, + { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, + { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, + { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, + { 0x20072, 0x0 }, + { 0x20073, 0x0 }, + { 0x20074, 0x0 }, + { 0x100aa, 0x0 }, + { 0x110aa, 0x0 }, + { 0x120aa, 0x0 }, + { 0x130aa, 0x0 }, + { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, + { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, + { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, + { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, + { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, + { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, + { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, + { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, + { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, + { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, + { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, + { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, + { 0x100a4, 0x0 }, + { 0x100a5, 0x0 }, + { 0x100a6, 0x0 }, + { 0x100a7, 0x0 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x0 }, + { 0x110a2, 0x0 }, + { 0x110a3, 0x0 }, + { 0x110a4, 0x0 }, + { 0x110a5, 0x0 }, + { 0x110a6, 0x0 }, + { 0x110a7, 0x0 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x0 }, + { 0x120a2, 0x0 }, + { 0x120a3, 0x0 }, + { 0x120a4, 0x0 }, + { 0x120a5, 0x0 }, + { 0x120a6, 0x0 }, + { 0x120a7, 0x0 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, + { 0x130a4, 0x0 }, + { 0x130a5, 0x0 }, + { 0x130a6, 0x0 }, + { 0x130a7, 0x0 }, + { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, + { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, + { 0x400fd, 0x0 }, + { 0x400c0, 0x0 }, + { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, + { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, + { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, + { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, + { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, + { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, + { 0x10062, 0x0 }, + { 0x10162, 0x0 }, + { 0x10262, 0x0 }, + { 0x10362, 0x0 }, + { 0x10462, 0x0 }, + { 0x10562, 0x0 }, + { 0x10662, 0x0 }, + { 0x10762, 0x0 }, + { 0x10862, 0x0 }, + { 0x11062, 0x0 }, + { 0x11162, 0x0 }, + { 0x11262, 0x0 }, + { 0x11362, 0x0 }, + { 0x11462, 0x0 }, + { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, + { 0x12062, 0x0 }, + { 0x12162, 0x0 }, + { 0x12262, 0x0 }, + { 0x12362, 0x0 }, + { 0x12462, 0x0 }, + { 0x12562, 0x0 }, + { 0x12662, 0x0 }, + { 0x12762, 0x0 }, + { 0x12862, 0x0 }, + { 0x13062, 0x0 }, + { 0x13162, 0x0 }, + { 0x13262, 0x0 }, + { 0x13362, 0x0 }, + { 0x13462, 0x0 }, + { 0x13562, 0x0 }, + { 0x13662, 0x0 }, + { 0x13762, 0x0 }, + { 0x13862, 0x0 }, + { 0x20077, 0x0 }, + { 0x10001, 0x0 }, + { 0x11001, 0x0 }, + { 0x12001, 0x0 }, + { 0x13001, 0x0 }, + { 0x10040, 0x0 }, + { 0x10140, 0x0 }, + { 0x10240, 0x0 }, + { 0x10340, 0x0 }, + { 0x10440, 0x0 }, + { 0x10540, 0x0 }, + { 0x10640, 0x0 }, + { 0x10740, 0x0 }, + { 0x10840, 0x0 }, + { 0x10030, 0x0 }, + { 0x10130, 0x0 }, + { 0x10230, 0x0 }, + { 0x10330, 0x0 }, + { 0x10430, 0x0 }, + { 0x10530, 0x0 }, + { 0x10630, 0x0 }, + { 0x10730, 0x0 }, + { 0x10830, 0x0 }, + { 0x11040, 0x0 }, + { 0x11140, 0x0 }, + { 0x11240, 0x0 }, + { 0x11340, 0x0 }, + { 0x11440, 0x0 }, + { 0x11540, 0x0 }, + { 0x11640, 0x0 }, + { 0x11740, 0x0 }, + { 0x11840, 0x0 }, + { 0x11030, 0x0 }, + { 0x11130, 0x0 }, + { 0x11230, 0x0 }, + { 0x11330, 0x0 }, + { 0x11430, 0x0 }, + { 0x11530, 0x0 }, + { 0x11630, 0x0 }, + { 0x11730, 0x0 }, + { 0x11830, 0x0 }, + { 0x12040, 0x0 }, + { 0x12140, 0x0 }, + { 0x12240, 0x0 }, + { 0x12340, 0x0 }, + { 0x12440, 0x0 }, + { 0x12540, 0x0 }, + { 0x12640, 0x0 }, + { 0x12740, 0x0 }, + { 0x12840, 0x0 }, + { 0x12030, 0x0 }, + { 0x12130, 0x0 }, + { 0x12230, 0x0 }, + { 0x12330, 0x0 }, + { 0x12430, 0x0 }, + { 0x12530, 0x0 }, + { 0x12630, 0x0 }, + { 0x12730, 0x0 }, + { 0x12830, 0x0 }, + { 0x13040, 0x0 }, + { 0x13140, 0x0 }, + { 0x13240, 0x0 }, + { 0x13340, 0x0 }, + { 0x13440, 0x0 }, + { 0x13540, 0x0 }, + { 0x13640, 0x0 }, + { 0x13740, 0x0 }, + { 0x13840, 0x0 }, + { 0x13030, 0x0 }, + { 0x13130, 0x0 }, + { 0x13230, 0x0 }, + { 0x13330, 0x0 }, + { 0x13430, 0x0 }, + { 0x13530, 0x0 }, + { 0x13630, 0x0 }, + { 0x13730, 0x0 }, + { 0x13830, 0x0 }, +}; + +/* P0 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xe94 }, + { 0x54004, 0x4 }, + { 0x54006, 0x15 }, + { 0x54008, 0x131f }, + { 0x54009, 0xff }, + { 0x5400b, 0x4 }, + { 0x5400c, 0x1 }, + { 0x5400d, 0x100 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x110 }, + { 0x54019, 0x36e4 }, + { 0x5401a, 0x32 }, + { 0x5401b, 0x1146 }, + { 0x5401c, 0x1108 }, + { 0x5401e, 0x6 }, + { 0x5401f, 0x36e4 }, + { 0x54020, 0x32 }, + { 0x54021, 0x1146 }, + { 0x54022, 0x1108 }, + { 0x54024, 0x6 }, + { 0x54032, 0xe400 }, + { 0x54033, 0x3236 }, + { 0x54034, 0x4600 }, + { 0x54035, 0x811 }, + { 0x54036, 0x11 }, + { 0x54037, 0x600 }, + { 0x54038, 0xe400 }, + { 0x54039, 0x3236 }, + { 0x5403a, 0x4600 }, + { 0x5403b, 0x811 }, + { 0x5403c, 0x11 }, + { 0x5403d, 0x600 }, + { 0xd0000, 0x1 }, +}; + +/* P0 2D message block paremeter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xe94 }, + { 0x54004, 0x4 }, + { 0x54006, 0x15 }, + { 0x54008, 0x61 }, + { 0x54009, 0xff }, + { 0x5400b, 0x4 }, + { 0x5400c, 0x1 }, + { 0x5400d, 0x100 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x2080 }, + { 0x54012, 0x110 }, + { 0x54019, 0x36e4 }, + { 0x5401a, 0x32 }, + { 0x5401b, 0x1146 }, + { 0x5401c, 0x1108 }, + { 0x5401e, 0x6 }, + { 0x5401f, 0x36e4 }, + { 0x54020, 0x32 }, + { 0x54021, 0x1146 }, + { 0x54022, 0x1108 }, + { 0x54024, 0x6 }, + { 0x54032, 0xe400 }, + { 0x54033, 0x3236 }, + { 0x54034, 0x4600 }, + { 0x54035, 0x811 }, + { 0x54036, 0x11 }, + { 0x54037, 0x600 }, + { 0x54038, 0xe400 }, + { 0x54039, 0x3236 }, + { 0x5403a, 0x4600 }, + { 0x5403b, 0x811 }, + { 0x5403c, 0x11 }, + { 0x5403d, 0x600 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x30 }, + { 0x90051, 0x65a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x45a }, + { 0x90055, 0x9 }, + { 0x90056, 0x0 }, + { 0x90057, 0x448 }, + { 0x90058, 0x109 }, + { 0x90059, 0x40 }, + { 0x9005a, 0x633 }, + { 0x9005b, 0x179 }, + { 0x9005c, 0x1 }, + { 0x9005d, 0x618 }, + { 0x9005e, 0x109 }, + { 0x9005f, 0x40c0 }, + { 0x90060, 0x633 }, + { 0x90061, 0x149 }, + { 0x90062, 0x8 }, + { 0x90063, 0x4 }, + { 0x90064, 0x48 }, + { 0x90065, 0x4040 }, + { 0x90066, 0x633 }, + { 0x90067, 0x149 }, + { 0x90068, 0x0 }, + { 0x90069, 0x4 }, + { 0x9006a, 0x48 }, + { 0x9006b, 0x40 }, + { 0x9006c, 0x633 }, + { 0x9006d, 0x149 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x658 }, + { 0x90070, 0x109 }, + { 0x90071, 0x10 }, + { 0x90072, 0x4 }, + { 0x90073, 0x18 }, + { 0x90074, 0x0 }, + { 0x90075, 0x4 }, + { 0x90076, 0x78 }, + { 0x90077, 0x549 }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0xd49 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x159 }, + { 0x9007d, 0x94a }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x159 }, + { 0x90080, 0x441 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x42 }, + { 0x90084, 0x633 }, + { 0x90085, 0x149 }, + { 0x90086, 0x1 }, + { 0x90087, 0x633 }, + { 0x90088, 0x149 }, + { 0x90089, 0x0 }, + { 0x9008a, 0xe0 }, + { 0x9008b, 0x109 }, + { 0x9008c, 0xa }, + { 0x9008d, 0x10 }, + { 0x9008e, 0x109 }, + { 0x9008f, 0x9 }, + { 0x90090, 0x3c0 }, + { 0x90091, 0x149 }, + { 0x90092, 0x9 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x159 }, + { 0x90095, 0x18 }, + { 0x90096, 0x10 }, + { 0x90097, 0x109 }, + { 0x90098, 0x0 }, + { 0x90099, 0x3c0 }, + { 0x9009a, 0x109 }, + { 0x9009b, 0x18 }, + { 0x9009c, 0x4 }, + { 0x9009d, 0x48 }, + { 0x9009e, 0x18 }, + { 0x9009f, 0x4 }, + { 0x900a0, 0x58 }, + { 0x900a1, 0xb }, + { 0x900a2, 0x10 }, + { 0x900a3, 0x109 }, + { 0x900a4, 0x1 }, + { 0x900a5, 0x10 }, + { 0x900a6, 0x109 }, + { 0x900a7, 0x5 }, + { 0x900a8, 0x7c0 }, + { 0x900a9, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900aa, 0x0 }, + { 0x900ab, 0x790 }, + { 0x900ac, 0x11a }, + { 0x900ad, 0x8 }, + { 0x900ae, 0x7aa }, + { 0x900af, 0x2a }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x7b2 }, + { 0x900b2, 0x2a }, + { 0x900b3, 0x0 }, + { 0x900b4, 0x7c8 }, + { 0x900b5, 0x109 }, + { 0x900b6, 0x10 }, + { 0x900b7, 0x10 }, + { 0x900b8, 0x109 }, + { 0x900b9, 0x10 }, + { 0x900ba, 0x2a8 }, + { 0x900bb, 0x129 }, + { 0x900bc, 0x8 }, + { 0x900bd, 0x370 }, + { 0x900be, 0x129 }, + { 0x900bf, 0xa }, + { 0x900c0, 0x3c8 }, + { 0x900c1, 0x1a9 }, + { 0x900c2, 0xc }, + { 0x900c3, 0x408 }, + { 0x900c4, 0x199 }, + { 0x900c5, 0x14 }, + { 0x900c6, 0x790 }, + { 0x900c7, 0x11a }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x4 }, + { 0x900ca, 0x18 }, + { 0x900cb, 0xe }, + { 0x900cc, 0x408 }, + { 0x900cd, 0x199 }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x8568 }, + { 0x900d0, 0x108 }, + { 0x900d1, 0x18 }, + { 0x900d2, 0x790 }, + { 0x900d3, 0x16a }, + { 0x900d4, 0x8 }, + { 0x900d5, 0x1d8 }, + { 0x900d6, 0x169 }, + { 0x900d7, 0x10 }, + { 0x900d8, 0x8558 }, + { 0x900d9, 0x168 }, + { 0x900da, 0x1ff8 }, + { 0x900db, 0x85a8 }, + { 0x900dc, 0x1e8 }, + { 0x900dd, 0x50 }, + { 0x900de, 0x798 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x60 }, + { 0x900e1, 0x7a0 }, + { 0x900e2, 0x16a }, + { 0x900e3, 0x8 }, + { 0x900e4, 0x8310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0x8 }, + { 0x900e7, 0xa310 }, + { 0x900e8, 0x168 }, + { 0x900e9, 0xa }, + { 0x900ea, 0x408 }, + { 0x900eb, 0x169 }, + { 0x900ec, 0x6e }, + { 0x900ed, 0x0 }, + { 0x900ee, 0x68 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x408 }, + { 0x900f1, 0x169 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0x8310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x0 }, + { 0x900f6, 0xa310 }, + { 0x900f7, 0x168 }, + { 0x900f8, 0x1ff8 }, + { 0x900f9, 0x85a8 }, + { 0x900fa, 0x1e8 }, + { 0x900fb, 0x68 }, + { 0x900fc, 0x798 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x78 }, + { 0x900ff, 0x7a0 }, + { 0x90100, 0x16a }, + { 0x90101, 0x68 }, + { 0x90102, 0x790 }, + { 0x90103, 0x16a }, + { 0x90104, 0x8 }, + { 0x90105, 0x8b10 }, + { 0x90106, 0x168 }, + { 0x90107, 0x8 }, + { 0x90108, 0xab10 }, + { 0x90109, 0x168 }, + { 0x9010a, 0xa }, + { 0x9010b, 0x408 }, + { 0x9010c, 0x169 }, + { 0x9010d, 0x58 }, + { 0x9010e, 0x0 }, + { 0x9010f, 0x68 }, + { 0x90110, 0x0 }, + { 0x90111, 0x408 }, + { 0x90112, 0x169 }, + { 0x90113, 0x0 }, + { 0x90114, 0x8b10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x1 }, + { 0x90117, 0xab10 }, + { 0x90118, 0x168 }, + { 0x90119, 0x0 }, + { 0x9011a, 0x1d8 }, + { 0x9011b, 0x169 }, + { 0x9011c, 0x80 }, + { 0x9011d, 0x790 }, + { 0x9011e, 0x16a }, + { 0x9011f, 0x18 }, + { 0x90120, 0x7aa }, + { 0x90121, 0x6a }, + { 0x90122, 0xa }, + { 0x90123, 0x0 }, + { 0x90124, 0x1e9 }, + { 0x90125, 0x8 }, + { 0x90126, 0x8080 }, + { 0x90127, 0x108 }, + { 0x90128, 0xf }, + { 0x90129, 0x408 }, + { 0x9012a, 0x169 }, + { 0x9012b, 0xc }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x68 }, + { 0x9012e, 0x9 }, + { 0x9012f, 0x0 }, + { 0x90130, 0x1a9 }, + { 0x90131, 0x0 }, + { 0x90132, 0x408 }, + { 0x90133, 0x169 }, + { 0x90134, 0x0 }, + { 0x90135, 0x8080 }, + { 0x90136, 0x108 }, + { 0x90137, 0x8 }, + { 0x90138, 0x7aa }, + { 0x90139, 0x6a }, + { 0x9013a, 0x0 }, + { 0x9013b, 0x8568 }, + { 0x9013c, 0x108 }, + { 0x9013d, 0xb7 }, + { 0x9013e, 0x790 }, + { 0x9013f, 0x16a }, + { 0x90140, 0x1f }, + { 0x90141, 0x0 }, + { 0x90142, 0x68 }, + { 0x90143, 0x8 }, + { 0x90144, 0x8558 }, + { 0x90145, 0x168 }, + { 0x90146, 0xf }, + { 0x90147, 0x408 }, + { 0x90148, 0x169 }, + { 0x90149, 0xd }, + { 0x9014a, 0x0 }, + { 0x9014b, 0x68 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x408 }, + { 0x9014e, 0x169 }, + { 0x9014f, 0x0 }, + { 0x90150, 0x8558 }, + { 0x90151, 0x168 }, + { 0x90152, 0x8 }, + { 0x90153, 0x3c8 }, + { 0x90154, 0x1a9 }, + { 0x90155, 0x3 }, + { 0x90156, 0x370 }, + { 0x90157, 0x129 }, + { 0x90158, 0x20 }, + { 0x90159, 0x2aa }, + { 0x9015a, 0x9 }, + { 0x9015b, 0x8 }, + { 0x9015c, 0xe8 }, + { 0x9015d, 0x109 }, + { 0x9015e, 0x0 }, + { 0x9015f, 0x8140 }, + { 0x90160, 0x10c }, + { 0x90161, 0x10 }, + { 0x90162, 0x8138 }, + { 0x90163, 0x104 }, + { 0x90164, 0x8 }, + { 0x90165, 0x448 }, + { 0x90166, 0x109 }, + { 0x90167, 0xf }, + { 0x90168, 0x7c0 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x0 }, + { 0x9016b, 0xe8 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x47 }, + { 0x9016e, 0x630 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0x618 }, + { 0x90172, 0x109 }, + { 0x90173, 0x8 }, + { 0x90174, 0xe0 }, + { 0x90175, 0x109 }, + { 0x90176, 0x0 }, + { 0x90177, 0x7c8 }, + { 0x90178, 0x109 }, + { 0x90179, 0x8 }, + { 0x9017a, 0x8140 }, + { 0x9017b, 0x10c }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x478 }, + { 0x9017e, 0x109 }, + { 0x9017f, 0x0 }, + { 0x90180, 0x1 }, + { 0x90181, 0x8 }, + { 0x90182, 0x8 }, + { 0x90183, 0x4 }, + { 0x90184, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x2b }, + { 0x90026, 0x69 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x75 }, + { 0x2000c, 0xe9 }, + { 0x2000d, 0x91c }, + { 0x2000e, 0x2c }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x400fd, 0xf }, + { 0x400f1, 0xe }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x0 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3732mts 1D */ + .drate = 3732, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P0 3732mts 2D */ + .drate = 3732, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info tqma93xxla_dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_trained_csr = ddr_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3732, }, +}; diff --git a/arch/arm/boards/tqmls1046a/board.c b/arch/arm/boards/tqmls1046a/board.c index 028be890e0..36bcae6bc0 100644 --- a/arch/arm/boards/tqmls1046a/board.c +++ b/arch/arm/boards/tqmls1046a/board.c @@ -10,14 +10,14 @@ #include <linux/clk.h> #include <linux/clkdev.h> #include <soc/fsl/immap_lsch2.h> -#include <mach/bbu.h> -#include <mach/layerscape.h> +#include <mach/layerscape/bbu.h> +#include <mach/layerscape/layerscape.h> static int tqmls1046a_mem_init(void) { int ret; - if (!of_machine_is_compatible("tqc,tqmls1046a")) + if (!of_machine_is_compatible("tq,ls1046a-tqmls1046a")) return 0; arm_add_mem_device("ram0", 0x80000000, SZ_2G); @@ -36,7 +36,7 @@ static int tqmls1046a_postcore_init(void) enum bootsource bootsource; unsigned long sd_bbu_flags = 0, qspi_bbu_flags = 0; - if (!of_machine_is_compatible("tqc,tqmls1046a")) + if (!of_machine_is_compatible("tq,ls1046a-tqmls1046a")) return 0; defaultenv_append_directory(defaultenv_tqmls1046a); @@ -47,7 +47,7 @@ static int tqmls1046a_postcore_init(void) /* divide CGA1/CGA2 PLL by 24 to get QSPI interface clock */ out_be32(&scfg->qspi_cfg, 0x30100000); - bootsource = ls1046_bootsource_get(); + bootsource = ls1046a_bootsource_get(); switch (bootsource) { case BOOTSOURCE_MMC: diff --git a/arch/arm/boards/tqmls1046a/lowlevel.c b/arch/arm/boards/tqmls1046a/lowlevel.c index 99dcf1eff7..4a1496078a 100644 --- a/arch/arm/boards/tqmls1046a/lowlevel.c +++ b/arch/arm/boards/tqmls1046a/lowlevel.c @@ -1,7 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ #include <common.h> #include <debug_ll.h> -#include <image-metadata.h> #include <platform_data/mmc-esdhc-imx.h> #include <soc/fsl/fsl_ddr_sdram.h> #include <soc/fsl/immap_lsch2.h> @@ -9,10 +8,10 @@ #include <asm/barebox-arm.h> #include <asm/syscounter.h> #include <asm/cache.h> -#include <mach/errata.h> -#include <mach/lowlevel.h> -#include <mach/xload.h> -#include <mach/layerscape.h> +#include <mach/layerscape/errata.h> +#include <mach/layerscape/lowlevel.h> +#include <mach/layerscape/xload.h> +#include <mach/layerscape/layerscape.h> static struct fsl_ddr_controller ddrc[] = { { @@ -91,7 +90,7 @@ static struct fsl_ddr_controller ddrc[] = { }, }; -extern char __dtb_fsl_tqmls1046a_mbls10xxa_start[]; +extern char __dtb_z_fsl_ls1046a_tqmls1046a_mbls10xxa_start[]; static noinline __noreturn void tqmls1046a_r_entry(void) { @@ -99,19 +98,17 @@ static noinline __noreturn void tqmls1046a_r_entry(void) if (get_pc() >= membase) barebox_arm_entry(membase, 0x80000000 - SZ_64M, - __dtb_fsl_tqmls1046a_mbls10xxa_start); + __dtb_z_fsl_ls1046a_tqmls1046a_mbls10xxa_start); arm_cpu_lowlevel_init(); ls1046a_init_lowlevel(); - debug_ll_init(); + ls1046a_debug_ll_init(); udelay(500); putc_ll('>'); - IMD_USED_OF(fsl_tqmls1046a_mbls10xxa); - - fsl_ddr_set_memctl_regs(&ddrc[0], 0); + fsl_ddr_set_memctl_regs(&ddrc[0], 0, false); ls1046a_errata_post_ddr(); diff --git a/arch/arm/boards/turris-omnia/lowlevel.c b/arch/arm/boards/turris-omnia/lowlevel.c index b6520b5775..97d57e6ce0 100644 --- a/arch/arm/boards/turris-omnia/lowlevel.c +++ b/arch/arm/boards/turris-omnia/lowlevel.c @@ -3,14 +3,14 @@ #include <common.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> #include <asm/io.h> extern char __dtb_armada_385_turris_omnia_bb_start[]; -ENTRY_FUNCTION(start_turris_omnia, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_turris_omnia, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/udoo-neo/board.c b/arch/arm/boards/udoo-neo/board.c index 5964e92159..d9b9517fc1 100644 --- a/arch/arm/boards/udoo-neo/board.c +++ b/arch/arm/boards/udoo-neo/board.c @@ -2,16 +2,116 @@ // SPDX-FileCopyrightText: 2014 Sascha Hauer, Pengutronix #include <common.h> -#include <init.h> -#include <linux/clk.h> +#include <deep-probe.h> +#include <gpio.h> +#include <mach/imx/bbu.h> +#include <mach/imx/imx6.h> -static int imx6sx_udoneo_coredevices_init(void) +/** + * Detects the board model by checking the R184 and R185 resistors. + * A mounted resistor (0Ohm) connects the GPIO to ground, so the + * GPIO value will be 0. + * + * FULL - Eth, WiFi, motion sensors, 1GB RAM -> R184 not mounted - R185 mounted + * EXTENDED - NO Eth, WiFi, motion sensors, 1GB RAM -> R184 not mounted - R185 not mounted + * BASE - Eth, NO WiFi, NO motion sensors, 512MB RAM -> R184 mounted - R185 mounted + * BASE KS - NO Eth, WiFi, NO motion sensors, 512MB RAM -> R184 mounted - R185 not mounted + */ + +enum imx6sx_udoneo_board_type { + UDOO_NEO_BASIC = 0, + UDOO_NEO_BASIC_KS = 1, + UDOO_NEO_FULL = 2, + UDOO_NEO_EXTENDED = 3, + UDOO_NEO_UNKNOWN, +}; + +#define GPIO_R184 IMX_GPIO_NR(4, 13) +#define GPIO_R185 IMX_GPIO_NR(4, 0) + +static enum imx6sx_udoneo_board_type imx6sx_udoneo_detect(struct device *dev) { - if (!of_machine_is_compatible("fsl,imx6sx-udoo-neo")) - return 0; + struct device_node *gpio_np = NULL; + int r184, r185; + int ret; + + gpio_np = of_find_node_by_name_address(NULL, "gpio@20a8000"); + if (gpio_np) { + ret = of_device_ensure_probed(gpio_np); + if (ret) { + dev_warn(dev, "Can't probe GPIO node\n"); + goto detect_error; + } + } else { + dev_warn(dev, "Can't get GPIO node\n"); + goto detect_error; + } + + ret = gpio_request(GPIO_R184, "version r184"); + if (ret) + goto detect_error; + + ret = gpio_request(GPIO_R185, "version r185"); + if (ret) + goto detect_error; + + ret = gpio_direction_input(GPIO_R184); + if (ret) + goto detect_error; + + ret = gpio_direction_input(GPIO_R185); + if (ret) + goto detect_error; + + r184 = gpio_get_value(GPIO_R184); + r185 = gpio_get_value(GPIO_R185); + + return r184 << 1 | r185 << 0; +detect_error: + dev_warn(dev, "Board detection failed\n"); + + return UDOO_NEO_UNKNOWN; +} + +static int imx6sx_udoneo_probe(struct device *dev) +{ + enum imx6sx_udoneo_board_type type; + const char *model; + + type = imx6sx_udoneo_detect(dev); + switch (type) { + case UDOO_NEO_FULL: + model = "UDOO Neo Full"; + break; + case UDOO_NEO_EXTENDED: + model = "UDOO Neo Extended"; + break; + case UDOO_NEO_BASIC: + model = "UDOO Neo Basic"; + break; + default: + model = "UDOO Neo unknown"; + } + + barebox_set_model(model); barebox_set_hostname("mx6sx-udooneo"); + imx6_bbu_internal_mmc_register_handler("emmc", "/dev/mmc1.barebox", + BBU_HANDLER_FLAG_DEFAULT); + return 0; } -coredevice_initcall(imx6sx_udoneo_coredevices_init); + +static const struct of_device_id imx6sx_udoneo_of_match[] = { + { .compatible = "udoo,neofull" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(imx6sx_udoneo_of_match); + +static struct driver imx6sx_udoneo_driver = { + .name = "board-udoo-neo", + .probe = imx6sx_udoneo_probe, + .of_compatible = imx6sx_udoneo_of_match, +}; +postcore_platform_driver(imx6sx_udoneo_driver); diff --git a/arch/arm/boards/udoo-neo/lowlevel.c b/arch/arm/boards/udoo-neo/lowlevel.c index 83530fb190..e8712b0c72 100644 --- a/arch/arm/boards/udoo-neo/lowlevel.c +++ b/arch/arm/boards/udoo-neo/lowlevel.c @@ -1,12 +1,13 @@ // SPDX-License-Identifier: GPL-2.0-only #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/esdctl.h> +#include <mach/imx/esdctl.h> static inline void setup_uart(void) { diff --git a/arch/arm/boards/udoo/board.c b/arch/arm/boards/udoo/board.c index 36dd58cc98..f27e5a3c0b 100644 --- a/arch/arm/boards/udoo/board.c +++ b/arch/arm/boards/udoo/board.c @@ -7,25 +7,23 @@ #include <common.h> #include <init.h> #include <environment.h> -#include <mach/imx6-regs.h> +#include <mach/imx/imx6-regs.h> #include <gpio.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <linux/phy.h> #include <asm/io.h> #include <asm/mmu.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <linux/sizes.h> #include <net.h> #include <linux/micrel_phy.h> -#include <mach/imx6.h> -#include <mach/devices-imx6.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/imx6.h> +#include <mach/imx/iomux-mx6.h> #include <spi/spi.h> -#include <mach/spi.h> -#include <mach/usb.h> +#include <mach/imx/spi.h> +#include <mach/imx/usb.h> static iomux_v3_cfg_t udoo_enet_gpio_pads_1[] = { /* RGMII reset */ diff --git a/arch/arm/boards/udoo/flash-header-mx6-udoo.imxcfg b/arch/arm/boards/udoo/flash-header-mx6-udoo.imxcfg index 0d364bf8ce..95ba1ddc41 100644 --- a/arch/arm/boards/udoo/flash-header-mx6-udoo.imxcfg +++ b/arch/arm/boards/udoo/flash-header-mx6-udoo.imxcfg @@ -4,8 +4,8 @@ soc imx6 loadaddr 0x20000000 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> /* MX6_IOM_DRAM_SDQS0 -> MX6_IOM_DRAM_SDQS7 */ wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 diff --git a/arch/arm/boards/udoo/lowlevel.c b/arch/arm/boards/udoo/lowlevel.c index 0f9e2d69a4..2570239b96 100644 --- a/arch/arm/boards/udoo/lowlevel.c +++ b/arch/arm/boards/udoo/lowlevel.c @@ -2,7 +2,7 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/usb-a926x/defaultenv-usb-a926x/config b/arch/arm/boards/usb-a926x/defaultenv-usb-a926x/config index 49199ba391..f9159cb946 100644 --- a/arch/arm/boards/usb-a926x/defaultenv-usb-a926x/config +++ b/arch/arm/boards/usb-a926x/defaultenv-usb-a926x/config @@ -29,10 +29,6 @@ kernelimage=zImage #kernelimage=Image #kernelimage=Image.lzo -nand_device=atmel_nand -nand_parts="128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),128k(oftree),4M(kernel),120M(rootfs),-(data)" -rootfs_mtdblock_nand=6 - autoboot_timeout=3 bootargs="console=ttyS0,115200" diff --git a/arch/arm/boards/usb-a926x/init.c b/arch/arm/boards/usb-a926x/init.c index c39992c91b..1297b4fe7f 100644 --- a/arch/arm/boards/usb-a926x/init.c +++ b/arch/arm/boards/usb-a926x/init.c @@ -6,27 +6,26 @@ #include <init.h> #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <fs.h> #include <fcntl.h> #include <io.h> #include <envfs.h> -#include <mach/hardware.h> -#include <mach/at91sam926x.h> +#include <mach/at91/hardware.h> +#include <mach/at91/at91sam926x.h> #include <nand.h> #include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> #include <linux/clk.h> -#include <mach/board.h> -#include <mach/at91sam9_smc.h> -#include <mach/at91sam9_sdramc.h> +#include <mach/at91/board.h> +#include <mach/at91/at91sam9_smc.h> +#include <mach/at91/at91sam9_sdramc.h> #include <gpio.h> #include <led.h> -#include <mach/iomux.h> -#include <mach/at91_pmc.h> -#include <mach/at91_rstc.h> +#include <mach/at91/iomux.h> +#include <mach/at91/at91_pmc.h> +#include <mach/at91/at91_rstc.h> #include <gpio_keys.h> #include <readkey.h> #include <spi/spi.h> @@ -396,7 +395,7 @@ device_initcall(usb_a9260_devices_init); #ifndef CONFIG_CONSOLE_NONE static int usb_a9260_console_init(void) { - struct device_d *dev; + struct device *dev; if (machine_is_usb_a9260()) { barebox_set_model("Calao USB-A9260"); diff --git a/arch/arm/boards/usb-a926x/usb_a9260_lowlevel.c b/arch/arm/boards/usb-a926x/usb_a9260_lowlevel.c index 7f52f824df..66753669d6 100644 --- a/arch/arm/boards/usb-a926x/usb_a9260_lowlevel.c +++ b/arch/arm/boards/usb-a926x/usb_a9260_lowlevel.c @@ -7,14 +7,23 @@ #include <common.h> #include <init.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> -#include <mach/at91sam9_sdramc.h> -#include <mach/at91sam9260.h> -#include <mach/hardware.h> +AT91_ENTRY_FUNCTION(start_usb_a9260, r0, r1, r2) +{ + arm_cpu_lowlevel_init(); + + arm_setup_stack(AT91SAM9260_SRAM_BASE + AT91SAM9260_SRAM_SIZE); + + barebox_arm_entry(AT91_CHIPSELECT_1, + at91_get_sdram_size(IOMEM(AT91SAM9260_BASE_SDRAMC)), + NULL); +} -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_usb_a9g20, r0, r1, r2) { arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/usb-a926x/usb_a9263_bootstrap.c b/arch/arm/boards/usb-a926x/usb_a9263_bootstrap.c index f26f1eaecb..5739b0f2da 100644 --- a/arch/arm/boards/usb-a926x/usb_a9263_bootstrap.c +++ b/arch/arm/boards/usb-a926x/usb_a9263_bootstrap.c @@ -6,7 +6,7 @@ #include <common.h> #include <bootstrap.h> -#include <mach/bootstrap.h> +#include <mach/at91/bootstrap.h> #ifdef CONFIG_MTD_DATAFLASH void * bootstrap_board_read_dataflash(void) diff --git a/arch/arm/boards/usb-a926x/usb_a9263_lowlevel.c b/arch/arm/boards/usb-a926x/usb_a9263_lowlevel.c index 2ad88d7f22..eda534c68e 100644 --- a/arch/arm/boards/usb-a926x/usb_a9263_lowlevel.c +++ b/arch/arm/boards/usb-a926x/usb_a9263_lowlevel.c @@ -6,10 +6,9 @@ #include <linux/sizes.h> -#include <asm/barebox-arm.h> - -#include <mach/at91sam926x_board_init.h> -#include <mach/at91sam9263_matrix.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam926x_board_init.h> +#include <mach/at91/at91sam9263_matrix.h> #define MASTER_CLOCK 180 @@ -20,7 +19,7 @@ #endif #define MASTER_PLL_DIV 6 -static void __bare_init usb_a9263_board_config(struct at91sam926x_board_cfg *cfg) +static void __bare_init usb_a9263_board_config(struct at91sam926x_board_cfg *cfg, bool has_mem_128m) { /* Disable Watchdog */ cfg->wdt_mr = @@ -88,7 +87,7 @@ static void __bare_init usb_a9263_board_config(struct at91sam926x_board_cfg *cfg (5 << 24) | /* Active to Precharge Delay */ (8 << 28); /* Exit Self Refresh to Active Delay */ - if (IS_ENABLED(CONFIG_AT91_HAVE_SRAM_128M)) + if (has_mem_128m) cfg->sdrc_cr |= AT91_SDRAMC_NC_10; else cfg->sdrc_cr |= AT91_SDRAMC_NC_9; @@ -106,7 +105,7 @@ static void __bare_init usb_a9263_board_config(struct at91sam926x_board_cfg *cfg AT91_RSTC_RSTTYP_WATCHDOG; } -static void __bare_init usb_a9263_init(void) +static void __bare_init usb_a9263_init(bool has_mem_128m) { struct at91sam926x_board_cfg cfg; @@ -115,18 +114,27 @@ static void __bare_init usb_a9263_init(void) cfg.ebi_pio_is_peripha = true; cfg.matrix_csa = IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA); - usb_a9263_board_config(&cfg); + usb_a9263_board_config(&cfg, has_mem_128m); at91sam9263_board_init(&cfg); barebox_arm_entry(AT91_CHIPSELECT_1, at91_get_sdram_size(cfg.sdramc), NULL); } -void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +AT91_ENTRY_FUNCTION(start_usb_a9263, r0, r1, r2) +{ + arm_cpu_lowlevel_init(); + + arm_setup_stack(AT91SAM9263_SRAM0_BASE + AT91SAM9263_SRAM0_SIZE); + + usb_a9263_init(false); +} + +AT91_ENTRY_FUNCTION(start_usb_a9263_128m, r0, r1, r2) { arm_cpu_lowlevel_init(); arm_setup_stack(AT91SAM9263_SRAM0_BASE + AT91SAM9263_SRAM0_SIZE); - usb_a9263_init(); + usb_a9263_init(true); } diff --git a/arch/arm/boards/usi-topkick/lowlevel.c b/arch/arm/boards/usi-topkick/lowlevel.c index 0193deadbe..d9118f5d2c 100644 --- a/arch/arm/boards/usi-topkick/lowlevel.c +++ b/arch/arm/boards/usi-topkick/lowlevel.c @@ -4,12 +4,12 @@ #include <common.h> #include <linux/sizes.h> #include <asm/barebox-arm.h> -#include <asm/barebox-arm-head.h> -#include <mach/lowlevel.h> +#include <mach/mvebu/barebox-arm-head.h> +#include <mach/mvebu/lowlevel.h> extern char __dtb_kirkwood_topkick_bb_start[]; -ENTRY_FUNCTION(start_usi_topkick, r0, r1, r2) +ENTRY_FUNCTION_MVEBU(start_usi_topkick, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/Makefile b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/Makefile new file mode 100644 index 0000000000..35d8640087 --- /dev/null +++ b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +obj-y += board.o +lwl-y += lowlevel.o lpddr4-timing.o diff --git a/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/board.c b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/board.c new file mode 100644 index 0000000000..154931d534 --- /dev/null +++ b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/board.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Michael Kopfensteiner, VAHLE Automation GmbH + */ + +#include <asm/memory.h> +#include <bootsource.h> +#include <common.h> +#include <deep-probe.h> +#include <init.h> +#include <linux/phy.h> +#include <linux/sizes.h> +#include <mach/imx/bbu.h> +#include <mach/imx/iomux-mx8mp.h> +#include <gpio.h> +#include <envfs.h> + +#define PHY_ID_ADIN1300 0x0283bc30 +#define PHY_ID_MODEL_MASK 0xfffffff0 + +/* + * This fixup is necessary to properly configure the ADIN1300 + * PHY on the SOM to properly communicate using RGMII. + * This fixup disables the PHY's internal 2ns RGMII receive clock + * delay. Without this configuration change, the system will + * be able to send Ethernet packages, but the MAC won't receive + * any response packages. + * + * This fixup is specific to the ADIN1300 PHY. This implementation + * was ported from Variscite's U-Boot sources. + */ +static int phy_fixup_adin1300(struct phy_device *dev) { + int ret; + + pr_debug("BOARD: applying PHY fixup for ADIN1300\n"); + + ret = mdiobus_write(dev->bus, dev->addr, 0x0010, 0xFF23); + if (ret) { + pr_warn("ADIN1300 PHY fixup: failed to write EXT_REG_PTR\n"); + return ret; + } + + ret = mdiobus_write(dev->bus, dev->addr, 0x0011, 0x0E01); + if (ret) { + pr_warn("ADIN1300 PHY fixup: failed to write EXT_REG_DATA\n"); + return ret; + } + + return 0; +} + +static int var_imx8mp_dart_cb_probe(struct device *dev) +{ + int emmc_bbu_flag = 0; + int sd_bbu_flag = 0; + + phy_register_fixup_for_uid(PHY_ID_ADIN1300, PHY_ID_MODEL_MASK, phy_fixup_adin1300); + + if (bootsource_get() == BOOTSOURCE_MMC && bootsource_get_instance() == 1) { + of_device_enable_path("/chosen/environment-sd"); + sd_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } else { + of_device_enable_path("/chosen/environment-emmc"); + emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } + + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); + imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + + return 0; +} + +static const struct of_device_id var_imx8mp_dart_cb_of_match[] = { + { .compatible = "variscite,imx8mp-var-dart" }, + { /* Sentinel */ } +}; +BAREBOX_DEEP_PROBE_ENABLE(var_imx8mp_dart_cb_of_match); + +static struct driver var_imx8mp_dart_cb_board_driver = { + .name = "board-var-imx8mp-dart-cb", + .probe = var_imx8mp_dart_cb_probe, + .of_compatible = var_imx8mp_dart_cb_of_match, +}; +coredevice_platform_driver(var_imx8mp_dart_cb_board_driver); diff --git a/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/flash-header-imx8mp-dart.imxcfg b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/flash-header-imx8mp-dart.imxcfg new file mode 100644 index 0000000000..c3149a197f --- /dev/null +++ b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/flash-header-imx8mp-dart.imxcfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-only + +soc imx8mp + +loadaddr 0x918000 +max_load_size 0x3f000 +ivtofs 0x0 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lowlevel.c b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lowlevel.c new file mode 100644 index 0000000000..c9907ebf0a --- /dev/null +++ b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lowlevel.c @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <io.h> +#include <common.h> +#include <debug_ll.h> +#include <mach/imx/debug_ll.h> +#include <firmware.h> +#include <asm/mmu.h> +#include <asm/cache.h> +#include <asm/sections.h> +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> +#include <pbl/i2c.h> +#include <pbl/pmic.h> +#include <linux/sizes.h> +#include <mach/imx/atf.h> +#include <mach/imx/xload.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8mp-regs.h> +#include <mach/imx/iomux-mx8mp.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mfd/pca9450.h> +#include <soc/imx8m/ddr.h> +#include <soc/fsl/fsl_udc.h> + +extern char __dtb_z_imx8mp_var_dart_dt8mcustomboard_start[]; + +#define UART_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | MX8MP_PAD_CTL_FSEL) +#define I2C_PAD_CTRL MUX_PAD_CTRL(MX8MP_PAD_CTL_DSE6 | \ + MX8MP_PAD_CTL_HYS | \ + MX8MP_PAD_CTL_PUE | \ + MX8MP_PAD_CTL_PE) + +static void setup_uart(void) +{ + void __iomem *uart = IOMEM(MX8M_UART1_BASE_ADDR); + + imx8m_early_setup_uart_clock(); + + imx8mp_setup_pad(MX8MP_PAD_UART1_TXD__UART1_DCE_TX | UART_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_UART1_RXD__UART1_DCE_RX | UART_PAD_CTRL); + imx8m_uart_setup(uart); + + pbl_set_putc(imx_uart_putc, uart); + + putc_ll('>'); +} + +static struct pmic_config pca9450_cfg[] = { + /* BUCKxOUT_DVS0/1 control BUCK123 output */ + { PCA9450_BUCK123_DVS, 0x29 }, + /* + * increase VDD_SOC to typical value 0.95V before first + * DRAM access, set DVS1 to 0.85v for suspend. + * Enable DVS control through PMIC_STBY_REQ and + * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) + */ + { PCA9450_BUCK1OUT_DVS0, 0x1C }, + { PCA9450_BUCK1OUT_DVS1, 0x14 }, + { PCA9450_BUCK1CTRL, 0x59 }, + /* set WDOG_B_CFG to cold reset */ + { PCA9450_RESET_CTRL, 0xA1 }, +}; + +static void power_init_board(void) +{ + struct pbl_i2c *i2c; + + imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL); + imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL); + + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); + + i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR)); + + pmic_configure(i2c, 0x25, pca9450_cfg, ARRAY_SIZE(pca9450_cfg)); +} + +extern struct dram_timing_info var_dart_imx8mp_dram_timing; + +static void start_atf(void) +{ + /* + * If we are in EL3 we are running for the first time and need to + * initialize the DRAM and run TF-A (BL31). The TF-A will then jump + * to DRAM in EL2. + */ + if (current_el() != 3) + return; + + imx8mm_early_clock_init(); + + power_init_board(); + + imx8mp_ddr_init(&var_dart_imx8mp_dram_timing, DRAM_TYPE_LPDDR4); + + imx8mp_load_and_start_image_via_tfa(); +} + +static __noreturn noinline void variscite_imx8mp_dart_cb_start(void) +{ + setup_uart(); + start_atf(); + + /* + * Standard entry we hit once we initialized both DDR and ATF + */ + imx8mp_barebox_entry(__dtb_z_imx8mp_var_dart_dt8mcustomboard_start); +} + +/* + * Power-on execution flow of nxp_imx8mp_vardart_start() might not be + * obvious for a very first read, so here's, hopefully helpful, + * summary: + * + * 1. MaskROM uploads PBL into OCRAM and that's where this function is + * executed for the first time. At entry the exception level is EL3. + * + * 2. DDR is initialized and the image is loaded from storage into DRAM. The PBL + * part is copied from OCRAM to the TF-A return address in DRAM. + * + * 3. TF-A is executed and exits into the PBL code in DRAM. TF-A has taken us + * from EL3 to EL2. + * + * 4. Standard barebox boot flow continues + */ +ENTRY_FUNCTION(start_variscite_imx8mp_dart, r0, r1, r2) +{ + imx8mp_cpu_lowlevel_init(); + relocate_to_current_adr(); + setup_c(); + + variscite_imx8mp_dart_cb_start(); +} diff --git a/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lpddr4-timing.c b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lpddr4-timing.c new file mode 100644 index 0000000000..b85935ca05 --- /dev/null +++ b/arch/arm/boards/variscite-dt8mcustomboard-imx8mp/lpddr4-timing.c @@ -0,0 +1,1128 @@ +/* + * Copyright 2019 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Generated code from MX8M_DDR_tool + * + * Align with uboot version: + * imx_v2019.04_5.4.x and above version + * + * These sources have been migrated from Variscite's public U-Boot sources for + * the i.MX8MP DART CustomBoard (= DT8MCustomBoard) eval kit. Solely this + * comment and the header-includes have been adapted. + */ + +#include <common.h> +#include <soc/imx8m/ddr.h> +#include <soc/imx8m/lpddr4_define.h> + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x3d400304, 0x1 }, + { 0x3d400030, 0x1 }, + { 0x3d400000, 0xa3080020 }, + { 0x3d400020, 0x1323 }, + { 0x3d400024, 0x1e84800 }, + { 0x3d400064, 0x7a0118 }, + { 0x3d400070, 0x61027f10 }, + { 0x3d400074, 0x7b0 }, + { 0x3d4000d0, 0xc00307a3 }, + { 0x3d4000d4, 0xc50000 }, + { 0x3d4000dc, 0xf4003f }, + { 0x3d4000e0, 0x330000 }, + { 0x3d4000e8, 0x660048 }, + { 0x3d4000ec, 0x160048 }, + { 0x3d400100, 0x2028222a }, + { 0x3d400104, 0x8083f }, + { 0x3d40010c, 0xe0e000 }, + { 0x3d400110, 0x12040a12 }, + { 0x3d400114, 0x2050f0f }, + { 0x3d400118, 0x1010009 }, + { 0x3d40011c, 0x501 }, + { 0x3d400130, 0x20800 }, + { 0x3d400134, 0xe100002 }, + { 0x3d400138, 0x120 }, + { 0x3d400144, 0xc80064 }, + { 0x3d400180, 0x3e8001e }, + { 0x3d400184, 0x3207a12 }, + { 0x3d400188, 0x0 }, + { 0x3d400190, 0x49f820e }, + { 0x3d400194, 0x80303 }, + { 0x3d4001b4, 0x1f0e }, + { 0x3d4001a0, 0xe0400018 }, + { 0x3d4001a4, 0xdf00e4 }, + { 0x3d4001a8, 0x80000000 }, + { 0x3d4001b0, 0x11 }, + { 0x3d4001c0, 0x1 }, + { 0x3d4001c4, 0x1 }, + { 0x3d4000f4, 0xc99 }, + { 0x3d400108, 0x9121c1c }, + { 0x3d400200, 0x17 }, + { 0x3d40020c, 0x0 }, + { 0x3d400210, 0x1f1f }, + { 0x3d400204, 0x80808 }, + { 0x3d400214, 0x7070707 }, + { 0x3d400218, 0x7070707 }, + { 0x3d40021c, 0xf0f }, + { 0x3d400250, 0x1705 }, + { 0x3d400254, 0x2c }, + { 0x3d40025c, 0x4000030 }, + { 0x3d400264, 0x900093e7 }, + { 0x3d40026c, 0x2005574 }, + { 0x3d400400, 0x111 }, + { 0x3d400404, 0x72ff }, + { 0x3d400408, 0x72ff }, + { 0x3d400494, 0x2100e07 }, + { 0x3d400498, 0x620096 }, + { 0x3d40049c, 0x1100e07 }, + { 0x3d4004a0, 0xc8012c }, + { 0x3d402020, 0x1021 }, + { 0x3d402024, 0x30d400 }, + { 0x3d402050, 0x20d000 }, + { 0x3d402064, 0xc001c }, + { 0x3d4020dc, 0x840000 }, + { 0x3d4020e0, 0x330000 }, + { 0x3d4020e8, 0x660048 }, + { 0x3d4020ec, 0x160048 }, + { 0x3d402100, 0xa040305 }, + { 0x3d402104, 0x30407 }, + { 0x3d402108, 0x203060b }, + { 0x3d40210c, 0x505000 }, + { 0x3d402110, 0x2040202 }, + { 0x3d402114, 0x2030202 }, + { 0x3d402118, 0x1010004 }, + { 0x3d40211c, 0x301 }, + { 0x3d402130, 0x20300 }, + { 0x3d402134, 0xa100002 }, + { 0x3d402138, 0x1d }, + { 0x3d402144, 0x14000a }, + { 0x3d402180, 0x640004 }, + { 0x3d402190, 0x3818200 }, + { 0x3d402194, 0x80303 }, + { 0x3d4021b4, 0x100 }, + { 0x3d4020f4, 0xc99 }, + { 0x3d403020, 0x1021 }, + { 0x3d403024, 0xc3500 }, + { 0x3d403050, 0x20d000 }, + { 0x3d403064, 0x30007 }, + { 0x3d4030dc, 0x840000 }, + { 0x3d4030e0, 0x330000 }, + { 0x3d4030e8, 0x660048 }, + { 0x3d4030ec, 0x160048 }, + { 0x3d403100, 0xa010102 }, + { 0x3d403104, 0x30404 }, + { 0x3d403108, 0x203060b }, + { 0x3d40310c, 0x505000 }, + { 0x3d403110, 0x2040202 }, + { 0x3d403114, 0x2030202 }, + { 0x3d403118, 0x1010004 }, + { 0x3d40311c, 0x301 }, + { 0x3d403130, 0x20300 }, + { 0x3d403134, 0xa100002 }, + { 0x3d403138, 0x8 }, + { 0x3d403144, 0x50003 }, + { 0x3d403180, 0x190004 }, + { 0x3d403190, 0x3818200 }, + { 0x3d403194, 0x80303 }, + { 0x3d4031b4, 0x100 }, + { 0x3d4030f4, 0xc99 }, + { 0x3d400028, 0x0 }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + { 0x100a0, 0x0 }, + { 0x100a1, 0x1 }, + { 0x100a2, 0x2 }, + { 0x100a3, 0x3 }, + { 0x100a4, 0x4 }, + { 0x100a5, 0x5 }, + { 0x100a6, 0x6 }, + { 0x100a7, 0x7 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x1 }, + { 0x110a2, 0x3 }, + { 0x110a3, 0x4 }, + { 0x110a4, 0x5 }, + { 0x110a5, 0x2 }, + { 0x110a6, 0x7 }, + { 0x110a7, 0x6 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x1 }, + { 0x120a2, 0x3 }, + { 0x120a3, 0x2 }, + { 0x120a4, 0x5 }, + { 0x120a5, 0x4 }, + { 0x120a6, 0x7 }, + { 0x120a7, 0x6 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x1 }, + { 0x130a2, 0x2 }, + { 0x130a3, 0x3 }, + { 0x130a4, 0x4 }, + { 0x130a5, 0x5 }, + { 0x130a6, 0x6 }, + { 0x130a7, 0x7 }, + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + { 0x11005f, 0x1ff }, + { 0x11015f, 0x1ff }, + { 0x11105f, 0x1ff }, + { 0x11115f, 0x1ff }, + { 0x11205f, 0x1ff }, + { 0x11215f, 0x1ff }, + { 0x11305f, 0x1ff }, + { 0x11315f, 0x1ff }, + { 0x21005f, 0x1ff }, + { 0x21015f, 0x1ff }, + { 0x21105f, 0x1ff }, + { 0x21115f, 0x1ff }, + { 0x21205f, 0x1ff }, + { 0x21215f, 0x1ff }, + { 0x21305f, 0x1ff }, + { 0x21315f, 0x1ff }, + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + { 0x200c5, 0x18 }, + { 0x1200c5, 0x7 }, + { 0x2200c5, 0x7 }, + { 0x2002e, 0x2 }, + { 0x12002e, 0x2 }, + { 0x22002e, 0x2 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x20024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x120024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x220024, 0x1e3 }, + { 0x2003a, 0x2 }, + { 0x20056, 0x3 }, + { 0x120056, 0x3 }, + { 0x220056, 0x3 }, + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x1204d, 0xe00 }, + { 0x1214d, 0xe00 }, + { 0x1304d, 0xe00 }, + { 0x1314d, 0xe00 }, + { 0x11004d, 0xe00 }, + { 0x11014d, 0xe00 }, + { 0x11104d, 0xe00 }, + { 0x11114d, 0xe00 }, + { 0x11204d, 0xe00 }, + { 0x11214d, 0xe00 }, + { 0x11304d, 0xe00 }, + { 0x11314d, 0xe00 }, + { 0x21004d, 0xe00 }, + { 0x21014d, 0xe00 }, + { 0x21104d, 0xe00 }, + { 0x21114d, 0xe00 }, + { 0x21204d, 0xe00 }, + { 0x21214d, 0xe00 }, + { 0x21304d, 0xe00 }, + { 0x21314d, 0xe00 }, + { 0x10049, 0xeba }, + { 0x10149, 0xeba }, + { 0x11049, 0xeba }, + { 0x11149, 0xeba }, + { 0x12049, 0xeba }, + { 0x12149, 0xeba }, + { 0x13049, 0xeba }, + { 0x13149, 0xeba }, + { 0x110049, 0xeba }, + { 0x110149, 0xeba }, + { 0x111049, 0xeba }, + { 0x111149, 0xeba }, + { 0x112049, 0xeba }, + { 0x112149, 0xeba }, + { 0x113049, 0xeba }, + { 0x113149, 0xeba }, + { 0x210049, 0xeba }, + { 0x210149, 0xeba }, + { 0x211049, 0xeba }, + { 0x211149, 0xeba }, + { 0x212049, 0xeba }, + { 0x212149, 0xeba }, + { 0x213049, 0xeba }, + { 0x213149, 0xeba }, + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x3e8 }, + { 0x120008, 0x64 }, + { 0x220008, 0x19 }, + { 0x20088, 0x9 }, + { 0x200b2, 0x104 }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + { 0x1200b2, 0x104 }, + { 0x110043, 0x5a1 }, + { 0x110143, 0x5a1 }, + { 0x111043, 0x5a1 }, + { 0x111143, 0x5a1 }, + { 0x112043, 0x5a1 }, + { 0x112143, 0x5a1 }, + { 0x113043, 0x5a1 }, + { 0x113143, 0x5a1 }, + { 0x2200b2, 0x104 }, + { 0x210043, 0x5a1 }, + { 0x210143, 0x5a1 }, + { 0x211043, 0x5a1 }, + { 0x211143, 0x5a1 }, + { 0x212043, 0x5a1 }, + { 0x212143, 0x5a1 }, + { 0x213043, 0x5a1 }, + { 0x213143, 0x5a1 }, + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + { 0x20019, 0x1 }, + { 0x120019, 0x1 }, + { 0x220019, 0x1 }, + { 0x200f0, 0x660 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5665 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + { 0x20025, 0x0 }, + { 0x2002d, 0x0 }, + { 0x12002d, 0x0 }, + { 0x22002d, 0x0 }, + { 0x2007d, 0x212 }, + { 0x12007d, 0x212 }, + { 0x22007d, 0x212 }, + { 0x2007c, 0x61 }, + { 0x12007c, 0x61 }, + { 0x22007c, 0x61 }, + { 0x1004a, 0x500 }, + { 0x1104a, 0x500 }, + { 0x1204a, 0x500 }, + { 0x1304a, 0x500 }, + { 0x2002c, 0x0 }, +}; + +/* P0 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x333f }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x333f }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* P1 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp1_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* P2 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp2_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54012, 0x310 }, + { 0x54019, 0x84 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x84 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0x8400 }, + { 0x54033, 0x3300 }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0x8400 }, + { 0x54039, 0x3300 }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* P0 2D message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54003, 0xfa0 }, + { 0x54004, 0x2 }, + { 0x54005, 0x2228 }, + { 0x54006, 0x14 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400b, 0x2 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54012, 0x310 }, + { 0x54019, 0x3ff4 }, + { 0x5401a, 0x33 }, + { 0x5401b, 0x4866 }, + { 0x5401c, 0x4800 }, + { 0x5401e, 0x16 }, + { 0x5401f, 0x3ff4 }, + { 0x54020, 0x33 }, + { 0x54021, 0x4866 }, + { 0x54022, 0x4800 }, + { 0x54024, 0x16 }, + { 0x5402b, 0x1000 }, + { 0x5402c, 0x3 }, + { 0x54032, 0xf400 }, + { 0x54033, 0x333f }, + { 0x54034, 0x6600 }, + { 0x54035, 0x48 }, + { 0x54036, 0x48 }, + { 0x54037, 0x1600 }, + { 0x54038, 0xf400 }, + { 0x54039, 0x333f }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x48 }, + { 0x5403c, 0x48 }, + { 0x5403d, 0x1600 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xb }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x633 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x633 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x633 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x633 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x633 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x633 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x633 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x633 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x633 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x633 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x633 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x633 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x633 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xb }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x1 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x625 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x625 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a4, 0x0 }, + { 0x900a5, 0x790 }, + { 0x900a6, 0x11a }, + { 0x900a7, 0x8 }, + { 0x900a8, 0x7aa }, + { 0x900a9, 0x2a }, + { 0x900aa, 0x10 }, + { 0x900ab, 0x7b2 }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x0 }, + { 0x900ae, 0x7c8 }, + { 0x900af, 0x109 }, + { 0x900b0, 0x10 }, + { 0x900b1, 0x10 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x1 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xd }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x8 }, + { 0x90159, 0xe8 }, + { 0x9015a, 0x109 }, + { 0x9015b, 0x0 }, + { 0x9015c, 0x8140 }, + { 0x9015d, 0x10c }, + { 0x9015e, 0x10 }, + { 0x9015f, 0x8138 }, + { 0x90160, 0x104 }, + { 0x90161, 0x8 }, + { 0x90162, 0x448 }, + { 0x90163, 0x109 }, + { 0x90164, 0xf }, + { 0x90165, 0x7c0 }, + { 0x90166, 0x109 }, + { 0x90167, 0x0 }, + { 0x90168, 0xe8 }, + { 0x90169, 0x109 }, + { 0x9016a, 0x47 }, + { 0x9016b, 0x630 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0x8 }, + { 0x9016e, 0x618 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x8 }, + { 0x90171, 0xe0 }, + { 0x90172, 0x109 }, + { 0x90173, 0x0 }, + { 0x90174, 0x7c8 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x8140 }, + { 0x90178, 0x10c }, + { 0x90179, 0x0 }, + { 0x9017a, 0x478 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x1 }, + { 0x9017e, 0x8 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x4 }, + { 0x90181, 0x0 }, + { 0x90006, 0x8 }, + { 0x90007, 0x7c8 }, + { 0x90008, 0x109 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x400 }, + { 0x9000b, 0x106 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x29 }, + { 0x90026, 0x68 }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x200be, 0x3 }, + { 0x2000b, 0x7d }, + { 0x2000c, 0xfa }, + { 0x2000d, 0x9c4 }, + { 0x2000e, 0x2c }, + { 0x12000b, 0xc }, + { 0x12000c, 0x19 }, + { 0x12000d, 0xfa }, + { 0x12000e, 0x10 }, + { 0x22000b, 0x3 }, + { 0x22000c, 0x6 }, + { 0x22000d, 0x3e }, + { 0x22000e, 0x10 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x2060 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x140080, 0xe0 }, + { 0x140081, 0x12 }, + { 0x140082, 0xe0 }, + { 0x140083, 0x12 }, + { 0x140084, 0xe0 }, + { 0x140085, 0x12 }, + { 0x240080, 0xe0 }, + { 0x240081, 0x12 }, + { 0x240082, 0xe0 }, + { 0x240083, 0x12 }, + { 0x240084, 0xe0 }, + { 0x240085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x20089, 0x1 }, + { 0x20088, 0x19 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 4000mts 1D */ + .drate = 4000, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 4000mts 2D */ + .drate = 4000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info var_dart_imx8mp_dram_timing = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 4000, 400, 100, }, +}; diff --git a/arch/arm/boards/variscite-mx6/board.c b/arch/arm/boards/variscite-mx6/board.c index 99cd15b1c0..9eb3202528 100644 --- a/arch/arm/boards/variscite-mx6/board.c +++ b/arch/arm/boards/variscite-mx6/board.c @@ -16,17 +16,15 @@ #include <environment.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <partition.h> +#include <asm/mach-types.h> #include <asm/io.h> #include <asm/mmu.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <linux/sizes.h> -#include <mach/imx6.h> -#include <mach/devices-imx6.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/imx6.h> +#include <mach/imx/iomux-mx6.h> #include <spi/spi.h> -#include <mach/spi.h> +#include <mach/imx/spi.h> #include <i2c/i2c.h> #define ETH_PHY_RST IMX_GPIO_NR(1, 25) diff --git a/arch/arm/boards/variscite-mx6/flash-header-variscite.imxcfg b/arch/arm/boards/variscite-mx6/flash-header-variscite.imxcfg index b0a31a0b96..34790120ac 100644 --- a/arch/arm/boards/variscite-mx6/flash-header-variscite.imxcfg +++ b/arch/arm/boards/variscite-mx6/flash-header-variscite.imxcfg @@ -4,8 +4,8 @@ loadaddr 0x10000000 soc imx6 ivtofs 0x400 -#include <mach/imx6-ddr-regs.h> -#include <mach/imx6q-ddr-regs.h> +#include <mach/imx/imx6-ddr-regs.h> +#include <mach/imx/imx6q-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000C0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/arch/arm/boards/variscite-mx6/lowlevel.c b/arch/arm/boards/variscite-mx6/lowlevel.c index 99455b2a45..d0842b1579 100644 --- a/arch/arm/boards/variscite-mx6/lowlevel.c +++ b/arch/arm/boards/variscite-mx6/lowlevel.c @@ -6,6 +6,7 @@ */ #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> #include <linux/sizes.h> #include <io.h> @@ -14,7 +15,7 @@ #include <asm/sections.h> #include <asm/cache.h> #include <asm/mmu.h> -#include <mach/imx6.h> +#include <mach/imx/imx6.h> static inline void setup_uart(void) { diff --git a/arch/arm/boards/variscite-som-mx7/Makefile b/arch/arm/boards/variscite-som-mx7/Makefile new file mode 100644 index 0000000000..5b7f460c6d --- /dev/null +++ b/arch/arm/boards/variscite-som-mx7/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only +# SPDX-FileCopyrightText: 2022 Roland Hieber, Pengutronix <rhi@pengutronix.de> +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/variscite-som-mx7/board.c b/arch/arm/boards/variscite-som-mx7/board.c new file mode 100644 index 0000000000..005228d107 --- /dev/null +++ b/arch/arm/boards/variscite-som-mx7/board.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2022 Roland Hieber, Pengutronix <rhi@pengutronix.de> + +#include <common.h> +#include <deep-probe.h> +#include <mach/imx/bbu.h> + +static int var_som_mx7_probe(struct device_d *dev) +{ + imx7_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", BBU_HANDLER_FLAG_DEFAULT); + return 0; +} + +static const struct of_device_id var_som_mx7_of_match[] = { + { .compatible = "variscite,var-som-mx7" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(var_som_mx7_of_match); + +static struct driver_d var_som_mx7_board_driver = { + .name = "board-var-som-mx7", + .probe = var_som_mx7_probe, + .of_compatible = DRV_OF_COMPAT(var_som_mx7_of_match), +}; +postcore_platform_driver(var_som_mx7_board_driver); diff --git a/arch/arm/boards/variscite-som-mx7/flash-header.imxcfg b/arch/arm/boards/variscite-som-mx7/flash-header.imxcfg new file mode 100644 index 0000000000..a8ed640cb2 --- /dev/null +++ b/arch/arm/boards/variscite-som-mx7/flash-header.imxcfg @@ -0,0 +1,100 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * SPDX-FileCopyrightText: 2014-2016 Freescale Semiconductor, Inc. + * SPDX-FileCopyrightText: 2016 Variscite Ltd. + * SPDX-FileCopyrightText: 2022 Gossen Metrawatt GmbH + * SPDX-FileCopyrightText: 2022 Roland Hieber, Pengutronix <rhi@pengutronix.de> + */ + +soc imx7 +loadaddr 0x80000000 +ivtofs 0x400 + +#include <mach/imx/imx7-ddr-regs.h> + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Change DDR freq. to 400Mhz */ +wm 32 0x30360070 0x00703021 +wm 32 0x30360090 0x00000000 +wm 32 0x30360070 0x00603021 +check 32 until_all_bits_set 0x30360070 0x80000000 +wm 32 0x30389880 0x00000001 + + +wm 32 0x30340004 0x4F400005 /* Enable OCRAM EPDC */ +/* Clear then set bit30 to ensure exit from DDR retention */ +wm 32 0x30360388 0x40000000 +wm 32 0x30360384 0x40000000 + +wm 32 0x30391000 0x00000002 /* deassert presetn */ + +/* ddrc */ +wm 32 0x307a0000 0x01040001 /* mstr */ +wm 32 0x307a01a0 0x80400003 /* dfiupd0 */ +wm 32 0x307a01a4 0x00100020 /* dfiupd1 */ +wm 32 0x307a01a8 0x80100004 /* dfiupd2 */ +wm 32 0x307a0064 0x00400046 /* rfshtmg */ +wm 32 0x307a0490 0x00000001 /* pctrl_0 */ +wm 32 0x307a00d0 0x00020083 /* init0 */ +wm 32 0x307a00d4 0x00690000 /* init1 */ +wm 32 0x307a00dc 0x09300004 /* init3 */ +wm 32 0x307a00e0 0x04080000 /* init4 */ +wm 32 0x307a00e4 0x00100004 /* init5 */ +wm 32 0x307a00f4 0x0000033f /* rankctl */ +wm 32 0x307a0100 0x09081109 /* dramtmg0 */ +wm 32 0x307a0104 0x0007020d /* dramtmg1 */ +wm 32 0x307a0108 0x03040407 /* dramtmg2 */ +wm 32 0x307a010c 0x00002006 /* dramtmg3 */ +wm 32 0x307a0110 0x04020205 /* dramtmg4 */ +wm 32 0x307a0114 0x03030202 /* dramtmg5 */ +wm 32 0x307a0120 0x00000803 /* dramtmg8 */ +wm 32 0x307a0180 0x00800020 /* zqctl0 */ +wm 32 0x307a0190 0x02098204 /* dfitmg0 */ +wm 32 0x307a0194 0x00030303 /* dfitmg1 */ +wm 32 0x307a0200 0x00000016 /* addrmap0 */ +wm 32 0x307a0204 0x00080808 /* addrmap1 */ +wm 32 0x307a0210 0x00000f0f /* addrmap4 */ +wm 32 0x307a0214 0x07070707 /* addrmap5 */ +wm 32 0x307a0218 0x0F070707 /* addrmap6 */ +wm 32 0x307a0240 0x06000604 /* odtcfg */ +wm 32 0x307a0244 0x00000001 /* odtmap */ + +wm 32 0x30391000 0x00000000 /* deassert presetn */ + +/* ddr_phy */ +wm 32 0x30790000 0x17420f40 /* phy_con0 */ +wm 32 0x30790004 0x10210100 /* phy_con1 */ +wm 32 0x30790010 0x00060807 /* phy_con4 */ +wm 32 0x307900b0 0x1010007e /* mdll_con0 */ +wm 32 0x3079009c 0x00000d6e /* drvds_con0 */ +wm 32 0x30790020 0x08080808 /* offset_rd_con0 */ +wm 32 0x30790030 0x08080808 /* offset_wr_con0 */ +wm 32 0x30790050 0x01000010 /* cmd_sdll_con0 (OFFSETD_CON0) */ +wm 32 0x30790050 0x00000010 /* cmd_sdll_con0 (OFFSETD_CON0) */ +wm 32 0x307900c0 0x0e407304 /* zq_con0 */ +wm 32 0x307900c0 0x0e447304 /* zq_con0 */ +wm 32 0x307900c0 0x0e447306 /* zq_con0 */ + +check 32 until_all_bits_set 0x307900c4 0x1 + +wm 32 0x307900c0 0x0e447304 /* zq_con0 */ +wm 32 0x307900c0 0x0e407304 /* zq_con0 */ + + +wm 32 0x30384130 0x00000000 /* Disable Clock */ +wm 32 0x30340020 0x00000178 /* IOMUX_GRP_GRP8 - Start input to PHY */ +wm 32 0x30384130 0x00000002 /* Enable Clock */ +wm 32 0x30790018 0x0000000f /* ddr_phy lp_con0 */ + +check 32 until_all_bits_set 0x307a0004 0x1 diff --git a/arch/arm/boards/variscite-som-mx7/lowlevel.c b/arch/arm/boards/variscite-som-mx7/lowlevel.c new file mode 100644 index 0000000000..ef67fc3b5a --- /dev/null +++ b/arch/arm/boards/variscite-som-mx7/lowlevel.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2022 Roland Hieber, Pengutronix <rhi@pengutronix.de> + +#include <io.h> +#include <common.h> +#include <console.h> +#include <debug_ll.h> + +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> + +#include <linux/sizes.h> + +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/iomux-mx7.h> +#include <mach/imx/imx7-ccm-regs.h> + +static inline void setup_uart(void) +{ + imx7_early_setup_uart_clock(1); + + imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX); + + imx7_uart_setup_ll(); + + putc_ll('>'); +} + +ENTRY_FUNCTION_WITHSTACK(start_gome_e143_01, 0, r0, r1, r2) +{ + extern char __dtb_imx7d_gome_e143_01_start[]; + + imx7_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + relocate_to_current_adr(); + setup_c(); + + imx7d_barebox_entry(__dtb_imx7d_gome_e143_01_start + get_runtime_offset()); +} diff --git a/arch/arm/boards/versatile/env/init/mtdparts-nor b/arch/arm/boards/versatile/env/init/mtdparts-nor deleted file mode 100644 index 20c2b994cc..0000000000 --- a/arch/arm/boards/versatile/env/init/mtdparts-nor +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh - -mtdparts="512k(nor0.barebox)ro,512k(nor0.bareboxenv),4864k(nor0.kernel),256k(nor0.dtb),3M(nor0.update),-(nor0.root)" -kernelname="physmap-flash.0" - -mtdparts-add -d nor0 -k ${kernelname} -p ${mtdparts} diff --git a/arch/arm/boards/versatile/lowlevel.c b/arch/arm/boards/versatile/lowlevel.c index 2f8d7b514b..04209dc12c 100644 --- a/arch/arm/boards/versatile/lowlevel.c +++ b/arch/arm/boards/versatile/lowlevel.c @@ -7,7 +7,7 @@ extern char __dtb_versatile_pb_start[]; -void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +ENTRY_FUNCTION(start_versatile_pb, r0, r1, r2) { void *fdt; diff --git a/arch/arm/boards/versatile/versatilepb.c b/arch/arm/boards/versatile/versatilepb.c index ac6ea9951a..610aa90982 100644 --- a/arch/arm/boards/versatile/versatilepb.c +++ b/arch/arm/boards/versatile/versatilepb.c @@ -13,11 +13,9 @@ #include <init.h> #include <asm/armlinux.h> #include <asm/system_info.h> -#include <generated/mach-types.h> -#include <mach/init.h> -#include <mach/platform.h> +#include <asm/mach-types.h> +#include <mach/versatile/platform.h> #include <environment.h> -#include <partition.h> #include <linux/sizes.h> #include <platform_data/eth-smc91111.h> @@ -26,6 +24,10 @@ static int vpb_console_init(void) char *hostname = "versatilepb-unknown"; char *model = "ARM Versatile PB"; + if (!of_machine_is_compatible("arm,versatile-pb") && + !of_machine_is_compatible("arm,versatile-ab")) + return 0; + if (cpu_is_arm926()) { hostname = "versatilepb-arm926"; model = "ARM Versatile PB (arm926)"; @@ -34,29 +36,10 @@ static int vpb_console_init(void) model = "ARM Versatile PB (arm1176)"; } + armlinux_set_architecture(MACH_TYPE_VERSATILE_PB); barebox_set_hostname(hostname); barebox_set_model(model); - versatile_register_uart(0); return 0; } console_initcall(vpb_console_init); - -static struct smc91c111_pdata net_pdata = { - .qemu_fixup = 1, -}; - -static int vpb_devices_init(void) -{ - add_cfi_flash_device(DEVICE_ID_DYNAMIC, VERSATILE_FLASH_BASE, VERSATILE_FLASH_SIZE, 0); - devfs_add_partition("nor0", 0x00000, SZ_512K, DEVFS_PARTITION_FIXED, "self"); - devfs_add_partition("nor0", SZ_512K, SZ_512K, DEVFS_PARTITION_FIXED, "env0"); - - add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, VERSATILE_ETH_BASE, - 64 * 1024, IORESOURCE_MEM, &net_pdata); - - armlinux_set_architecture(MACH_TYPE_VERSATILE_PB); - - return 0; -} -device_initcall(vpb_devices_init); diff --git a/arch/arm/boards/vexpress/init.c b/arch/arm/boards/vexpress/init.c index 6ba23bbb62..f2a1307e45 100644 --- a/arch/arm/boards/vexpress/init.c +++ b/arch/arm/boards/vexpress/init.c @@ -8,8 +8,8 @@ #include <init.h> #include <asm/armlinux.h> #include <asm/system_info.h> -#include <generated/mach-types.h> -#include <mach/devices.h> +#include <asm/mach-types.h> +#include <mach/vexpress/devices.h> #include <environment.h> #include <linux/sizes.h> #include <io.h> @@ -42,7 +42,7 @@ static int of_fixup_virtio_mmio(struct device_node *root, void *unused) return 0; } -static int vexpress_probe(struct device_d *dev) +static int vexpress_probe(struct device *dev) { char *hostname = "vexpress-unknown"; int ret = 0; @@ -77,8 +77,9 @@ static const struct of_device_id vexpress_of_match[] = { { .compatible = "arm,vexpress" }, { /* Sentinel */}, }; +MODULE_DEVICE_TABLE(of, vexpress_of_match); -static struct driver_d vexpress_board_driver = { +static struct driver vexpress_board_driver = { .name = "board-vexpress", .probe = vexpress_probe, .of_compatible = vexpress_of_match, diff --git a/arch/arm/boards/vscom-baltos/board.c b/arch/arm/boards/vscom-baltos/board.c index b9ce356264..85cf241574 100644 --- a/arch/arm/boards/vscom-baltos/board.c +++ b/arch/arm/boards/vscom-baltos/board.c @@ -17,14 +17,14 @@ #include <net.h> #include <bootsource.h> #include <asm/armlinux.h> -#include <generated/mach-types.h> -#include <mach/am33xx-generic.h> -#include <mach/am33xx-silicon.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/gpmc.h> +#include <asm/mach-types.h> +#include <mach/omap/am33xx-generic.h> +#include <mach/omap/am33xx-silicon.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/gpmc.h> #include <linux/err.h> -#include <mach/bbu.h> +#include <mach/omap/bbu.h> #include <libfile.h> #include <gpio.h> diff --git a/arch/arm/boards/vscom-baltos/lowlevel.c b/arch/arm/boards/vscom-baltos/lowlevel.c index 2fa8a0fdc3..aee0cde651 100644 --- a/arch/arm/boards/vscom-baltos/lowlevel.c +++ b/arch/arm/boards/vscom-baltos/lowlevel.c @@ -6,16 +6,17 @@ #include <io.h> #include <linux/string.h> #include <debug_ll.h> +#include <mach/omap/debug_ll.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/am33xx-silicon.h> -#include <mach/am33xx-clock.h> -#include <mach/generic.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/am33xx-mux.h> -#include <mach/am33xx-generic.h> +#include <mach/omap/am33xx-silicon.h> +#include <mach/omap/am33xx-clock.h> +#include <mach/omap/generic.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/am33xx-mux.h> +#include <mach/omap/am33xx-generic.h> static const struct am33xx_ddr_data ddr3_data = { .rd_slave_ratio0 = 0x38, @@ -97,7 +98,7 @@ static noinline void baltos_sram_init(void) am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE); am33xx_enable_uart0_pin_mux(); - omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE); + omap_debug_ll_init(); putc_ll('>'); am335x_barebox_entry(fdt); diff --git a/arch/arm/boards/wago-pfc-am35xx/board-mlo.c b/arch/arm/boards/wago-pfc-am35xx/board-mlo.c index c940565b4a..c5ccdf7faf 100644 --- a/arch/arm/boards/wago-pfc-am35xx/board-mlo.c +++ b/arch/arm/boards/wago-pfc-am35xx/board-mlo.c @@ -8,12 +8,12 @@ #include <init.h> #include <io.h> #include <linux/sizes.h> -#include <mach/omap3-silicon.h> -#include <mach/gpmc.h> -#include <mach/gpmc_nand.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/gpmc.h> +#include <mach/omap/gpmc_nand.h> #include <errno.h> -#include <mach/omap3-devices.h> -#include <mach/generic.h> +#include <mach/omap/omap3-devices.h> +#include <mach/omap/generic.h> /* map first four erase blocks */ static struct omap_barebox_part pfc200_mlo_part = { diff --git a/arch/arm/boards/wago-pfc-am35xx/board.c b/arch/arm/boards/wago-pfc-am35xx/board.c index c0a039ba50..091e606e21 100644 --- a/arch/arm/boards/wago-pfc-am35xx/board.c +++ b/arch/arm/boards/wago-pfc-am35xx/board.c @@ -14,7 +14,7 @@ #include <linux/phy.h> #include <linux/micrel_phy.h> #include <asm/memory.h> -#include <mach/generic.h> +#include <mach/omap/generic.h> static int pfc200_mem_init(void) { diff --git a/arch/arm/boards/wago-pfc-am35xx/lowlevel.c b/arch/arm/boards/wago-pfc-am35xx/lowlevel.c index 9018bedf22..5429065c2d 100644 --- a/arch/arm/boards/wago-pfc-am35xx/lowlevel.c +++ b/arch/arm/boards/wago-pfc-am35xx/lowlevel.c @@ -10,21 +10,22 @@ #include <io.h> #include <linux/string.h> #include <debug_ll.h> +#include <mach/omap/debug_ll.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/generic.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/omap3-mux.h> -#include <mach/omap3-silicon.h> -#include <mach/omap3-generic.h> -#include <mach/omap3-clock.h> -#include <mach/control.h> +#include <mach/omap/generic.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/omap3-mux.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/omap3-generic.h> +#include <mach/omap/omap3-clock.h> +#include <mach/omap/control.h> #include <asm/common.h> #include <asm-generic/memory_layout.h> -#include <mach/emif4.h> +#include <mach/omap/emif4.h> static void mux_config(void) { @@ -184,7 +185,7 @@ static noinline void pfc200_board_init(void) if (IS_ENABLED(CONFIG_DEBUG_LL)) { am33xx_uart_soft_reset(IOMEM(OMAP3_UART3_BASE)); - omap_uart_lowlevel_init(IOMEM(OMAP3_UART3_BASE)); + omap_debug_ll_init(); putc_ll('>'); } diff --git a/arch/arm/boards/webasto-ccbv2/board.c b/arch/arm/boards/webasto-ccbv2/board.c index fd6ea6f406..6b2c8b8cb0 100644 --- a/arch/arm/boards/webasto-ccbv2/board.c +++ b/arch/arm/boards/webasto-ccbv2/board.c @@ -5,14 +5,14 @@ #include <common.h> #include <init.h> -#include <mach/generic.h> -#include <mach/bbu.h> +#include <mach/imx/generic.h> +#include <mach/imx/bbu.h> #include <of.h> #include <string.h> #include "ccbv2.h" -static int ccbv2_probe(struct device_d *dev) +static int ccbv2_probe(struct device *dev) { struct device_node *overlay; struct fdt_header *fdt; @@ -54,8 +54,9 @@ static const struct of_device_id ccbv2_of_match[] = { { .compatible = "webasto,imx6ul-marvel" }, { /* sentinel */ }, }; +MODULE_DEVICE_TABLE(of, ccbv2_of_match); -static struct driver_d ccbv2_board_driver = { +static struct driver ccbv2_board_driver = { .name = "board-imx6ul-ccbv2", .probe = ccbv2_probe, .of_compatible = ccbv2_of_match, diff --git a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-256.imxcfg b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-256.imxcfg index ea327b2630..ef73ec71db 100644 --- a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-256.imxcfg +++ b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-256.imxcfg @@ -85,4 +85,4 @@ wm 32 0x021B001C 0x00000000 /* Disable TZASC bypass */ wm 32 0x020E4024 0x00000001 -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-512.imxcfg b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-512.imxcfg index d438a665f1..56ca917d10 100644 --- a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-512.imxcfg +++ b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-512.imxcfg @@ -85,4 +85,4 @@ wm 32 0x021B001C 0x00000000 /* Disable TZASC bypass */ wm 32 0x020E4024 0x00000001 -#include <mach/habv4-imx6-gencsf.h> +#include <mach/imx/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/webasto-ccbv2/lowlevel.c b/arch/arm/boards/webasto-ccbv2/lowlevel.c index 2bf0c3636f..7a198bd801 100644 --- a/arch/arm/boards/webasto-ccbv2/lowlevel.c +++ b/arch/arm/boards/webasto-ccbv2/lowlevel.c @@ -5,11 +5,12 @@ #include <common.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <firmware.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm.h> -#include <mach/esdctl.h> -#include <mach/iomux-mx6ul.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/iomux-mx6ul.h> #include <asm/cache.h> #include <tee/optee.h> diff --git a/arch/arm/boards/wolfvision-pf5/.gitignore b/arch/arm/boards/wolfvision-pf5/.gitignore new file mode 100644 index 0000000000..f458f794b5 --- /dev/null +++ b/arch/arm/boards/wolfvision-pf5/.gitignore @@ -0,0 +1 @@ +sdram-init.bin diff --git a/arch/arm/boards/wolfvision-pf5/Makefile b/arch/arm/boards/wolfvision-pf5/Makefile new file mode 100644 index 0000000000..b37b6c870b --- /dev/null +++ b/arch/arm/boards/wolfvision-pf5/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/wolfvision-pf5/board.c b/arch/arm/boards/wolfvision-pf5/board.c new file mode 100644 index 0000000000..797f51bc2e --- /dev/null +++ b/arch/arm/boards/wolfvision-pf5/board.c @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Board code for the WolfVision PF5 mainboard. + * + * Copyright (C) 2024 WolfVision GmbH. + */ +#include <common.h> +#include <deep-probe.h> +#include <globalvar.h> +#include <init.h> + +#include <boards/wolfvision/common.h> +#include <mach/rockchip/bbu.h> + +#define PF5_IO_EXPANDER_FILENAME "rk3568-wolfvision-pf5-io-expander.dtbo" +#define PF5_IO_EXPANDER_DATA __dtbo_rk3568_wolfvision_pf5_io_expander_start + +enum { + PF5_HWID_CHANNEL_MAINBOARD = 1, + PF5_HWID_CHANNEL_MODULE = 2, +}; + +extern char PF5_IO_EXPANDER_DATA[]; + +static const struct wv_rk3568_extension pf5_extensions[] = { + { + .adc_chan = PF5_HWID_CHANNEL_MAINBOARD, + .name = "mainboard", + .overlays = { + [0] = { .name = "PF5 DC V1.0 A", }, + [4] = { .name = "PF5 DC V1.1 A", }, + }, + }, + { + .adc_chan = PF5_HWID_CHANNEL_MODULE, + .name = "module", + .overlays = { + [0] = { .name = "PF5 IO Expander V1.0 A", + .filename = PF5_IO_EXPANDER_FILENAME, + .data = PF5_IO_EXPANDER_DATA, + }, + [16] = { .name = "no", }, + }, + }, +}; + +static int pf5_probe(struct device *dev) +{ + char *pf5_overlays = NULL; + int ret; + + barebox_set_model("WolfVision PF5"); + barebox_set_hostname("PF5"); + + ret = wolfvision_register_ethaddr(); + if (ret) + pr_warning("failed to register MAC addresses\n"); + + rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/mmc0"); + + ret = wolfvision_rk3568_detect_hw( + pf5_extensions, ARRAY_SIZE(pf5_extensions), &pf5_overlays); + if (ret) + pr_warning("failed to detect HW\n"); + + if (pf5_overlays) + globalvar_set("of.overlay.filepattern", pf5_overlays); + + free(pf5_overlays); + + return 0; +} + +static const struct of_device_id pf5_of_match[] = { + { + .compatible = "wolfvision,rk3568-pf5", + }, + { /* sentinel */ }, +}; + +static struct driver_d pf5_board_driver = { + .name = "board-wolfvision-pf5", + .probe = pf5_probe, + .of_compatible = pf5_of_match, +}; +coredevice_platform_driver(pf5_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(pf5_of_match); diff --git a/arch/arm/boards/wolfvision-pf5/lowlevel.c b/arch/arm/boards/wolfvision-pf5/lowlevel.c new file mode 100644 index 0000000000..c20ca4ae13 --- /dev/null +++ b/arch/arm/boards/wolfvision-pf5/lowlevel.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include <common.h> +#include <linux/sizes.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <mach/rockchip/hardware.h> +#include <mach/rockchip/atf.h> +#include <debug_ll.h> +#include <mach/rockchip/rockchip.h> + +extern char __dtb_rk3568_wolfvision_pf5_start[]; + +ENTRY_FUNCTION(start_rk3568_wolfvision_pf5, r0, r1, r2) +{ + /* + * Enable vccio4 1.8V and vccio5 1.8V + * FIXME: This is done by the io-domain driver as well, but there + * currently is no mechanism to make sure the driver gets probed + * before its consumers. Remove this setup once this issue is + * resolved. + */ + writel(RK_SETBITS(0x30), 0xfdc20140); + + /* + * Image execution starts at 0x0, but this is used for ATF and + * OP-TEE later, so move away from here. + */ + if (current_el() == 3) + relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS); + else + relocate_to_current_adr(); + + setup_c(); + + rk3568_barebox_entry(__dtb_rk3568_wolfvision_pf5_start); +} diff --git a/arch/arm/boards/xilinx-zcu102/Makefile b/arch/arm/boards/xilinx-zcu102/Makefile new file mode 100644 index 0000000000..d83a4793aa --- /dev/null +++ b/arch/arm/boards/xilinx-zcu102/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/xilinx-zcu102/board.c b/arch/arm/boards/xilinx-zcu102/board.c new file mode 100644 index 0000000000..3ef668fdff --- /dev/null +++ b/arch/arm/boards/xilinx-zcu102/board.c @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <common.h> +#include <driver.h> +#include <init.h> +#include <mach/zynqmp/zynqmp-bbu.h> +#include <deep-probe.h> + +static int zcu102_probe(struct device *dev) +{ + return zynqmp_bbu_register_handler("SD", "/boot/BOOT.BIN", + BBU_HANDLER_FLAG_DEFAULT); +} + +static const struct of_device_id zcu102_of_match[] = { + { .compatible = "xlnx,zynqmp-zcu102-revA" }, + { .compatible = "xlnx,zynqmp-zcu102-revB" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(zcu102_of_match); + +static struct driver zcu102_board_driver = { + .name = "board-zynqmp-zcu102", + .probe = zcu102_probe, + .of_compatible = zcu102_of_match, +}; +coredevice_platform_driver(zcu102_board_driver); diff --git a/arch/arm/boards/xilinx-zcu102/lowlevel.c b/arch/arm/boards/xilinx-zcu102/lowlevel.c new file mode 100644 index 0000000000..4b72c0ec43 --- /dev/null +++ b/arch/arm/boards/xilinx-zcu102/lowlevel.c @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <debug_ll.h> +#include <asm/barebox-arm.h> + +ENTRY_FUNCTION_WITHSTACK(start_zynqmp_zcu102, 0x80000000, x0, x1, x2) +{ + extern char __dtb_z_zynqmp_zcu102_revB_start[]; + + /* Assume that the first stage boot loader configured the UART */ + putc_ll('>'); + + barebox_arm_entry(0, SZ_2G, runtime_address(__dtb_z_zynqmp_zcu102_revB_start)); +} diff --git a/arch/arm/boards/xilinx-zcu104/board.c b/arch/arm/boards/xilinx-zcu104/board.c index 7654d2bfac..26dc6c9613 100644 --- a/arch/arm/boards/xilinx-zcu104/board.c +++ b/arch/arm/boards/xilinx-zcu104/board.c @@ -5,7 +5,7 @@ #include <common.h> #include <init.h> -#include <mach/zynqmp-bbu.h> +#include <mach/zynqmp/zynqmp-bbu.h> static int zcu104_register_update_handler(void) { diff --git a/arch/arm/boards/xilinx-zcu106/board.c b/arch/arm/boards/xilinx-zcu106/board.c index 0cb5ce86ea..3c8c3d21f2 100644 --- a/arch/arm/boards/xilinx-zcu106/board.c +++ b/arch/arm/boards/xilinx-zcu106/board.c @@ -8,7 +8,7 @@ #include <common.h> #include <init.h> -#include <mach/zynqmp-bbu.h> +#include <mach/zynqmp/zynqmp-bbu.h> static int zcu106_register_update_handler(void) { diff --git a/arch/arm/boards/zii-common/board.c b/arch/arm/boards/zii-common/board.c index 5d81bd51e9..96f9243591 100644 --- a/arch/arm/boards/zii-common/board.c +++ b/arch/arm/boards/zii-common/board.c @@ -68,7 +68,7 @@ late_initcall(rdu_ethernet_init); static int rdu_networkconfig(void) { static char *rdu_netconfig; - struct device_d *sp_dev; + struct device *sp_dev; if (!of_machine_is_compatible("zii,imx8mq-ultra") && !of_machine_is_compatible("zii,imx6q-zii-rdu2") && diff --git a/arch/arm/boards/zii-common/switch-cmd.c b/arch/arm/boards/zii-common/switch-cmd.c index df6ed66b23..6aa1c391f4 100644 --- a/arch/arm/boards/zii-common/switch-cmd.c +++ b/arch/arm/boards/zii-common/switch-cmd.c @@ -61,7 +61,7 @@ static int do_rdu2_switch_reset(void) static int do_rdu1_switch_reset(void) { - struct device_d *sp_dev = get_device_by_name("sp"); + struct device *sp_dev = get_device_by_name("sp"); struct rave_sp *sp = sp_dev->parent->priv; u8 cmd[] = { [0] = RAVE_SP_CMD_RESET_ETH_SWITCH, diff --git a/arch/arm/boards/zii-imx51-rdu1/board.c b/arch/arm/boards/zii-imx51-rdu1/board.c index 0b5271b8de..b72219b4bc 100644 --- a/arch/arm/boards/zii-imx51-rdu1/board.c +++ b/arch/arm/boards/zii-imx51-rdu1/board.c @@ -19,9 +19,9 @@ #include <envfs.h> #include <init.h> #include <environment.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include <libfile.h> -#include <mach/imx5.h> +#include <mach/imx/imx5.h> #include <net.h> #include <linux/crc8.h> #include <linux/sizes.h> diff --git a/arch/arm/boards/zii-imx51-rdu1/lowlevel.c b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c index 14136358dd..2418fe69ae 100644 --- a/arch/arm/boards/zii-imx51-rdu1/lowlevel.c +++ b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c @@ -1,11 +1,12 @@ // SPDX-License-Identifier: GPL-2.0-only #include <debug_ll.h> -#include <mach/clock-imx51_53.h> -#include <mach/iomux-mx51.h> +#include <mach/imx/debug_ll.h> +#include <mach/imx/clock-imx51_53.h> +#include <mach/imx/iomux-mx51.h> #include <common.h> -#include <mach/esdctl.h> -#include <mach/generic.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c index f57827cd13..88912a5108 100644 --- a/arch/arm/boards/zii-imx6q-rdu2/board.c +++ b/arch/arm/boards/zii-imx6q-rdu2/board.c @@ -9,8 +9,8 @@ #include <gpio.h> #include <i2c/i2c.h> #include <init.h> -#include <mach/bbu.h> -#include <mach/imx6.h> +#include <mach/imx/bbu.h> +#include <mach/imx/imx6.h> #include <net.h> #include <linux/nvmem-consumer.h> #include "../zii-common/pn-fixup.h" diff --git a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c index a80ce0afc5..5c94b120d3 100644 --- a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c +++ b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c @@ -4,12 +4,13 @@ /* Author: Andrey Smirnov <andrew.smirnov@gmail.com> */ #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <common.h> -#include <mach/esdctl.h> -#include <mach/generic.h> -#include <mach/imx6.h> -#include <mach/xload.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6.h> +#include <mach/imx/xload.h> +#include <mach/imx/iomux-mx6.h> #include <asm/barebox-arm.h> struct reginit { diff --git a/arch/arm/boards/zii-imx7d-dev/board.c b/arch/arm/boards/zii-imx7d-dev/board.c index 5f7314b0b8..2d7b589908 100644 --- a/arch/arm/boards/zii-imx7d-dev/board.c +++ b/arch/arm/boards/zii-imx7d-dev/board.c @@ -9,11 +9,11 @@ #include <init.h> #include <io.h> #include <gpio.h> -#include <mach/imx7-regs.h> +#include <mach/imx/imx7-regs.h> #include <mfd/imx7-iomuxc-gpr.h> #include <environment.h> #include <envfs.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> static void zii_imx7d_rpu2_init_fec(void) { diff --git a/arch/arm/boards/zii-imx7d-dev/flash-header-zii-imx7d-dev.imxcfg b/arch/arm/boards/zii-imx7d-dev/flash-header-zii-imx7d-dev.imxcfg index 05f95bbed1..053680f76d 100644 --- a/arch/arm/boards/zii-imx7d-dev/flash-header-zii-imx7d-dev.imxcfg +++ b/arch/arm/boards/zii-imx7d-dev/flash-header-zii-imx7d-dev.imxcfg @@ -4,5 +4,5 @@ soc imx7 loadaddr 0x80000000 ivtofs 0x400 -#include <mach/flash-header/imx7d-ddr-sabresd.imxcfg> +#include <mach/imx/flash-header/imx7d-ddr-sabresd.imxcfg> diff --git a/arch/arm/boards/zii-imx7d-dev/lowlevel.c b/arch/arm/boards/zii-imx7d-dev/lowlevel.c index 7579a2a8a0..2b2ad6aa84 100644 --- a/arch/arm/boards/zii-imx7d-dev/lowlevel.c +++ b/arch/arm/boards/zii-imx7d-dev/lowlevel.c @@ -9,21 +9,22 @@ #include <io.h> #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx7-ccm-regs.h> -#include <mach/iomux-mx7.h> -#include <mach/debug_ll.h> +#include <mach/imx/imx7-ccm-regs.h> +#include <mach/imx/iomux-mx7.h> +#include <mach/imx/debug_ll.h> #include <asm/cache.h> -#include <mach/esdctl.h> +#include <mach/imx/esdctl.h> extern char __dtb_z_imx7d_zii_rpu2_start[]; extern char __dtb_z_imx7d_zii_rmu2_start[]; static inline void setup_uart(void) { - imx7_early_setup_uart_clock(); + /* FIXME: Below UART2 is muxed, not UART1 */ + imx7_early_setup_uart_clock(1); imx7_setup_pad(MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX); diff --git a/arch/arm/boards/zii-imx8mq-dev/board.c b/arch/arm/boards/zii-imx8mq-dev/board.c index 02e257f35f..3581c7251d 100644 --- a/arch/arm/boards/zii-imx8mq-dev/board.c +++ b/arch/arm/boards/zii-imx8mq-dev/board.c @@ -10,7 +10,7 @@ #include <init.h> #include <asm/memory.h> #include <linux/sizes.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> #include "../zii-common/pn-fixup.h" #define LRU_FLAG_EGALAX BIT(0) @@ -81,7 +81,7 @@ static int zii_imx8mq_dev_fixup_egalax_ts(struct device_node *root, void *ctx) static int zii_imx8mq_dev_fixup_deb_internal(void) { struct device_node *np, *aliases; - struct device_d *dev; + struct device *dev; /* * In the internal DT remove the complete FEC hierarchy and move the diff --git a/arch/arm/boards/zii-imx8mq-dev/ddr_init.c b/arch/arm/boards/zii-imx8mq-dev/ddr_init.c index 902d0ee3cd..2d4133fb13 100644 --- a/arch/arm/boards/zii-imx8mq-dev/ddr_init.c +++ b/arch/arm/boards/zii-imx8mq-dev/ddr_init.c @@ -178,7 +178,7 @@ void ddr_init(void) reg32_write(DDRC_SWCTL(0), 0x0000); /* * ------------------- 9 ------------------- - * Set DFIMISC.dfi_init_start to 1 + * Set DFIMISC.dfi_init_start to 1 * ----------------------------------------- */ reg32_write(DDRC_DFIMISC(0), 0x00000030); diff --git a/arch/arm/boards/zii-imx8mq-dev/ddrphy_train.c b/arch/arm/boards/zii-imx8mq-dev/ddrphy_train.c index d2c73fc7ce..bac7d0a517 100644 --- a/arch/arm/boards/zii-imx8mq-dev/ddrphy_train.c +++ b/arch/arm/boards/zii-imx8mq-dev/ddrphy_train.c @@ -11,6 +11,8 @@ void ddr_cfg_phy(void) { unsigned int tmp, tmp_t; + ddr_get_firmware(DRAM_TYPE_LPDDR4); + //Init DDRPHY register... reg32_write(0x3c080440,0x2); reg32_write(0x3c080444,0x3); @@ -142,7 +144,7 @@ void ddr_cfg_phy(void) { //enable APB bus to access DDRPHY RAM reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0000, 0x0); //load the 1D training image - ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_1D_IMAGE); + imx8m_ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_1D_IMAGE); //configure DDRPHY-FW DMEM structure @clock0... reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); @@ -187,7 +189,7 @@ void ddr_cfg_phy(void) { reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x9); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x0); - wait_ddrphy_training_complete(); + imx8m_wait_ddrphy_training_complete(); //configure DDRPHY-FW DMEM structure @clock1... reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); @@ -256,7 +258,7 @@ void ddr_cfg_phy(void) { reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x9); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x0); - wait_ddrphy_training_complete(); + imx8m_wait_ddrphy_training_complete(); //set the PHY input clock to the desired frequency for pstate 0 reg32_write(0x3038a088,0x7070000); @@ -289,7 +291,7 @@ void ddr_cfg_phy(void) { //enable APB bus to access DDRPHY RAM reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0000, 0x0); //load the 2D training image - ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_2D_IMAGE); + imx8m_ddr_load_train_code(DRAM_TYPE_LPDDR4, FW_2D_IMAGE); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54003,0xc80); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0x54006,0x11); @@ -330,7 +332,7 @@ void ddr_cfg_phy(void) { reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x9); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x0); - wait_ddrphy_training_complete(); + imx8m_wait_ddrphy_training_complete(); //Halt MPU reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0099, 0x1); diff --git a/arch/arm/boards/zii-imx8mq-dev/flash-header-zii-imx8mq-dev.imxcfg b/arch/arm/boards/zii-imx8mq-dev/flash-header-zii-imx8mq-dev.imxcfg index 93cf14f26b..f82759f849 100644 --- a/arch/arm/boards/zii-imx8mq-dev/flash-header-zii-imx8mq-dev.imxcfg +++ b/arch/arm/boards/zii-imx8mq-dev/flash-header-zii-imx8mq-dev.imxcfg @@ -5,3 +5,5 @@ soc imx8mq loadaddr 0x007E1000 max_load_size 0x3F000 ivtofs 0x400 + +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c index cf53fb2def..4184748cd8 100644 --- a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c +++ b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c @@ -6,22 +6,22 @@ #include <common.h> #include <firmware.h> -#include <image-metadata.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/imx8m-ccm-regs.h> -#include <mach/iomux-mx8mq.h> +#include <mach/imx/imx8m-ccm-regs.h> +#include <mach/imx/iomux-mx8mq.h> #include <soc/imx8m/ddr.h> -#include <mach/xload.h> +#include <mach/imx/xload.h> #include <io.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> #include <asm/cache.h> #include <asm/sections.h> #include <asm/mmu.h> -#include <mach/atf.h> -#include <mach/esdctl.h> +#include <mach/imx/atf.h> +#include <mach/imx/esdctl.h> #include "ddr.h" @@ -63,21 +63,10 @@ static __noreturn void ddr_helper_halt(void) static void zii_imx8mq_dev_sram_setup(void) { - enum bootsource src = BOOTSOURCE_UNKNOWN; - int instance = BOOTSOURCE_INSTANCE_UNKNOWN; - int ret = -ENOTSUPP; - ddr_init(); if (running_as_ddr_helper()) ddr_helper_halt(); - - imx8mq_get_boot_source(&src, &instance); - - if (src == BOOTSOURCE_MMC) - ret = imx8m_esdhc_load_image(instance, true); - - BUG_ON(ret); } enum zii_platform_imx8mq_type { @@ -141,13 +130,8 @@ static __noreturn noinline void zii_imx8mq_dev_start(void) * initialization routine, it is EL2 which means we'll skip * loadting ATF blob again */ - if (current_el() == 3) { - const u8 *bl31; - size_t bl31_size; - - get_builtin_firmware(imx8mq_bl31_bin, &bl31, &bl31_size); - imx8mq_atf_load_bl31(bl31, bl31_size); - } + if (current_el() == 3) + imx8mq_load_and_start_image_via_tfa(); system_type = get_system_type(); @@ -190,7 +174,7 @@ static __noreturn noinline void zii_imx8mq_dev_start(void) * * 4. BL31 blob is uploaded to OCRAM and the control is transfer to it * - * 5. BL31 exits EL3 into EL2 at address MX8MQ_ATF_BL33_BASE_ADDR, + * 5. BL31 exits EL3 into EL2 at address MX8M_ATF_BL33_BASE_ADDR, * executing start_nxp_imx8mq_evk() the third time * * 6. Standard barebox boot flow continues @@ -201,8 +185,5 @@ ENTRY_FUNCTION(start_zii_imx8mq_dev, r0, r1, r2) relocate_to_current_adr(); setup_c(); - IMD_USED_OF(imx8mq_zii_ultra_rmb3); - IMD_USED_OF(imx8mq_zii_ultra_zest); - zii_imx8mq_dev_start(); } diff --git a/arch/arm/boards/zii-vf610-dev/board.c b/arch/arm/boards/zii-vf610-dev/board.c index 3a3ba2d58c..675f13b882 100644 --- a/arch/arm/boards/zii-vf610-dev/board.c +++ b/arch/arm/boards/zii-vf610-dev/board.c @@ -10,7 +10,7 @@ #include <linux/clk.h> #include <dt-bindings/clock/vf610-clock.h> #include <envfs.h> -#include <mach/bbu.h> +#include <mach/imx/bbu.h> static int expose_signals(const struct gpio *signals, diff --git a/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg b/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg index 617245b2d3..aace9e9226 100644 --- a/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg +++ b/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg @@ -4,12 +4,12 @@ soc vf610 loadaddr 0x80000000 ivtofs 0x400 -#include <mach/vf610-iomux-regs.h> -#include <mach/vf610-ddrmc-regs.h> +#include <mach/imx/vf610-iomux-regs.h> +#include <mach/imx/vf610-ddrmc-regs.h> -#include <mach/flash-header/vf610-ddr-pll2-400mhz.imxcfg> -#include <mach/flash-header/vf610-iomux-ddr-default.imxcfg> -#include <mach/flash-header/vf610-ddr-cr-default.imxcfg> +#include <mach/imx/flash-header/vf610-ddr-pll2-400mhz.imxcfg> +#include <mach/imx/flash-header/vf610-iomux-ddr-default.imxcfg> +#include <mach/imx/flash-header/vf610-ddr-cr-default.imxcfg> wm 32 DDRMC_CR26 0x0c300068 wm 32 DDRMC_CR31 0x006c0200 @@ -21,7 +21,7 @@ wm 32 DDRMC_CR73 0x0a010100 */ wm 32 DDRMC_CR73 0x0a010100 -#include <mach/flash-header/vf610-ddr-phy-default.imxcfg> +#include <mach/imx/flash-header/vf610-ddr-phy-default.imxcfg> wm 32 DDRMC_CR00 DDRMC_CR00_DRAM_CLASS_DDR3_START diff --git a/arch/arm/boards/zii-vf610-dev/lowlevel.c b/arch/arm/boards/zii-vf610-dev/lowlevel.c index a05515db16..e45e31f7d8 100644 --- a/arch/arm/boards/zii-vf610-dev/lowlevel.c +++ b/arch/arm/boards/zii-vf610-dev/lowlevel.c @@ -5,14 +5,15 @@ #include <common.h> #include <linux/sizes.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/esdctl.h> -#include <mach/vf610-regs.h> -#include <mach/clock-vf610.h> -#include <mach/iomux-vf610.h> +#include <mach/imx/esdctl.h> +#include <mach/imx/vf610-regs.h> +#include <mach/imx/clock-vf610.h> +#include <mach/imx/iomux-vf610.h> #include <debug_ll.h> +#include <mach/imx/debug_ll.h> static inline void setup_uart(void) { diff --git a/arch/arm/boards/zylonite/board.c b/arch/arm/boards/zylonite/board.c index eb69b37549..04cb34754c 100644 --- a/arch/arm/boards/zylonite/board.c +++ b/arch/arm/boards/zylonite/board.c @@ -8,7 +8,6 @@ #include <fs.h> #include <gpio.h> #include <init.h> -#include <partition.h> #include <led.h> #include <platform_data/eth-smc91111.h> #include <platform_data/mtd-nand-mrvl.h> @@ -17,14 +16,14 @@ #include <linux/clkdev.h> #include <linux/sizes.h> -#include <mach/devices.h> -#include <mach/mfp-pxa3xx.h> -#include <mach/pxa-regs.h> +#include <mach/pxa/devices.h> +#include <mach/pxa/mfp-pxa3xx.h> +#include <mach/pxa/pxa-regs.h> #include <asm/armlinux.h> #include <asm/io.h> #include <asm/mmu.h> -#include <generated/mach-types.h> +#include <asm/mach-types.h> static struct smc91c111_pdata smsc91x_pdata; static struct mrvl_nand_platform_data nand_pdata = { |