diff options
Diffstat (limited to 'arch/arm/boards')
27 files changed, 1240 insertions, 21 deletions
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index ff0a86fcb3..250ccb8889 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -140,4 +140,7 @@ obj-$(CONFIG_MACH_ZYLONITE) += zylonite/ obj-$(CONFIG_MACH_VARISCITE_MX6) += variscite-mx6/ obj-$(CONFIG_MACH_VSCOM_BALTOS) += vscom-baltos/ obj-$(CONFIG_MACH_QEMU_VIRT64) += qemu-virt64/ +obj-$(CONFIG_MACH_WARP7) += element14-warp7/ obj-$(CONFIG_MACH_VF610_TWR) += freescale-vf610-twr/ +obj-$(CONFIG_MACH_ZII_RDU2) += zii-imx6q-rdu2/ +obj-$(CONFIG_MACH_ZII_VF610_DEV) += zii-vf610-dev/ diff --git a/arch/arm/boards/avnet-zedboard/flash_header.c b/arch/arm/boards/avnet-zedboard/flash_header.c index ea2052405a..d9eb35b0d5 100644 --- a/arch/arm/boards/avnet-zedboard/flash_header.c +++ b/arch/arm/boards/avnet-zedboard/flash_header.c @@ -52,10 +52,10 @@ struct zynq_flash_header __flash_header_section flash_header = { .enc_stat = 0x0, .user = 0x0, .flash_offset = 0x8c0, - .length = barebox_image_size, + .length = (unsigned int)&_barebox_image_size, .res0 = 0x0, .start_of_exec = 0x0, - .total_len = barebox_image_size, + .total_len = (unsigned int)&_barebox_image_size, .res1 = 0x1, .checksum = 0x0, .res2 = 0x0, diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c index 100f64fdd9..a56b4b6240 100644 --- a/arch/arm/boards/beaglebone/lowlevel.c +++ b/arch/arm/boards/beaglebone/lowlevel.c @@ -41,6 +41,7 @@ static const struct am33xx_emif_regs ddr2_regs = { .emif_tim1 = 0x0666B3C9, .emif_tim2 = 0x243631CA, .emif_tim3 = 0x0000033F, + .ocp_config = 0x00141414, .sdram_config = 0x41805332, .sdram_config2 = 0x41805332, .sdram_ref_ctrl = 0x0000081A, @@ -97,6 +98,7 @@ static const struct am33xx_emif_regs ddr3_regs = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x266B7FDA, .emif_tim3 = 0x501F867F, + .ocp_config = 0x00141414, .zq_config = 0x50074BE4, .sdram_config = 0x61C05332, .sdram_config2 = 0x0, diff --git a/arch/arm/boards/element14-warp7/Makefile b/arch/arm/boards/element14-warp7/Makefile new file mode 100644 index 0000000000..01c7a259e9 --- /dev/null +++ b/arch/arm/boards/element14-warp7/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/element14-warp7/board.c b/arch/arm/boards/element14-warp7/board.c new file mode 100644 index 0000000000..84fc885da1 --- /dev/null +++ b/arch/arm/boards/element14-warp7/board.c @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2017 Sascha Hauer, Pengutronix + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <init.h> +#include <environment.h> +#include <mach/bbu.h> +#include <asm/armlinux.h> +#include <generated/mach-types.h> +#include <partition.h> +#include <mach/generic.h> +#include <linux/sizes.h> + +static int warp7_devices_init(void) +{ + if (!of_machine_is_compatible("warp,imx7s-warp")) + return 0; + + imx6_bbu_internal_mmc_register_handler("mmc", "/dev/mmc2.boot0.barebox", + BBU_HANDLER_FLAG_DEFAULT); + + return 0; +} +device_initcall(warp7_devices_init); diff --git a/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg b/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg new file mode 100644 index 0000000000..a3389218d5 --- /dev/null +++ b/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg @@ -0,0 +1,81 @@ +/* + * Copyright (C) 2016 NXP Semiconductors + * + * SPDX-License-Identifier: GPL-2.0 + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +soc imx7 +loadaddr 0x80000000 +dcdofs 0x400 + +wm 32 0x30340004 0x4F400005 + +wm 32 0x30391000 0x00000002 +wm 32 0x307a0000 0x03040008 +wm 32 0x307a0064 0x00200038 +wm 32 0x307a0490 0x00000001 +wm 32 0x307a00d0 0x00350001 +wm 32 0x307a00dc 0x00c3000a +wm 32 0x307a00e0 0x00010000 +wm 32 0x307a00e4 0x00110006 +wm 32 0x307a00f4 0x0000033f +wm 32 0x307a0100 0x0a0e110b +wm 32 0x307a0104 0x00020211 +wm 32 0x307a0108 0x03060708 +wm 32 0x307a010c 0x00a0500c +wm 32 0x307a0110 0x05020307 +wm 32 0x307a0114 0x02020404 +wm 32 0x307a0118 0x02020003 +wm 32 0x307a011c 0x00000202 +wm 32 0x307a0120 0x00000202 + +wm 32 0x307a0180 0x00600018 +wm 32 0x307a0184 0x00e00100 +wm 32 0x307a0190 0x02098205 +wm 32 0x307a0194 0x00060303 +wm 32 0x307a01a0 0x80400003 +wm 32 0x307a01a4 0x00100020 +wm 32 0x307a01a8 0x80100004 + +wm 32 0x307a0200 0x00000015 +wm 32 0x307a0204 0x00161616 +wm 32 0x307a0210 0x00000f0f +wm 32 0x307a0214 0x04040404 +wm 32 0x307a0218 0x0f0f0404 + +wm 32 0x307a0240 0x06000600 +wm 32 0x307a0244 0x00000000 +wm 32 0x30391000 0x00000000 +wm 32 0x30790000 0x17421e40 +wm 32 0x30790004 0x10210100 +wm 32 0x30790008 0x00010000 +wm 32 0x30790010 0x0007080c +wm 32 0x307900b0 0x1010007e + +wm 32 0x3079001C 0x01010000 +wm 32 0x3079009c 0x00000d6e + +wm 32 0x30790030 0x06060606 +wm 32 0x30790020 0x0a0a0a0a +wm 32 0x30790050 0x01000008 +wm 32 0x30790050 0x00000008 +wm 32 0x30790018 0x0000000f +wm 32 0x307900c0 0x0e487304 +wm 32 0x307900c0 0x0e4c7304 +wm 32 0x307900c0 0x0e4c7306 +wm 32 0x307900c0 0x0e4c7304 + +check 32 while_any_bit_clear 0x307900c4 0x1 + +wm 32 0x307900c0 0x0e487304 + +wm 32 0x30384130 0x00000000 +wm 32 0x30340020 0x00000178 +wm 32 0x30384130 0x00000002 + +check 32 while_any_bit_clear 0x307a0004 0x1 diff --git a/arch/arm/boards/element14-warp7/lowlevel.c b/arch/arm/boards/element14-warp7/lowlevel.c new file mode 100644 index 0000000000..38b7745f64 --- /dev/null +++ b/arch/arm/boards/element14-warp7/lowlevel.c @@ -0,0 +1,48 @@ +#define DEBUG +#include <io.h> +#include <common.h> +#include <linux/sizes.h> +#include <mach/generic.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <mach/debug_ll.h> +#include <asm/cache.h> + +extern char __dtb_imx7s_warp_start[]; + +static noinline void warp7_start(void) +{ + void __iomem *iomuxbase = IOMEM(MX7_IOMUXC_BASE_ADDR); + void __iomem *uart = IOMEM(MX7_UART1_BASE_ADDR); + void __iomem *ccmbase = IOMEM(MX7_CCM_BASE_ADDR); + void *fdt; + + writel(0x3, ccmbase + 0x4000 + 16 * 148 + 0x8); + writel(0x10000000, ccmbase + 0x8000 + 128 * 95); + writel(0x3, ccmbase + 0x4000 + 16 * 148 + 0x4); + writel(0x0, iomuxbase + 0x128); + writel(0x0, iomuxbase + 0x12c); + + imx7_uart_setup(uart); + + pbl_set_putc(imx_uart_putc, uart); + + pr_debug("Element14 i.MX7 Warp\n"); + + fdt = __dtb_imx7s_warp_start - get_runtime_offset(); + + barebox_arm_entry(0x80000000, SZ_512M, fdt); +} + +ENTRY_FUNCTION(start_imx7s_element14_warp7, r0, r1, r2) +{ + imx7_cpu_lowlevel_init(); + + arm_early_mmu_cache_invalidate(); + + relocate_to_current_adr(); + setup_c(); + barrier(); + + warp7_start(); +}
\ No newline at end of file diff --git a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c index b329f4684e..5743dbcf30 100644 --- a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c +++ b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c @@ -2,6 +2,7 @@ #include <common.h> #include <linux/sizes.h> #include <mach/generic.h> +#include <mach/iomux-mx6.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> @@ -11,12 +12,8 @@ static inline void setup_uart(void) imx6_ungate_all_peripherals(); - writel(0x1b0b1, iomuxbase + 0x0650); - writel(3, iomuxbase + 0x0280); - - writel(0x1b0b1, iomuxbase + 0x0654); - writel(3, iomuxbase + 0x0284); - writel(1, iomuxbase + 0x0920); + imx_setup_pad(iomuxbase, MX6Q_PAD_CSI0_DAT10__UART1_TXD); + imx_setup_pad(iomuxbase, MX6Q_PAD_CSI0_DAT11__UART1_RXD); imx6_uart_setup_ll(); diff --git a/arch/arm/boards/freescale-vf610-twr/lowlevel.c b/arch/arm/boards/freescale-vf610-twr/lowlevel.c index 65042736c9..53c7b3af6b 100644 --- a/arch/arm/boards/freescale-vf610-twr/lowlevel.c +++ b/arch/arm/boards/freescale-vf610-twr/lowlevel.c @@ -27,16 +27,10 @@ extern char __dtb_vf610_twr_start[]; ENTRY_FUNCTION(start_vf610_twr, r0, r1, r2) { - int i; void *fdt; - void __iomem *mscm = IOMEM(VF610_MSCM_BASE_ADDR); vf610_cpu_lowlevel_init(); - for (i = 0; i < VF610_MSCM_IRSPRC_NUM; i++) - writew(VF610_MSCM_IRSPRC_CP0_EN, - mscm + VF610_MSCM_IRSPRC(i)); - if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); diff --git a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c index 3ab8d66060..fea00ef503 100644 --- a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c +++ b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c @@ -97,7 +97,7 @@ void __bare_init barebox_arm_reset_vector(void) debug_led(1, 1); if (! load_stage2((void*)(ld_var(_text) - 16), - ld_var(_barebox_image_size) + 16)) { + barebox_image_size + 16)) { debug_led(3, 1); while (1) { } /* hang */ } diff --git a/arch/arm/boards/phytec-som-am335x/ram-timings.h b/arch/arm/boards/phytec-som-am335x/ram-timings.h index 9576d265e5..4ea654db12 100644 --- a/arch/arm/boards/phytec-som-am335x/ram-timings.h +++ b/arch/arm/boards/phytec-som-am335x/ram-timings.h @@ -45,6 +45,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x26437FDA, .emif_tim3 = 0x501F83FF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C052B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -66,6 +67,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x266B7FDA, .emif_tim3 = 0x501F867F, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C05332, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -87,6 +89,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x26437FDA, .emif_tim3 = 0x501F83FF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C052B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -106,6 +109,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x262F7FDA, .emif_tim3 = 0x501F82BF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C05232, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -125,6 +129,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x266B7FDA, .emif_tim3 = 0x501F867F, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C05332, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30 @@ -144,6 +149,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x266B7FDA, .emif_tim3 = 0x501F867F, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C053B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30 @@ -163,6 +169,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAE4DB, .emif_tim2 = 0x268F7FDA, .emif_tim3 = 0x501F88BF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C053B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30 @@ -182,6 +189,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x26437FDA, .emif_tim3 = 0x501F83FF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C052B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -203,6 +211,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x266B7FDA, .emif_tim3 = 0x501F867F, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C05332, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -222,6 +231,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x26437FDA, .emif_tim3 = 0x501F83FF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C052B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, @@ -241,6 +251,7 @@ struct am335x_sdram_timings physom_timings[] = { .emif_tim1 = 0x0AAAD4DB, .emif_tim2 = 0x268F7FDA, .emif_tim3 = 0x501F88BF, + .ocp_config = 0x003d3d3d, .sdram_config = 0x61C053B2, .zq_config = 0x50074BE4, .sdram_ref_ctrl = 0x00000C30, diff --git a/arch/arm/boards/phytec-som-rk3288/lowlevel.c b/arch/arm/boards/phytec-som-rk3288/lowlevel.c index 7804a55bcd..7649ef864a 100644 --- a/arch/arm/boards/phytec-som-rk3288/lowlevel.c +++ b/arch/arm/boards/phytec-som-rk3288/lowlevel.c @@ -30,14 +30,13 @@ ENTRY_FUNCTION(start_rk3288_phycore_som, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) { struct rk3288_grf * const grf = (void *)RK3288_GRF_BASE; - rk_clrsetreg(&grf->gpio4c_iomux, - GPIO4C1_MASK << GPIO4C1_SHIFT | - GPIO4C0_MASK << GPIO4C0_SHIFT, - GPIO4C1_UART0BT_SOUT << GPIO4C1_SHIFT | - GPIO4C0_UART0BT_SIN << GPIO4C0_SHIFT); + rk_clrsetreg(&grf->gpio7ch_iomux, + GPIO7C7_MASK << GPIO7C7_SHIFT | + GPIO7C6_MASK << GPIO7C6_SHIFT, + GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT | + GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); INIT_LL(); } - fdt = __dtb_rk3288_phycore_som_start - get_runtime_offset(); barebox_arm_entry(0x0, SZ_1G, fdt); diff --git a/arch/arm/boards/zii-imx6q-rdu2/Makefile b/arch/arm/boards/zii-imx6q-rdu2/Makefile new file mode 100644 index 0000000000..01c7a259e9 --- /dev/null +++ b/arch/arm/boards/zii-imx6q-rdu2/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c new file mode 100644 index 0000000000..ee04517d29 --- /dev/null +++ b/arch/arm/boards/zii-imx6q-rdu2/board.c @@ -0,0 +1,171 @@ +/* + * Copyright (C) 2016 Zodiac Inflight Innovation + * Author: Andrey Smirnov <andrew.smirnov@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <init.h> +#include <environment.h> +#include <mach/imx6-regs.h> +#include <gpio.h> +#include <asm/armlinux.h> +#include <generated/mach-types.h> +#include <partition.h> +#include <linux/phy.h> +#include <asm/io.h> +#include <asm/mmu.h> +#include <mach/generic.h> +#include <linux/sizes.h> +#include <net.h> +#include <mach/imx6.h> +#include <mach/devices-imx6.h> +#include <mach/iomux-mx6.h> +#include <spi/spi.h> +#include <mach/spi.h> +#include <mach/usb.h> +#include <mach/bbu.h> + +#define RDU2_DAC1_RESET IMX_GPIO_NR(1, 0) +#define RDU2_DAC2_RESET IMX_GPIO_NR(1, 2) +#define RDU2_RST_TOUCH IMX_GPIO_NR(1, 7) +#define RDU2_NFC_RESET IMX_GPIO_NR(1, 17) +#define RDU2_HPA1_SDn IMX_GPIO_NR(1, 4) +#define RDU2_HPA2_SDn IMX_GPIO_NR(1, 5) + +static const struct gpio rdu2_reset_gpios[] = { + { + .gpio = RDU2_DAC1_RESET, + .flags = GPIOF_OUT_INIT_LOW, + .label = "dac1-reset", + }, + { + .gpio = RDU2_DAC2_RESET, + .flags = GPIOF_OUT_INIT_LOW, + .label = "dac2-reset", + }, + { + .gpio = RDU2_RST_TOUCH, + .flags = GPIOF_OUT_INIT_LOW, + .label = "rst-touch#", + }, + { + .gpio = RDU2_NFC_RESET, + .flags = GPIOF_OUT_INIT_HIGH, + .label = "nfc-reset", + }, + { + .gpio = RDU2_HPA1_SDn, + .flags = GPIOF_OUT_INIT_LOW, + .label = "hpa1-sd-n", + }, + { + .gpio = RDU2_HPA2_SDn, + .flags = GPIOF_OUT_INIT_LOW, + .label = "hpa2n-sd-n", + }, +}; + +static int rdu2_reset_audio_touchscreen_nfc(void) +{ + int ret; + + if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") && + !of_machine_is_compatible("zii,imx6qp-zii-rdu2")) + return 0; + + ret = gpio_request_array(rdu2_reset_gpios, + ARRAY_SIZE(rdu2_reset_gpios)); + if (ret) { + pr_err("Failed to request RDU2 reset gpios: %s\n", + strerror(-ret)); + return ret; + } + + mdelay(100); + + gpio_direction_output(RDU2_DAC1_RESET, 1); + gpio_direction_output(RDU2_DAC2_RESET, 1); + gpio_direction_output(RDU2_RST_TOUCH, 1); + gpio_direction_output(RDU2_NFC_RESET, 0); + gpio_direction_output(RDU2_HPA1_SDn, 1); + gpio_direction_output(RDU2_HPA2_SDn, 1); + + mdelay(100); + + return 0; +} +/* + * When this function is called "hog" pingroup in device tree needs to + * be already initialized + */ +late_initcall(rdu2_reset_audio_touchscreen_nfc); + +static const struct gpio rdu2_front_panel_usb_gpios[] = { + { + .gpio = IMX_GPIO_NR(3, 19), + .flags = GPIOF_OUT_INIT_LOW, + .label = "usb-emulation", + }, + { + .gpio = IMX_GPIO_NR(3, 20), + .flags = GPIOF_OUT_INIT_HIGH, + .label = "usb-mode1", + }, + { + .gpio = IMX_GPIO_NR(3, 22), + .flags = GPIOF_OUT_INIT_LOW, + .label = "usb-pwr-ctrl-enn", + }, + { + .gpio = IMX_GPIO_NR(3, 23), + .flags = GPIOF_OUT_INIT_HIGH, + .label = "usb-mode2", + }, +}; + +static int rdu2_enable_front_panel_usb(void) +{ + int ret; + + if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") && + !of_machine_is_compatible("zii,imx6qp-zii-rdu2")) + return 0; + + ret = gpio_request_array(rdu2_front_panel_usb_gpios, + ARRAY_SIZE(rdu2_front_panel_usb_gpios)); + if (ret) { + pr_err("Failed to request RDU2 front panel USB gpios: %s\n", + strerror(-ret)); + + } + + return ret; +} +late_initcall(rdu2_enable_front_panel_usb); + +static int rdu2_devices_init(void) +{ + if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") && + !of_machine_is_compatible("zii,imx6qp-zii-rdu2")) + return 0; + + barebox_set_hostname("rdu2"); + + imx6_bbu_internal_spi_i2c_register_handler("SPI", "/dev/m25p0.barebox", + BBU_HANDLER_FLAG_DEFAULT); + + imx6_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc3", 0); + + return 0; +} +device_initcall(rdu2_devices_init); diff --git a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/init/automount b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/init/automount new file mode 100644 index 0000000000..6c04eb48a1 --- /dev/null +++ b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/init/automount @@ -0,0 +1,17 @@ +#!/bin/sh + +# automount tftp server based on $eth0.serverip + +mkdir -p /mnt/tftp +automount /mnt/tftp 'ifup eth1 && mount -t tftp $eth1.serverip /mnt/tftp' + +# automount nfs server's nfsroot + +mkdir -p /mnt/nfs +automount /mnt/nfs 'ifup eth1 && mount -t nfs ${eth1.serverip}:/home/${global.user}/nfsroot/${global.hostname} /mnt/nfs' + + +# FAT on usb disk example + +#mkdir -p /mnt/fat +#automount -d /mnt/fat 'usb && [ -e /dev/disk0.0 ] && mount /dev/disk0.0 /mnt/fat' diff --git a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/network/eth1 b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/network/eth1 new file mode 100644 index 0000000000..33fe7c1b2b --- /dev/null +++ b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/network/eth1 @@ -0,0 +1,18 @@ +#!/bin/sh + +# ip setting (static/dhcp) +ip=dhcp +global.dhcp.vendor_id=barebox-${global.hostname} + +# static setup used if ip=static +ipaddr= +netmask= +gateway= +serverip= + +# MAC address if needed +#ethaddr=xx:xx:xx:xx:xx:xx + +# put code to discover eth0 (i.e. 'usb') to /env/network/eth0-discover + +exit 0 diff --git a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/nv/boot.default b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/nv/boot.default new file mode 100644 index 0000000000..3cfe9bafdc --- /dev/null +++ b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/nv/boot.default @@ -0,0 +1 @@ +mmc1
\ No newline at end of file diff --git a/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6q-rdu2.imxcfg b/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6q-rdu2.imxcfg new file mode 100644 index 0000000000..e37db503b4 --- /dev/null +++ b/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6q-rdu2.imxcfg @@ -0,0 +1,87 @@ +loadaddr 0x10000000 +soc imx6 +dcdofs 0x400 + +wm 32 0x020e0798 0x000C0000 +wm 32 0x020e0758 0x00000000 +wm 32 0x020e0588 0x00000030 +wm 32 0x020e0594 0x00000030 +wm 32 0x020e056c 0x00000030 +wm 32 0x020e0578 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e057c 0x00000030 +wm 32 0x020e058c 0x00000000 +wm 32 0x020e059c 0x00000030 +wm 32 0x020e05a0 0x00000030 +wm 32 0x020e078c 0x00000030 +wm 32 0x020e0750 0x00020000 +wm 32 0x020e05a8 0x00000028 +wm 32 0x020e05b0 0x00000028 +wm 32 0x020e0524 0x00000028 +wm 32 0x020e051c 0x00000028 +wm 32 0x020e0518 0x00000028 +wm 32 0x020e050c 0x00000028 +wm 32 0x020e05b8 0x00000028 +wm 32 0x020e05c0 0x00000028 +wm 32 0x020e0774 0x00020000 +wm 32 0x020e0784 0x00000028 +wm 32 0x020e0788 0x00000028 +wm 32 0x020e0794 0x00000028 +wm 32 0x020e079c 0x00000028 +wm 32 0x020e07a0 0x00000028 +wm 32 0x020e07a4 0x00000028 +wm 32 0x020e07a8 0x00000028 +wm 32 0x020e0748 0x00000028 +wm 32 0x020e05ac 0x00000028 +wm 32 0x020e05b4 0x00000028 +wm 32 0x020e0528 0x00000028 +wm 32 0x020e0520 0x00000028 +wm 32 0x020e0514 0x00000028 +wm 32 0x020e0510 0x00000028 +wm 32 0x020e05bc 0x00000028 +wm 32 0x020e05c4 0x00000028 +wm 32 0x021b0800 0xa1390003 +wm 32 0x021b080c 0x001F001F +wm 32 0x021b0810 0x001F001F +wm 32 0x021b480c 0x001F001F +wm 32 0x021b4810 0x001F001F +wm 32 0x021b083c 0x43260335 +wm 32 0x021b0840 0x031A030B +wm 32 0x021b483c 0x4323033B +wm 32 0x021b4840 0x0323026F +wm 32 0x021b0848 0x483D4545 +wm 32 0x021b4848 0x44433E48 +wm 32 0x021b0850 0x41444840 +wm 32 0x021b4850 0x4835483E +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 +wm 32 0x021b0004 0x00020036 +wm 32 0x021b0008 0x09444040 +wm 32 0x021b000c 0x8A8F7955 +wm 32 0x021b0010 0xFF328F64 +wm 32 0x021b0014 0x01FF00DB +wm 32 0x021b0018 0x00001740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x008F1023 +wm 32 0x021b0040 0x00000047 +wm 32 0x021b0000 0x841A0000 +wm 32 0x021b001c 0x04088032 +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x00048031 +wm 32 0x021b001c 0x09408030 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0020 0x00005800 +wm 32 0x021b0818 0x00011117 +wm 32 0x021b4818 0x00011117 +wm 32 0x021b0004 0x00025576 +wm 32 0x021b0404 0x00011006 +wm 32 0x021b001c 0x00000000 diff --git a/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6qp-rdu2.imxcfg b/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6qp-rdu2.imxcfg new file mode 100644 index 0000000000..03e764b3b3 --- /dev/null +++ b/arch/arm/boards/zii-imx6q-rdu2/flash-header-imx6qp-rdu2.imxcfg @@ -0,0 +1,132 @@ +loadaddr 0x10000000 +soc imx6 +dcdofs 0x400 + +wm 32 0x020e0798 0x000C0000 +wm 32 0x020e0758 0x00000000 + +wm 32 0x020e0588 0x00020030 +wm 32 0x020e0594 0x00020030 + +wm 32 0x020e056c 0x00020030 +wm 32 0x020e0578 0x00020030 +wm 32 0x020e074c 0x00020030 + +wm 32 0x020e057c 0x00020030 +wm 32 0x020e058c 0x00000000 +wm 32 0x020e059c 0x00020030 +wm 32 0x020e05a0 0x00020030 +wm 32 0x020e078c 0x00020030 + +wm 32 0x020e0750 0x00020000 +wm 32 0x020e05a8 0x00020030 +wm 32 0x020e05b0 0x00020030 +wm 32 0x020e0524 0x00020030 +wm 32 0x020e051c 0x00020030 +wm 32 0x020e0518 0x00020030 +wm 32 0x020e050c 0x00020030 +wm 32 0x020e05b8 0x00020030 +wm 32 0x020e05c0 0x00020030 + +wm 32 0x020e0534 0x00018200 +wm 32 0x020e0538 0x00008000 +wm 32 0x020e053c 0x00018200 +wm 32 0x020e0540 0x00018200 +wm 32 0x020e0544 0x00018200 +wm 32 0x020e0548 0x00018200 +wm 32 0x020e054c 0x00018200 +wm 32 0x020e0550 0x00018200 + +wm 32 0x020e0774 0x00020000 +wm 32 0x020e0784 0x00020030 +wm 32 0x020e0788 0x00020030 +wm 32 0x020e0794 0x00020030 +wm 32 0x020e079c 0x00020030 +wm 32 0x020e07a0 0x00020030 +wm 32 0x020e07a4 0x00020030 +wm 32 0x020e07a8 0x00020030 +wm 32 0x020e0748 0x00020030 + +wm 32 0x020e05ac 0x00020030 +wm 32 0x020e05b4 0x00020030 +wm 32 0x020e0528 0x00020030 +wm 32 0x020e0520 0x00020030 +wm 32 0x020e0514 0x00020030 +wm 32 0x020e0510 0x00020030 +wm 32 0x020e05bc 0x00020030 +wm 32 0x020e05c4 0x00020030 + +wm 32 0x021b001c 0x00008000 + +wm 32 0x021b0800 0xA1390003 + +wm 32 0x021b080c 0x002A001F +wm 32 0x021b0810 0x002F002A +wm 32 0x021b480c 0x001F0031 +wm 32 0x021b4810 0x001B0022 + +wm 32 0x021b083c 0x433C0354 +wm 32 0x021b0840 0x03380330 +wm 32 0x021b483c 0x43440358 +wm 32 0x021b4840 0x03340300 + +wm 32 0x021b0848 0x483A4040 +wm 32 0x021b4848 0x3E383648 + +wm 32 0x021b0850 0x3C424048 +wm 32 0x021b4850 0x4C425042 + +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 + +wm 32 0x021b08c0 0x24912489 +wm 32 0x021b48c0 0x24914452 + +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 + +wm 32 0x021b0004 0x00020036 +wm 32 0x021b0008 0x09444040 +wm 32 0x021b000c 0x898E7955 +wm 32 0x021b0010 0xFF328F64 +wm 32 0x021b0014 0x01FF00DB + +wm 32 0x021b0018 0x00011740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b002c 0x000026D2 +wm 32 0x021b0030 0x008E1023 +wm 32 0x021b0040 0x00000047 + +wm 32 0x021b0400 0x14420000 +wm 32 0x021b0000 0x841A0000 +wm 32 0x021b0890 0x00400c58 + +wm 32 0x00bb0008 0x00000000 +wm 32 0x00bb000c 0x2891E41A +wm 32 0x00bb0038 0x00000564 +wm 32 0x00bb0014 0x00000040 +wm 32 0x00bb0028 0x00000020 +wm 32 0x00bb002c 0x00000020 + +wm 32 0x021b001c 0x02088032 +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x00048031 +wm 32 0x021b001c 0x19408030 +wm 32 0x021b001c 0x04008040 + +wm 32 0x021b0020 0x00007800 + +wm 32 0x021b0818 0x00022227 +wm 32 0x021b4818 0x00022227 + +wm 32 0x021b0004 0x00025576 + +wm 32 0x021b0404 0x00011006 + +wm 32 0x021b001c 0x00000000 diff --git a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c new file mode 100644 index 0000000000..0d3520de47 --- /dev/null +++ b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2016 Zodiac Inflight Innovation + * Author: Andrey Smirnov <andrew.smirnov@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <debug_ll.h> +#include <common.h> +#include <mach/esdctl.h> +#include <mach/generic.h> +#include <mach/imx6.h> +#include <asm/barebox-arm.h> + +static inline void setup_uart(void) +{ + void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR); + + imx6_ungate_all_peripherals(); + + writel(0x1b0b1, iomuxbase + 0x0650); + writel(3, iomuxbase + 0x0280); + + writel(0x1b0b1, iomuxbase + 0x0654); + writel(3, iomuxbase + 0x0284); + writel(1, iomuxbase + 0x0920); + + imx6_uart_setup_ll(); + + putc_ll('>'); +} + +extern char __dtb_imx6q_zii_rdu2_start[]; +extern char __dtb_imx6qp_zii_rdu2_start[]; + +ENTRY_FUNCTION(start_imx6q_zii_rdu2, r0, r1, r2) +{ + void *fdt = __dtb_imx6q_zii_rdu2_start; + + imx6_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + imx6q_barebox_entry(fdt - get_runtime_offset()); +} + +ENTRY_FUNCTION(start_imx6qp_zii_rdu2, r0, r1, r2) +{ + void *fdt = __dtb_imx6qp_zii_rdu2_start; + + imx6_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + imx6q_barebox_entry(fdt - get_runtime_offset()); +} diff --git a/arch/arm/boards/zii-vf610-dev/Makefile b/arch/arm/boards/zii-vf610-dev/Makefile new file mode 100644 index 0000000000..1297d815e3 --- /dev/null +++ b/arch/arm/boards/zii-vf610-dev/Makefile @@ -0,0 +1,3 @@ +obj-y += board.o +lwl-y += lowlevel.o +bbenv-y += defaultenv-zii-vf610-dev diff --git a/arch/arm/boards/zii-vf610-dev/board.c b/arch/arm/boards/zii-vf610-dev/board.c new file mode 100644 index 0000000000..eea3828aa7 --- /dev/null +++ b/arch/arm/boards/zii-vf610-dev/board.c @@ -0,0 +1,149 @@ +/* + * Copyright (C) 2016 Zodiac Inflight Innovation + * Author: Andrey Smirnov <andrew.smirnov@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <init.h> +#include <gpio.h> +#include <environment.h> +#include <linux/clk.h> +#include <dt-bindings/clock/vf610-clock.h> +#include <envfs.h> + + +static int expose_signals(const struct gpio *signals, + size_t signal_num) +{ + int ret, i; + + ret = gpio_request_array(signals, signal_num); + if (ret) + return ret; + + for (i = 0; i < signal_num; i++) + export_env_ull(signals[i].label, signals[i].gpio); + + return 0; +} + +static int zii_vf610_cfu1_expose_signals(void) +{ + static const struct gpio signals[] = { + { + .gpio = 132, + .flags = GPIOF_IN, + .label = "fim_sd", + }, + { + .gpio = 118, + .flags = GPIOF_OUT_INIT_LOW, + .label = "fim_tdis", + }, + }; + + if (!of_machine_is_compatible("zii,vf610cfu1-a")) + return 0; + + return expose_signals(signals, ARRAY_SIZE(signals)); +} +late_initcall(zii_vf610_cfu1_expose_signals); + +static int zii_vf610_cfu1_spu3_expose_signals(void) +{ + static const struct gpio signals[] = { + { + .gpio = 107, + .flags = GPIOF_OUT_INIT_LOW, + .label = "soc_sw_rstn", + }, + { + .gpio = 98, + .flags = GPIOF_IN, + .label = "e6352_intn", + }, + }; + + if (!of_machine_is_compatible("zii,vf610spu3-a") && + !of_machine_is_compatible("zii,vf610cfu1-a")) + return 0; + + return expose_signals(signals, ARRAY_SIZE(signals)); +} +late_initcall(zii_vf610_cfu1_spu3_expose_signals); + +static int zii_vf610_dev_print_clocks(void) +{ + int i; + struct clk *clk; + struct device_node *ccm_np; + const unsigned long MHz = 1000000; + const char *clk_names[] = { "cpu", "ddr", "bus", "ipg" }; + + if (!of_machine_is_compatible("zii,vf610dev")) + return 0; + + ccm_np = of_find_compatible_node(NULL, NULL, "fsl,vf610-ccm"); + if (!ccm_np) { + pr_err("Couln't get CCM node\n"); + return -ENOENT; + } + + for (i = 0; i < ARRAY_SIZE(clk_names); i++) { + unsigned long rate; + const char *name = clk_names[i]; + + clk = of_clk_get_by_name(ccm_np, name); + if (IS_ERR(clk)) { + pr_err("Failed to get '%s' clock (%ld)\n", + name, PTR_ERR(clk)); + return PTR_ERR(clk); + } + + rate = clk_get_rate(clk); + + pr_info("%s clock : %8lu MHz\n", name, rate / MHz); + } + + return 0; +} +late_initcall(zii_vf610_dev_print_clocks); + +static int zii_vf610_dev_set_hostname(void) +{ + size_t i; + static const struct { + const char *compatible; + const char *hostname; + } boards[] = { + { "zii,vf610spu3-a", "spu3-rev-a" }, + { "zii,vf610cfu1-a", "cfu1-rev-a" }, + { "zii,vf610dev-b", "dev-rev-b" }, + { "zii,vf610dev-c", "dev-rev-c" }, + { "zii,vf610scu4-aib-c", "scu4-aib-rev-c" }, + }; + + if (!of_machine_is_compatible("zii,vf610dev")) + return 0; + + for (i = 0; i < ARRAY_SIZE(boards); i++) { + if (of_machine_is_compatible(boards[i].compatible)) { + barebox_set_hostname(boards[i].hostname); + break; + } + } + + defaultenv_append_directory(defaultenv_zii_vf610_dev); + return 0; +} +late_initcall(zii_vf610_dev_set_hostname); diff --git a/arch/arm/boards/zii-vf610-dev/defaultenv-zii-vf610-dev/boot/sd b/arch/arm/boards/zii-vf610-dev/defaultenv-zii-vf610-dev/boot/sd new file mode 100644 index 0000000000..cf8eec363c --- /dev/null +++ b/arch/arm/boards/zii-vf610-dev/defaultenv-zii-vf610-dev/boot/sd @@ -0,0 +1,4 @@ +#!/bin/sh + +global.bootm.image=/mnt/sd/zImage +global.bootm.oftree=/mnt/sd/${global.bootm.oftree} diff --git a/arch/arm/boards/zii-vf610-dev/defaultenv-zii-vf610-dev/init/automount-sd b/arch/arm/boards/zii-vf610-dev/defaultenv-zii-vf610-dev/init/automount-sd new file mode 100644 index 0000000000..f44dab34e4 --- /dev/null +++ b/arch/arm/boards/zii-vf610-dev/defaultenv-zii-vf610-dev/init/automount-sd @@ -0,0 +1,13 @@ +#!/bin/sh + +if [ x${global.hostname} = xdev-rev-b -o x${global.hostname} = xdev-rev-c ]; +then + global sd=0 +else + global sd=1 +fi + +mkdir -p /mnt/sd +automount /mnt/sd 'mci${global.sd}.probe=1 && mount /dev/disk${global.sd}.0 /mnt/sd' + +exit 0 diff --git a/arch/arm/boards/zii-vf610-dev/defaultenv-zii-vf610-dev/init/choose-dtb b/arch/arm/boards/zii-vf610-dev/defaultenv-zii-vf610-dev/init/choose-dtb new file mode 100644 index 0000000000..41a74c3a98 --- /dev/null +++ b/arch/arm/boards/zii-vf610-dev/defaultenv-zii-vf610-dev/init/choose-dtb @@ -0,0 +1,4 @@ +#!/bin/sh + +global.bootm.oftree=vf610-zii-${global.hostname}.dtb + diff --git a/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg b/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg new file mode 100644 index 0000000000..177f4e8bdc --- /dev/null +++ b/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg @@ -0,0 +1,243 @@ +soc vf610 +loadaddr 0x80000000 +dcdofs 0x400 + +#define VF610_DDR_PAD_CTRL 0x00000180 /* 25 Ohm drive strength */ +#define VF610_DDR_PAD_CTRL_1 0x00010180 /* 25 Ohm drive strength + differential input */ + +#define DDRMC_PHY_DQ_TIMING 0x00002613 +#define DDRMC_PHY_DQS_TIMING 0x00002615 +#define DDRMC_PHY_CTRL 0x00210000 +#define DDRMC_PHY_MASTER_CTRL 0x0001012a +#define DDRMC_PHY_SLAVE_CTRL 0x00002000 +#define DDRMC_PHY_OFF 0x00000000 +#define DDRMC_PHY_PROC_PAD_ODT 0x00010101 + +#define CHECKPOINT(n) wm 32 0x3f000000 n + +CHECKPOINT(1) + +/* ======================= Clock initialization =======================*/ + +/* + * Ungate all IP block clocks + */ +wm 32 0x4006b040 0xffffffff +wm 32 0x4006b044 0xffffffff +wm 32 0x4006b048 0xffffffff +wm 32 0x4006b04c 0xffffffff +wm 32 0x4006b050 0xffffffff +wm 32 0x4006b058 0xffffffff +wm 32 0x4006b05c 0xffffffff +wm 32 0x4006b060 0xffffffff +wm 32 0x4006b064 0xffffffff +wm 32 0x4006b068 0xffffffff +wm 32 0x4006b06c 0xffffffff + + +/* + * Turn PLL2 on + */ +wm 32 0x40050030 0x00002001 /* Fout = Fin * 22 */ + +CHECKPOINT(2) + +/* + * Wait for PLLs to lock + */ +check 32 while_any_bit_clear 0x40050030 0x80000000 + + +CHECKPOINT(3) + +clear_bits 32 0x4006b008 0x00000040 +set_bits 32 0x4006b008 0x00002000 + + + +/* ======================= DDR IOMUX =======================*/ + +CHECKPOINT(4) + +wm 32 0x40048220 0x00000180 +wm 32 0x40048224 0x00000180 +wm 32 0x40048228 0x00000180 +wm 32 0x4004822c 0x00000180 +wm 32 0x40048230 0x00000180 +wm 32 0x40048234 0x00000180 +wm 32 0x40048238 0x00000180 +wm 32 0x4004823c 0x00000180 +wm 32 0x40048240 0x00000180 +wm 32 0x40048244 0x00000180 +wm 32 0x40048248 0x00000180 +wm 32 0x4004824c 0x00000180 +wm 32 0x40048250 0x00000180 +wm 32 0x40048254 0x00000180 +wm 32 0x40048258 0x00000180 +wm 32 0x4004825c 0x00000180 +wm 32 0x40048260 0x00000180 +wm 32 0x40048264 0x00000180 +wm 32 0x40048268 0x00000180 +wm 32 0x4004826c 0x00000180 +wm 32 0x40048270 0x00000180 +wm 32 0x40048274 0x00000180 +wm 32 0x40048278 0x00000180 +wm 32 0x4004827c 0x00010180 +wm 32 0x40048280 0x00010180 +wm 32 0x40048284 0x00010180 +wm 32 0x40048288 0x00010180 +wm 32 0x4004828c 0x00010180 +wm 32 0x40048290 0x00010180 +wm 32 0x40048294 0x00010180 +wm 32 0x40048298 0x00010180 +wm 32 0x4004829c 0x00010180 +wm 32 0x400482a0 0x00010180 +wm 32 0x400482a4 0x00010180 +wm 32 0x400482a8 0x00010180 +wm 32 0x400482ac 0x00010180 +wm 32 0x400482b0 0x00010180 +wm 32 0x400482b4 0x00010180 +wm 32 0x400482b8 0x00010180 +wm 32 0x400482bc 0x00010180 +wm 32 0x400482c0 0x00010180 +wm 32 0x400482c4 0x00010180 +wm 32 0x400482c8 0x00010180 +wm 32 0x400482cc 0x00000180 +wm 32 0x400482d0 0x00000180 +wm 32 0x400482d4 0x00000180 +wm 32 0x400482d8 0x00000180 +wm 32 0x4004821c 0x00000180 + +/* ======================= DDR Controller =======================*/ + +CHECKPOINT(5) +wm 32 0x400ae000 0x00000600 +wm 32 0x400ae008 0x00000005 +wm 32 0x400ae028 0x00013880 +wm 32 0x400ae02c 0x00030d40 +wm 32 0x400ae030 0x00000506 +wm 32 0x400ae034 0x06040400 +wm 32 0x400ae038 0x1006040e +wm 32 0x400ae040 0x04040000 +wm 32 0x400ae044 0x006db00c +wm 32 0x400ae048 0x00000403 +wm 32 0x400ae050 0x01000000 +wm 32 0x400ae054 0x00060001 +wm 32 0x400ae058 0x000c0000 +wm 32 0x400ae05c 0x03000200 +wm 32 0x400ae060 0x00000006 +wm 32 0x400ae064 0x00010000 +wm 32 0x400ae068 0x0c300068 +wm 32 0x400ae070 0x00000000 +wm 32 0x400ae074 0x00000003 +wm 32 0x400ae078 0x0000000a +wm 32 0x400ae07c 0x006c0200 +wm 32 0x400ae084 0x00010000 +wm 32 0x400ae088 0x00050500 +wm 32 0x400ae098 0x00000000 +wm 32 0x400ae09c 0x04001002 +wm 32 0x400ae0a4 0x00000001 +wm 32 0x400ae0c0 0x00460420 +wm 32 0x400ae0c4 0x00000000 +wm 32 0x400ae0cc 0x00000000 +wm 32 0x400ae0e4 0x02000000 +wm 32 0x400ae108 0x01000200 +wm 32 0x400ae10c 0x00000040 +wm 32 0x400ae114 0x00000200 +wm 32 0x400ae118 0x00000040 +wm 32 0x400ae120 0x00000000 +wm 32 0x400ae124 0x0a010100 +wm 32 0x400ae128 0x01014040 +wm 32 0x400ae12c 0x01010101 +wm 32 0x400ae130 0x03030000 +wm 32 0x400ae134 0x01000101 +wm 32 0x400ae138 0x0700000c +wm 32 0x400ae13c 0x00000000 +wm 32 0x400ae148 0x10000000 +wm 32 0x400ae15c 0x01000000 +wm 32 0x400ae160 0x00040000 +wm 32 0x400ae164 0x00000002 +wm 32 0x400ae16c 0x00020000 +wm 32 0x400ae180 0x00002819 +wm 32 0x400ae184 0x01000000 +wm 32 0x400ae188 0x00000000 +wm 32 0x400ae18c 0x00000000 +wm 32 0x400ae198 0x00000000 +wm 32 0x400ae1a4 0x00000c00 +wm 32 0x400ae1a8 0x00000000 +wm 32 0x400ae1b8 0x0000000c +wm 32 0x400ae1c8 0x00000000 +wm 32 0x400ae1cc 0x00000000 +wm 32 0x400ae1d4 0x00000000 +wm 32 0x400ae1d8 0x01010000 +wm 32 0x400ae1e0 0x02020000 +wm 32 0x400ae1e4 0x00000202 +wm 32 0x400ae1e8 0x01010064 +wm 32 0x400ae1ec 0x00010101 +wm 32 0x400ae1f0 0x00000064 +wm 32 0x400ae1f8 0x00000800 +wm 32 0x400ae210 0x00000506 +wm 32 0x400ae224 0x00020000 +wm 32 0x400ae228 0x01000000 +wm 32 0x400ae22c 0x04070303 +wm 32 0x400ae230 0x00000040 +wm 32 0x400ae23c 0x06000080 +wm 32 0x400ae240 0x04070303 +wm 32 0x400ae244 0x00000040 +wm 32 0x400ae248 0x00000040 +wm 32 0x400ae24c 0x000f0000 +wm 32 0x400ae250 0x000f0000 +wm 32 0x400ae25c 0x00000101 +wm 32 0x400ae268 0x682c4000 +wm 32 0x400ae26c 0x00000012 +wm 32 0x400ae278 0x00000006 +wm 32 0x400ae284 0x00010202 + +/* ======================= DDR PHY =======================*/ + +CHECKPOINT(6) + +wm 32 0x400ae400 0x00002613 +wm 32 0x400ae440 0x00002613 +wm 32 0x400ae480 0x00002613 +wm 32 0x400ae404 0x00002615 +wm 32 0x400ae444 0x00002615 +wm 32 0x400ae408 0x00210000 +wm 32 0x400ae448 0x00210000 +wm 32 0x400ae488 0x00210000 +wm 32 0x400ae40c 0x0001012a +wm 32 0x400ae44c 0x0001012a +wm 32 0x400ae48c 0x0001012a +wm 32 0x400ae410 0x00002000 +wm 32 0x400ae450 0x00002000 +wm 32 0x400ae490 0x00002000 +wm 32 0x400ae4c4 0x00000000 +wm 32 0x400ae4c8 0x00001100 +wm 32 0x400ae4d0 0x00010101 +wm 32 0x400ae000 0x00000601 + +CHECKPOINT(7) + +check 32 while_any_bit_clear 0x400ae140 0x100 +# check 32 while_any_bit_clear 0x400ae42c 0x1 +# check 32 while_any_bit_clear 0x400ae46c 0x1 +# check 32 while_any_bit_clear 0x400ae4ac 0x1 + +CHECKPOINT(8) + +wm 32 0x80000000 0xa5a5a5a5 +check 32 while_any_bit_clear 0x80000000 0xa5a5a5a5 + +wm 32 0x400ae000 0x00000600 +wm 32 0x400ae000 0x00000601 + +check 32 while_any_bit_clear 0x400ae140 0x100 +# check 32 while_any_bit_clear 0x400ae42c 0x1 +# check 32 while_any_bit_clear 0x400ae46c 0x1 +# check 32 while_any_bit_clear 0x400ae4ac 0x1 + +/* wm 32 0x3f040000 0xf0 + check 32 while_any_bit_clear 0x3f040000 0x0f */ + + +CHECKPOINT(9) diff --git a/arch/arm/boards/zii-vf610-dev/lowlevel.c b/arch/arm/boards/zii-vf610-dev/lowlevel.c new file mode 100644 index 0000000000..95b68d5dce --- /dev/null +++ b/arch/arm/boards/zii-vf610-dev/lowlevel.c @@ -0,0 +1,137 @@ +/* + * Copyright (C) 2016 Zodiac Inflight Innovation + * Author: Andrey Smirnov <andrew.smirnov@gmail.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <linux/sizes.h> +#include <mach/generic.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <mach/vf610-regs.h> +#include <mach/clock-vf610.h> +#include <mach/iomux-vf610.h> +#include <debug_ll.h> + +static inline void setup_uart(void) +{ + void __iomem *iomux = IOMEM(VF610_IOMUXC_BASE_ADDR); + + vf610_ungate_all_peripherals(); + vf610_setup_pad(iomux, VF610_PAD_PTB10__UART0_TX); + vf610_uart_setup_ll(); + + putc_ll('>'); +} + +enum zii_platform_vf610_type { + ZII_PLATFORM_VF610_DEV_REV_B = 0x01, + ZII_PLATFORM_VF610_SCU4_AIB = 0x02, + ZII_PLATFORM_VF610_SPU3 = 0x03, + ZII_PLATFORM_VF610_CFU1 = 0x04, + ZII_PLATFORM_VF610_DEV_REV_C = 0x05, +}; + +unsigned int get_system_type(void) +{ +#define GPIO_PDIR 0x10 + + u32 pdir; + void __iomem *gpio2 = IOMEM(VF610_GPIO2_BASE_ADDR); + void __iomem *iomux = IOMEM(VF610_IOMUXC_BASE_ADDR); + unsigned low, high; + + /* + * System type is encoded as a 4-bit number specified by the + * following pins (pulled up or down with resistors on the + * board). + */ + vf610_setup_pad(iomux, VF610_PAD_PTD16__GPIO_78); + vf610_setup_pad(iomux, VF610_PAD_PTD17__GPIO_77); + vf610_setup_pad(iomux, VF610_PAD_PTD18__GPIO_76); + vf610_setup_pad(iomux, VF610_PAD_PTD19__GPIO_75); + + pdir = readl(gpio2 + GPIO_PDIR); + + low = 75 % 32; + high = 78 % 32; + + pdir &= GENMASK(high, low); + pdir >>= low; + + return pdir; +} + +extern char __dtb_vf610_zii_dev_rev_b_start[]; +extern char __dtb_vf610_zii_dev_rev_c_start[]; +extern char __dtb_vf610_zii_cfu1_rev_a_start[]; +extern char __dtb_vf610_zii_spu3_rev_a_start[]; +extern char __dtb_vf610_zii_scu4_aib_rev_c_start[]; + +ENTRY_FUNCTION(start_zii_vf610_dev, r0, r1, r2) +{ + void *fdt; + const unsigned int system_type = get_system_type(); + + vf610_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + switch (system_type) { + default: + /* + * GCC can be smart enough to, when DEBUG_LL is + * disabled, reduce this switch statement to a LUT + * fetch. Unfortunately here, this early in the boot + * process before any relocation/address fixups could + * happen, the address of that LUT used by the code is + * incorrect and any access to it would result in + * bogus values. + * + * Adding the following barrier() statement seem to + * force the compiler to always translate this block + * to a sequence of consecutive checks and jumps with + * relative fetches, which should work with or without + * relocation/fixups. + */ + barrier(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) { + relocate_to_current_adr(); + setup_c(); + puts_ll("*********************************\n"); + puts_ll("* Unknown system type: "); + puthex_ll(system_type); + puts_ll("\n* Assuming devboard revision B\n"); + puts_ll("*********************************\n"); + } + case ZII_PLATFORM_VF610_DEV_REV_B: /* FALLTHROUGH */ + fdt = __dtb_vf610_zii_dev_rev_b_start; + break; + case ZII_PLATFORM_VF610_SCU4_AIB: + fdt = __dtb_vf610_zii_scu4_aib_rev_c_start; + break; + case ZII_PLATFORM_VF610_DEV_REV_C: + fdt = __dtb_vf610_zii_dev_rev_c_start; + break; + case ZII_PLATFORM_VF610_CFU1: + fdt = __dtb_vf610_zii_cfu1_rev_a_start; + break; + case ZII_PLATFORM_VF610_SPU3: + fdt = __dtb_vf610_zii_spu3_rev_a_start; + break; + } + + barebox_arm_entry(0x80000000, SZ_512M, fdt - get_runtime_offset()); +} |