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-rw-r--r--arch/arm/boards/Makefile2
-rw-r--r--arch/arm/boards/at91sam9263ek/lowlevel_init.c4
-rw-r--r--arch/arm/boards/at91sam9x5ek/lowlevel.c4
-rw-r--r--arch/arm/boards/canon-a1100/lowlevel.c9
-rw-r--r--arch/arm/boards/microchip-ksz9477-evb/lowlevel.c35
-rw-r--r--arch/arm/boards/module-mb7707/lowlevel.c8
-rw-r--r--arch/arm/boards/netx/Makefile2
-rw-r--r--arch/arm/boards/netx/netx.c84
-rw-r--r--arch/arm/boards/netx/platform.S28
-rw-r--r--arch/arm/boards/sama5d27-som1/Makefile1
-rw-r--r--arch/arm/boards/sama5d27-som1/lowlevel.c81
-rw-r--r--arch/arm/boards/versatile/lowlevel.c9
-rw-r--r--arch/arm/boards/virt2real/lowlevel.c8
13 files changed, 148 insertions, 127 deletions
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 10cd0c413d..6cb40d084b 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -82,7 +82,6 @@ obj-$(CONFIG_MACH_NETGEAR_RN2120) += netgear-rn2120/
obj-$(CONFIG_MACH_NOMADIK_8815NHK) += nhk8815/
obj-$(CONFIG_MACH_NVIDIA_BEAVER) += nvidia-beaver/
obj-$(CONFIG_MACH_NVIDIA_JETSON) += nvidia-jetson-tk1/
-obj-$(CONFIG_MACH_NXDB500) += netx/
obj-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += nxp-imx6ull-evk/
obj-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += nxp-imx8mq-evk/
obj-$(CONFIG_MACH_OMAP343xSDP) += omap343xdsp/
@@ -113,6 +112,7 @@ obj-$(CONFIG_MACH_RPI_COMMON) += raspberry-pi/
obj-$(CONFIG_MACH_SABRELITE) += freescale-mx6-sabrelite/
obj-$(CONFIG_MACH_SABRESD) += freescale-mx6-sabresd/
obj-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += freescale-mx6sx-sabresdb/
+obj-$(CONFIG_MACH_SAMA5D27_SOM1) += sama5d27-som1/
obj-$(CONFIG_MACH_SAMA5D3XEK) += sama5d3xek/
obj-$(CONFIG_MACH_SAMA5D3_XPLAINED) += sama5d3_xplained/
obj-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += microchip-ksz9477-evb/
diff --git a/arch/arm/boards/at91sam9263ek/lowlevel_init.c b/arch/arm/boards/at91sam9263ek/lowlevel_init.c
index ba0ae39c7f..0bf0e0fb4e 100644
--- a/arch/arm/boards/at91sam9263ek/lowlevel_init.c
+++ b/arch/arm/boards/at91sam9263ek/lowlevel_init.c
@@ -115,7 +115,7 @@ static void __bare_init at91sam9263ek_init(void *fdt)
fdt);
}
-extern char __dtb_at91sam9263ek_start[];
+extern char __dtb_z_at91sam9263ek_start[];
ENTRY_FUNCTION(start_at91sam9263ek, r0, r1, r2)
{
@@ -126,7 +126,7 @@ ENTRY_FUNCTION(start_at91sam9263ek, r0, r1, r2)
arm_setup_stack(AT91SAM9263_SRAM0_BASE + AT91SAM9263_SRAM0_SIZE);
if (IS_ENABLED(CONFIG_MACH_AT91SAM9263EK_DT))
- fdt = __dtb_at91sam9263ek_start + get_runtime_offset();
+ fdt = __dtb_z_at91sam9263ek_start + get_runtime_offset();
else
fdt = NULL;
diff --git a/arch/arm/boards/at91sam9x5ek/lowlevel.c b/arch/arm/boards/at91sam9x5ek/lowlevel.c
index 9033597e7c..c1433c8f7e 100644
--- a/arch/arm/boards/at91sam9x5ek/lowlevel.c
+++ b/arch/arm/boards/at91sam9x5ek/lowlevel.c
@@ -7,7 +7,7 @@
#include <io.h>
#include <debug_ll.h>
-extern char __dtb_at91sam9x5ek_start[];
+extern char __dtb_z_at91sam9x5ek_start[];
ENTRY_FUNCTION(start_at91sam9x5ek, r0, r1, r2)
{
@@ -16,7 +16,7 @@ ENTRY_FUNCTION(start_at91sam9x5ek, r0, r1, r2)
arm_cpu_lowlevel_init();
arm_setup_stack(AT91SAM9X5_SRAM_BASE + AT91SAM9X5_SRAM_SIZE);
- fdt = __dtb_at91sam9x5ek_start + get_runtime_offset();
+ fdt = __dtb_z_at91sam9x5ek_start + get_runtime_offset();
barebox_arm_entry(AT91_CHIPSELECT_1, at91sam9x5_get_ddram_size(), fdt);
}
diff --git a/arch/arm/boards/canon-a1100/lowlevel.c b/arch/arm/boards/canon-a1100/lowlevel.c
index 744ce59eaa..b75a1bfa60 100644
--- a/arch/arm/boards/canon-a1100/lowlevel.c
+++ b/arch/arm/boards/canon-a1100/lowlevel.c
@@ -3,10 +3,16 @@
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
+extern char __dtb_canon_a1100_start[];
+
void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2)
{
+ void *fdt;
+
arm_cpu_lowlevel_init();
+ fdt = __dtb_canon_a1100_start + get_runtime_offset();
+
/* FIXME: can we determine RAM size using CP15 register?
*
* see http://chdk.setepontos.com/index.php?topic=5980.90
@@ -19,5 +25,6 @@ void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2)
* The Control Register value (mrc p15, 0, %0, c0, c1, 4)
* is 0x00051078.
*/
- barebox_arm_entry(0x0, SZ_64M, 0);
+
+ barebox_arm_entry(0x0, SZ_64M, fdt);
}
diff --git a/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c
index 0ce2b299ed..30a5760da6 100644
--- a/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c
+++ b/arch/arm/boards/microchip-ksz9477-evb/lowlevel.c
@@ -1,7 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-only AND BSD-1-Clause
/*
+ * Copyright (C) 2014, Atmel Corporation
* Copyright (C) 2018 Ahmad Fatoum, Pengutronix
- *
- * Under GPLv2
*/
#include <common.h>
@@ -9,10 +9,34 @@
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
+#include <mach/at91_pmc_ll.h>
#include <mach/hardware.h>
+#include <mach/iomux.h>
+#include <debug_ll.h>
+#include <mach/at91_dbgu.h>
-extern char __dtb_at91_microchip_ksz9477_evb_start[];
+/* PCK = 528MHz, MCK = 132MHz */
+#define MASTER_CLOCK 132000000
+
+#define sama5d3_pmc_enable_periph_clock(clk) \
+ at91_pmc_enable_periph_clock(IOMEM(SAMA5D3_BASE_PMC), clk)
+
+static void dbgu_init(void)
+{
+ void __iomem *pio = IOMEM(SAMA5D3_BASE_PIOB);
+
+ sama5d3_pmc_enable_periph_clock(SAMA5D3_ID_PIOB);
+
+ at91_mux_pio3_pin(pio, pin_to_mask(AT91_PIN_PB31), AT91_MUX_PERIPH_A, 0);
+
+ sama5d3_pmc_enable_periph_clock(SAMA5D3_ID_DBGU);
+ at91_dbgu_setup_ll(IOMEM(AT91_BASE_DBGU1), MASTER_CLOCK, 115200);
+
+ putc_ll('>');
+}
+
+extern char __dtb_z_at91_microchip_ksz9477_evb_start[];
ENTRY_FUNCTION(start_sama5d3_xplained_ung8071, r0, r1, r2)
{
@@ -22,7 +46,10 @@ ENTRY_FUNCTION(start_sama5d3_xplained_ung8071, r0, r1, r2)
arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE);
- fdt = __dtb_at91_microchip_ksz9477_evb_start + get_runtime_offset();
+ if (IS_ENABLED(CONFIG_DEBUG_LL))
+ dbgu_init();
+
+ fdt = __dtb_z_at91_microchip_ksz9477_evb_start + get_runtime_offset();
barebox_arm_entry(SAMA5_DDRCS, SZ_256M, fdt);
}
diff --git a/arch/arm/boards/module-mb7707/lowlevel.c b/arch/arm/boards/module-mb7707/lowlevel.c
index 055e432c1c..fc102e26e1 100644
--- a/arch/arm/boards/module-mb7707/lowlevel.c
+++ b/arch/arm/boards/module-mb7707/lowlevel.c
@@ -26,9 +26,15 @@
#define MB7707_SRAM_BASE 0x40000000
#define MB7707_SRAM_SIZE SZ_128M
+extern char __dtb_module_mb7707_start[];
+
void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2)
{
+ void *fdt;
+
arm_cpu_lowlevel_init();
- barebox_arm_entry(MB7707_SRAM_BASE, MB7707_SRAM_SIZE, 0);
+ fdt = __dtb_module_mb7707_start + get_runtime_offset();
+
+ barebox_arm_entry(MB7707_SRAM_BASE, MB7707_SRAM_SIZE, fdt);
}
diff --git a/arch/arm/boards/netx/Makefile b/arch/arm/boards/netx/Makefile
deleted file mode 100644
index 90979ace8f..0000000000
--- a/arch/arm/boards/netx/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-obj-y += netx.o
-lwl-y += platform.o
diff --git a/arch/arm/boards/netx/netx.c b/arch/arm/boards/netx/netx.c
deleted file mode 100644
index a9cb6a578c..0000000000
--- a/arch/arm/boards/netx/netx.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- *
- */
-
-#include <common.h>
-#include <net.h>
-#include <init.h>
-#include <environment.h>
-#include <mach/netx-regs.h>
-#include <partition.h>
-#include <asm/armlinux.h>
-#include <fs.h>
-#include <fcntl.h>
-#include <generated/mach-types.h>
-#include <mach/netx-eth.h>
-
-struct netx_eth_platform_data eth0_data = {
- .xcno = 0,
-};
-
-struct netx_eth_platform_data eth1_data = {
- .xcno = 1,
-};
-
-static int netx_mem_init(void)
-{
- arm_add_mem_device("ram0", 0x80000000, 64 * 1024 * 1024);
-
- return 0;
-}
-mem_initcall(netx_mem_init);
-
-static int netx_devices_init(void) {
- add_cfi_flash_device(DEVICE_ID_DYNAMIC, 0xC0000000, 32 * 1024 * 1024, 0);
-
- add_generic_device("netx-eth", DEVICE_ID_DYNAMIC, NULL, 0, 0, IORESOURCE_MEM,
- &eth0_data);
- add_generic_device("netx-eth", DEVICE_ID_DYNAMIC, NULL, 0, 0, IORESOURCE_MEM,
- &eth1_data);
-
- devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0");
-
- /* Do not overwrite primary env for now */
- devfs_add_partition("nor0", 0xc0000, 0x80000, DEVFS_PARTITION_FIXED, "env0");
-
- protect_file("/dev/env0", 1);
-
- armlinux_set_architecture(MACH_TYPE_NXDB500);
-
- return 0;
-}
-
-device_initcall(netx_devices_init);
-
-static int netx_console_init(void)
-{
- /* configure gpio for serial */
- *(volatile unsigned long *)(0x00100800) = 2;
- *(volatile unsigned long *)(0x00100804) = 2;
- *(volatile unsigned long *)(0x00100808) = 2;
- *(volatile unsigned long *)(0x0010080c) = 2;
-
- barebox_set_model("Hilscher Netx nxdb500");
- barebox_set_hostname("nxdb500");
-
- add_generic_device("netx_serial", DEVICE_ID_DYNAMIC, NULL, NETX_PA_UART0, 0x40,
- IORESOURCE_MEM, NULL);
- return 0;
-}
-
-console_initcall(netx_console_init);
-
diff --git a/arch/arm/boards/netx/platform.S b/arch/arm/boards/netx/platform.S
deleted file mode 100644
index 95ae46cc6d..0000000000
--- a/arch/arm/boards/netx/platform.S
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Board specific setup info
- *
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-#include <linux/sizes.h>
-#include <asm/barebox-arm-head.h>
-
-.globl barebox_arm_reset_vector
-barebox_arm_reset_vector:
- bl arm_cpu_lowlevel_init
- mov r0, #0x80000000
- mov r1, #SZ_64M
- mov r2, #0
- b barebox_arm_entry
diff --git a/arch/arm/boards/sama5d27-som1/Makefile b/arch/arm/boards/sama5d27-som1/Makefile
new file mode 100644
index 0000000000..b08c4a93ca
--- /dev/null
+++ b/arch/arm/boards/sama5d27-som1/Makefile
@@ -0,0 +1 @@
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/sama5d27-som1/lowlevel.c b/arch/arm/boards/sama5d27-som1/lowlevel.c
new file mode 100644
index 0000000000..7df5a4772d
--- /dev/null
+++ b/arch/arm/boards/sama5d27-som1/lowlevel.c
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Ahmad Fatoum, Pengutronix
+ */
+
+#include <common.h>
+#include <init.h>
+
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/at91_pmc_ll.h>
+
+#include <mach/hardware.h>
+#include <mach/iomux.h>
+#include <debug_ll.h>
+#include <mach/at91_dbgu.h>
+
+#define RGB_LED_GREEN (1 << 0)
+#define RGB_LED_RED (1 << 1)
+#define RGB_LED_BLUE (1 << 2)
+
+/* PCK = 492MHz, MCK = 164MHz */
+#define MASTER_CLOCK 164000000
+
+#define sama5d2_pmc_enable_periph_clock(clk) \
+ at91_pmc_sam9x5_enable_periph_clock(IOMEM(SAMA5D2_BASE_PMC), clk)
+
+static void ek_turn_led(unsigned color)
+{
+ struct {
+ unsigned long pio;
+ unsigned bit;
+ unsigned color;
+ } *led, leds[] = {
+ { .pio = SAMA5D2_BASE_PIOA, .bit = 10, .color = color & RGB_LED_RED },
+ { .pio = SAMA5D2_BASE_PIOB, .bit = 1, .color = color & RGB_LED_GREEN },
+ { .pio = SAMA5D2_BASE_PIOA, .bit = 31, .color = color & RGB_LED_BLUE },
+ { /* sentinel */ },
+ };
+
+ for (led = leds; led->pio; led++) {
+ at91_mux_gpio4_enable(IOMEM(led->pio), BIT(led->bit));
+ at91_mux_gpio4_input(IOMEM(led->pio), BIT(led->bit), false);
+ at91_mux_gpio4_set(IOMEM(led->pio), BIT(led->bit), led->color);
+ }
+}
+
+static void ek_dbgu_init(void)
+{
+ unsigned mck = MASTER_CLOCK / 2;
+
+ sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_PIOD);
+
+ at91_mux_pio4_set_A_periph(IOMEM(SAMA5D2_BASE_PIOD),
+ pin_to_mask(AT91_PIN_PD3)); /* DBGU TXD */
+
+ sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_UART1);
+
+ at91_dbgu_setup_ll(IOMEM(SAMA5D2_BASE_UART1), mck, 115200);
+
+ putc_ll('>');
+}
+
+extern char __dtb_z_at91_sama5d27_som1_ek_start[];
+
+ENTRY_FUNCTION(start_sama5d27_som1_ek, r0, r1, r2)
+{
+ void *fdt;
+
+ arm_cpu_lowlevel_init();
+
+ arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE - 16);
+
+ if (IS_ENABLED(CONFIG_DEBUG_LL))
+ ek_dbgu_init();
+
+ fdt = __dtb_z_at91_sama5d27_som1_ek_start + get_runtime_offset();
+
+ ek_turn_led(RGB_LED_GREEN);
+ barebox_arm_entry(SAMA5_DDRCS, SZ_128M, fdt);
+}
diff --git a/arch/arm/boards/versatile/lowlevel.c b/arch/arm/boards/versatile/lowlevel.c
index a9ccf1fff5..beab04d234 100644
--- a/arch/arm/boards/versatile/lowlevel.c
+++ b/arch/arm/boards/versatile/lowlevel.c
@@ -3,8 +3,15 @@
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
+extern char __dtb_versatile_pb_start[];
+
void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2)
{
+ void *fdt;
+
arm_cpu_lowlevel_init();
- barebox_arm_entry(0x0, SZ_64M, NULL);
+
+ fdt = __dtb_versatile_pb_start + get_runtime_offset();
+
+ barebox_arm_entry(0x0, SZ_64M, fdt);
}
diff --git a/arch/arm/boards/virt2real/lowlevel.c b/arch/arm/boards/virt2real/lowlevel.c
index 264ebee893..a72334bb0e 100644
--- a/arch/arm/boards/virt2real/lowlevel.c
+++ b/arch/arm/boards/virt2real/lowlevel.c
@@ -26,9 +26,15 @@
#define VIRT2REAL_SRAM_BASE 0x82000000
#define VIRT2REAL_SRAM_SIZE SZ_16M
+extern char __dtb_virt2real_start[];
+
void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2)
{
+ void *fdt;
+
arm_cpu_lowlevel_init();
- barebox_arm_entry(VIRT2REAL_SRAM_BASE, VIRT2REAL_SRAM_SIZE, NULL);
+ fdt = __dtb_virt2real_start + get_runtime_offset();
+
+ barebox_arm_entry(VIRT2REAL_SRAM_BASE, VIRT2REAL_SRAM_SIZE, fdt);
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-30 17:20:16 +0000