diff options
Diffstat (limited to 'arch/arm/cpu/cache-armv5.S')
-rw-r--r-- | arch/arm/cpu/cache-armv5.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/cache-armv5.S b/arch/arm/cpu/cache-armv5.S index 3618c4495f..f52bcb77ca 100644 --- a/arch/arm/cpu/cache-armv5.S +++ b/arch/arm/cpu/cache-armv5.S @@ -62,7 +62,7 @@ ENDPROC(__mmu_cache_flush) * * (same as v4wb) */ -ENTRY(dma_inv_range) +ENTRY(__dma_inv_range) tst r0, #CACHE_DLINESIZE - 1 bic r0, r0, #CACHE_DLINESIZE - 1 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry @@ -85,7 +85,7 @@ ENTRY(dma_inv_range) * * (same as v4wb) */ -ENTRY(dma_clean_range) +ENTRY(__dma_clean_range) bic r0, r0, #CACHE_DLINESIZE - 1 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry add r0, r0, #CACHE_DLINESIZE @@ -102,7 +102,7 @@ ENTRY(dma_clean_range) * - start - virtual start address * - end - virtual end address */ -ENTRY(dma_flush_range) +ENTRY(__dma_flush_range) bic r0, r0, #CACHE_DLINESIZE - 1 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry add r0, r0, #CACHE_DLINESIZE |