summaryrefslogtreecommitdiffstats
path: root/arch/arm/cpu/cache-armv5.S
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/cpu/cache-armv5.S')
-rw-r--r--arch/arm/cpu/cache-armv5.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/cpu/cache-armv5.S b/arch/arm/cpu/cache-armv5.S
index 9fb320ff0c..d870e6b80f 100644
--- a/arch/arm/cpu/cache-armv5.S
+++ b/arch/arm/cpu/cache-armv5.S
@@ -1,4 +1,5 @@
#include <linux/linkage.h>
+#include <init.h>
#define CACHE_DLINESIZE 32
@@ -41,7 +42,7 @@ ENTRY(__mmu_cache_off)
mov pc, lr
ENDPROC(__mmu_cache_off)
-.section ".text_bare_init.text"
+__BARE_INIT
ENTRY(__mmu_cache_flush)
1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache
bne 1b