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-rw-r--r--arch/arm/cpu/cache-armv7.S3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/cpu/cache-armv7.S b/arch/arm/cpu/cache-armv7.S
index 6a8aff8bb1..0f6108426c 100644
--- a/arch/arm/cpu/cache-armv7.S
+++ b/arch/arm/cpu/cache-armv7.S
@@ -7,7 +7,6 @@ ENTRY(v7_mmu_cache_on)
mov r12, lr
#ifdef CONFIG_MMU
mrc p15, 0, r11, c0, c1, 4 @ read ID_MMFR0
- tst r11, #0xf @ VMSA
mov r0, #0
dsb @ drain write buffer
tst r11, #0xf @ VMSA
@@ -21,8 +20,6 @@ ENTRY(v7_mmu_cache_on)
orr r0, r0, #1 << 25 @ big-endian page tables
#endif
orrne r0, r0, #1 @ MMU enabled
- movne r1, #-1
- mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
#endif
isb
mcr p15, 0, r0, c1, c0, 0 @ load control register