diff options
Diffstat (limited to 'arch/arm/dts')
26 files changed, 1196 insertions, 408 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index af061bd292..a1e0bb6a41 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -67,6 +67,7 @@ lwl-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \ imx6dl-phytec-phycore-som-emmc.dtb.o \ imx6dl-phytec-phycore-som-lc-emmc.dtb.o \ imx6ul-phytec-phycore-som-nand.dtb.o \ + imx6ul-phytec-phycore-som-emmc.dtb.o \ imx6ull-phytec-phycore-som-lc-nand.dtb.o \ imx6ull-phytec-phycore-som-nand.dtb.o \ imx6ull-phytec-phycore-som-emmc.dtb.o @@ -110,7 +111,7 @@ lwl-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingb imx6dl-hummingboard2.dtb.o imx6q-hummingboard2.dtb.o \ imx6q-h100.dtb.o lwl-$(CONFIG_MACH_SEEED_ODYSSEY) += stm32mp157c-odyssey.dtb.o -lwl-$(CONFIG_MACH_STM32MP157C_DK2) += stm32mp157c-dk2.dtb.o +lwl-$(CONFIG_MACH_STM32MP15XX_DKX) += stm32mp157c-dk2.dtb.o stm32mp157a-dk1.dtb.o lwl-$(CONFIG_MACH_LXA_MC1) += stm32mp157c-lxa-mc1.dtb.o lwl-$(CONFIG_MACH_SCB9328) += imx1-scb9328.dtb.o lwl-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += imx6q-wandboard.dtb.o imx6dl-wandboard.dtb.o @@ -138,6 +139,7 @@ lwl-$(CONFIG_MACH_VIRT2REAL) += virt2real.dtb.o lwl-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o lwl-$(CONFIG_MACH_WARP7) += imx7s-warp.dtb.o lwl-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o +lwl-$(CONFIG_MACH_WEBASTO_CCBV2) += imx6ul-webasto-ccbv2.dtb.o lwl-$(CONFIG_MACH_ZII_RDU1) += \ imx51-zii-rdu1.dtb.o \ imx51-zii-scu2-mezz.dtb.o \ diff --git a/arch/arm/dts/am335x-afi-gf.dts b/arch/arm/dts/am335x-afi-gf.dts index cba8cbc8d6..54059dbfce 100644 --- a/arch/arm/dts/am335x-afi-gf.dts +++ b/arch/arm/dts/am335x-afi-gf.dts @@ -370,186 +370,186 @@ &am33xx_pinmux { dcan0_pins: pinmux_dcan0_pins { pinctrl-single,pins = < - 0x11c (PIN_OUTPUT_PULLUP | MUX_MODE1) /* mii1_txd3.dcan0_tx_mux0, OUTPUT_PULLUP | MODE1 */ - 0x120 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_txd2.dcan0_rx_mux0, INPUT_PULLUP | MODE1 */ + 0x11c PIN_OUTPUT_PULLUP MUX_MODE1 /* mii1_txd3.dcan0_tx_mux0, OUTPUT_PULLUP | MODE1 */ + 0x120 PIN_INPUT_PULLUP MUX_MODE1 /* mii1_txd2.dcan0_rx_mux0, INPUT_PULLUP | MODE1 */ >; }; eth_pins: pinmux_eth_pins { pinctrl-single,pins = < /* RMII2 (mezzanine) */ - 0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a0.rmii2_txen, OUTPUT_PULLDOWN | MODE3 */ - 0x050 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_a4.rmii2_txd1, INPUT_PULLDOWN | MODE3 */ - 0x054 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_a5.rmii2_txd0, INPUT_PULLDOWN | MODE3 */ - 0x068 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_a10.rmii2_rxd1, INPUT_PULLDOWN | MODE3 */ - 0x06c (PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_a11.rmii2_rxd0, INPUT_PULLDOWN | MODE3 */ - 0x070 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wait0.rmii2_crs_dv, INPUT_PULLUP | MODE3 */ /* PHYAD pin */ - 0x074 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wpn.rmii2_rxer, INPUT_PULLUP | MODE3 */ - 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_col.rmii2_refclk, INPUT_PULLDOWN | MODE1 */ + 0x040 PIN_OUTPUT_PULLDOWN MUX_MODE3 /* gpmc_a0.rmii2_txen, OUTPUT_PULLDOWN | MODE3 */ + 0x050 PIN_INPUT_PULLDOWN MUX_MODE3 /* gpmc_a4.rmii2_txd1, INPUT_PULLDOWN | MODE3 */ + 0x054 PIN_INPUT_PULLDOWN MUX_MODE3 /* gpmc_a5.rmii2_txd0, INPUT_PULLDOWN | MODE3 */ + 0x068 PIN_INPUT_PULLDOWN MUX_MODE3 /* gpmc_a10.rmii2_rxd1, INPUT_PULLDOWN | MODE3 */ + 0x06c PIN_INPUT_PULLDOWN MUX_MODE3 /* gpmc_a11.rmii2_rxd0, INPUT_PULLDOWN | MODE3 */ + 0x070 PIN_INPUT_PULLUP MUX_MODE3 /* gpmc_wait0.rmii2_crs_dv, INPUT_PULLUP | MODE3 */ /* PHYAD pin */ + 0x074 PIN_INPUT_PULLUP MUX_MODE3 /* gpmc_wpn.rmii2_rxer, INPUT_PULLUP | MODE3 */ + 0x108 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_col.rmii2_refclk, INPUT_PULLDOWN | MODE1 */ /* RMII1 (board) */ - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv, INPUT_PULLDOWN | MODE1 */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rx_er.rmii1_rxer, INPUT_PULLDOWN | MODE1 */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_tx_en.rmii1_txen, OUTPUT_PULLDOWN | MODE1 */ - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1, INPUT_PULLDOWN | MODE1 */ - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0, INPUT_PULLDOWN | MODE1 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1, INPUT_PULLDOWN | MODE1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0, INPUT_PULLDOWN | MODE1 */ - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk, INPUT_PULLDOWN | MODE0 */ + 0x10c PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_crs.rmii1_crs_dv, INPUT_PULLDOWN | MODE1 */ + 0x110 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rx_er.rmii1_rxer, INPUT_PULLDOWN | MODE1 */ + 0x114 PIN_OUTPUT_PULLDOWN MUX_MODE1 /* mii1_tx_en.rmii1_txen, OUTPUT_PULLDOWN | MODE1 */ + 0x124 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_txd1.rmii1_txd1, INPUT_PULLDOWN | MODE1 */ + 0x128 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_txd0.rmii1_txd0, INPUT_PULLDOWN | MODE1 */ + 0x13c PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxd1.rmii1_rxd1, INPUT_PULLDOWN | MODE1 */ + 0x140 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxd0.rmii1_rxd0, INPUT_PULLDOWN | MODE1 */ + 0x144 PIN_INPUT_PULLDOWN MUX_MODE0 /* rmii1_ref_clk.rmii1_refclk, INPUT_PULLDOWN | MODE0 */ /* MDIO (board & mezzanine) */ - 0x148 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio.mdio_data, INPUT_PULLUP | MODE0 */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdc.mdio_clk, OUTPUT_PULLUP | MODE0 */ + 0x148 PIN_INPUT_PULLUP MUX_MODE0 /* mdio.mdio_data, INPUT_PULLUP | MODE0 */ + 0x14c PIN_OUTPUT_PULLUP MUX_MODE0 /* mdc.mdio_clk, OUTPUT_PULLUP | MODE0 */ >; }; spi0_pins: pinmux_spi0_pins { /* SPI NOR-Flash & FRAM */ pinctrl-single,pins = < - 0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk, INPUT_PULLUP | MODE0 */ - 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0, INPUT_PULLUP | MODE0 */ - 0x158 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1, INPUT_PULLUP | MODE0 */ - 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0, OUTPUT_PULLUP | MODE0 */ - 0x160 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs1, OUTPUT_PULLUP | MODE0 */ + 0x150 PIN_INPUT_PULLUP MUX_MODE0 /* spi0_sclk, INPUT_PULLUP | MODE0 */ + 0x154 PIN_INPUT_PULLUP MUX_MODE0 /* spi0_d0, INPUT_PULLUP | MODE0 */ + 0x158 PIN_INPUT_PULLUP MUX_MODE0 /* spi0_d1, INPUT_PULLUP | MODE0 */ + 0x15c PIN_OUTPUT_PULLUP MUX_MODE0 /* spi0_cs0, OUTPUT_PULLUP | MODE0 */ + 0x160 PIN_OUTPUT_PULLUP MUX_MODE0 /* spi0_cs1, OUTPUT_PULLUP | MODE0 */ >; }; spi1_pins: pinmux_spi1_pins { /* SPI (mezzanine) */ pinctrl-single,pins = < - 0x170 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* uart0_rxd.spi1_cs0_mux3, OUTPUT_PULLUP | MODE1 */ - 0x174 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* uart0_txd.spi1_cs1_mux3, OUTPUT_PULLUP | MODE1 */ - 0x190 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk_mux2, INPUT_PULLUP | MODE3 */ - 0x194 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_fsx.spi1_d0_mux2, INPUT_PULLUP | MODE3 */ - 0x198 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_axr0.spi1_d1_mux2, INPUT_PULLUP | MODE3 */ + 0x170 PIN_OUTPUT_PULLUP MUX_MODE1 /* uart0_rxd.spi1_cs0_mux3, OUTPUT_PULLUP | MODE1 */ + 0x174 PIN_OUTPUT_PULLUP MUX_MODE1 /* uart0_txd.spi1_cs1_mux3, OUTPUT_PULLUP | MODE1 */ + 0x190 PIN_INPUT_PULLUP MUX_MODE3 /* mcasp0_aclkx.spi1_sclk_mux2, INPUT_PULLUP | MODE3 */ + 0x194 PIN_INPUT_PULLUP MUX_MODE3 /* mcasp0_fsx.spi1_d0_mux2, INPUT_PULLUP | MODE3 */ + 0x198 PIN_INPUT_PULLUP MUX_MODE3 /* mcasp0_axr0.spi1_d1_mux2, INPUT_PULLUP | MODE3 */ >; }; usb0_pins: pinmux_usb0_pins { /* USB-HOST (mezzanine) */ pinctrl-single,pins = < - 0x208 (PIN_INPUT | MUX_MODE0) /* usb0_dm, INPUT | MODE0 */ - 0x20c (PIN_INPUT | MUX_MODE0) /* usb0_dp, INPUT | MODE0 */ - 0x210 (PIN_INPUT | MUX_MODE0) /* usb0_ce, INPUT | MODE0 */ - 0x214 (PIN_INPUT | MUX_MODE0) /* usb0_id, INPUT | MODE0 */ - 0x218 (PIN_INPUT | MUX_MODE0) /* usb0_vbus, INPUT | MODE0 */ - 0x21c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb0_drvvbus, OUTPUT_PULLDOWN | MODE0 */ + 0x208 PIN_INPUT MUX_MODE0 /* usb0_dm, INPUT | MODE0 */ + 0x20c PIN_INPUT MUX_MODE0 /* usb0_dp, INPUT | MODE0 */ + 0x210 PIN_INPUT MUX_MODE0 /* usb0_ce, INPUT | MODE0 */ + 0x214 PIN_INPUT MUX_MODE0 /* usb0_id, INPUT | MODE0 */ + 0x218 PIN_INPUT MUX_MODE0 /* usb0_vbus, INPUT | MODE0 */ + 0x21c PIN_OUTPUT_PULLDOWN MUX_MODE0 /* usb0_drvvbus, OUTPUT_PULLDOWN | MODE0 */ >; }; usb1_pins: pinmux_usb1_pins { /* USB-OTG (front) */ pinctrl-single,pins = < - 0x220 (PIN_INPUT | MUX_MODE0) /* usb1_dm, INPUT | MODE0 */ - 0x224 (PIN_INPUT | MUX_MODE0) /* usb1_dp, INPUT | MODE0 */ - 0x228 (PIN_INPUT | MUX_MODE0) /* usb1_ce, INPUT | MODE0 */ - 0x22c (PIN_INPUT | MUX_MODE0) /* usb1_id, INPUT | MODE0 */ - 0x230 (PIN_INPUT | MUX_MODE0) /* usb1_vbus, INPUT | MODE0 */ - 0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus, OUTPUT_PULLDOWN | MODE0 */ + 0x220 PIN_INPUT MUX_MODE0 /* usb1_dm, INPUT | MODE0 */ + 0x224 PIN_INPUT MUX_MODE0 /* usb1_dp, INPUT | MODE0 */ + 0x228 PIN_INPUT MUX_MODE0 /* usb1_ce, INPUT | MODE0 */ + 0x22c PIN_INPUT MUX_MODE0 /* usb1_id, INPUT | MODE0 */ + 0x230 PIN_INPUT MUX_MODE0 /* usb1_vbus, INPUT | MODE0 */ + 0x234 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* usb1_drvvbus, OUTPUT_PULLDOWN | MODE0 */ >; }; uart0_pins: pinmux_uart0_pins { /* debug, later spi1 CS1/2 */ pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd */ + 0x170 PIN_INPUT_PULLUP MUX_MODE0 /* uart0_rxd */ + 0x174 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* uart0_txd */ >; }; uart1_pins: pinmux_uart1_pins { /* UART1 (PRU) */ pinctrl-single,pins = < - 0x180 (PIN_INPUT | MUX_MODE5) /* uart1_rxd.pr1_uart0_rxd_mux1, INPUT | MODE5 (RS485_RXD)*/ - 0x184 (PIN_OUTPUT | MUX_MODE5) /* uart1_txd.pr1_uart0_txd_mux1, OUTPUT | MODE5 (RS485_TXD) */ + 0x180 PIN_INPUT MUX_MODE5 /* uart1_rxd.pr1_uart0_rxd_mux1, INPUT | MODE5 (RS485_RXD)*/ + 0x184 PIN_OUTPUT MUX_MODE5 /* uart1_txd.pr1_uart0_txd_mux1, OUTPUT | MODE5 (RS485_TXD) */ >; }; uart2_pins: pinmux_uart2_pins { /* UART2 (console) */ pinctrl-single,pins = < - 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_tx_clk.uart2_rxd_mux0, INPUT_PULLDOWN | MODE1 (UART2_RXD) */ - 0x130 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rx_clk.uart2_txd_mux0, OUTPUT_PULLDOWN | MODE1 (UART2_TXD) */ + 0x12c PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_tx_clk.uart2_rxd_mux0, INPUT_PULLDOWN | MODE1 (UART2_RXD) */ + 0x130 PIN_OUTPUT_PULLDOWN MUX_MODE1 /* mii1_rx_clk.uart2_txd_mux0, OUTPUT_PULLDOWN | MODE1 (UART2_TXD) */ >; }; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */ + 0x188 PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */ + 0x18c PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */ >; }; i2c1_pins: pinmux_i2c1_pins { /* 1-wire */ pinctrl-single,pins = < - 0x168 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda_mux1, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */ - 0x16c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl_mux1, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */ + 0x168 PIN_INPUT_PULLUP MUX_MODE3 /* uart0_ctsn.i2c1_sda_mux1, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */ + 0x16c PIN_INPUT_PULLUP MUX_MODE3 /* uart0_rtsn.i2c1_scl_mux1, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */ >; }; i2c2_pins: pinmux_i2c2_pins { /* (mezzanine) */ pinctrl-single,pins = < - 0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda_mux0, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */ - 0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl_mux0, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */ + 0x178 PIN_INPUT_PULLUP MUX_MODE3 /* uart1_ctsn.i2c2_sda_mux0, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */ + 0x17c PIN_INPUT_PULLUP MUX_MODE3 /* uart1_rtsn.i2c2_scl_mux0, SLEWCTRL_SLOW | INPUT_PULLUP | MODE3 */ >; }; gpio0_pins: pinmux_gpio0_pins { pinctrl-single,pins = < - 0x020 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.gpio0[22], OUTPUT_PULLDOWN | MODE7 (LED3) */ /* PWM later */ - 0x024 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.gpio0[23], INPUT_PULLDOWN | MODE7 (RMII2_INTRP) */ - 0x028 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad10.gpio0[26], INPUT_PULLUP | MODE7 (BUTTON0) */ - 0x02c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.gpio0[27], INPUT_PULLDOWN | MODE7 (PWR_INT)*/ - 0x0d0 (PIN_INPUT | MUX_MODE7) /* lcd_data12.gpio0[8], INPUT | MODE7 (SYSBOOT12) */ - 0x0d4 (PIN_INPUT | MUX_MODE7) /* lcd_data13.gpio0[9], INPUT | MODE7 (SYSBOOT13) */ - 0x0d8 (PIN_INPUT | MUX_MODE7) /* lcd_data14.gpio0[10], INPUT | MODE7 (SYSBOOT14) */ - 0x0dc (PIN_INPUT | MUX_MODE7) /* lcd_data15.gpio0[11], INPUT | MODE7 (SYSBOOT15) */ - 0x164 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0[7], INPUT_PULLDOWN | MODE7 (MEZZANINE_GPIO0) */ - 0x1b4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* xdma_event_intr1.gpio0[20], INPUT_PULLDOWN | MODE7 (MEZZANINE_GPIO3) */ + 0x020 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_ad8.gpio0[22], OUTPUT_PULLDOWN | MODE7 (LED3) */ /* PWM later */ + 0x024 PIN_INPUT_PULLDOWN MUX_MODE7 /* gpmc_ad9.gpio0[23], INPUT_PULLDOWN | MODE7 (RMII2_INTRP) */ + 0x028 PIN_INPUT_PULLUP MUX_MODE7 /* gpmc_ad10.gpio0[26], INPUT_PULLUP | MODE7 (BUTTON0) */ + 0x02c PIN_INPUT_PULLDOWN MUX_MODE7 /* gpmc_ad11.gpio0[27], INPUT_PULLDOWN | MODE7 (PWR_INT)*/ + 0x0d0 PIN_INPUT MUX_MODE7 /* lcd_data12.gpio0[8], INPUT | MODE7 (SYSBOOT12) */ + 0x0d4 PIN_INPUT MUX_MODE7 /* lcd_data13.gpio0[9], INPUT | MODE7 (SYSBOOT13) */ + 0x0d8 PIN_INPUT MUX_MODE7 /* lcd_data14.gpio0[10], INPUT | MODE7 (SYSBOOT14) */ + 0x0dc PIN_INPUT MUX_MODE7 /* lcd_data15.gpio0[11], INPUT | MODE7 (SYSBOOT15) */ + 0x164 PIN_INPUT_PULLDOWN MUX_MODE7 /* ecap0_in_pwm0_out.gpio0[7], INPUT_PULLDOWN | MODE7 (MEZZANINE_GPIO0) */ + 0x1b4 PIN_INPUT_PULLDOWN MUX_MODE7 /* xdma_event_intr1.gpio0[20], INPUT_PULLDOWN | MODE7 (MEZZANINE_GPIO3) */ >; }; gpio1_pins: pinmux_gpio1_pins { pinctrl-single,pins = < - 0x000 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1[0], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x004 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1[1], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x008 (PIN_INPUT | MUX_MODE7) /* gpmc_ad2.gpio1[2], INPUT | MODE7 (BOARD_REV1) */ - 0x00c (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad3.gpio1[3], INPUT_PULLUP | MODE7 (1WIRE_INT) */ - 0x010 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1[4], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x014 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1[5], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x018 (PIN_INPUT | MUX_MODE7) /* gpmc_ad6.gpio1[6], INPUT | MODE7 (BOARD_REV0) */ - 0x01c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1[7], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x030 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad12.gpio1[12], INPUT_PULLUP | MODE7 (PG_24V) */ - 0x034 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.gpio1[13], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x038 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad14.gpio1[14], INPUT_PULLUP | MODE7 (SDCARD_CD) */ - 0x03c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.gpio1[15], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x044 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a1.gpio1[17], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x048 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a2.gpio1[18], OUTPUT_PULLDOWN | MODE7 (LED1) */ /* PWM later */ - 0x04c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.gpio1[19], OUTPUT_PULLDOWN | MODE7 (LED2) */ /* PWM later */ - 0x058 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1[22], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x05c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1[23], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x060 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a8.gpio1[24], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x064 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1[25], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x078 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ben1.gpio1[28], INPUT_PULLUP | MODE7 (USB1_OCn) */ - 0x07c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn0.gpio1[29], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x080 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1[30], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x084 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1[31], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x000 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_ad0.gpio1[0], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x004 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_ad1.gpio1[1], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x008 PIN_INPUT MUX_MODE7 /* gpmc_ad2.gpio1[2], INPUT | MODE7 (BOARD_REV1) */ + 0x00c PIN_INPUT_PULLUP MUX_MODE7 /* gpmc_ad3.gpio1[3], INPUT_PULLUP | MODE7 (1WIRE_INT) */ + 0x010 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_ad4.gpio1[4], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x014 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_ad5.gpio1[5], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x018 PIN_INPUT MUX_MODE7 /* gpmc_ad6.gpio1[6], INPUT | MODE7 (BOARD_REV0) */ + 0x01c PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_ad7.gpio1[7], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x030 PIN_INPUT_PULLUP MUX_MODE7 /* gpmc_ad12.gpio1[12], INPUT_PULLUP | MODE7 (PG_24V) */ + 0x034 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_ad13.gpio1[13], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x038 PIN_INPUT_PULLUP MUX_MODE7 /* gpmc_ad14.gpio1[14], INPUT_PULLUP | MODE7 (SDCARD_CD) */ + 0x03c PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_ad15.gpio1[15], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x044 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_a1.gpio1[17], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x048 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_a2.gpio1[18], OUTPUT_PULLDOWN | MODE7 (LED1) */ /* PWM later */ + 0x04c PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_a3.gpio1[19], OUTPUT_PULLDOWN | MODE7 (LED2) */ /* PWM later */ + 0x058 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_a6.gpio1[22], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x05c PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_a7.gpio1[23], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x060 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_a8.gpio1[24], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x064 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_a9.gpio1[25], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x078 PIN_INPUT_PULLUP MUX_MODE7 /* gpmc_ben1.gpio1[28], INPUT_PULLUP | MODE7 (USB1_OCn) */ + 0x07c PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_csn0.gpio1[29], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x080 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_csn1.gpio1[30], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x084 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_csn2.gpio1[31], OUTPUT_PULLDOWN | MODE7 (NC) */ >; }; gpio2_pins: pinmux_gpio2_pins { pinctrl-single,pins = < - 0x088 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.gpio2[0], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x08c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.gpio2[1], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x090 (PIN_INPUT | MUX_MODE7) /* gpmc_advn_ale.gpio2[2], INPUT | MODE7 (BOARD_REV2) */ - 0x094 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2[3], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x098 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_wen.gpio2[4], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x09c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2[5], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x0a0 (PIN_INPUT | MUX_MODE7) /* lcd_data0.gpio2[6], INPUT | MODE7 (SYSBOOT0) */ - 0x0a4 (PIN_INPUT | MUX_MODE7) /* lcd_data1.gpio2[7], INPUT | MODE7 (SYSBOOT1) */ - 0x0a8 (PIN_INPUT | MUX_MODE7) /* lcd_data2.gpio2[8], INPUT | MODE7 (SYSBOOT2) */ - 0x0ac (PIN_INPUT | MUX_MODE7) /* lcd_data3.gpio2[9], INPUT | MODE7 (SYSBOOT3) */ - 0x0b0 (PIN_INPUT | MUX_MODE7) /* lcd_data4.gpio2[10], INPUT | MODE7 (SYSBOOT4) */ - 0x0b4 (PIN_INPUT | MUX_MODE7) /* lcd_data5.gpio2[11], INPUT | MODE7 (SYSBOOT5) */ - 0x0b8 (PIN_INPUT | MUX_MODE7) /* lcd_data6.gpio2[12], INPUT | MODE7 (SYSBOOT6) */ - 0x0bc (PIN_INPUT | MUX_MODE7) /* lcd_data7.gpio2[13], INPUT | MODE7 (SYSBOOT7) */ - 0x0c0 (PIN_INPUT | MUX_MODE7) /* lcd_data8.gpio2[14], INPUT | MODE7 (SYSBOOT8) */ - 0x0c4 (PIN_INPUT | MUX_MODE7) /* lcd_data9.gpio2[15], INPUT | MODE7 (SYSBOOT9) */ - 0x0c8 (PIN_INPUT | MUX_MODE7) /* lcd_data10.gpio2[16], INPUT | MODE7 (SYSBOOT10) */ - 0x0cc (PIN_INPUT | MUX_MODE7) /* lcd_data11.gpio2[17], INPUT | MODE7 (SYSBOOT11) */ - 0x0e0 (PIN_INPUT | MUX_MODE7) /* lcd_vsync.gpio2[22], INPUT | MODE7 (BOARD_CONF1) */ - 0x0e4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2[23], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x0e8 (PIN_INPUT | MUX_MODE7) /* lcd_pclk.gpio2[24], INPUT | MODE7 (BOARD_CONF0) */ - 0x0ec (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2[25], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x134 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_rxd3.gpio2[18], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x138 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_rxd2.gpio2[19], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x088 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_csn3.gpio2[0], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x08c PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_clk.gpio2[1], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x090 PIN_INPUT MUX_MODE7 /* gpmc_advn_ale.gpio2[2], INPUT | MODE7 (BOARD_REV2) */ + 0x094 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_oen_ren.gpio2[3], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x098 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_wen.gpio2[4], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x09c PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_ben0_cle.gpio2[5], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x0a0 PIN_INPUT MUX_MODE7 /* lcd_data0.gpio2[6], INPUT | MODE7 (SYSBOOT0) */ + 0x0a4 PIN_INPUT MUX_MODE7 /* lcd_data1.gpio2[7], INPUT | MODE7 (SYSBOOT1) */ + 0x0a8 PIN_INPUT MUX_MODE7 /* lcd_data2.gpio2[8], INPUT | MODE7 (SYSBOOT2) */ + 0x0ac PIN_INPUT MUX_MODE7 /* lcd_data3.gpio2[9], INPUT | MODE7 (SYSBOOT3) */ + 0x0b0 PIN_INPUT MUX_MODE7 /* lcd_data4.gpio2[10], INPUT | MODE7 (SYSBOOT4) */ + 0x0b4 PIN_INPUT MUX_MODE7 /* lcd_data5.gpio2[11], INPUT | MODE7 (SYSBOOT5) */ + 0x0b8 PIN_INPUT MUX_MODE7 /* lcd_data6.gpio2[12], INPUT | MODE7 (SYSBOOT6) */ + 0x0bc PIN_INPUT MUX_MODE7 /* lcd_data7.gpio2[13], INPUT | MODE7 (SYSBOOT7) */ + 0x0c0 PIN_INPUT MUX_MODE7 /* lcd_data8.gpio2[14], INPUT | MODE7 (SYSBOOT8) */ + 0x0c4 PIN_INPUT MUX_MODE7 /* lcd_data9.gpio2[15], INPUT | MODE7 (SYSBOOT9) */ + 0x0c8 PIN_INPUT MUX_MODE7 /* lcd_data10.gpio2[16], INPUT | MODE7 (SYSBOOT10) */ + 0x0cc PIN_INPUT MUX_MODE7 /* lcd_data11.gpio2[17], INPUT | MODE7 (SYSBOOT11) */ + 0x0e0 PIN_INPUT MUX_MODE7 /* lcd_vsync.gpio2[22], INPUT | MODE7 (BOARD_CONF1) */ + 0x0e4 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* lcd_hsync.gpio2[23], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x0e8 PIN_INPUT MUX_MODE7 /* lcd_pclk.gpio2[24], INPUT | MODE7 (BOARD_CONF0) */ + 0x0ec PIN_OUTPUT_PULLDOWN MUX_MODE7 /* lcd_ac_bias_en.gpio2[25], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x134 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* mii1_rxd3.gpio2[18], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x138 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* mii1_rxd2.gpio2[19], OUTPUT_PULLDOWN | MODE7 (NC) */ >; }; gpio3_pins: pinmux_gpio3_pins { pinctrl-single,pins = < - 0x118 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_rx_dv.gpio3[4], OUTPUT_PULLDOWN | MODE7 (NC) */ - 0x19c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.gpio3[17], INPUT_PULLDOWN | MODE7 (MEZZANINE_GPIO1) */ - 0x1a0 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18], OUTPUT_PULLUP | MODE7 (DCAN0_LBK) */ /* enable loopback by default */ - 0x1a4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_fsr.gpio3[19], OUTPUT_PULLDOWN | MODE7 (RS485_DE) */ - 0x1a8 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* mcasp0_axr1.gpio3[20], OUTPUT_PULLUP | MODE7 (1WIRE_SLEEP) */ - 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3[21], INPUT_PULLDOWN | MODE7 (MEZZANINE_GPIO2) */ + 0x118 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* mii1_rx_dv.gpio3[4], OUTPUT_PULLDOWN | MODE7 (NC) */ + 0x19c PIN_INPUT_PULLDOWN MUX_MODE7 /* mcasp0_ahclkr.gpio3[17], INPUT_PULLDOWN | MODE7 (MEZZANINE_GPIO1) */ + 0x1a0 PIN_OUTPUT_PULLUP MUX_MODE7 /* mcasp0_aclkr.gpio3[18], OUTPUT_PULLUP | MODE7 (DCAN0_LBK) */ /* enable loopback by default */ + 0x1a4 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* mcasp0_fsr.gpio3[19], OUTPUT_PULLDOWN | MODE7 (RS485_DE) */ + 0x1a8 PIN_OUTPUT_PULLUP MUX_MODE7 /* mcasp0_axr1.gpio3[20], OUTPUT_PULLUP | MODE7 (1WIRE_SLEEP) */ + 0x1ac PIN_INPUT_PULLDOWN MUX_MODE7 /* mcasp0_ahclkx.gpio3[21], INPUT_PULLDOWN | MODE7 (MEZZANINE_GPIO2) */ >; }; }; diff --git a/arch/arm/dts/am335x-baltos-minimal.dts b/arch/arm/dts/am335x-baltos-minimal.dts index a57bb6c802..dff901f050 100644 --- a/arch/arm/dts/am335x-baltos-minimal.dts +++ b/arch/arm/dts/am335x-baltos-minimal.dts @@ -47,25 +47,25 @@ &am33xx_pinmux { mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < - 0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat3.mmc0_dat3 */ - 0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat2.mmc0_dat2 */ - 0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat1.mmc0_dat1 */ - 0xfc (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat0.mmc0_dat0 */ - 0x100 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_clk.mmc0_clk */ - 0x104 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_cmd.mmc0_cmd */ + 0xf0 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_dat3.mmc0_dat3 */ + 0xf4 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_dat2.mmc0_dat2 */ + 0xf8 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_dat1.mmc0_dat1 */ + 0xfc (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_dat0.mmc0_dat0 */ + 0x100 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_clk.mmc0_clk */ + 0x104 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_cmd.mmc0_cmd */ >; }; i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < - 0x158 0x2a /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */ - 0x15c 0x2a /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */ + 0x158 0x2a 0 /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */ + 0x15c 0x2a 0 /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */ >; }; tps65910_pins: pinmux_tps65910_pins { pinctrl-single,pins = < - 0x078 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ben1.gpio1[28] */ + 0x078 PIN_INPUT_PULLUP MUX_MODE7 /* gpmc_ben1.gpio1[28] */ >; }; @@ -77,99 +77,99 @@ uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + 0x170 PIN_INPUT_PULLUP MUX_MODE0 /* uart0_rxd.uart0_rxd */ + 0x174 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* uart0_txd.uart0_txd */ >; }; cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_tx_en.rmii1_txen */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */ + 0x10c PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_crs.rmii1_crs_dv */ + 0x114 PIN_OUTPUT_PULLDOWN MUX_MODE1 /* mii1_tx_en.rmii1_txen */ + 0x124 PIN_OUTPUT_PULLDOWN MUX_MODE1 /* mii1_txd1.rmii1_txd1 */ + 0x128 PIN_OUTPUT_PULLDOWN MUX_MODE1 /* mii1_txd0.rmii1_txd0 */ + 0x13c PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxd1.rmii1_rxd1 */ + 0x140 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxd0.rmii1_rxd0 */ + 0x144 PIN_INPUT_PULLDOWN MUX_MODE0 /* rmii1_ref_clk.rmii1_refclk */ /* Slave 2 */ - 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ - 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ - 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ - 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ - 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ - 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ - 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ - 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ + 0x40 PIN_OUTPUT_PULLDOWN MUX_MODE2 /* gpmc_a0.rgmii2_tctl */ + 0x44 PIN_INPUT_PULLDOWN MUX_MODE2 /* gpmc_a1.rgmii2_rctl */ + 0x48 PIN_OUTPUT_PULLDOWN MUX_MODE2 /* gpmc_a2.rgmii2_td3 */ + 0x4c PIN_OUTPUT_PULLDOWN MUX_MODE2 /* gpmc_a3.rgmii2_td2 */ + 0x50 PIN_OUTPUT_PULLDOWN MUX_MODE2 /* gpmc_a4.rgmii2_td1 */ + 0x54 PIN_OUTPUT_PULLDOWN MUX_MODE2 /* gpmc_a5.rgmii2_td0 */ + 0x58 PIN_OUTPUT_PULLDOWN MUX_MODE2 /* gpmc_a6.rgmii2_tclk */ + 0x5c PIN_INPUT_PULLDOWN MUX_MODE2 /* gpmc_a7.rgmii2_rclk */ + 0x60 PIN_INPUT_PULLDOWN MUX_MODE2 /* gpmc_a8.rgmii2_rd3 */ + 0x64 PIN_INPUT_PULLDOWN MUX_MODE2 /* gpmc_a9.rgmii2_rd2 */ + 0x68 PIN_INPUT_PULLDOWN MUX_MODE2 /* gpmc_a10.rgmii2_rd1 */ + 0x6c PIN_INPUT_PULLDOWN MUX_MODE2 /* gpmc_a11.rgmii2_rd0 */ >; }; cpsw_sleep: cpsw_sleep { pinctrl-single,pins = < /* Slave 1 reset value */ - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x10c PIN_INPUT_PULLDOWN MUX_MODE7 + 0x114 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x124 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x128 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x13c PIN_INPUT_PULLDOWN MUX_MODE7 + 0x140 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x144 PIN_INPUT_PULLDOWN MUX_MODE7 /* Slave 2 reset value*/ - 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x40 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x44 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x48 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x4c PIN_INPUT_PULLDOWN MUX_MODE7 + 0x50 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x54 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x58 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x5c PIN_INPUT_PULLDOWN MUX_MODE7 + 0x60 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x64 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x68 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x6c PIN_INPUT_PULLDOWN MUX_MODE7 >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST) MUX_MODE0 /* mdio_data.mdio_data */ + 0x14c PIN_OUTPUT_PULLUP MUX_MODE0 /* mdio_clk.mdio_clk */ >; }; davinci_mdio_sleep: davinci_mdio_sleep { pinctrl-single,pins = < /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x148 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x14c PIN_INPUT_PULLDOWN MUX_MODE7 >; }; nandflash_pins_s0: nandflash_pins_s0 { pinctrl-single,pins = < - 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ - 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ - 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ - 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ - 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ - 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ - 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ - 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ - 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ - 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ - 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ + 0x0 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad0.gpmc_ad0 */ + 0x4 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad1.gpmc_ad1 */ + 0x8 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad2.gpmc_ad2 */ + 0xc PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad3.gpmc_ad3 */ + 0x10 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad4.gpmc_ad4 */ + 0x14 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad5.gpmc_ad5 */ + 0x18 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad6.gpmc_ad6 */ + 0x1c PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad7.gpmc_ad7 */ + 0x70 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_wait0.gpmc_wait0 */ + 0x74 PIN_INPUT_PULLUP MUX_MODE7 /* gpmc_wpn.gpio0_30 */ + 0x7c PIN_OUTPUT MUX_MODE0 /* gpmc_csn0.gpmc_csn0 */ + 0x90 PIN_OUTPUT MUX_MODE0 /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 PIN_OUTPUT MUX_MODE0 /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 PIN_OUTPUT MUX_MODE0 /* gpmc_wen.gpmc_wen */ + 0x9c PIN_OUTPUT MUX_MODE0 /* gpmc_be0n_cle.gpmc_be0n_cle */ >; }; }; diff --git a/arch/arm/dts/am335x-bone-common-strip.dtsi b/arch/arm/dts/am335x-bone-common-strip.dtsi index e03ae2a8d3..5be246bd6f 100644 --- a/arch/arm/dts/am335x-bone-common-strip.dtsi +++ b/arch/arm/dts/am335x-bone-common-strip.dtsi @@ -66,105 +66,105 @@ user_leds_s0: user_leds_s0 { pinctrl-single,pins = < - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ - 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ - 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ - 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ + 0x54 PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_a5.gpio1_21 */ + 0x58 PIN_OUTPUT_PULLUP MUX_MODE7 /* gpmc_a6.gpio1_22 */ + 0x5c PIN_OUTPUT_PULLDOWN MUX_MODE7 /* gpmc_a7.gpio1_23 */ + 0x60 PIN_OUTPUT_PULLUP MUX_MODE7 /* gpmc_a8.gpio1_24 */ >; }; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + 0x188 PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_sda.i2c0_sda */ + 0x18c PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_scl.i2c0_scl */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + 0x170 PIN_INPUT_PULLUP MUX_MODE0 /* uart0_rxd.uart0_rxd */ + 0x174 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* uart0_txd.uart0_txd */ >; }; clkout2_pin: pinmux_clkout2_pin { pinctrl-single,pins = < - 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + 0x1b4 PIN_OUTPUT_PULLDOWN MUX_MODE3 /* xdma_event_intr1.clkout2 */ >; }; cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ - 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ - 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ - 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ - 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ - 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ - 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ - 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ - 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ + 0x110 PIN_INPUT_PULLUP MUX_MODE0 /* mii1_rxerr.mii1_rxerr */ + 0x114 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* mii1_txen.mii1_txen */ + 0x118 PIN_INPUT_PULLUP MUX_MODE0 /* mii1_rxdv.mii1_rxdv */ + 0x11c PIN_OUTPUT_PULLDOWN MUX_MODE0 /* mii1_txd3.mii1_txd3 */ + 0x120 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* mii1_txd2.mii1_txd2 */ + 0x124 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* mii1_txd1.mii1_txd1 */ + 0x128 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* mii1_txd0.mii1_txd0 */ + 0x12c PIN_INPUT_PULLUP MUX_MODE0 /* mii1_txclk.mii1_txclk */ + 0x130 PIN_INPUT_PULLUP MUX_MODE0 /* mii1_rxclk.mii1_rxclk */ + 0x134 PIN_INPUT_PULLUP MUX_MODE0 /* mii1_rxd3.mii1_rxd3 */ + 0x138 PIN_INPUT_PULLUP MUX_MODE0 /* mii1_rxd2.mii1_rxd2 */ + 0x13c PIN_INPUT_PULLUP MUX_MODE0 /* mii1_rxd1.mii1_rxd1 */ + 0x140 PIN_INPUT_PULLUP MUX_MODE0 /* mii1_rxd0.mii1_rxd0 */ >; }; cpsw_sleep: cpsw_sleep { pinctrl-single,pins = < /* Slave 1 reset value */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x110 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x114 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x118 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x11c PIN_INPUT_PULLDOWN MUX_MODE7 + 0x120 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x124 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x128 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x12c PIN_INPUT_PULLDOWN MUX_MODE7 + 0x130 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x134 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x138 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x13c PIN_INPUT_PULLDOWN MUX_MODE7 + 0x140 PIN_INPUT_PULLDOWN MUX_MODE7 >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST) MUX_MODE0 /* mdio_data.mdio_data */ + 0x14c PIN_OUTPUT_PULLUP MUX_MODE0 /* mdio_clk.mdio_clk */ >; }; davinci_mdio_sleep: davinci_mdio_sleep { pinctrl-single,pins = < /* MDIO reset value */ - 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) - 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x148 PIN_INPUT_PULLDOWN MUX_MODE7 + 0x14c PIN_INPUT_PULLDOWN MUX_MODE7 >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < - 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */ + 0x160 PIN_INPUT MUX_MODE7 /* GPIO0_6 */ >; }; emmc_pins: pinmux_emmc_pins { pinctrl-single,pins = < - 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ - 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ - 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ - 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ - 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ - 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ + 0x80 PIN_INPUT_PULLUP MUX_MODE2 /* gpmc_csn1.mmc1_clk */ + 0x84 PIN_INPUT_PULLUP MUX_MODE2 /* gpmc_csn2.mmc1_cmd */ + 0x00 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad0.mmc1_dat0 */ + 0x04 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad1.mmc1_dat1 */ + 0x08 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad2.mmc1_dat2 */ + 0x0c PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad3.mmc1_dat3 */ + 0x10 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad4.mmc1_dat4 */ + 0x14 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad5.mmc1_dat5 */ + 0x18 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad6.mmc1_dat6 */ + 0x1c PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad7.mmc1_dat7 */ >; }; }; diff --git a/arch/arm/dts/am335x-boneblack.dts b/arch/arm/dts/am335x-boneblack.dts index 80d710b924..3c286c71bf 100644 --- a/arch/arm/dts/am335x-boneblack.dts +++ b/arch/arm/dts/am335x-boneblack.dts @@ -41,32 +41,32 @@ &am33xx_pinmux { nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ - 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0x1b0 0x03 0 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + 0xa0 0x08 0 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xa4 0x08 0 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xa8 0x08 0 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xac 0x08 0 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xb0 0x08 0 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xb4 0x08 0 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xb8 0x08 0 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xbc 0x08 0 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xc0 0x08 0 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xc4 0x08 0 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xc8 0x08 0 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xcc 0x08 0 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xd0 0x08 0 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xd4 0x08 0 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xd8 0x08 0 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xdc 0x08 0 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xe0 0x00 0 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0xe4 0x00 0 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0xe8 0x00 0 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0xec 0x00 0 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ >; }; nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + 0x1b0 0x03 0 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ >; }; }; @@ -85,3 +85,13 @@ status = "okay"; }; }; + +&tscadc { + status = "okay"; + adc { + /* Ch 0-6 are on connector P9. Ch 7 measures the 3.3V rail + * divided by 2 (e.g., it should read 1650). + */ + ti,adc-channels = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>; + }; +}; diff --git a/arch/arm/dts/am335x-phytec-phycard-som.dtsi b/arch/arm/dts/am335x-phytec-phycard-som.dtsi index 1d45d60dc0..e459824a77 100644 --- a/arch/arm/dts/am335x-phytec-phycard-som.dtsi +++ b/arch/arm/dts/am335x-phytec-phycard-som.dtsi @@ -14,73 +14,73 @@ i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + 0x188 PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_sda.i2c0_sda */ + 0x18c PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_scl.i2c0_scl */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + 0x170 PIN_INPUT_PULLUP MUX_MODE0 /* uart0_rxd.uart0_rxd */ + 0x174 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* uart0_txd.uart0_txd */ >; }; uart3_pins: pinmux_uart3 { pinctrl-single,pins = < - 0x134 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd3.uart3_rxd */ - 0x138 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd2.uart3_txd */ + 0x134 PIN_INPUT_PULLUP MUX_MODE1 /* mii1_rxd3.uart3_rxd */ + 0x138 PIN_OUTPUT_PULLDOWN MUX_MODE1 /* mii1_rxd2.uart3_txd */ >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < - 0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat3.mmc0_dat3 */ - 0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat2.mmc0_dat2 */ - 0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat1.mmc0_dat1 */ - 0xfc (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat0.mmc0_dat0 */ - 0x100 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_clk.mmc0_clk */ - 0x104 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_cmd.mmc0_cmd */ + 0xf0 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_dat3.mmc0_dat3 */ + 0xf4 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_dat2.mmc0_dat2 */ + 0xf8 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_dat1.mmc0_dat1 */ + 0xfc (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_dat0.mmc0_dat0 */ + 0x100 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_clk.mmc0_clk */ + 0x104 (INPUT_EN | PULL_UP) MUX_MODE0 /* mmc0_cmd.mmc0_cmd */ >; }; emac_rmii1_pins: pinmux_emac_rmii1_pins { pinctrl-single,pins = < - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ - 0x114 (PIN_OUTPUT | MUX_MODE1) /* mii1_txen.rmii1_txen */ - 0x124 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ - 0x128 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */ + 0x10c PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_crs.rmii1_crs_dv */ + 0x110 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxerr.rmii1_rxerr */ + 0x114 PIN_OUTPUT MUX_MODE1 /* mii1_txen.rmii1_txen */ + 0x124 PIN_OUTPUT MUX_MODE1 /* mii1_txd1.rmii1_txd1 */ + 0x128 PIN_OUTPUT MUX_MODE1 /* mii1_txd0.rmii1_txd0 */ + 0x13c PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxd1.rmii1_rxd1 */ + 0x140 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxd0.rmii1_rxd0 */ + 0x144 PIN_INPUT_PULLDOWN MUX_MODE0 /* rmii1_refclk.rmii1_refclk */ >; }; nandflash_pins_s0: nandflash_pins_s0 { pinctrl-single,pins = < - 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ - 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ - 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ - 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ - 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ - 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ - 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ - 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ - 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ - 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ + 0x0 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad0.gpmc_ad0 */ + 0x4 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad1.gpmc_ad1 */ + 0x8 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad2.gpmc_ad2 */ + 0xc PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad3.gpmc_ad3 */ + 0x10 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad4.gpmc_ad4 */ + 0x14 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad5.gpmc_ad5 */ + 0x18 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad6.gpmc_ad6 */ + 0x1c PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad7.gpmc_ad7 */ + 0x70 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_wait0.gpmc_wait0 */ + 0x7c PIN_OUTPUT MUX_MODE0 /* gpmc_csn0.gpmc_csn0 */ + 0x90 PIN_OUTPUT MUX_MODE0 /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 PIN_OUTPUT MUX_MODE0 /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 PIN_OUTPUT MUX_MODE0 /* gpmc_wen.gpmc_wen */ + 0x9c PIN_OUTPUT MUX_MODE0 /* gpmc_be0n_cle.gpmc_be0n_cle */ >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST) MUX_MODE0 /* mdio_data.mdio_data */ + 0x14c PIN_OUTPUT_PULLUP MUX_MODE0 /* mdio_clk.mdio_clk */ >; }; }; diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi b/arch/arm/dts/am335x-phytec-phycore-som.dtsi index ae3f70acdd..4b2ff9b2ea 100644 --- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi +++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi @@ -19,111 +19,111 @@ &am33xx_pinmux { usb_pins: pinmux_usb_pins { pinctrl-single,pins = < - 0x21c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ - 0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */ + 0x21c PIN_OUTPUT_PULLDOWN MUX_MODE0 /* usb0_drvvbus.usb0_drvvbus */ + 0x234 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* usb1_drvvbus.usb1_drvvbus */ >; }; i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + 0x188 PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_sda.i2c0_sda */ + 0x18c PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_scl.i2c0_scl */ >; }; spi0_pins: pinmux_spi0_pins { pinctrl-single,pins = < - 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_clk.spi0_clk */ - 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_d0.spi0_d0 */ - 0x158 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */ - 0x15c (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ + 0x150 PIN_INPUT_PULLDOWN MUX_MODE0 /* spi0_clk.spi0_clk */ + 0x154 PIN_INPUT_PULLDOWN MUX_MODE0 /* spi0_d0.spi0_d0 */ + 0x158 PIN_INPUT_PULLUP MUX_MODE0 /* spi0_d1.spi0_d1 */ + 0x15c PIN_INPUT_PULLUP MUX_MODE0 /* spi0_cs0.spi0_cs0 */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + 0x170 PIN_INPUT_PULLUP MUX_MODE0 /* uart0_rxd.uart0_rxd */ + 0x174 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* uart0_txd.uart0_txd */ >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < - 0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat3.mmc0_dat3 */ - 0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat2.mmc0_dat2 */ - 0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat1.mmc0_dat1 */ - 0xfc (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat0.mmc0_dat0 */ - 0x100 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_clk.mmc0_clk */ - 0x104 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_cmd.mmc0_cmd */ + 0xf0 MUX_MODE0 (INPUT_EN | PULL_UP) /* mmc0_dat3.mmc0_dat3 */ + 0xf4 MUX_MODE0 (INPUT_EN | PULL_UP) /* mmc0_dat2.mmc0_dat2 */ + 0xf8 MUX_MODE0 (INPUT_EN | PULL_UP) /* mmc0_dat1.mmc0_dat1 */ + 0xfc MUX_MODE0 (INPUT_EN | PULL_UP) /* mmc0_dat0.mmc0_dat0 */ + 0x100 MUX_MODE0 (INPUT_EN | PULL_UP) /* mmc0_clk.mmc0_clk */ + 0x104 MUX_MODE0 (INPUT_EN | PULL_UP) /* mmc0_cmd.mmc0_cmd */ >; }; emmc_pins: pinmux_emmc_pins { pinctrl-single,pins = < - 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ - 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ - 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ - 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ - 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ - 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ + 0x80 PIN_INPUT_PULLUP MUX_MODE2 /* gpmc_csn1.mmc1_clk */ + 0x84 PIN_INPUT_PULLUP MUX_MODE2 /* gpmc_csn2.mmc1_cmd */ + 0x00 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad0.mmc1_dat0 */ + 0x04 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad1.mmc1_dat1 */ + 0x08 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad2.mmc1_dat2 */ + 0x0c PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad3.mmc1_dat3 */ + 0x10 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad4.mmc1_dat4 */ + 0x14 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad5.mmc1_dat5 */ + 0x18 PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad6.mmc1_dat6 */ + 0x1c PIN_INPUT_PULLUP MUX_MODE1 /* gpmc_ad7.mmc1_dat7 */ >; }; emac_rmii1_pins: pinmux_emac_rmii1_pins { pinctrl-single,pins = < - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ - 0x114 (PIN_OUTPUT | MUX_MODE1) /* mii1_txen.rmii1_txen */ - 0x124 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ - 0x128 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ - 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */ + 0x10c PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_crs.rmii1_crs_dv */ + 0x110 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxerr.rmii1_rxerr */ + 0x114 PIN_OUTPUT MUX_MODE1 /* mii1_txen.rmii1_txen */ + 0x124 PIN_OUTPUT MUX_MODE1 /* mii1_txd1.rmii1_txd1 */ + 0x128 PIN_OUTPUT MUX_MODE1 /* mii1_txd0.rmii1_txd0 */ + 0x13c PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxd1.rmii1_rxd1 */ + 0x140 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_rxd0.rmii1_rxd0 */ + 0x144 PIN_INPUT_PULLDOWN MUX_MODE0 /* rmii1_refclk.rmii1_refclk */ >; }; nandflash_pins_s0: nandflash_pins_s0 { pinctrl-single,pins = < - 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ - 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ - 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ - 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ - 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ - 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ - 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ - 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ - 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ - 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ - 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ - 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ - 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ - 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ + 0x0 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad0.gpmc_ad0 */ + 0x4 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad1.gpmc_ad1 */ + 0x8 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad2.gpmc_ad2 */ + 0xc PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad3.gpmc_ad3 */ + 0x10 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad4.gpmc_ad4 */ + 0x14 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad5.gpmc_ad5 */ + 0x18 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad6.gpmc_ad6 */ + 0x1c PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad7.gpmc_ad7 */ + 0x70 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_wait0.gpmc_wait0 */ + 0x7c PIN_OUTPUT MUX_MODE0 /* gpmc_csn0.gpmc_csn0 */ + 0x90 PIN_OUTPUT MUX_MODE0 /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 PIN_OUTPUT MUX_MODE0 /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 PIN_OUTPUT MUX_MODE0 /* gpmc_wen.gpmc_wen */ + 0x9c PIN_OUTPUT MUX_MODE0 /* gpmc_be0n_cle.gpmc_be0n_cle */ >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST) MUX_MODE0 /* mdio_data.mdio_data */ + 0x14c PIN_OUTPUT_PULLUP MUX_MODE0 /* mdio_clk.mdio_clk */ >; }; pcm051_led_pins: pinmux_pcm051_led_pins { pinctrl-single,pins = < - 0x80 (MUX_MODE7) - 0x84 (MUX_MODE7) + 0x80 0 MUX_MODE7 + 0x84 0 MUX_MODE7 >; }; pcm051_user_pins: pinmux_pcm051_user_pins { pinctrl-single,pins = < - 0x1e4 (PULL_UP |INPUT_EN |MUX_MODE7) - 0x1e8 (PULL_UP |INPUT_EN |MUX_MODE7) + 0x1e4 (PULL_UP |INPUT_EN) MUX_MODE7 + 0x1e8 (PULL_UP |INPUT_EN) MUX_MODE7 >; }; }; diff --git a/arch/arm/dts/am335x-phytec-phyflex-som.dtsi b/arch/arm/dts/am335x-phytec-phyflex-som.dtsi index 0325c81346..29776f4556 100644 --- a/arch/arm/dts/am335x-phytec-phyflex-som.dtsi +++ b/arch/arm/dts/am335x-phytec-phyflex-som.dtsi @@ -35,90 +35,90 @@ &am33xx_pinmux { i2c0_pins: pinmux_i2c0_pins { pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl */ + 0x188 PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_sda */ + 0x18c PIN_INPUT_PULLUP MUX_MODE0 /* i2c0_scl */ >; }; spi0_pins: pinmux_spi0_pins { pinctrl-single,pins = < - 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_clk.spi0_clk */ - 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_d0.spi0_d0 */ - 0x158 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */ - 0x15c (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ + 0x150 PIN_INPUT_PULLDOWN MUX_MODE0 /* spi0_clk.spi0_clk */ + 0x154 PIN_INPUT_PULLDOWN MUX_MODE0 /* spi0_d0.spi0_d0 */ + 0x158 PIN_INPUT_PULLUP MUX_MODE0 /* spi0_d1.spi0_d1 */ + 0x15c PIN_INPUT_PULLUP MUX_MODE0 /* spi0_cs0.spi0_cs0 */ >; }; uart0_pins: pinmux_uart0_pins { pinctrl-single,pins = < - 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd */ - 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd */ + 0x170 PIN_INPUT_PULLUP MUX_MODE0 /* uart0_rxd */ + 0x174 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* uart0_txd */ >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < - 0x0f0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */ - 0x0f4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */ - 0x0f8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */ - 0x0fc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */ - 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */ - 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */ + 0x0f0 PIN_INPUT_PULLUP MUX_MODE0 /* mmc0_dat3 */ + 0x0f4 PIN_INPUT_PULLUP MUX_MODE0 /* mmc0_dat2 */ + 0x0f8 PIN_INPUT_PULLUP MUX_MODE0 /* mmc0_dat1 */ + 0x0fc PIN_INPUT_PULLUP MUX_MODE0 /* mmc0_dat0 */ + 0x100 PIN_INPUT_PULLUP MUX_MODE0 /* mmc0_clk */ + 0x104 PIN_INPUT_PULLUP MUX_MODE0 /* mmc0_cmd */ >; }; emac_rgmii1_pins: pinmux_emac_rgmii1_pins { pinctrl-single,pins = < - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_tx_en.rgmii1_tctl */ - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rx_dv.rgmii1_rctl */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ - 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_tx_clk.rgmii1_tclk */ - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rx_clk.rgmii1_rclk */ - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + 0x114 PIN_OUTPUT_PULLDOWN MUX_MODE2 /* mii1_tx_en.rgmii1_tctl */ + 0x118 PIN_INPUT_PULLDOWN MUX_MODE2 /* mii1_rx_dv.rgmii1_rctl */ + 0x11c PIN_OUTPUT_PULLDOWN MUX_MODE2 /* mii1_txd3.rgmii1_td3 */ + 0x120 PIN_OUTPUT_PULLDOWN MUX_MODE2 /* mii1_txd2.rgmii1_td2 */ + 0x124 PIN_OUTPUT_PULLDOWN MUX_MODE2 /* mii1_txd1.rgmii1_td1 */ + 0x128 PIN_OUTPUT_PULLDOWN MUX_MODE2 /* mii1_txd0.rgmii1_td0 */ + 0x12c PIN_OUTPUT_PULLDOWN MUX_MODE2 /* mii1_tx_clk.rgmii1_tclk */ + 0x130 PIN_INPUT_PULLDOWN MUX_MODE2 /* mii1_rx_clk.rgmii1_rclk */ + 0x134 PIN_INPUT_PULLDOWN MUX_MODE2 /* mii1_rxd3.rgmii1_rd3 */ + 0x138 PIN_INPUT_PULLDOWN MUX_MODE2 /* mii1_rxd2.rgmii1_rd2 */ + 0x13c PIN_INPUT_PULLDOWN MUX_MODE2 /* mii1_rxd1.rgmii1_rd1 */ + 0x140 PIN_INPUT_PULLDOWN MUX_MODE2 /* mii1_rxd0.rgmii1_rd0 */ >; }; emac_rmii2_pins: pinmux_emac_rmii2_pins { pinctrl-single,pins = < - 0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a0.rmii2_txen */ - 0x050 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a4.rmii2_txd1 */ - 0x054 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a5.rmii2_txd0 */ - 0x068 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_a10.rmii2_rxd1 */ - 0x06c (PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_a11.rmii2_rxd0 */ - 0x074 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wpn.rmii2_rxer */ - 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_col.rmii2_refclk */ + 0x040 PIN_OUTPUT_PULLDOWN MUX_MODE3 /* gpmc_a0.rmii2_txen */ + 0x050 PIN_OUTPUT_PULLDOWN MUX_MODE3 /* gpmc_a4.rmii2_txd1 */ + 0x054 PIN_OUTPUT_PULLDOWN MUX_MODE3 /* gpmc_a5.rmii2_txd0 */ + 0x068 PIN_INPUT_PULLDOWN MUX_MODE3 /* gpmc_a10.rmii2_rxd1 */ + 0x06c PIN_INPUT_PULLDOWN MUX_MODE3 /* gpmc_a11.rmii2_rxd0 */ + 0x074 PIN_INPUT_PULLUP MUX_MODE3 /* gpmc_wpn.rmii2_rxer */ + 0x108 PIN_INPUT_PULLDOWN MUX_MODE1 /* mii1_col.rmii2_refclk */ >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST) MUX_MODE0 /* mdio_data */ + 0x14c PIN_OUTPUT_PULLUP MUX_MODE0 /* mdio_clk */ >; }; nandflash_pins_s0: nandflash_pins_s0 { pinctrl-single,pins = < - 0x000 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0 */ - 0x004 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1 */ - 0x008 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2 */ - 0x00c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3 */ - 0x010 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4 */ - 0x014 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5 */ - 0x018 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6 */ - 0x01c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7 */ - 0x070 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0 */ - 0x07c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* gpmc_csn0 */ - 0x090 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* gpmc_advn_ale */ - 0x094 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* gpmc_oen_ren */ - 0x098 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* gpmc_wen */ - 0x09c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* gpmc_be0n_cle */ + 0x000 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad0 */ + 0x004 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad1 */ + 0x008 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad2 */ + 0x00c PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad3 */ + 0x010 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad4 */ + 0x014 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad5 */ + 0x018 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad6 */ + 0x01c PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_ad7 */ + 0x070 PIN_INPUT_PULLUP MUX_MODE0 /* gpmc_wait0 */ + 0x07c PIN_OUTPUT_PULLDOWN MUX_MODE0 /* gpmc_csn0 */ + 0x090 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* gpmc_advn_ale */ + 0x094 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* gpmc_oen_ren */ + 0x098 PIN_OUTPUT_PULLDOWN MUX_MODE0 /* gpmc_wen */ + 0x09c PIN_OUTPUT_PULLDOWN MUX_MODE0 /* gpmc_be0n_cle */ >; }; }; diff --git a/arch/arm/dts/at91-microchip-ksz9477-evb.dts b/arch/arm/dts/at91-microchip-ksz9477-evb.dts index a0c3ce39bb..3eb2017942 100644 --- a/arch/arm/dts/at91-microchip-ksz9477-evb.dts +++ b/arch/arm/dts/at91-microchip-ksz9477-evb.dts @@ -29,7 +29,7 @@ }; }; -&{/memory} { +&{/memory@20000000} { reg = <0x20000000 0x10000000>; }; diff --git a/arch/arm/dts/at91sam9263ek.dts b/arch/arm/dts/at91sam9263ek.dts index 9013108144..29a615f482 100644 --- a/arch/arm/dts/at91sam9263ek.dts +++ b/arch/arm/dts/at91sam9263ek.dts @@ -3,12 +3,44 @@ chosen { environment { compatible = "barebox,environment"; - device-path = &nand_controller, "partname:bareboxenv"; + device-path = &environment_nand; }; }; }; +&nand_controller { + nand@3 { + /delete-node/ partitions; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; + + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x100000>; + }; + + environment_nand: bareboxenv@120000 { + label = "barebox-environment"; + reg = <0x120000 0x20000>; + }; + + rootfs@140000 { + label = "root"; + reg = <0x140000 0x0>; + }; + }; + }; +}; + &{/ahb/apb/mmc@fff84000} { pinctrl-0 = < &pinctrl_board_mmc1 diff --git a/arch/arm/dts/at91sam9x5ek.dts b/arch/arm/dts/at91sam9x5ek.dts index c753268fb9..3a6976a7d9 100644 --- a/arch/arm/dts/at91sam9x5ek.dts +++ b/arch/arm/dts/at91sam9x5ek.dts @@ -54,6 +54,38 @@ phy-mode = "rmii"; }; +&nand_controller { + nand@3 { + /delete-node/ partitions; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; + + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x100000>; + }; + + environment_nand: bareboxenv@120000 { + label = "barebox-environment"; + reg = <0x120000 0x20000>; + }; + + rootfs@140000 { + label = "root"; + reg = <0x140000 0x0>; + }; + }; + }; +}; + &{/ahb/apb/pinctrl@fffff400} { spi0 { pinctrl_board_spi: spi-board { diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi index b83511cb01..cb5ca0aba2 100644 --- a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi @@ -84,6 +84,11 @@ }; &fec { + /* + * barebox doesn't have a driver for the PMIC providing the phy-supply + * (dlg,da9063). So remove the phy-supply property and rely on the + * PMIC's reset default which has this supply enabled. + */ /delete-property/ phy-supply; }; @@ -155,6 +160,10 @@ barebox,provide-mac-address = <&fec 0x620>; }; +&som_eeprom { + pagesize = <32>; +}; + &usdhc3 { #address-cells = <1>; #size-cells = <1>; @@ -175,12 +184,6 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - eeprom: eeprom@50 { - compatible = "atmel,24c32"; - pagesize = <32>; - reg = <0x50>; - }; - pmic@58 { watchdog-priority = <500>; restart-priority = <500>; diff --git a/arch/arm/dts/imx6qdl-prti6q.dtsi b/arch/arm/dts/imx6qdl-prti6q.dtsi index f2b36553d4..bfc059e34f 100644 --- a/arch/arm/dts/imx6qdl-prti6q.dtsi +++ b/arch/arm/dts/imx6qdl-prti6q.dtsi @@ -27,6 +27,17 @@ }; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Address will be determined by the bootloader */ + ramoops { + compatible = "ramoops"; + }; + }; + reg_1v8: regulator-1v8 { compatible = "regulator-fixed"; regulator-name = "1v8"; diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi index 828be9ce0d..c3e02d2117 100644 --- a/arch/arm/dts/imx6qdl.dtsi +++ b/arch/arm/dts/imx6qdl.dtsi @@ -6,5 +6,26 @@ pwm2 = &pwm3; pwm3 = &pwm4; ipu0 = &ipu1; + gpr.reboot_mode = &reboot_mode_gpr; + }; +}; + +&src { + compatible = "fsl,imx6q-src", "fsl,imx51-src", "syscon", "simple-mfd"; + + reboot_mode_gpr: reboot-mode { + compatible = "barebox,syscon-reboot-mode"; + offset = <0x40>, <0x44>; /* SRC_GPR{9,10} */ + mask = <0xffffffff>, <0x10000000>; + mode-normal = <0>, <0>; + mode-serial = <0x00000010>, <0x10000000>; + mode-spi0-0 = <0x08000030>, <0x10000000>; + mode-spi0-1 = <0x18000030>, <0x10000000>; + mode-spi0-2 = <0x28000030>, <0x10000000>; + mode-spi0-3 = <0x38000030>, <0x10000000>; + mode-mmc0 = <0x00002040>, <0x10000000>; + mode-mmc1 = <0x00002840>, <0x10000000>; + mode-mmc2 = <0x00003040>, <0x10000000>; + mode-mmc3 = <0x00003840>, <0x10000000>; }; }; diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts new file mode 100644 index 0000000000..50ce75f12b --- /dev/null +++ b/arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (C) 2020 PHYTEC Messtechnik GmbH + * Author: Yunus Bas <y.bas@phytec.de> + */ + +/dts-v1/; +#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY +#include CONFIG_BOOTM_FITIMAGE_PUBKEY +#endif +#include <arm/imx6ul.dtsi> +#include "imx6ul-phytec-phycore-som.dtsi" +#include "imx6ul-phytec-state.dtsi" + +/ { + model = "PHYTEC phyCORE-i.MX6 Ultra Light SOM with eMMC"; + compatible = "phytec,imx6ul-pcl063-emmc", "fsl,imx6ul"; +}; + +&fec1 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; +}; + +&state { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&usdhc1 { + status = "okay"; +}; + +&usdhc2 { + status = "okay"; +}; + +&usbotg1 { + status = "okay"; +}; + +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6ul-webasto-ccbv2.dts b/arch/arm/dts/imx6ul-webasto-ccbv2.dts new file mode 100644 index 0000000000..93e9445b48 --- /dev/null +++ b/arch/arm/dts/imx6ul-webasto-ccbv2.dts @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2019, Webasto SE + * Author: Johannes Eigner <johannes.eigner@webasto.com> + */ + +/dts-v1/; + +#include "imx6ul-webasto-ccbv2.dtsi" + +/ { + chosen { + environment { + compatible = "barebox,environment"; + device-path = &environment_emmc; + }; + }; + + aliases { + state = &state_emmc; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dt-overlay@84000000 { + reg = <0x84000000 0x100000>; + no-map; + }; + }; + + state_emmc: state { + #address-cells = <1>; + #size-cells = <1>; + compatible = "barebox,state"; + magic = <0x290cf8c6>; + backend-type = "raw"; + backend = <&backend_state_emmc>; + backend-stridesize = <0x200>; + + bootstate { + #address-cells = <1>; + #size-cells = <1>; + + system0 { + #address-cells = <1>; + #size-cells = <1>; + + remaining_attempts@0 { + reg = <0x0 0x4>; + type = "uint32"; + default = <3>; + }; + + priority@4 { + reg = <0x4 0x4>; + type = "uint32"; + default = <20>; + }; + }; + + system1 { + #address-cells = <1>; + #size-cells = <1>; + + remaining_attempts@8 { + reg = <0x8 0x4>; + type = "uint32"; + default = <3>; + }; + + priority@c { + reg = <0xc 0x4>; + type = "uint32"; + default = <21>; + }; + }; + + last_chosen@10 { + reg = <0x10 0x4>; + type = "uint32"; + }; + }; + }; +}; + +&usdhc2 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x100000>; + }; + + environment_emmc: partition@100000 { + label = "barebox-environment"; + reg = <0x100000 0x100000>; + }; + + backend_state_emmc: partition@200000 { + label = "barebox-state"; + reg = <0x200000 0x100000>; + }; + }; +}; + + +&ocotp { + barebox,provide-mac-address = <&fec1 0x620>; +}; + +/* include the FIT public key for verifying on demand */ +#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY +#include CONFIG_BOOTM_FITIMAGE_PUBKEY +#endif diff --git a/arch/arm/dts/imx6ul-webasto-ccbv2.dtsi b/arch/arm/dts/imx6ul-webasto-ccbv2.dtsi new file mode 100644 index 0000000000..829485de32 --- /dev/null +++ b/arch/arm/dts/imx6ul-webasto-ccbv2.dtsi @@ -0,0 +1,469 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Copyright (C) 2019, Webasto SE +// +// Author: Johannes Eigner <johannes.eigner@webasto.com> + +/dts-v1/; + +#include <arm/imx6ul.dtsi> + +/ { + model = "Webasto common communication board version 2"; + compatible = "webasto,imx6ul-ccbv2", "fsl,imx6ul"; + + chosen { + stdout-path = &uart7; + }; + + reg_4v: regulator-4v { + compatible = "regulator-fixed"; + regulator-name = "V_+4V"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_wl18xx_vmmc: regulator-wl18xx { + compatible = "regulator-fixed"; + regulator-name = "wl1837"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>; + startup-delay-us = <70000>; + enable-active-high; + }; + + reg_dp83822_en: regulator-dp83822 { + compatible = "regulator-fixed"; + regulator-name = "dp83822"; + vin-supply = <&vcc_eth>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-supply = <®_dp83822_en>; + phy-handle = <&dp83822i>; + phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + dp83822i: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <100000>; + status = "okay"; + + pmic: mc34pf3000@8 { + compatible = "fsl,pfuze3000"; + reg = <0x08>; + regulators { + sw1a_reg: sw1a { + regulator-name = "V_+3V3_SW1A"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + vdd_soc_in: sw1b { + regulator-name = "V_+1V4_SW1B"; + vin-supply = <®_4v>; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1475000>; + regulator-ramp-delay = <6250>; + regulator-boot-on; + regulator-always-on; + }; + sw2_reg: sw2 { + regulator-name = "V_+3V3_SW2"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + vcc_ddr3: sw3 { + regulator-name = "V_+1V35_SW3"; + vin-supply = <®_4v>; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-boot-on; + regulator-always-on; + }; + swbst_reg: swbst { + regulator-name = "V_+5V0_SWBST"; + vin-supply = <®_4v>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + vdd_snvs: vsnvs { + regulator-name = "V_+3V0_SNVS"; + vin-supply = <®_4v>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + vrefddr: vrefddr { + regulator-name = "V_+0V675_VREFDDR"; + vin-supply = <&vcc_ddr3>; + regulator-boot-on; + regulator-always-on; + }; + /* 3V3 Supply: i.MX6 modules */ + vgen1_reg: vldo1 { + regulator-name = "V_+3V3_LDO1"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + vgen2_reg: vldo2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + vgen3_reg: vccsd { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3300000>; + }; + vdd_high_in: v33 { + regulator-name = "V_+3V3_V33"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + vcc_eth: vldo3 { + regulator-name = "V_+1V8_LDO3"; + vin-supply = <®_4v>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + vgen6_reg: vldo4 { + regulator-name = "V_+1V8_LDO4"; + vin-supply = <®_4v>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1>; + cs-gpios = < + &gpio3 26 GPIO_ACTIVE_LOW + &gpio3 10 GPIO_ACTIVE_LOW + &gpio3 12 GPIO_ACTIVE_LOW + >; + status = "okay"; + + cc2520: spi@0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cc2520>; + compatible = "ti,cc2520"; + reg = <0>; + spi-max-frequency = <4000000>; + fifo-gpio = <&gpio3 15 0>; + fifop-gpio = <&gpio3 16 0>; + sfd-gpio = <&gpio3 24 0>; + cca-gpio = <&gpio3 20 0>; + vreg-gpio = <&gpio3 19 0>; + reset-gpio = <&gpio3 23 0>; + vin-supply = <&sw2_reg>; + }; + qca7000: spi@1 { + compatible = "qca,qca7000"; + reg = <1>; + spi-max-frequency = <8000000>; + interrupt-parent = <&gpio4>; + interrupts = <16 0x1>; + spi-cpha; + spi-cpol; + }; + tfr7970: spi@2 { + compatible = "ti,trf7970a"; + reg = <2>; + spi-max-frequency = <2000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_trf7970>; + interrupt-parent = <&gpio3>; + interrupts = <14 0>; + ti,enable-gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>, <&gpio3 17 GPIO_ACTIVE_HIGH>; + vin-supply = <®_4v>; + vdd-io-supply = <&sw2_reg>; + autosuspend-delay = <30000>; + clock-frequency = <27120000>; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + uart-has-rtscts; + status = "okay"; + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; + vin-supply = <®_4v>; + }; +}; + +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart7>; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + bus-width = <4>; + vmmc-supply = <®_wl18xx_vmmc>; + non-removable; + keep-power-in-suspend; + cap-power-off-card; + max-frequency = <25000000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + wlcore: wlcore@2 { + compatible = "ti,wl1837"; + reg = <2>; + interrupt-parent = <&gpio4>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; + tcxo-clock-frequency = <26000000>; + }; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <8>; + vmmc-supply = <&sw1a_reg>; + no-1-8-v; + non-removable; + no-sd; + no-sdio; + keep-power-in-suspend; + status = "okay"; +}; + +&usbotg1 { + dr_mode = "otg"; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_minipcie>; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +®_arm { + vin-supply = <&vdd_soc_in>; + regulator-allow-bypass; +}; + +®_soc { + vin-supply = <&vdd_soc_in>; + regulator-allow-bypass; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x13030 + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x13030 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x10000 + >; + }; + + pinctrl_minipcie: minipciegrp { + fsl,pins = < + /* HYS=1, 100k PullDown, 50MHz, R0/6 */ + MX6UL_PAD_LCD_HSYNC__GPIO3_IO02 0x13030 + MX6UL_PAD_LCD_VSYNC__GPIO3_IO03 0x13030 + MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x13030 + MX6UL_PAD_LCD_DATA03__GPIO3_IO08 0x13030 + MX6UL_PAD_LCD_DATA04__GPIO3_IO09 0x13030 + >; + }; + + pinctrl_spi1: spi1grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x1b0b0 + MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x1b0b0 + MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x1b0b0 + MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x17030 + MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x17030 + MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x17030 + MX6UL_PAD_LCD_DATA13__GPIO3_IO18 0x10030 + >; + }; + + pinctrl_cc2520: cc2520grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA10__GPIO3_IO15 0x13030 + MX6UL_PAD_LCD_DATA11__GPIO3_IO16 0x13030 + MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0x13030 + MX6UL_PAD_LCD_DATA15__GPIO3_IO20 0x13030 + MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x13030 + MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x13030 + MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x17030 + + >; + }; + + pinctrl_trf7970: trf7970grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA07__GPIO3_IO12 0x17030 + MX6UL_PAD_LCD_DATA02__GPIO3_IO07 0x10030 + MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x10030 + MX6UL_PAD_LCD_DATA09__GPIO3_IO14 0x17000 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6UL_PAD_NAND_READY_B__UART3_DCE_TX 0x1b0b0 + MX6UL_PAD_NAND_CE0_B__UART3_DCE_RX 0x1b0b0 + MX6UL_PAD_NAND_CE1_B__UART3_DCE_CTS 0x1b0b0 + MX6UL_PAD_NAND_CLE__UART3_DCE_RTS 0x1b0b0 + MX6UL_PAD_LCD_DATA08__GPIO3_IO13 0x13030 + MX6UL_PAD_NAND_WP_B__GPIO4_IO11 0x13030 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__UART4_DCE_TX 0x1b0b0 + MX6UL_PAD_LCD_ENABLE__UART4_DCE_RX 0x1b0b0 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b0 + MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b0 + MX6UL_PAD_CSI_VSYNC__UART6_DCE_RTS 0x1b0b0 + MX6UL_PAD_CSI_HSYNC__UART6_DCE_CTS 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x10030 + MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x00010 + >; + }; + + pinctrl_uart7: uart7grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b0 + MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x10059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x10059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x10059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x10059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x10059 + MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x17000 + MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x10030 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100e9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x100e9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x100e9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x100e9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x100e9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x100e9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x100e9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x100e9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x100e9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x100e9 + MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x10030 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B 0x00b0 + >; + }; +}; diff --git a/arch/arm/dts/imx6ull-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6ull-phytec-phycore-som-emmc.dts index 2201b4c1b2..afd99a3fd9 100644 --- a/arch/arm/dts/imx6ull-phytec-phycore-som-emmc.dts +++ b/arch/arm/dts/imx6ull-phytec-phycore-som-emmc.dts @@ -10,6 +10,7 @@ #endif #include <arm/imx6ull.dtsi> #include "imx6ul-phytec-phycore-som.dtsi" +#include "imx6ul-phytec-state.dtsi" / { model = "PHYTEC phyCORE-i.MX6 ULL SOM with eMMC"; @@ -24,6 +25,10 @@ status = "okay"; }; +&state { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts index bb255e2c94..3264ade4b8 100644 --- a/arch/arm/dts/imx8mp-evk.dts +++ b/arch/arm/dts/imx8mp-evk.dts @@ -7,6 +7,7 @@ /dts-v1/; #include <arm64/freescale/imx8mp-evk.dts> +#include "imx8mp.dtsi" / { chosen { diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi new file mode 100644 index 0000000000..b251ebeada --- /dev/null +++ b/arch/arm/dts/imx8mp.dtsi @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +/ { + remoteproc_cm7: remoteproc-cm7 { + compatible = "fsl,imx8mp-cm7"; + clocks = <&clk IMX8MP_CLK_M7_CORE>; + syscon = <&src>; + }; +}; diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi index 5f2df35bc9..ec8347f38f 100644 --- a/arch/arm/dts/imx8mq.dtsi +++ b/arch/arm/dts/imx8mq.dtsi @@ -4,6 +4,14 @@ * Copyright (C) 2017 Pengutronix, Lucas Stach <kernel@pengutronix.de> */ +/ { + remoteproc_cm4: remoteproc-cm4 { + compatible = "fsl,imx8mq-cm4"; + clocks = <&clk IMX8MQ_CLK_M4_CORE>; + syscon = <&src>; + }; +}; + &clk { assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>, <&clk IMX8MQ_CLK_USDHC2>, diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index c9af5f2f7a..15682f9d27 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -7,7 +7,7 @@ }; }; -/delete-node/ &{/memory}; +/delete-node/ &{/memory@20000000}; &sdmmc0 { assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi index cc25400475..ca11492de5 100644 --- a/arch/arm/dts/stm32mp151.dtsi +++ b/arch/arm/dts/stm32mp151.dtsi @@ -28,6 +28,7 @@ pwm15 = &{/soc/timer@44006000/pwm}; pwm16 = &{/soc/timer@44007000/pwm}; pwm17 = &{/soc/timer@44008000/pwm}; + tamp.reboot_mode = &reboot_mode_tamp; }; }; @@ -42,6 +43,20 @@ compatible = "st,stm32mp1-ddr"; reg = <0x5a003000 0x1000>; }; + + tamp@5c00a000 { + compatible = "simple-bus", "syscon", "simple-mfd"; + reg = <0x5c00a000 0x400>; + + reboot_mode_tamp: reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x150>; /* reg20 */ + mask = <0xff>; + mode-normal = <0>; + mode-loader = <0xBB>; + mode-recovery = <0xBC>; + }; + }; }; &bsec { diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts index f2cafae66b..7a907cc314 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dts +++ b/arch/arm/dts/stm32mp157a-dk1.dts @@ -5,4 +5,4 @@ */ #include <arm/stm32mp157a-dk1.dts> -#include "stm32mp157a-dk1.dtsi" +#include "stm32mp15xx-dkx.dtsi" diff --git a/arch/arm/dts/stm32mp157c-dk2.dts b/arch/arm/dts/stm32mp157c-dk2.dts index 6e73162ea4..98525abd71 100644 --- a/arch/arm/dts/stm32mp157c-dk2.dts +++ b/arch/arm/dts/stm32mp157c-dk2.dts @@ -5,4 +5,4 @@ */ #include <arm/stm32mp157c-dk2.dts> -#include "stm32mp157a-dk1.dtsi" +#include "stm32mp15xx-dkx.dtsi" diff --git a/arch/arm/dts/stm32mp157a-dk1.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi index 173e64e04c..173e64e04c 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dtsi +++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi |