diff options
Diffstat (limited to 'arch/arm/mach-at91/at91sam9n12_devices.c')
| -rw-r--r-- | arch/arm/mach-at91/at91sam9n12_devices.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/arch/arm/mach-at91/at91sam9n12_devices.c b/arch/arm/mach-at91/at91sam9n12_devices.c index 84c871c6e8..43cbb79af4 100644 --- a/arch/arm/mach-at91/at91sam9n12_devices.c +++ b/arch/arm/mach-at91/at91sam9n12_devices.c @@ -19,7 +19,6 @@ #include <mach/at91_pmc.h> #include <mach/at91sam9n12_matrix.h> #include <mach/at91sam9_ddrsdr.h> -#include <mach/io.h> #include <mach/iomux.h> #include <mach/cpu.h> #include <i2c/i2c-gpio.h> @@ -133,13 +132,13 @@ static struct resource nand_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_BASE_SYS + AT91_PMECC, - .end = AT91_BASE_SYS + AT91_PMECC + 0x600 - 1, + .start = AT91SAM9N12_BASE_PMECC, + .end = AT91SAM9N12_BASE_PMECC + 0x600 - 1, .flags = IORESOURCE_MEM, }, [2] = { - .start = AT91_BASE_SYS + AT91_PMERRLOC, - .end = AT91_BASE_SYS + AT91_PMERRLOC + 0x200 - 1, + .start = AT91SAM9N12_BASE_PMERRLOC, + .end = AT91SAM9N12_BASE_PMERRLOC + 0x200 - 1, .flags = IORESOURCE_MEM, }, [3] = { @@ -158,19 +157,19 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) data->pmecc_lookup_table_offset = 0x8000; - csa = at91_sys_read(AT91_MATRIX_EBICSA); + csa = readl(AT91SAM9N12_BASE_MATRIX + AT91SAM9N12_MATRIX_EBICSA); /* Assign CS3 to NAND/SmartMedia Interface */ - csa |= AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH; + csa |= AT91SAM9N12_MATRIX_EBI_CS3A_SMC_NANDFLASH; /* Configure databus */ if (!data->bus_on_d0) - csa |= AT91_MATRIX_NFD0_ON_D16; + csa |= AT91SAM9N12_MATRIX_NFD0_ON_D16; else - csa &= ~AT91_MATRIX_NFD0_ON_D16; + csa &= ~AT91SAM9N12_MATRIX_NFD0_ON_D16; /* Configure IO drive */ - csa |= AT91_MATRIX_EBI_HIGH_DRIVE; + csa |= AT91SAM9N12_MATRIX_EBI_HIGH_DRIVE; - at91_sys_write(AT91_MATRIX_EBICSA, csa); + writel(csa, AT91SAM9N12_BASE_MATRIX + AT91SAM9N12_MATRIX_EBICSA); /* enable pin */ if (gpio_is_valid(data->enable_pin)) @@ -373,7 +372,7 @@ resource_size_t __init at91_configure_dbgu(void) at91_set_A_periph(AT91_PIN_PA9, 1); /* DRXD */ at91_set_A_periph(AT91_PIN_PA10, 0); /* DTXD */ - return AT91_BASE_SYS + AT91_DBGU; + return AT91SAM9N12_BASE_DBGU; } resource_size_t __init at91_configure_usart0(unsigned pins) |