diff options
Diffstat (limited to 'arch/arm/mach-at91/at91sam9x5_devices.c')
| -rw-r--r-- | arch/arm/mach-at91/at91sam9x5_devices.c | 88 |
1 files changed, 85 insertions, 3 deletions
diff --git a/arch/arm/mach-at91/at91sam9x5_devices.c b/arch/arm/mach-at91/at91sam9x5_devices.c index e92fa0de21..9f211e3bdd 100644 --- a/arch/arm/mach-at91/at91sam9x5_devices.c +++ b/arch/arm/mach-at91/at91sam9x5_devices.c @@ -16,6 +16,7 @@ #include <mach/board.h> #include <mach/at91_pmc.h> #include <mach/at91sam9x5_matrix.h> +#include <mach/at91sam9_ddrsdr.h> #include <mach/gpio.h> #include <mach/io.h> #include <mach/cpu.h> @@ -25,6 +26,9 @@ void at91_add_device_sdram(u32 size) { + if (!size) + size = at91sam9x5_get_ddram_size(); + arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size); add_mem_device("sram0", AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE); @@ -45,7 +49,8 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) /* Enable VBus control for UHP ports */ for (i = 0; i < data->ports; i++) { if (gpio_is_valid(data->vbus_pin[i])) - at91_set_gpio_output(data->vbus_pin[i], 0); + at91_set_gpio_output(data->vbus_pin[i], + data->vbus_pin_active_low[i]); } add_generic_device("at91_ohci", DEVICE_ID_DYNAMIC, NULL, AT91SAM9X5_OHCI_BASE, @@ -55,6 +60,28 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {} #endif +#if defined(CONFIG_USB_EHCI) +void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) +{ + int i; + + if (!data) + return; + + /* Enable VBus control for UHP ports */ + for (i = 0; i < data->ports; i++) { + if (gpio_is_valid(data->vbus_pin[i])) + at91_set_gpio_output(data->vbus_pin[i], + data->vbus_pin_active_low[i]); + } + + add_generic_device("atmel-ehci", DEVICE_ID_SINGLE, NULL, AT91SAM9X5_EHCI_BASE, + 1024 * 1024, IORESOURCE_MEM, data); +} +#else +void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {} +#endif + #if defined(CONFIG_DRIVER_NET_MACB) void at91_add_device_eth(int id, struct at91_ether_platform_data *data) { @@ -84,7 +111,7 @@ void at91_add_device_eth(int id, struct at91_ether_platform_data *data) at91_set_A_periph(AT91_PIN_PB5, 0); /* EMDIO */ at91_set_A_periph(AT91_PIN_PB6, 0); /* EMDC */ - if (!data->is_rmii) { + if (data->phy_interface != PHY_INTERFACE_MODE_RMII) { at91_set_A_periph(AT91_PIN_PB16, 0); /* ECRS */ at91_set_A_periph(AT91_PIN_PB17, 0); /* ECOL */ at91_set_A_periph(AT91_PIN_PB13, 0); /* ERX2 */ @@ -97,7 +124,7 @@ void at91_add_device_eth(int id, struct at91_ether_platform_data *data) break; case 1: start = AT91SAM9X5_BASE_EMAC1; - if (!data->is_rmii) + if (data->phy_interface != PHY_INTERFACE_MODE_RMII) pr_warn("AT91: Only RMII available on interface macb%d.\n", id); /* Pins used for RMII */ @@ -364,6 +391,61 @@ void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata) {} #endif /* -------------------------------------------------------------------- + * LCD Controller + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_DRIVER_VIDEO_ATMEL_HLCD) +void __init at91_add_device_lcdc(struct atmel_lcdfb_platform_data *data) +{ + BUG_ON(!data); + + if (cpu_is_at91sam9g25() || cpu_is_at91sam9x25()) { + pr_warn("AT91: no lcd on at91sam9g25 or at91sam9x25\n"); + return; + } + + at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDPWM */ + + at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDVSYNC */ + at91_set_A_periph(AT91_PIN_PC28, 0); /* LCDHSYNC */ + + at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDDISP */ + at91_set_A_periph(AT91_PIN_PC29, 0); /* LCDDEN */ + at91_set_A_periph(AT91_PIN_PC30, 0); /* LCDPCK */ + + at91_set_A_periph(AT91_PIN_PC0, 0); /* LCDD0 */ + at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDD1 */ + at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDD2 */ + at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDD3 */ + at91_set_A_periph(AT91_PIN_PC4, 0); /* LCDD4 */ + at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDD5 */ + at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD6 */ + at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD7 */ + at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD8 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD9 */ + at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD10 */ + at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD11 */ + at91_set_A_periph(AT91_PIN_PC12, 0); /* LCDD12 */ + at91_set_A_periph(AT91_PIN_PC13, 0); /* LCDD13 */ + at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD14 */ + at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD15 */ + at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD16 */ + at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD17 */ + at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD18 */ + at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD19 */ + at91_set_A_periph(AT91_PIN_PC20, 0); /* LCDD20 */ + at91_set_A_periph(AT91_PIN_PC21, 0); /* LCDD21 */ + at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD22 */ + at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD23 */ + + add_generic_device("atmel_hlcdfb", DEVICE_ID_SINGLE, NULL, AT91SAM9X5_BASE_LCDC, SZ_4K, + IORESOURCE_MEM, data); +} +#else +void __init at91_add_device_lcdc(struct atmel_lcdfb_platform_data *data) {} +#endif + +/* -------------------------------------------------------------------- * UART * -------------------------------------------------------------------- */ |