diff options
Diffstat (limited to 'arch/arm/mach-imx/include/mach')
-rw-r--r-- | arch/arm/mach-imx/include/mach/generic.h | 18 | ||||
-rw-r--r-- | arch/arm/mach-imx/include/mach/imx-nand.h | 49 | ||||
-rw-r--r-- | arch/arm/mach-imx/include/mach/imx6-regs.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-imx/include/mach/imx6.h | 36 | ||||
-rw-r--r-- | arch/arm/mach-imx/include/mach/xload.h | 1 |
5 files changed, 100 insertions, 7 deletions
diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h index cadc501040..7c275dff84 100644 --- a/arch/arm/mach-imx/include/mach/generic.h +++ b/arch/arm/mach-imx/include/mach/generic.h @@ -8,13 +8,17 @@ u64 imx_uid(void); -void imx25_boot_save_loc(void __iomem *ccm_base); -void imx35_boot_save_loc(void __iomem *ccm_base); -void imx27_boot_save_loc(void __iomem *sysctrl_base); -void imx50_boot_save_loc(void __iomem *src_base); -void imx51_boot_save_loc(void __iomem *src_base); -void imx53_boot_save_loc(void __iomem *src_base); -void imx6_boot_save_loc(void __iomem *src_base); +void imx25_boot_save_loc(void); +void imx35_boot_save_loc(void); +void imx27_boot_save_loc(void); +void imx51_boot_save_loc(void); +void imx53_boot_save_loc(void); +void imx6_boot_save_loc(void); + +void imx25_get_boot_source(enum bootsource *src, int *instance); +void imx35_get_boot_source(enum bootsource *src, int *instance); +void imx51_get_boot_source(enum bootsource *src, int *instance); +void imx53_get_boot_source(enum bootsource *src, int *instance); void imx6_get_boot_source(enum bootsource *src, int *instance); int imx1_init(void); diff --git a/arch/arm/mach-imx/include/mach/imx-nand.h b/arch/arm/mach-imx/include/mach/imx-nand.h index b9305e2e9d..0adba0989a 100644 --- a/arch/arm/mach-imx/include/mach/imx-nand.h +++ b/arch/arm/mach-imx/include/mach/imx-nand.h @@ -59,6 +59,55 @@ struct imx_nand_platform_data { #define NFC_V2_SPAS_SPARESIZE(spas) ((spas) >> 1) +#define NFC_V3_FLASH_CMD (host->regs_axi + 0x00) +#define NFC_V3_FLASH_ADDR0 (host->regs_axi + 0x04) + +#define NFC_V3_CONFIG1 (host->regs_axi + 0x34) +#define NFC_V3_CONFIG1_SP_EN (1 << 0) +#define NFC_V3_CONFIG1_RBA(x) (((x) & 0x7 ) << 4) + +#define NFC_V3_ECC_STATUS_RESULT (host->regs_axi + 0x38) + +#define NFC_V3_LAUNCH (host->regs_axi + 0x40) + +#define NFC_V3_WRPROT (host->regs_ip + 0x0) +#define NFC_V3_WRPROT_LOCK_TIGHT (1 << 0) +#define NFC_V3_WRPROT_LOCK (1 << 1) +#define NFC_V3_WRPROT_UNLOCK (1 << 2) +#define NFC_V3_WRPROT_BLS_UNLOCK (2 << 6) + +#define NFC_V3_WRPROT_UNLOCK_BLK_ADD0 (host->regs_ip + 0x04) + +#define NFC_V3_CONFIG2 (host->regs_ip + 0x24) +#define NFC_V3_CONFIG2_PS_512 (0 << 0) +#define NFC_V3_CONFIG2_PS_2048 (1 << 0) +#define NFC_V3_CONFIG2_PS_4096 (2 << 0) +#define NFC_V3_CONFIG2_ONE_CYCLE (1 << 2) +#define NFC_V3_CONFIG2_ECC_EN (1 << 3) +#define NFC_V3_CONFIG2_2CMD_PHASES (1 << 4) +#define NFC_V3_CONFIG2_NUM_ADDR_PHASE0 (1 << 5) +#define NFC_V3_CONFIG2_ECC_MODE_8 (1 << 6) +#define NFC_V3_MX51_CONFIG2_PPB(x) (((x) & 0x3) << 7) +#define NFC_V3_MX53_CONFIG2_PPB(x) (((x) & 0x3) << 8) +#define NFC_V3_CONFIG2_NUM_ADDR_PHASE1(x) (((x) & 0x3) << 12) +#define NFC_V3_CONFIG2_INT_MSK (1 << 15) +#define NFC_V3_CONFIG2_ST_CMD(x) (((x) & 0xff) << 24) +#define NFC_V3_CONFIG2_SPAS(x) (((x) & 0xff) << 16) + +#define NFC_V3_CONFIG3 (host->regs_ip + 0x28) +#define NFC_V3_CONFIG3_ADD_OP(x) (((x) & 0x3) << 0) +#define NFC_V3_CONFIG3_FW8 (1 << 3) +#define NFC_V3_CONFIG3_SBB(x) (((x) & 0x7) << 8) +#define NFC_V3_CONFIG3_NUM_OF_DEVICES(x) (((x) & 0x7) << 12) +#define NFC_V3_CONFIG3_RBB_MODE (1 << 15) +#define NFC_V3_CONFIG3_NO_SDMA (1 << 20) + +#define NFC_V3_IPC (host->regs_ip + 0x2C) +#define NFC_V3_IPC_CREQ (1 << 0) +#define NFC_V3_IPC_INT (1 << 31) + +#define NFC_V3_DELAY_LINE (host->regs_ip + 0x34) + /* * Operation modes for the NFC. Valid for v1, v2 and v3 * type controllers. diff --git a/arch/arm/mach-imx/include/mach/imx6-regs.h b/arch/arm/mach-imx/include/mach/imx6-regs.h index 68be43c9ab..e661c4ed12 100644 --- a/arch/arm/mach-imx/include/mach/imx6-regs.h +++ b/arch/arm/mach-imx/include/mach/imx6-regs.h @@ -3,6 +3,9 @@ #define MX6_GPMI_BASE_ADDR 0x00112000 +#define MX6_FAST1_BASE_ADDR 0x00c00000 +#define MX6_FAST2_BASE_ADDR 0x00b00000 + #define MX6_AIPS1_ARB_BASE_ADDR 0x02000000 #define MX6_AIPS2_ARB_BASE_ADDR 0x02100000 diff --git a/arch/arm/mach-imx/include/mach/imx6.h b/arch/arm/mach-imx/include/mach/imx6.h index e8ffa47a7d..fb5eaf16b7 100644 --- a/arch/arm/mach-imx/include/mach/imx6.h +++ b/arch/arm/mach-imx/include/mach/imx6.h @@ -4,6 +4,7 @@ #include <io.h> #include <mach/generic.h> #include <mach/imx6-regs.h> +#include <mach/revision.h> void imx6_init_lowlevel(void); @@ -48,6 +49,41 @@ static inline int imx6_cpu_type(void) return __imx6_cpu_type(); } +static inline int __imx6_cpu_revision(void) +{ + + uint32_t rev; + + rev = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV); + + switch (rev & 0xfff) { + case 0x00: + return IMX_CHIP_REV_1_0; + case 0x01: + return IMX_CHIP_REV_1_1; + case 0x02: + return IMX_CHIP_REV_1_2; + case 0x03: + return IMX_CHIP_REV_1_3; + case 0x04: + return IMX_CHIP_REV_1_4; + case 0x05: + return IMX_CHIP_REV_1_5; + case 0x100: + return IMX_CHIP_REV_2_0; + } + + return IMX_CHIP_REV_UNKNOWN; +} + +static inline int imx6_cpu_revision(void) +{ + if (!cpu_is_mx6()) + return 0; + + return __imx6_cpu_revision(); +} + #define DEFINE_MX6_CPU_TYPE(str, type) \ static inline int cpu_mx6_is_##str(void) \ { \ diff --git a/arch/arm/mach-imx/include/mach/xload.h b/arch/arm/mach-imx/include/mach/xload.h index 997522e2d5..3898d664ef 100644 --- a/arch/arm/mach-imx/include/mach/xload.h +++ b/arch/arm/mach-imx/include/mach/xload.h @@ -1,6 +1,7 @@ #ifndef __MACH_XLOAD_H #define __MACH_XLOAD_H +int imx53_nand_start_image(void); int imx6_spi_load_image(int instance, unsigned int flash_offset, void *buf, int len); int imx6_spi_start_image(int instance); int imx6_esdhc_load_image(int instance, void *buf, int len); |