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-rw-r--r--arch/arm/mach-imx/include/mach/bbu.h60
-rw-r--r--arch/arm/mach-imx/include/mach/habv4-imx6-gencsf.h13
-rw-r--r--arch/arm/mach-imx/include/mach/imx-header.h19
-rw-r--r--arch/arm/mach-imx/include/mach/imx6-ccm-regs.h24
-rw-r--r--arch/arm/mach-imx/include/mach/ocotp-fusemap.h6
-rw-r--r--arch/arm/mach-imx/include/mach/usb.h23
6 files changed, 101 insertions, 44 deletions
diff --git a/arch/arm/mach-imx/include/mach/bbu.h b/arch/arm/mach-imx/include/mach/bbu.h
index b9b2c5bcba..b64c8d1180 100644
--- a/arch/arm/mach-imx/include/mach/bbu.h
+++ b/arch/arm/mach-imx/include/mach/bbu.h
@@ -32,57 +32,63 @@ struct imx_dcd_v2_entry;
#ifdef CONFIG_BAREBOX_UPDATE
-int imx51_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
+int imx51_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
unsigned long flags);
int imx51_bbu_internal_spi_i2c_register_handler(const char *name,
- char *devicefile, unsigned long flags);
+ const char *devicefile, unsigned long flags);
-int imx53_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
+int imx53_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
unsigned long flags);
-int imx53_bbu_internal_spi_i2c_register_handler(const char *name, char *devicefile,
+int imx53_bbu_internal_spi_i2c_register_handler(const char *name, const char *devicefile,
unsigned long flags);
int imx53_bbu_internal_nand_register_handler(const char *name,
unsigned long flags, int partition_size);
-int imx6_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
+int imx6_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
unsigned long flags);
-int imx6_bbu_internal_mmcboot_register_handler(const char *name, char *devicefile,
+int imx6_bbu_internal_mmcboot_register_handler(const char *name, const char *devicefile,
unsigned long flags);
-int imx6_bbu_internal_spi_i2c_register_handler(const char *name, char *devicefile,
+int imx6_bbu_internal_spi_i2c_register_handler(const char *name, const char *devicefile,
unsigned long flags);
-int vf610_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
+int vf610_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
unsigned long flags);
-int imx_bbu_external_nor_register_handler(const char *name, char *devicefile,
+int vf610_bbu_internal_spi_i2c_register_handler(const char *name, const char *devicefile,
+ unsigned long flags);
+
+int imx8mq_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
+ unsigned long flags);
+
+int imx_bbu_external_nor_register_handler(const char *name, const char *devicefile,
unsigned long flags);
#else
-static inline int imx51_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
+static inline int imx51_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
unsigned long flags)
{
return -ENOSYS;
}
static inline int imx51_bbu_internal_spi_i2c_register_handler(const char *name,
- char *devicefile, unsigned long flags)
+ const char *devicefile, unsigned long flags)
{
return -ENOSYS;
}
-static inline int imx53_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
+static inline int imx53_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
unsigned long flags)
{
return -ENOSYS;
}
-static inline int imx53_bbu_internal_spi_i2c_register_handler(const char *name, char *devicefile,
+static inline int imx53_bbu_internal_spi_i2c_register_handler(const char *name, const char *devicefile,
unsigned long flags)
{
return -ENOSYS;
@@ -94,43 +100,57 @@ static inline int imx53_bbu_internal_nand_register_handler(const char *name,
return -ENOSYS;
}
-static inline int imx6_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
+static inline int imx6_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
unsigned long flags)
{
return -ENOSYS;
}
static inline int imx6_bbu_internal_mmcboot_register_handler(const char *name,
- char *devicefile,
+ const char *devicefile,
unsigned long flags)
{
return -ENOSYS;
}
-static inline int imx6_bbu_internal_spi_i2c_register_handler(const char *name, char *devicefile,
+static inline int imx6_bbu_internal_spi_i2c_register_handler(const char *name, const char *devicefile,
unsigned long flags)
{
return -ENOSYS;
}
-static inline int vf610_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
+static inline int vf610_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
unsigned long flags)
{
return -ENOSYS;
}
-static inline int imx_bbu_external_nor_register_handler(const char *name, char *devicefile,
+static inline int imx8mq_bbu_internal_mmc_register_handler(const char *name, const char *devicefile,
+ unsigned long flags)
+{
+ return -ENOSYS;
+}
+
+static inline int imx_bbu_external_nor_register_handler(const char *name, const char *devicefile,
unsigned long flags)
{
return -ENOSYS;
}
+
+static inline int
+vf610_bbu_internal_spi_i2c_register_handler(const char *name, char *devicefile,
+ unsigned long flags)
+{
+ return -ENOSYS;
+}
+
#endif
#if defined(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND)
-int imx_bbu_external_nand_register_handler(const char *name, char *devicefile,
+int imx_bbu_external_nand_register_handler(const char *name, const char *devicefile,
unsigned long flags);
#else
-static inline int imx_bbu_external_nand_register_handler(const char *name, char *devicefile,
+static inline int imx_bbu_external_nand_register_handler(const char *name, const char *devicefile,
unsigned long flags)
{
return -ENOSYS;
diff --git a/arch/arm/mach-imx/include/mach/habv4-imx6-gencsf.h b/arch/arm/mach-imx/include/mach/habv4-imx6-gencsf.h
index 0649caa0cb..5818879609 100644
--- a/arch/arm/mach-imx/include/mach/habv4-imx6-gencsf.h
+++ b/arch/arm/mach-imx/include/mach/habv4-imx6-gencsf.h
@@ -43,3 +43,16 @@ hab [Authenticate Data]
hab Verification index = 2
hab_blocks
+
+hab_encrypt [Install Secret Key]
+hab_encrypt Verification index = 0
+hab_encrypt Target index = 0
+hab_encrypt_key
+hab_encrypt_key_length 256
+hab_encrypt_blob_address
+
+hab_encrypt [Decrypt Data]
+hab_encrypt Verification index = 0
+hab_encrypt Mac Bytes = 16
+
+hab_encrypt_blocks
diff --git a/arch/arm/mach-imx/include/mach/imx-header.h b/arch/arm/mach-imx/include/mach/imx-header.h
index c9b2a58819..05f1669318 100644
--- a/arch/arm/mach-imx/include/mach/imx-header.h
+++ b/arch/arm/mach-imx/include/mach/imx-header.h
@@ -4,6 +4,14 @@
#include <linux/types.h>
#define HEADER_LEN 0x1000 /* length of the blank area + IVT + DCD */
+#define CSF_LEN 0x2000 /* length of the CSF (needed for HAB) */
+
+#define DEK_BLOB_HEADER 8 /* length of DEK blob header */
+#define DEK_BLOB_KEY 32 /* length of DEK blob AES-256 key */
+#define DEK_BLOB_MAC 16 /* length of DEK blob MAC */
+
+/* DEK blob length excluding DEK itself */
+#define DEK_BLOB_OVERHEAD (DEK_BLOB_HEADER + DEK_BLOB_KEY + DEK_BLOB_MAC)
/*
* ============================================================================
@@ -47,6 +55,14 @@ struct imx_dcd_rec_v1 {
#define PARAMETER_FLAG_MASK (1 << 3)
#define PARAMETER_FLAG_SET (1 << 4)
+#define PLUGIN_HDMI_IMAGE 0x0002
+
+/*
+ * As per Table 6-22 "eMMC/SD BOOT layout", in Normal Boot layout HDMI
+ * firmware image starts at LBA# 64 and ends at LBA# 271
+ */
+#define PLUGIN_HDMI_SIZE ((271 - 64 + 1) * 512)
+
struct imx_ivt_header {
uint8_t tag;
uint16_t length;
@@ -94,6 +110,9 @@ struct config_data {
int (*nop)(const struct config_data *data);
int csf_space;
char *csf;
+ char *signed_hdmi_firmware_file;
+ int encrypt_image;
+ size_t dek_size;
};
#define MAX_RECORDS_DCD_V2 1024
diff --git a/arch/arm/mach-imx/include/mach/imx6-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx6-ccm-regs.h
deleted file mode 100644
index 099d5621de..0000000000
--- a/arch/arm/mach-imx/include/mach/imx6-ccm-regs.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define MX6_CCM_CCOSR 0x020c4060
-#define MX6_CCM_CCGR0 0x020C4068
-#define MX6_CCM_CCGR1 0x020C406c
-#define MX6_CCM_CCGR2 0x020C4070
-#define MX6_CCM_CCGR3 0x020C4074
-#define MX6_CCM_CCGR4 0x020C4078
-#define MX6_CCM_CCGR5 0x020C407c
-#define MX6_CCM_CCGR6 0x020C4080
-
-#define MX6_PMU_MISC2 0x020C8170
diff --git a/arch/arm/mach-imx/include/mach/ocotp-fusemap.h b/arch/arm/mach-imx/include/mach/ocotp-fusemap.h
index 44b58ca6e8..aec50dbf8a 100644
--- a/arch/arm/mach-imx/include/mach/ocotp-fusemap.h
+++ b/arch/arm/mach-imx/include/mach/ocotp-fusemap.h
@@ -23,7 +23,11 @@
#define OCOTP_BOOT_CFG2 (OCOTP_WORD(0x450) | OCOTP_BIT(8) | OCOTP_WIDTH(8))
#define OCOTP_BOOT_CFG3 (OCOTP_WORD(0x450) | OCOTP_BIT(16) | OCOTP_WIDTH(8))
#define OCOTP_BOOT_CFG4 (OCOTP_WORD(0x450) | OCOTP_BIT(24) | OCOTP_WIDTH(8))
+/* available on i.MX6SDL silicon revision >=1.4, "reserved" elsewhere */
+#define OCOTP_SDP_DISABLE (OCOTP_WORD(0x460) | OCOTP_BIT(0) | OCOTP_WIDTH(1))
#define OCOTP_SEC_CONFIG_1 (OCOTP_WORD(0x460) | OCOTP_BIT(1) | OCOTP_WIDTH(1))
+/* available on i.MX6SDL silicon revision >=1.4, "reserved" elsewhere */
+#define OCOTP_SDP_READ_DISABLE (OCOTP_WORD(0x460) | OCOTP_BIT(2) | OCOTP_WIDTH(1))
#define OCOTP_DIR_BT_DIS (OCOTP_WORD(0x460) | OCOTP_BIT(3) | OCOTP_WIDTH(1))
#define OCOTP_BT_FUSE_SEL (OCOTP_WORD(0x460) | OCOTP_BIT(4) | OCOTP_WIDTH(1))
#define OCOTP_SJC_DISABLE (OCOTP_WORD(0x460) | OCOTP_BIT(20) | OCOTP_WIDTH(1))
@@ -31,6 +35,8 @@
#define OCOTP_JTAG_SMODE (OCOTP_WORD(0x460) | OCOTP_BIT(22) | OCOTP_WIDTH(2))
#define OCOTP_KTE (OCOTP_WORD(0x460) | OCOTP_BIT(26) | OCOTP_WIDTH(1))
#define OCOTP_JTAG_HEO (OCOTP_WORD(0x460) | OCOTP_BIT(27) | OCOTP_WIDTH(1))
+/* available on i.MX6SDL silicon revision >=1.4, "reserved" elsewhere */
+#define OCOTP_FORCE_INTERNAL_BOOT (OCOTP_WORD(0x460) | OCOTP_BIT(31) | OCOTP_WIDTH(1))
#define OCOTP_NAND_READ_CMD_CODE1 (OCOTP_WORD(0x470) | OCOTP_BIT(0) | OCOTP_WIDTH(8))
#define OCOTP_NAND_READ_CMD_CODE2 (OCOTP_WORD(0x470) | OCOTP_BIT(8) | OCOTP_WIDTH(8))
#define OCOTP_TEMP_SENSE (OCOTP_WORD(0x4e0) | OCOTP_BIT(0) | OCOTP_WIDTH(32))
diff --git a/arch/arm/mach-imx/include/mach/usb.h b/arch/arm/mach-imx/include/mach/usb.h
index 85528d77e6..3b5e24d1cc 100644
--- a/arch/arm/mach-imx/include/mach/usb.h
+++ b/arch/arm/mach-imx/include/mach/usb.h
@@ -14,4 +14,27 @@
int imx6_usb_phy2_disable_oc(void);
int imx6_usb_phy2_enable(void);
+#define USBCMD 0x140
+#define USB_CMD_RESET 0x00000002
+
+/*
+ * imx_reset_otg_controller - reset the USB OTG controller
+ * @base: The base address of the controller
+ *
+ * When booting from USB the ROM just leaves the controller enabled. This can
+ * have bad side effects when for example we change PLL frequencies. In this
+ * case it is seen that the hub the board is connected to gets confused and USB
+ * is no longer working properly on the remote host. This function resets the
+ * OTG controller. It should be called before the clocks the controller hangs on
+ * is fiddled with.
+ */
+static inline void imx_reset_otg_controller(void __iomem *base)
+{
+ u32 r;
+
+ r = readl(base + USBCMD);
+ r |= USB_CMD_RESET;
+ writel(r, base + USBCMD);
+}
+
#endif /* __MACH_USB_H_*/
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-06 01:11:14 +0000