1 files changed, 33 insertions, 25 deletions

diff --git a/arch/arm/mach-imx/nand.c b/arch/arm/mach-imx/nand.c
index fff9a12379..f298a36046 100644
--- a/arch/arm/mach-imx/nand.c
+++ b/arch/arm/mach-imx/nand.c
@@ -12,20 +12,23 @@
  */
 
 #include <common.h>
-#include <mach/imx-regs.h>
+#include <mach/generic.h>
+#include <mach/imx21-regs.h>
+#include <mach/imx25-regs.h>
+#include <mach/imx27-regs.h>
+#include <mach/imx35-regs.h>
 #include <io.h>
 
-#if defined(CONFIG_ARCH_IMX35) || defined (CONFIG_ARCH_IMX25)
-
 #define RCSR_NFC_FMS		(1 << 8)
 #define RCSR_NFC_4K		(1 << 9)
 #define RCSR_NFC_16BIT_SEL	(1 << 14)
 
-void imx_nand_set_layout(int writesize, int datawidth)
+static __maybe_unused void imx25_35_nand_set_layout(void __iomem *reg_rcsr,
+		int writesize, int datawidth)
 {
 	unsigned int rcsr;
 
-	rcsr = readl(IMX_CCM_BASE + CCM_RCSR);
+	rcsr = readl(reg_rcsr);
 
 	switch (writesize) {
 	case 512:
@@ -52,19 +55,18 @@ void imx_nand_set_layout(int writesize, int datawidth)
 		break;
 	}
 
-	writel(rcsr, IMX_CCM_BASE + CCM_RCSR);
+	writel(rcsr, reg_rcsr);
 }
 
-#elif defined(CONFIG_ARCH_IMX21) || defined (CONFIG_ARCH_IMX27)
-
 #define FMCR_NF_FMS		(1 << 5)
 #define FMCR_NF_16BIT_SEL	(1 << 4)
 
-void imx_nand_set_layout(int writesize, int datawidth)
+static __maybe_unused void imx21_27_nand_set_layout(void __iomem *reg_fmcr,
+		int writesize, int datawidth)
 {
 	unsigned int fmcr;
 
-	fmcr = FMCR;
+	fmcr = readl(reg_fmcr);
 
 	switch (writesize) {
 	case 512:
@@ -88,23 +90,29 @@ void imx_nand_set_layout(int writesize, int datawidth)
 		break;
 	}
 
-	FMCR = fmcr;
-}
-
-#elif defined CONFIG_ARCH_IMX51 || defined CONFIG_ARCH_IMX53
-
-void imx_nand_set_layout(int writesize, int datawidth)
-{
-	/* Just silence the compiler warning below. On i.MX51 we don't
-	 * have external boot.
-	 */
+	writel(fmcr, reg_fmcr);
 }
 
-#else
-#warning using empty imx_nand_set_layout(). NAND flash will not work properly if not booting from it
-
 void imx_nand_set_layout(int writesize, int datawidth)
 {
-}
-
+#ifdef CONFIG_ARCH_IMX21
+	if (cpu_is_mx21())
+		imx21_27_nand_set_layout((void *)(MX21_SYSCTRL_BASE_ADDR +
+					0x14), writesize, datawidth);
 #endif
+#ifdef CONFIG_ARCH_IMX27
+	if (cpu_is_mx27())
+		imx21_27_nand_set_layout((void *)(MX27_SYSCTRL_BASE_ADDR +
+					0x14), writesize, datawidth);
+#endif
+#ifdef CONFIG_ARCH_IMX25
+	if (cpu_is_mx25())
+		imx25_35_nand_set_layout((void *)MX25_CCM_BASE_ADDR +
+				MX25_CCM_RCSR, writesize, datawidth);
+#endif
+#ifdef CONFIG_ARCH_IMX35
+	if (cpu_is_mx35())
+		imx25_35_nand_set_layout((void *)MX35_CCM_BASE_ADDR +
+				MX35_CCM_RCSR, writesize, datawidth);
+#endif
+}