diff options
Diffstat (limited to 'arch/arm/mach-imx/ocotp.c')
-rw-r--r-- | arch/arm/mach-imx/ocotp.c | 227 |
1 files changed, 107 insertions, 120 deletions
diff --git a/arch/arm/mach-imx/ocotp.c b/arch/arm/mach-imx/ocotp.c index c99a003bb0..e2f10e12a0 100644 --- a/arch/arm/mach-imx/ocotp.c +++ b/arch/arm/mach-imx/ocotp.c @@ -26,6 +26,7 @@ #include <io.h> #include <of.h> #include <clock.h> +#include <regmap.h> #include <linux/clk.h> /* @@ -35,6 +36,7 @@ #define MAC_ADDRESS_PROPLEN (2 * sizeof(__be32)) /* OCOTP Registers offsets */ +#define OCOTP_CTRL 0x00 #define OCOTP_CTRL_SET 0x04 #define OCOTP_CTRL_CLR 0x08 #define OCOTP_TIMING 0x10 @@ -70,14 +72,19 @@ #define MAC_OFFSET (0x22 * 4) #define MAC_BYTES 8 +struct imx_ocotp_data { + int num_regs; +}; + struct ocotp_priv { - struct cdev cdev; + struct regmap *map; void __iomem *base; struct clk *clk; struct device_d dev; int permanent_write_enable; int sense_enable; char ethaddr[6]; + struct regmap_config map_config; }; static int imx6_ocotp_set_timing(struct ocotp_priv *priv) @@ -101,18 +108,13 @@ static int imx6_ocotp_set_timing(struct ocotp_priv *priv) return 0; } -static int imx6_ocotp_wait_busy(u32 flags, struct ocotp_priv *priv) +static int imx6_ocotp_wait_busy(struct ocotp_priv *priv, u32 flags) { uint64_t start = get_time_ns(); - while ((OCOTP_CTRL_BUSY | OCOTP_CTRL_ERROR | flags) & - readl(priv->base)) { - if (is_timeout(start, MSECOND)) { - /* Clear ERROR bit */ - writel(OCOTP_CTRL_ERROR, priv->base + OCOTP_CTRL_CLR); + while (readl(priv->base + OCOTP_CTRL) & (OCOTP_CTRL_BUSY | flags)) + if (is_timeout(start, MSECOND)) return -ETIMEDOUT; - } - } return 0; } @@ -125,103 +127,94 @@ static int imx6_ocotp_prepare(struct ocotp_priv *priv) if (ret) return ret; - ret = imx6_ocotp_wait_busy(0, priv); + ret = imx6_ocotp_wait_busy(priv, 0); if (ret) return ret; return 0; } -static int fuse_read_addr(u32 addr, u32 *pdata, struct ocotp_priv *priv) +static int fuse_read_addr(struct ocotp_priv *priv, u32 addr, u32 *pdata) { u32 ctrl_reg; int ret; - ctrl_reg = readl(priv->base); + writel(OCOTP_CTRL_ERROR, priv->base + OCOTP_CTRL_CLR); + + ctrl_reg = readl(priv->base + OCOTP_CTRL); ctrl_reg &= ~OCOTP_CTRL_ADDR_MASK; ctrl_reg &= ~OCOTP_CTRL_WR_UNLOCK_MASK; ctrl_reg |= BF(addr, OCOTP_CTRL_ADDR); - writel(ctrl_reg, priv->base); + writel(ctrl_reg, priv->base + OCOTP_CTRL); writel(OCOTP_READ_CTRL_READ_FUSE, priv->base + OCOTP_READ_CTRL); - ret = imx6_ocotp_wait_busy(0, priv); + ret = imx6_ocotp_wait_busy(priv, 0); if (ret) return ret; - *pdata = readl(priv->base + OCOTP_READ_FUSE_DATA); + if (readl(priv->base + OCOTP_CTRL) & OCOTP_CTRL_ERROR) + *pdata = 0xbadabada; + else + *pdata = readl(priv->base + OCOTP_READ_FUSE_DATA); return 0; } -int imx6_ocotp_read_one_u32(u32 index, u32 *pdata, struct ocotp_priv *priv) +int imx6_ocotp_read_one_u32(struct ocotp_priv *priv, u32 index, u32 *pdata) { int ret; ret = imx6_ocotp_prepare(priv); if (ret) { - dev_err(priv->cdev.dev, "failed to prepare read fuse 0x%08x\n", + dev_err(&priv->dev, "failed to prepare read fuse 0x%08x\n", index); return ret; } - ret = fuse_read_addr(index, pdata, priv); + ret = fuse_read_addr(priv, index, pdata); if (ret) { - dev_err(priv->cdev.dev, "failed to read fuse 0x%08x\n", index); + dev_err(&priv->dev, "failed to read fuse 0x%08x\n", index); return ret; } - if (readl(priv->base) & OCOTP_CTRL_ERROR) { - dev_err(priv->cdev.dev, "bad read status at fuse 0x%08x\n", index); - return -EFAULT; - } - return 0; } -static ssize_t imx6_ocotp_cdev_read(struct cdev *cdev, void *buf, - size_t count, loff_t offset, unsigned long flags) +static int imx_ocotp_reg_read(void *ctx, unsigned int reg, unsigned int *val) { + struct ocotp_priv *priv = ctx; u32 index; - ssize_t read_count = 0; - int ret, i; - struct ocotp_priv *priv = container_of(cdev, struct ocotp_priv, cdev); - - index = offset >> 2; - count >>= 2; - - if (count > (FUSE_REGS_COUNT - index)) - count = FUSE_REGS_COUNT - index - 1; - - for (i = index; i < (index + count); i++) { - if (priv->sense_enable) { - ret = imx6_ocotp_read_one_u32(i, buf, priv); - if (ret) - return ret; - } else { - *(u32 *)buf = readl(priv->base + 0x400 + i * 0x10); - } - - buf += 4; - read_count++; + int ret; + + index = reg >> 2; + + if (priv->sense_enable) { + ret = imx6_ocotp_read_one_u32(priv, index, val); + if (ret) + return ret; + } else { + *(u32 *)val = readl(priv->base + 0x400 + index * 0x10); } - return read_count << 2; + return 0; } -static int fuse_blow_addr(u32 addr, u32 value, struct ocotp_priv *priv) +static int fuse_blow_addr(struct ocotp_priv *priv, u32 addr, u32 value) { u32 ctrl_reg; int ret; + writel(OCOTP_CTRL_ERROR, priv->base + OCOTP_CTRL_CLR); + /* Control register */ - ctrl_reg = readl(priv->base); + ctrl_reg = readl(priv->base + OCOTP_CTRL); ctrl_reg &= ~OCOTP_CTRL_ADDR_MASK; ctrl_reg |= BF(addr, OCOTP_CTRL_ADDR); ctrl_reg |= BF(OCOTP_CTRL_WR_UNLOCK_KEY, OCOTP_CTRL_WR_UNLOCK); - writel(ctrl_reg, priv->base); + writel(ctrl_reg, priv->base + OCOTP_CTRL); writel(value, priv->base + OCOTP_DATA); - ret = imx6_ocotp_wait_busy(0, priv); + ret = imx6_ocotp_wait_busy(priv, 0); if (ret) return ret; @@ -232,94 +225,63 @@ static int fuse_blow_addr(u32 addr, u32 value, struct ocotp_priv *priv) static int imx6_ocotp_reload_shadow(struct ocotp_priv *priv) { - dev_info(priv->cdev.dev, "reloading shadow registers...\n"); + dev_info(&priv->dev, "reloading shadow registers...\n"); writel(OCOTP_CTRL_RELOAD_SHADOWS, priv->base + OCOTP_CTRL_SET); udelay(1); - return imx6_ocotp_wait_busy(OCOTP_CTRL_RELOAD_SHADOWS, priv); + return imx6_ocotp_wait_busy(priv, OCOTP_CTRL_RELOAD_SHADOWS); } -int imx6_ocotp_blow_one_u32(u32 index, u32 data, u32 *pfused_value, - struct ocotp_priv *priv) +int imx6_ocotp_blow_one_u32(struct ocotp_priv *priv, u32 index, u32 data, + u32 *pfused_value) { int ret; ret = imx6_ocotp_prepare(priv); if (ret) { - dev_err(priv->cdev.dev, "prepare to write failed\n"); + dev_err(&priv->dev, "prepare to write failed\n"); return ret; } - ret = fuse_blow_addr(index, data, priv); + ret = fuse_blow_addr(priv, index, data); if (ret) { - dev_err(priv->cdev.dev, "fuse blow failed\n"); + dev_err(&priv->dev, "fuse blow failed\n"); return ret; } - if (readl(priv->base) & OCOTP_CTRL_ERROR) { - dev_err(priv->cdev.dev, "bad write status\n"); + if (readl(priv->base + OCOTP_CTRL) & OCOTP_CTRL_ERROR) { + dev_err(&priv->dev, "bad write status\n"); return -EFAULT; } - ret = imx6_ocotp_read_one_u32(index, pfused_value, priv); + ret = imx6_ocotp_read_one_u32(priv, index, pfused_value); return ret; } -static ssize_t imx6_ocotp_cdev_write(struct cdev *cdev, const void *buf, - size_t count, loff_t offset, unsigned long flags) +static int imx_ocotp_reg_write(void *ctx, unsigned int reg, unsigned int val) { - struct ocotp_priv *priv = cdev->priv; - int index, i; - ssize_t write_count = 0; - const u32 *data; + struct ocotp_priv *priv = ctx; + int index; u32 pfuse; int ret; - /* We could do better, but currently this is what's implemented */ - if (offset & 0x3 || count & 0x3) { - dev_err(cdev->dev, "only u32 aligned writes allowed\n"); - return -EINVAL; - } - - index = offset >> 2; - count >>= 2; - - if (count > (FUSE_REGS_COUNT - index)) - count = FUSE_REGS_COUNT - index - 1; - - data = buf; - - for (i = index; i < (index + count); i++) { - if (priv->permanent_write_enable) { - ret = imx6_ocotp_blow_one_u32(i, *data, - &pfuse, priv); - if (ret < 0) { - goto out; - } - } else { - writel(*data, priv->base + 0x400 + i * 0x10); - } + index = reg >> 2; - data++; - write_count++; + if (priv->permanent_write_enable) { + ret = imx6_ocotp_blow_one_u32(priv, index, val, &pfuse); + if (ret < 0) + return ret; + } else { + writel(val, priv->base + 0x400 + index * 0x10); } - ret = 0; - -out: if (priv->permanent_write_enable) imx6_ocotp_reload_shadow(priv); - return ret < 0 ? ret : (write_count << 2); + return 0; } -static struct file_operations imx6_ocotp_ops = { - .read = imx6_ocotp_cdev_read, - .write = imx6_ocotp_cdev_write, - .lseek = dev_lseek_default, -}; - static uint32_t inc_offset(uint32_t offset) { if ((offset & 0x3) == 0x3) @@ -373,9 +335,11 @@ static int imx_ocotp_get_mac(struct param_d *param, void *priv) { struct ocotp_priv *ocotp_priv = priv; char buf[8]; - int i; + int i, ret; - imx6_ocotp_cdev_read(&ocotp_priv->cdev, buf, MAC_BYTES, MAC_OFFSET, 0); + ret = regmap_bulk_read(ocotp_priv->map, MAC_OFFSET, buf, MAC_BYTES); + if (ret < 0) + return ret; for (i = 0; i < 6; i++) ocotp_priv->ethaddr[i] = buf[5 - i]; @@ -393,19 +357,28 @@ static int imx_ocotp_set_mac(struct param_d *param, void *priv) buf[5 - i] = ocotp_priv->ethaddr[i]; buf[6] = 0; buf[7] = 0; - ret = imx6_ocotp_cdev_write(&ocotp_priv->cdev, buf, MAC_BYTES, MAC_OFFSET, 0); + ret = regmap_bulk_write(ocotp_priv->map, MAC_OFFSET, buf, MAC_BYTES); if (ret < 0) return ret; return 0; } +static struct regmap_bus imx_ocotp_regmap_bus = { + .reg_write = imx_ocotp_reg_write, + .reg_read = imx_ocotp_reg_read, +}; + static int imx_ocotp_probe(struct device_d *dev) { void __iomem *base; struct ocotp_priv *priv; - struct cdev *cdev; int ret = 0; + struct imx_ocotp_data *data; + + ret = dev_get_drvdata(dev, (const void **)&data); + if (ret) + return ret; base = dev_request_mem_region(dev, 0); if (IS_ERR(base)) @@ -420,22 +393,23 @@ static int imx_ocotp_probe(struct device_d *dev) if (IS_ERR(priv->clk)) return PTR_ERR(priv->clk); - cdev = &priv->cdev; - cdev->dev = dev; - cdev->ops = &imx6_ocotp_ops; - cdev->priv = priv; - cdev->size = 192; - cdev->name = "imx-ocotp"; - - ret = devfs_create(cdev); - - if (ret < 0) - return ret; - strcpy(priv->dev.name, "ocotp"); priv->dev.parent = dev; register_device(&priv->dev); + priv->map_config.reg_bits = 32; + priv->map_config.val_bits = 32; + priv->map_config.reg_stride = 4; + priv->map_config.max_register = data->num_regs - 1; + + priv->map = regmap_init(&priv->dev, &imx_ocotp_regmap_bus, priv, &priv->map_config); + if (IS_ERR(priv->map)) + return PTR_ERR(priv->map); + + ret = regmap_register_cdev(priv->map, "imx-ocotp"); + if (ret) + return ret; + if (IS_ENABLED(CONFIG_IMX_OCOTP_WRITE)) { dev_add_param_bool(&(priv->dev), "permanent_write_enable", NULL, NULL, &priv->permanent_write_enable, NULL); @@ -450,11 +424,24 @@ static int imx_ocotp_probe(struct device_d *dev) return 0; } +static struct imx_ocotp_data imx6q_ocotp_data = { + .num_regs = 512, +}; + +static struct imx_ocotp_data imx6sl_ocotp_data = { + .num_regs = 256, +}; + static __maybe_unused struct of_device_id imx_ocotp_dt_ids[] = { { .compatible = "fsl,imx6q-ocotp", + .data = &imx6q_ocotp_data, }, { .compatible = "fsl,imx6sx-ocotp", + .data = &imx6q_ocotp_data, + }, { + .compatible = "fsl,imx6sl-ocotp", + .data = &imx6sl_ocotp_data, }, { /* sentinel */ } |