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-rw-r--r--arch/arm/mach-rockchip/Kconfig37
-rw-r--r--arch/arm/mach-rockchip/Makefile4
-rw-r--r--arch/arm/mach-rockchip/atf.c4
-rw-r--r--arch/arm/mach-rockchip/include/mach/atf.h6
-rw-r--r--arch/arm/mach-rockchip/include/mach/debug_ll.h8
-rw-r--r--arch/arm/mach-rockchip/include/mach/rk3399-regs.h16
6 files changed, 66 insertions, 9 deletions
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2e855714f7..3c6b3dd9b5 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -6,30 +6,46 @@ menu "Rockchip Features"
config ARCH_TEXT_BASE
hex
default 0x68000000 if ARCH_RK3188
- default 0x0 if ARCH_RK3288
+ default 0x0
config RK_TIMER
hex
default 1
-config ARCH_RK3188
+config ARCH_ROCKCHIP_V7
bool
select CPU_V7
select ARM_SMP_TWD
select ARCH_HAS_L2X0
+config ARCH_RK3188
+ bool
+ select ARCH_ROCKCHIP_V7
+
config ARCH_RK3288
bool
- select CPU_V7
- select ARM_SMP_TWD
- select ARCH_HAS_L2X0
+ select ARCH_ROCKCHIP_V7
select CLOCKSOURCE_ROCKCHIP
-config ARCH_RK3568
+config ARCH_ROCKCHIP_V8
bool
select CPU_V8
- select ARM_ATF
select SYS_SUPPORTS_64BIT_KERNEL
+ select ARM_ATF
+ select RELOCATABLE
+
+config ARCH_RK3399
+ bool
+ select ARCH_ROCKCHIP_V8
+ select ARCH_HAS_RESET_CONTROLLER
+
+config ARCH_RK3399PRO
+ bool
+ select ARCH_RK3399
+
+config ARCH_RK3568
+ bool
+ select ARCH_ROCKCHIP_V8
comment "select Rockchip boards:"
@@ -60,6 +76,13 @@ config MACH_PINE64_QUARTZ64
comment "select board features:"
+config ARCH_RK3399_OPTEE
+ bool "Build rk3399 OP-TEE binary into barebox"
+ depends on ARCH_RK3399
+ help
+ With this option enabled the RK3399 OP-TEE binary is compiled
+ into barebox and started along with the BL31 trusted firmware.
+
config ARCH_RK3568_OPTEE
bool "Build rk3568 OP-TEE binary into barebox"
depends on ARCH_RK3568
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 72bf77c1e1..a86ee71617 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -1,9 +1,9 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-y += rockchip.o
-pbl-$(CONFIG_ARCH_RK3568) += atf.o
+pbl-$(CONFIG_ARCH_ROCKCHIP_V8) += atf.o
obj-$(CONFIG_ARCH_RK3188) += rk3188.o
obj-$(CONFIG_ARCH_RK3288) += rk3288.o
obj-pbl-$(CONFIG_ARCH_RK3568) += rk3568.o
-obj-$(CONFIG_ARCH_RK3568) += bootm.o
+obj-$(CONFIG_ARCH_ROCKCHIP_V8) += bootm.o
obj-$(CONFIG_BAREBOX_UPDATE) += bbu.o
diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index de22784489..0512ff99f4 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -60,6 +60,10 @@ static unsigned long load_elf64_image_phdr(const void *elf)
SOC##_BAREBOX_LOAD_ADDRESS, (uintptr_t)fdt); \
} while (0) \
+void rk3399_atf_load_bl31(void *fdt)
+{
+ rockchip_atf_load_bl31(RK3399, rk3399_bl31_bin, rk3399_op_tee_bin, fdt);
+}
void rk3568_atf_load_bl31(void *fdt)
{
diff --git a/arch/arm/mach-rockchip/include/mach/atf.h b/arch/arm/mach-rockchip/include/mach/atf.h
index ab328cc8d2..d1bae5a771 100644
--- a/arch/arm/mach-rockchip/include/mach/atf.h
+++ b/arch/arm/mach-rockchip/include/mach/atf.h
@@ -4,17 +4,23 @@
#define __MACH_ATF_H
/* First usable DRAM address. Lower mem is used for ATF and OP-TEE */
+#define RK3399_DRAM_BOTTOM 0xa00000
#define RK3568_DRAM_BOTTOM 0xa00000
/* OP-TEE expects to be loaded here */
+#define RK3399_OPTEE_LOAD_ADDRESS 0x200000
#define RK3568_OPTEE_LOAD_ADDRESS 0x200000
/*
* board lowlevel code should relocate barebox here. This is where
* OP-TEE jumps to after initialization.
*/
+#define RK3399_BAREBOX_LOAD_ADDRESS (RK3399_DRAM_BOTTOM + 1024*1024)
#define RK3568_BAREBOX_LOAD_ADDRESS (RK3568_DRAM_BOTTOM + 1024*1024)
+#ifndef __ASSEMBLY__
+void rk3399_atf_load_bl31(void *fdt);
void rk3568_atf_load_bl31(void *fdt);
+#endif
#endif /* __MACH_ATF_H */
diff --git a/arch/arm/mach-rockchip/include/mach/debug_ll.h b/arch/arm/mach-rockchip/include/mach/debug_ll.h
index 73fc5b5db2..91a7ba9020 100644
--- a/arch/arm/mach-rockchip/include/mach/debug_ll.h
+++ b/arch/arm/mach-rockchip/include/mach/debug_ll.h
@@ -8,6 +8,7 @@
#include <mach/rk3188-regs.h>
#include <mach/rk3288-regs.h>
#include <mach/rk3568-regs.h>
+#include <mach/rk3399-regs.h>
#ifdef CONFIG_DEBUG_LL
@@ -32,6 +33,13 @@
#define serial_out(a, v) writel(v, a)
#define serial_in(a) readl(a)
+#elif defined CONFIG_DEBUG_ROCKCHIP_RK3399_UART
+
+#define UART_CLOCK 24000000
+#define RK_DEBUG_SOC RK3399
+#define serial_out(a, v) writel(v, a)
+#define serial_in(a) readl(a)
+
#endif
#define __RK_UART_BASE(soc, num) soc##_UART##num##_BASE
diff --git a/arch/arm/mach-rockchip/include/mach/rk3399-regs.h b/arch/arm/mach-rockchip/include/mach/rk3399-regs.h
new file mode 100644
index 0000000000..57033b6510
--- /dev/null
+++ b/arch/arm/mach-rockchip/include/mach/rk3399-regs.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __MACH_RK3399_REGS_H
+#define __MACH_RK3399_REGS_H
+
+/* UART */
+#define RK3399_UART0_BASE 0xff180000
+#define RK3399_UART1_BASE 0xff190000
+#define RK3399_UART2_BASE 0xff1a0000
+#define RK3399_UART3_BASE 0xff1b0000
+#define RK3399_UART4_BASE 0xff370000
+
+#define RK3399_IRAM_BASE 0xff8c0000
+#define RK3399_STIMER_BASE 0xff8680a0
+
+#endif