diff options
Diffstat (limited to 'arch/arm/mach-socfpga/arria10-sdram.c')
| -rw-r--r-- | arch/arm/mach-socfpga/arria10-sdram.c | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/arch/arm/mach-socfpga/arria10-sdram.c b/arch/arm/mach-socfpga/arria10-sdram.c index 35c355df71..70d4edd973 100644 --- a/arch/arm/mach-socfpga/arria10-sdram.c +++ b/arch/arm/mach-socfpga/arria10-sdram.c @@ -7,10 +7,10 @@ #include <common.h> #include <io.h> #include <debug_ll.h> -#include <mach/generic.h> -#include <mach/arria10-sdram.h> -#include <mach/arria10-regs.h> -#include <mach/arria10-reset-manager.h> +#include <mach/socfpga/generic.h> +#include <mach/socfpga/arria10-sdram.h> +#include <mach/socfpga/arria10-regs.h> +#include <mach/socfpga/arria10-reset-manager.h> /* FAWBANK - Number of Bank of a given device involved in the FAW period. */ @@ -468,6 +468,18 @@ static void arria10_sdram_mmr_init(void) } } +static void arria10_f2sdram_bridges_reset(void) +{ + uint32_t val; + + /* Release F2SDRAM bridges from reset */ + val = readl(ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_BRGMODRST); + val &= ~(ARRIA10_RSTMGR_BRGMODRST_F2SSDRAM0 | + ARRIA10_RSTMGR_BRGMODRST_F2SSDRAM1 | + ARRIA10_RSTMGR_BRGMODRST_F2SSDRAM2); + writel(val, ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_BRGMODRST); +} + static int arria10_sdram_firewall_setup(void) { uint32_t mpu_en = 0; @@ -486,7 +498,7 @@ static int arria10_sdram_firewall_setup(void) writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_MPUREGION3ADDR); writel(0xffff0000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM0REGION0ADDR); - mpu_en |= ARRIA10_NOC_FW_DDR_MPU_MPUREG1EN; + mpu_en |= ARRIA10_NOC_FW_DDR_MPU_F2SDR0REG0EN; writel(mpu_en, ARRIA10_SDR_FW_MPU_FPGA_EN); writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM0REGION1ADDR); @@ -494,7 +506,7 @@ static int arria10_sdram_firewall_setup(void) writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM0REGION3ADDR); writel(0xffff0000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM1REGION0ADDR); - mpu_en |= ARRIA10_NOC_FW_DDR_MPU_MPUREG2EN; + mpu_en |= ARRIA10_NOC_FW_DDR_MPU_F2SDR1REG0EN; writel(mpu_en, ARRIA10_SDR_FW_MPU_FPGA_EN); writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM1REGION1ADDR); @@ -502,7 +514,7 @@ static int arria10_sdram_firewall_setup(void) writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM1REGION3ADDR); writel(0xffff0000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM2REGION0ADDR); - mpu_en |= ARRIA10_NOC_FW_DDR_MPU_MPUREG3EN; + mpu_en |= ARRIA10_NOC_FW_DDR_MPU_F2SDR2REG0EN; writel(mpu_en, ARRIA10_SDR_FW_MPU_FPGA_EN); writel(0x00000000, ARRIA10_SDR_FW_MPU_FPGA_FPGA2SDRAM2REGION1ADDR); @@ -512,6 +524,8 @@ static int arria10_sdram_firewall_setup(void) writel(0xffff0000, ARRIA10_NOC_FW_DDR_L3_HPSREGION0ADDR); writel(ARRIA10_NOC_FW_DDR_L3_HPSREG0EN, ARRIA10_NOC_FW_DDR_L3_EN); + arria10_f2sdram_bridges_reset(); + return 0; } |