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-rw-r--r--arch/arm/mach-vexpress/Kconfig18
-rw-r--r--arch/arm/mach-vexpress/Makefile3
-rw-r--r--arch/arm/mach-vexpress/devices.c73
-rw-r--r--arch/arm/mach-vexpress/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-vexpress/include/mach/debug_ll.h33
-rw-r--r--arch/arm/mach-vexpress/include/mach/devices.h22
-rw-r--r--arch/arm/mach-vexpress/reset.c22
-rw-r--r--arch/arm/mach-vexpress/v2m.c85
8 files changed, 263 insertions, 0 deletions
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
new file mode 100644
index 0000000000..c595494b6b
--- /dev/null
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -0,0 +1,18 @@
+if ARCH_VEXPRESS
+
+config ARCH_TEXT_BASE
+ hex
+ default 0x83f00000
+
+config BOARDINFO
+ default "ARM Vexpress" if MACH_VEXPRESS
+
+choice
+ prompt "ARM Board type"
+
+config MACH_VEXPRESS
+ bool "ARM Vexpress"
+
+endchoice
+
+endif
diff --git a/arch/arm/mach-vexpress/Makefile b/arch/arm/mach-vexpress/Makefile
new file mode 100644
index 0000000000..74b4a0feb2
--- /dev/null
+++ b/arch/arm/mach-vexpress/Makefile
@@ -0,0 +1,3 @@
+obj-y += v2m.o
+obj-y += devices.o
+obj-y += reset.o
diff --git a/arch/arm/mach-vexpress/devices.c b/arch/arm/mach-vexpress/devices.c
new file mode 100644
index 0000000000..69c93efbcd
--- /dev/null
+++ b/arch/arm/mach-vexpress/devices.c
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
+ *
+ * GPLv2 only
+ */
+
+#include <common.h>
+
+#include <linux/amba/bus.h>
+
+#include <asm/memory.h>
+
+#include <mach/devices.h>
+
+void vexpress_a9_add_ddram(u32 ddr0_size, u32 ddr1_size)
+{
+ arm_add_mem_device("ram0", 0x60000000, ddr0_size);
+
+ if (ddr1_size)
+ arm_add_mem_device("ram1", 0x80000000, ddr1_size);
+}
+
+
+void vexpress_a9_register_uart(unsigned id)
+{
+ resource_size_t start;
+
+ switch (id) {
+ case 0:
+ start = 0x10009000;
+ break;
+ case 1:
+ start = 0x1000a000;
+ break;
+ case 2:
+ start = 0x1000b000;
+ break;
+ case 3:
+ start = 0x1000c000;
+ break;
+ default:
+ return;
+ }
+ amba_apb_device_add(NULL, "uart-pl011", id, start, 4096, NULL, 0);
+}
+
+void vexpress_add_ddram(u32 size)
+{
+ arm_add_mem_device("ram1", 0x80000000, size);
+}
+
+void vexpress_register_uart(unsigned id)
+{
+ resource_size_t start;
+
+ switch (id) {
+ case 0:
+ start = 0x1c090000;
+ break;
+ case 1:
+ start = 0x1c0a0000;
+ break;
+ case 2:
+ start = 0x1c0b0000;
+ break;
+ case 3:
+ start = 0x1c0c0000;
+ break;
+ default:
+ return;
+ }
+ amba_apb_device_add(NULL, "uart-pl011", id, start, 4096, NULL, 0);
+}
diff --git a/arch/arm/mach-vexpress/include/mach/clkdev.h b/arch/arm/mach-vexpress/include/mach/clkdev.h
new file mode 100644
index 0000000000..04b37a8980
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-vexpress/include/mach/debug_ll.h b/arch/arm/mach-vexpress/include/mach/debug_ll.h
new file mode 100644
index 0000000000..15d6e85239
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/debug_ll.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2013 Jean-Christophe PLAGNIOL-VILLARD <plagniol@jcrosoft.com>
+ *
+ * GPLv2 only
+ */
+
+#ifndef __MACH_DEBUG_LL_H__
+#define __MACH_DEBUG_LL_H__
+
+#include <linux/amba/serial.h>
+#include <io.h>
+
+#define DEBUG_LL_PHYS_BASE 0x10000000
+#define DEBUG_LL_PHYS_BASE_RS1 0x1c000000
+
+#ifdef MP
+#define UART_BASE DEBUG_LL_PHYS_BASE
+#else
+#define UART_BASE DEBUG_LL_PHYS_BASE_RS1
+#endif
+
+static inline void PUTC_LL(char c)
+{
+ /* Wait until there is space in the FIFO */
+ while (readl(UART_BASE + UART01x_FR) & UART01x_FR_TXFF);
+
+ /* Send the character */
+ writel(c, UART_BASE + UART01x_DR);
+
+ /* Wait to make sure it hits the line, in case we die too soon. */
+ while (readl(UART_BASE + UART01x_FR) & UART01x_FR_TXFF);
+}
+#endif
diff --git a/arch/arm/mach-vexpress/include/mach/devices.h b/arch/arm/mach-vexpress/include/mach/devices.h
new file mode 100644
index 0000000000..adeada8ab5
--- /dev/null
+++ b/arch/arm/mach-vexpress/include/mach/devices.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
+ *
+ * GPLv2 only
+ */
+
+#ifndef __ASM_ARCH_DEVICES_H__
+#define __ASM_ARCH_DEVICES_H__
+
+void vexpress_a9_add_ddram(u32 ddr0_size, u32 ddr1_size);
+void vexpress_add_ddram(u32 size);
+
+void vexpress_a9_register_uart(unsigned id);
+void vexpress_register_uart(unsigned id);
+
+void vexpress_a9_init(void);
+void vexpress_init(void);
+
+extern void *v2m_wdt_base;
+extern void *v2m_sysreg_base;
+
+#endif /* __ASM_ARCH_DEVICES_H__ */
diff --git a/arch/arm/mach-vexpress/reset.c b/arch/arm/mach-vexpress/reset.c
new file mode 100644
index 0000000000..ad6e06fe5f
--- /dev/null
+++ b/arch/arm/mach-vexpress/reset.c
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
+ *
+ * GPLv2 only
+ */
+
+#include <common.h>
+#include <io.h>
+#include <linux/amba/sp805.h>
+
+#include <mach/devices.h>
+
+void __iomem *v2m_wdt_base;
+
+void reset_cpu(ulong addr)
+{
+ writel(LOAD_MIN, v2m_wdt_base + WDTLOAD);
+ writeb(RESET_ENABLE, v2m_wdt_base + WDTCONTROL);
+
+ while (1)
+ ;
+}
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
new file mode 100644
index 0000000000..12d5d1a6f4
--- /dev/null
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
+ *
+ * GPLv2 only
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/amba/bus.h>
+
+#include <asm/hardware/arm_timer.h>
+#include <asm/hardware/sp810.h>
+
+#include <mach/devices.h>
+
+void __iomem *v2m_sysreg_base;
+
+static const char *v2m_osc2_periphs[] = {
+ "mb:uart0", "uart-pl0110", /* PL011 UART0 */
+ "mb:uart1", "uart-pl0111", /* PL011 UART1 */
+ "mb:uart2", "uart-pl0112", /* PL011 UART2 */
+ "mb:uart3", "uart-pl0113", /* PL011 UART3 */
+};
+
+static void v2m_clk_init(void)
+{
+ struct clk *clk;
+ int i;
+
+ clk = clk_fixed("dummy_apb_pclk", 0);
+ clk_register_clkdev(clk, "apb_pclk", NULL);
+
+ clk = clk_fixed("mb:sp804_clk", 1000000);
+ clk_register_clkdev(clk, NULL, "sp804");
+
+ clk = clk_fixed("mb:osc2", 24000000);
+ for (i = 0; i < ARRAY_SIZE(v2m_osc2_periphs); i++)
+ clk_register_clkdev(clk, NULL, v2m_osc2_periphs[i]);
+
+}
+
+static void v2m_sysctl_init(void __iomem *base)
+{
+ u32 scctrl;
+
+ if (WARN_ON(!base))
+ return;
+
+ /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
+ scctrl = readl(base + SCCTRL);
+ scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
+ scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
+ writel(scctrl, base + SCCTRL);
+}
+
+static void __init v2m_sp804_init(void __iomem *base)
+{
+ writel(0, base + TIMER_1_BASE + TIMER_CTRL);
+
+ amba_apb_device_add(NULL, "sp804", DEVICE_ID_SINGLE, (resource_size_t)base, 4096, NULL, 0);
+}
+
+void vexpress_a9_init(void)
+{
+ v2m_wdt_base = IOMEM(0x1000f000);
+ v2m_sysreg_base = IOMEM(0x10001000);
+ v2m_sysctl_init(IOMEM(0x10001000));
+ v2m_clk_init();
+
+ v2m_sp804_init(IOMEM(0x10011000));
+}
+
+void vexpress_init(void)
+{
+ v2m_wdt_base = IOMEM(0x1c0f0000);
+ v2m_sysreg_base = IOMEM(0x1c020000);
+ v2m_sysctl_init(IOMEM(0x1c020000));
+ v2m_clk_init();
+
+ v2m_sp804_init(IOMEM(0x1c110000));
+}