diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-imx/imx1.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-pxa/reset_source.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-samsung/reset_source.c | 6 |
3 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-imx/imx1.c b/arch/arm/mach-imx/imx1.c index 78a0242474..51bdcbf38e 100644 --- a/arch/arm/mach-imx/imx1.c +++ b/arch/arm/mach-imx/imx1.c @@ -30,13 +30,13 @@ static void imx1_detect_reset_source(void) switch (val) { case RSR_EXR: - set_reset_source(RESET_RST); + reset_source_set(RESET_RST); return; case RSR_WDR: - set_reset_source(RESET_WDG); + reset_source_set(RESET_WDG); return; case 0: - set_reset_source(RESET_POR); + reset_source_set(RESET_POR); return; default: /* else keep the default 'unknown' state */ diff --git a/arch/arm/mach-pxa/reset_source.c b/arch/arm/mach-pxa/reset_source.c index 2b650c644d..a90584b1a6 100644 --- a/arch/arm/mach-pxa/reset_source.c +++ b/arch/arm/mach-pxa/reset_source.c @@ -25,15 +25,15 @@ static int pxa_detect_reset_source(void) * Order is important, as many bits can be set together */ if (reg & RCSR_GPR) - set_reset_source(RESET_RST); + reset_source_set(RESET_RST); else if (reg & RCSR_WDR) - set_reset_source(RESET_WDG); + reset_source_set(RESET_WDG); else if (reg & RCSR_HWR) - set_reset_source(RESET_POR); + reset_source_set(RESET_POR); else if (reg & RCSR_SMR) - set_reset_source(RESET_WKE); + reset_source_set(RESET_WKE); else - set_reset_source(RESET_UKWN); + reset_source_set(RESET_UKWN); return 0; } diff --git a/arch/arm/mach-samsung/reset_source.c b/arch/arm/mach-samsung/reset_source.c index 2456e3f602..c1365b2003 100644 --- a/arch/arm/mach-samsung/reset_source.c +++ b/arch/arm/mach-samsung/reset_source.c @@ -29,21 +29,21 @@ static int s3c_detect_reset_source(void) u32 reg = readl(S3C_GPIO_BASE + S3C2440_GSTATUS2); if (reg & S3C2440_GSTATUS2_PWRST) { - set_reset_source(RESET_POR); + reset_source_set(RESET_POR); writel(S3C2440_GSTATUS2_PWRST, S3C_GPIO_BASE + S3C2440_GSTATUS2); return 0; } if (reg & S3C2440_GSTATUS2_SLEEPRST) { - set_reset_source(RESET_WKE); + reset_source_set(RESET_WKE); writel(S3C2440_GSTATUS2_SLEEPRST, S3C_GPIO_BASE + S3C2440_GSTATUS2); return 0; } if (reg & S3C2440_GSTATUS2_WDRST) { - set_reset_source(RESET_WDG); + reset_source_set(RESET_WDG); writel(S3C2440_GSTATUS2_WDRST, S3C_GPIO_BASE + S3C2440_GSTATUS2); return 0; |