diff options
Diffstat (limited to 'arch/arm')
5 files changed, 7 insertions, 11 deletions
diff --git a/arch/arm/configs/socfpga-arria10_defconfig b/arch/arm/configs/socfpga-arria10_defconfig index ae420c1dd2..e47a0ab183 100644 --- a/arch/arm/configs/socfpga-arria10_defconfig +++ b/arch/arm/configs/socfpga-arria10_defconfig @@ -74,6 +74,7 @@ CONFIG_MCI=y CONFIG_MCI_STARTUP=y CONFIG_MCI_MMC_BOOT_PARTITIONS=y CONFIG_MCI_DW=y +CONFIG_STATE_DRV=y # CONFIG_PINCTRL is not set CONFIG_FS_TFTP=y CONFIG_FS_NFS=y diff --git a/arch/arm/mach-socfpga/include/mach/arria10-clock-manager.h b/arch/arm/mach-socfpga/include/mach/arria10-clock-manager.h index ee2b9b3c5e..c0a57439af 100644 --- a/arch/arm/mach-socfpga/include/mach/arria10-clock-manager.h +++ b/arch/arm/mach-socfpga/include/mach/arria10-clock-manager.h @@ -128,6 +128,7 @@ struct arria10_perpll_cfg { extern int arria10_cm_basic_init(struct arria10_mainpll_cfg *mainpll_cfg, struct arria10_perpll_cfg *perpll_cfg); +unsigned int arria10_cm_get_mmc_controller_clk_hz(void); extern unsigned int cm_get_mmc_controller_clk_hz(void); extern void arria10_cm_use_intosc(void); extern uint32_t cm_l4_main_clk_hz; diff --git a/arch/arm/mach-socfpga/include/mach/arria10-reset-manager.h b/arch/arm/mach-socfpga/include/mach/arria10-reset-manager.h index ebd2043426..2033de77a3 100644 --- a/arch/arm/mach-socfpga/include/mach/arria10-reset-manager.h +++ b/arch/arm/mach-socfpga/include/mach/arria10-reset-manager.h @@ -108,6 +108,10 @@ void arria10_reset_peripherals(void); void arria10_reset_deassert_dedicated_peripherals(void); void arria10_reset_deassert_shared_peripherals(void); +void arria10_reset_deassert_shared_peripherals_q1(uint32_t *mask0, uint32_t *mask1); +void arria10_reset_deassert_shared_peripherals_q2(uint32_t *mask0, uint32_t *mask1); +void arria10_reset_deassert_shared_peripherals_q3(uint32_t *mask0, uint32_t *mask1); +void arria10_reset_deassert_shared_peripherals_q4(uint32_t *mask0, uint32_t *mask1); void arria10_reset_deassert_fpga_peripherals(void); #endif diff --git a/arch/arm/mach-socfpga/include/mach/arria10-xload.h b/arch/arm/mach-socfpga/include/mach/arria10-xload.h index 71f8397362..7575231bbf 100644 --- a/arch/arm/mach-socfpga/include/mach/arria10-xload.h +++ b/arch/arm/mach-socfpga/include/mach/arria10-xload.h @@ -4,6 +4,7 @@ void arria10_init_mmc(void); int arria10_prepare_mmc(int barebox_part, int rbf_part); int arria10_read_blocks(void *dst, int blocknum, size_t len); +int a10_update_bits(unsigned int reg, unsigned int mask, unsigned int val); struct partition { uint64_t first_sec; diff --git a/arch/arm/mach-socfpga/include/mach/cyclone5-system-manager.h b/arch/arm/mach-socfpga/include/mach/cyclone5-system-manager.h index 24f52effd8..7cec60937b 100644 --- a/arch/arm/mach-socfpga/include/mach/cyclone5-system-manager.h +++ b/arch/arm/mach-socfpga/include/mach/cyclone5-system-manager.h @@ -57,15 +57,4 @@ void socfpga_sysmgr_pinmux_init(unsigned long *sys_mgr_init_table, int num); #define SYSMGR_FPGAINTF_NAND (1<<4) #define SYSMGR_FPGAINTF_SDMMC (1<<5) -/* Enumeration: sysmgr::emacgrp::ctrl::physel::enum */ -#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0 -#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1 -#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII 0x2 -#define SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB 0 -#define SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB 2 -#define SYSMGR_EMACGRP_CTRL_PHYSEL_MASK 0x00000003 - -#define SYSMGR_FPGAGRP_MODULE 0x00000028 -#define SYSMGR_FPGAGRP_MODULE_EMAC 0x00000004 - #endif /* _SYSTEM_MANAGER_H_ */ |