diff options
Diffstat (limited to 'arch/arm')
33 files changed, 701 insertions, 103 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8465d4a7f7..2d024dc380 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -60,6 +60,15 @@ config ARCH_DAVINCI select HAS_DEBUG_LL select GPIOLIB +config ARCH_DIGIC + bool "Canon DIGIC-based cameras" + select CPU_ARM946E + select HAS_DEBUG_LL + select CLOCKSOURCE_DIGIC + select GPIOLIB + help + Support for Canon's digital cameras that use the DIGIC4 chip. + config ARCH_EP93XX bool "Cirrus Logic EP93xx" select CPU_ARM920T @@ -218,6 +227,7 @@ source arch/arm/mach-at91/Kconfig source arch/arm/mach-bcm2835/Kconfig source arch/arm/mach-clps711x/Kconfig source arch/arm/mach-davinci/Kconfig +source arch/arm/mach-digic/Kconfig source arch/arm/mach-ep93xx/Kconfig source arch/arm/mach-highbank/Kconfig source arch/arm/mach-imx/Kconfig diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 983f7f57cd..337aef175b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -55,6 +55,7 @@ machine-$(CONFIG_ARCH_AT91) := at91 machine-$(CONFIG_ARCH_BCM2835) := bcm2835 machine-$(CONFIG_ARCH_CLPS711X) := clps711x machine-$(CONFIG_ARCH_DAVINCI) := davinci +machine-$(CONFIG_ARCH_DIGIC) := digic machine-$(CONFIG_ARCH_EP93XX) := ep93xx machine-$(CONFIG_ARCH_HIGHBANK) := highbank machine-$(CONFIG_ARCH_IMX) := imx @@ -184,6 +185,16 @@ ifeq ($(machine-y),zynq) KBUILD_IMAGE := barebox.zynq endif +quiet_cmd_canon_a1100_image = DD $@ + cmd_canon_a1100_image = scripts/canon-a1100-image $< $@ || \ + echo "WARNING: Couldn't create Canon A1100 image due to previous errors." +barebox.canon-a1100.bin: $(KBUILD_BINARY) FORCE + $(call if_changed,canon_a1100_image) + +ifeq ($(CONFIG_MACH_CANON_A1100),y) +KBUILD_IMAGE := barebox.canon-a1100.bin +endif + KWBIMAGE_OPTS = \ -c -i $(srctree)/$(BOARD)/kwbimage.cfg -d $(TEXT_BASE) -e $(TEXT_BASE) diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index d200512758..e195870439 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_MACH_AT91SAM9N12EK) += at91sam9n12ek/ obj-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek/ obj-$(CONFIG_MACH_BEAGLE) += beagle/ obj-$(CONFIG_MACH_BEAGLEBONE) += beaglebone/ +obj-$(CONFIG_MACH_CANON_A1100) += canon-a1100/ obj-$(CONFIG_MACH_NITROGEN6X) += boundarydevices-nitrogen6x/ obj-$(CONFIG_MACH_CCMX51) += ccxmx51/ obj-$(CONFIG_MACH_CFA10036) += crystalfontz-cfa10036/ diff --git a/arch/arm/boards/canon-a1100/Makefile b/arch/arm/boards/canon-a1100/Makefile new file mode 100644 index 0000000000..b08c4a93ca --- /dev/null +++ b/arch/arm/boards/canon-a1100/Makefile @@ -0,0 +1 @@ +lwl-y += lowlevel.o diff --git a/arch/arm/boards/canon-a1100/lowlevel.c b/arch/arm/boards/canon-a1100/lowlevel.c new file mode 100644 index 0000000000..bbae825661 --- /dev/null +++ b/arch/arm/boards/canon-a1100/lowlevel.c @@ -0,0 +1,23 @@ +#include <common.h> +#include <sizes.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> + +void __naked barebox_arm_reset_vector(void) +{ + arm_cpu_lowlevel_init(); + + /* FIXME: can we determine RAM size using CP15 register? + * + * see http://chdk.setepontos.com/index.php?topic=5980.90 + * + * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0363e/Bgbcdeca.html + * 4.2.19. c6, MPU memory region programming registers + * + * But the 'cpuinfo' command says that the Protection + * unit is disabled. + * The Control Register value (mrc p15, 0, %0, c0, c1, 4) + * is 0x00051078. + */ + barebox_arm_entry(0x0, SZ_64M, 0); +} diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c index 855b6924f3..ff1f04e87f 100644 --- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c @@ -15,7 +15,7 @@ #include <mach/wdt.h> #include <debug_ll.h> -static const struct am33xx_cmd_control MT41J256M16HA15EIT_1x512MB_cmd = { +static const struct am33xx_cmd_control pcm051_cmd = { .slave_ratio0 = 0x40, .dll_lock_diff0 = 0x0, .invert_clkout0 = 0x1, @@ -27,21 +27,74 @@ static const struct am33xx_cmd_control MT41J256M16HA15EIT_1x512MB_cmd = { .invert_clkout2 = 0x1, }; -static const struct am33xx_emif_regs MT41J256M16HA15EIT_1x512MB_regs = { - .emif_read_latency = 0x6, - .emif_tim1 = 0x0888A39B, - .emif_tim2 = 0x26517FDA, - .emif_tim3 = 0x501F84EF, - .sdram_config = 0x61C04B32, - .zq_config = 0x50074BE4, - .sdram_ref_ctrl = 0x0000093B, +struct pcm051_sdram_timings { + struct am33xx_emif_regs regs; + struct am33xx_ddr_data data; }; -static const struct am33xx_ddr_data MT41J256M16HA15EIT_1x512MB_data = { - .rd_slave_ratio0 = 0x3B, - .wr_dqs_slave_ratio0 = 0x3B, - .fifo_we_slave_ratio0 = 0x96, - .wr_slave_ratio0 = 0x76, +enum { + MT41J128M16125IT_1x256M16, + MT41J64M1615IT_1x128M16, + MT41J256M16HA15EIT_1x512M16, +}; + +struct pcm051_sdram_timings timings[] = { + /* 1x256M16 */ + [MT41J128M16125IT_1x256M16] = { + .regs = { + .emif_read_latency = 0x6, + .emif_tim1 = 0x0888A39B, + .emif_tim2 = 0x26337FDA, + .emif_tim3 = 0x501F830F, + .sdram_config = 0x61C04AB2, + .zq_config = 0x50074BE4, + .sdram_ref_ctrl = 0x0000093B, + }, + .data = { + .rd_slave_ratio0 = 0x3B, + .wr_dqs_slave_ratio0 = 0x3B, + .fifo_we_slave_ratio0 = 0x97, + .wr_slave_ratio0 = 0x76, + }, + }, + + /* 1x128M16 */ + [MT41J64M1615IT_1x128M16] = { + .regs = { + .emif_read_latency = 0x6, + .emif_tim1 = 0x0888A39B, + .emif_tim2 = 0x26247FDA, + .emif_tim3 = 0x501F821F, + .sdram_config = 0x61C04A32, + .zq_config = 0x50074BE4, + .sdram_ref_ctrl = 0x0000093B, + }, + .data = { + .rd_slave_ratio0 = 0x3A, + .wr_dqs_slave_ratio0 = 0x36, + .fifo_we_slave_ratio0 = 0xA2, + .wr_slave_ratio0 = 0x74, + }, + }, + + /* 1x512MB */ + [MT41J256M16HA15EIT_1x512M16] = { + .regs = { + .emif_read_latency = 0x6, + .emif_tim1 = 0x0888A39B, + .emif_tim2 = 0x26517FDA, + .emif_tim3 = 0x501F84EF, + .sdram_config = 0x61C04B32, + .zq_config = 0x50074BE4, + .sdram_ref_ctrl = 0x0000093B, + }, + .data = { + .rd_slave_ratio0 = 0x3B, + .wr_dqs_slave_ratio0 = 0x3B, + .fifo_we_slave_ratio0 = 0x96, + .wr_slave_ratio0 = 0x76, + }, + }, }; extern char __dtb_am335x_phytec_phycore_start[]; @@ -55,9 +108,10 @@ extern char __dtb_am335x_phytec_phycore_start[]; * * @return void */ -static noinline void pcm051_board_init(void) +static noinline void pcm051_board_init(int sdram) { void *fdt; + struct pcm051_sdram_timings *timing = &timings[sdram]; /* WDT1 is already running when the bootloader gets control * Disable it to avoid "random" resets @@ -70,9 +124,9 @@ static noinline void pcm051_board_init(void) am33xx_pll_init(MPUPLL_M_600, 25, DDRPLL_M_303); - am335x_sdram_init(0x18B, &MT41J256M16HA15EIT_1x512MB_cmd, - &MT41J256M16HA15EIT_1x512MB_regs, - &MT41J256M16HA15EIT_1x512MB_data); + am335x_sdram_init(0x18B, &pcm051_cmd, + &timing->regs, + &timing->data); am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE); am33xx_enable_uart0_pin_mux(); @@ -81,10 +135,10 @@ static noinline void pcm051_board_init(void) fdt = __dtb_am335x_phytec_phycore_start - get_runtime_offset(); - barebox_arm_entry(0x80000000, SZ_512M, fdt); + am335x_barebox_entry(fdt); } -ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram, bootinfo, r1, r2) +static noinline void pcm051_board_entry(unsigned long bootinfo, int sdram) { am33xx_save_bootinfo((void *)bootinfo); @@ -97,7 +151,22 @@ ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram, bootinfo, r1, r2) relocate_to_current_adr(); setup_c(); - pcm051_board_init(); + pcm051_board_init(sdram); +} + +ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_1x256m16, bootinfo, r1, r2) +{ + pcm051_board_entry(bootinfo, MT41J128M16125IT_1x256M16); +} + +ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_1x128m16, bootinfo, r1, r2) +{ + pcm051_board_entry(bootinfo, MT41J64M1615IT_1x128M16); +} + +ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_1x512m16, bootinfo, r1, r2) +{ + pcm051_board_entry(bootinfo, MT41J256M16HA15EIT_1x512M16); } ENTRY_FUNCTION(start_am33xx_phytec_phycore_sdram, r0, r1, r2) @@ -106,5 +175,5 @@ ENTRY_FUNCTION(start_am33xx_phytec_phycore_sdram, r0, r1, r2) fdt = __dtb_am335x_phytec_phycore_start - get_runtime_offset(); - barebox_arm_entry(0x80000000, SZ_512M, fdt); + am335x_barebox_entry(fdt); } diff --git a/arch/arm/boards/sama5d3_xplained/init.c b/arch/arm/boards/sama5d3_xplained/init.c index ae18863acd..ae84209cbb 100644 --- a/arch/arm/boards/sama5d3_xplained/init.c +++ b/arch/arm/boards/sama5d3_xplained/init.c @@ -57,21 +57,30 @@ static struct atmel_nand_data nand_pdata = { }; static struct sam9_smc_config sama5d3_xplained_nand_smc_config = { - .ncs_read_setup = 0, - .nrd_setup = 1, - .ncs_write_setup = 0, - .nwe_setup = 1, + .ncs_read_setup = 1, + .nrd_setup = 2, + .ncs_write_setup = 1, + .nwe_setup = 2, - .ncs_read_pulse = 6, - .nrd_pulse = 4, + .ncs_read_pulse = 5, + .nrd_pulse = 3, .ncs_write_pulse = 5, .nwe_pulse = 3, - .read_cycle = 6, - .write_cycle = 5, + .read_cycle = 8, + .write_cycle = 8, .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, - .tdf_cycles = 1, + .tdf_cycles = 3, + + .tclr = 3, + .tadl = 10, + .tar = 3, + .ocms = 0, + .trr = 4, + .twb = 5, + .rbnsel = 3, + .nfsel = 1 }; static void ek_add_device_nand(void) @@ -87,7 +96,7 @@ static void ek_add_device_nand(void) sama5d3_xplained_nand_smc_config.mode |= AT91_SMC_DBW_8; /* configure chip-select 3 (NAND) */ - sam9_smc_configure(0, 3, &sama5d3_xplained_nand_smc_config); + sama5_smc_configure(0, 3, &sama5d3_xplained_nand_smc_config); at91_add_device_nand(&nand_pdata); } diff --git a/arch/arm/boards/sama5d3xek/init.c b/arch/arm/boards/sama5d3xek/init.c index e078642242..743197fe47 100644 --- a/arch/arm/boards/sama5d3xek/init.c +++ b/arch/arm/boards/sama5d3xek/init.c @@ -72,21 +72,30 @@ static struct atmel_nand_data nand_pdata = { }; static struct sam9_smc_config cm_nand_smc_config = { - .ncs_read_setup = 0, - .nrd_setup = 1, - .ncs_write_setup = 0, - .nwe_setup = 1, + .ncs_read_setup = 1, + .nrd_setup = 2, + .ncs_write_setup = 1, + .nwe_setup = 2, - .ncs_read_pulse = 6, - .nrd_pulse = 4, + .ncs_read_pulse = 5, + .nrd_pulse = 3, .ncs_write_pulse = 5, .nwe_pulse = 3, - .read_cycle = 6, - .write_cycle = 5, + .read_cycle = 8, + .write_cycle = 8, .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, - .tdf_cycles = 1, + .tdf_cycles = 3, + + .tclr = 3, + .tadl = 10, + .tar = 3, + .ocms = 0, + .trr = 4, + .twb = 5, + .rbnsel = 3, + .nfsel = 1 }; static void ek_add_device_nand(void) @@ -102,7 +111,7 @@ static void ek_add_device_nand(void) cm_nand_smc_config.mode |= AT91_SMC_DBW_8; /* configure chip-select 3 (NAND) */ - sam9_smc_configure(0, 3, &cm_nand_smc_config); + sama5_smc_configure(0, 3, &cm_nand_smc_config); at91_add_device_nand(&nand_pdata); } diff --git a/arch/arm/configs/am335x_defconfig b/arch/arm/configs/am335x_defconfig index 0c92c96e45..d3feb108a1 100644 --- a/arch/arm/configs/am335x_defconfig +++ b/arch/arm/configs/am335x_defconfig @@ -1,11 +1,11 @@ CONFIG_ARCH_OMAP=y CONFIG_BAREBOX_UPDATE_AM33XX_SPI_NOR_MLO=y +CONFIG_BAREBOX_UPDATE_AM33XX_NAND_XLOADSLOTS=y CONFIG_OMAP_MULTI_BOARDS=y CONFIG_MACH_BEAGLEBONE=y CONFIG_MACH_PCM051=y CONFIG_THUMB2_BAREBOX=y CONFIG_ARM_BOARD_APPEND_ATAG=y -CONFIG_CMD_ARM_MMUINFO=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_ARM_UNWIND=y CONFIG_MMU=y @@ -15,7 +15,6 @@ CONFIG_MALLOC_TLSF=y CONFIG_KALLSYMS=y CONFIG_RELOCATABLE=y CONFIG_PROMPT="barebox> " -CONFIG_LONGHELP=y CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y @@ -25,61 +24,63 @@ CONFIG_BLSPEC=y CONFIG_CONSOLE_ACTIVATE_NONE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y CONFIG_DEBUG_INFO=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_MSLEEP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_READF=y -CONFIG_CMD_LET=y -CONFIG_CMD_MENU=y -CONFIG_CMD_MENUTREE=y -CONFIG_CMD_TIME=y -CONFIG_CMD_LN=y -CONFIG_CMD_TFTP=y -CONFIG_CMD_FILETYPE=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_LOADB=y -CONFIG_CMD_MEMINFO=y +CONFIG_LONGHELP=y CONFIG_CMD_IOMEM=y -CONFIG_CMD_MM=y -CONFIG_CMD_CRC=y -CONFIG_CMD_CRC_CMP=y -CONFIG_CMD_MD5SUM=y -CONFIG_CMD_FLASH=y -CONFIG_CMD_UBIFORMAT=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_ARM_MMUINFO=y CONFIG_CMD_BOOTM_SHOW_TYPE=y CONFIG_CMD_BOOTM_VERBOSE=y CONFIG_CMD_BOOTM_INITRD=y CONFIG_CMD_BOOTM_OFTREE=y -CONFIG_CMD_UIMAGE=y -CONFIG_CMD_BOOTZ=y # CONFIG_CMD_BOOTU is not set -CONFIG_CMD_RESET=y +CONFIG_CMD_BOOTZ=y CONFIG_CMD_GO=y -CONFIG_CMD_OFTREE=y -CONFIG_CMD_OF_PROPERTY=y -CONFIG_CMD_OF_NODE=y -CONFIG_CMD_BAREBOX_UPDATE=y -CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_LOADB=y +CONFIG_CMD_RESET=y +CONFIG_CMD_UIMAGE=y CONFIG_CMD_PARTITION=y +CONFIG_CMD_UBIFORMAT=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_LOADENV=y +CONFIG_CMD_PRINTENV=y CONFIG_CMD_MAGICVAR=y CONFIG_CMD_MAGICVAR_HELP=y -CONFIG_CMD_GPIO=y +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_FILETYPE=y +CONFIG_CMD_LN=y +CONFIG_CMD_MD5SUM=y CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_LET=y +CONFIG_CMD_MSLEEP=y +CONFIG_CMD_READF=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MIITOOL=y +CONFIG_CMD_PING=y +CONFIG_CMD_TFTP=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_EDIT=y +CONFIG_CMD_MENU=y +CONFIG_CMD_MENUTREE=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_CRC=y +CONFIG_CMD_CRC_CMP=y +CONFIG_CMD_MM=y +CONFIG_CMD_DETECT=y +CONFIG_CMD_FLASH=y +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y -CONFIG_CMD_SPI=y CONFIG_CMD_LED=y +CONFIG_CMD_SPI=y CONFIG_CMD_LED_TRIGGER=y -CONFIG_CMD_MIITOOL=y -CONFIG_CMD_DETECT=y +CONFIG_CMD_BAREBOX_UPDATE=y +CONFIG_CMD_OF_NODE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OFTREE=y +CONFIG_CMD_TIME=y CONFIG_NET=y -CONFIG_CMD_DHCP=y CONFIG_NET_NFS=y -CONFIG_CMD_PING=y CONFIG_NET_NETCONSOLE=y CONFIG_NET_RESOLV=y CONFIG_OFDEVICE=y diff --git a/arch/arm/configs/canon-a1100_defconfig b/arch/arm/configs/canon-a1100_defconfig new file mode 100644 index 0000000000..5c1e195a2d --- /dev/null +++ b/arch/arm/configs/canon-a1100_defconfig @@ -0,0 +1,56 @@ +CONFIG_BUILTIN_DTB=y +CONFIG_BUILTIN_DTB_NAME="canon-a1100" +CONFIG_ARCH_DIGIC=y +CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_PBL_IMAGE=y +CONFIG_IMAGE_COMPRESSION_LZ4=y +CONFIG_TEXT_BASE=0x00300000 +CONFIG_MALLOC_SIZE=0x200000 +CONFIG_PROMPT="canon-a1100 > " +CONFIG_GLOB=y +CONFIG_HUSH_FANCY_PROMPT=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +# CONFIG_DEFAULT_ENVIRONMENT is not set +CONFIG_DEBUG_LL=y +CONFIG_LONGHELP=y +CONFIG_CMD_IOMEM=y +CONFIG_CMD_MEMINFO=y +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_BOOTU is not set +CONFIG_CMD_GO=y +CONFIG_CMD_LOADY=y +# CONFIG_CMD_MOUNT is not set +# CONFIG_CMD_UMOUNT is not set +CONFIG_CMD_EXPORT=y +CONFIG_CMD_GLOBAL=y +CONFIG_CMD_MD5SUM=y +# CONFIG_CMD_PWD is not set +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_LET=y +CONFIG_CMD_MSLEEP=y +CONFIG_CMD_SLEEP=y +# CONFIG_CMD_CLEAR is not set +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_EDIT=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_LED=y +CONFIG_CMD_OF_NODE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OFTREE=y +CONFIG_OFDEVICE=y +CONFIG_DRIVER_SERIAL_DIGIC=y +# CONFIG_SPI is not set +CONFIG_MTD=y +# CONFIG_MTD_WRITE is not set +CONFIG_DRIVER_CFI=y +# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set +CONFIG_CLOCKSOURCE_DUMMY=y +CONFIG_CLOCKSOURCE_DUMMY_RATE=2000 +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_GPIO_OF=y +CONFIG_GPIO_DIGIC=y +CONFIG_ZLIB=y diff --git a/arch/arm/cpu/Kconfig b/arch/arm/cpu/Kconfig index aed4cb7c63..fb1a9998b0 100644 --- a/arch/arm/cpu/Kconfig +++ b/arch/arm/cpu/Kconfig @@ -39,6 +39,19 @@ config CPU_ARM926T Say Y if you want support for the ARM926T processor. Otherwise, say N. +# ARM946E-S +config CPU_ARM946E + bool + depends on !MMU + select CPU_32v4T + help + ARM946E-S is a member of the ARM9E-S family of high- + performance, 32-bit system-on-chip processor solutions. + The TCM and ARMv5TE 32-bit instruction set is supported. + + Say Y if you want support for the ARM946E-S processor. + Otherwise, say N. + # Feroceon config CPU_FEROCEON bool diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index bf0141b946..e4afcc8411 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -188,6 +188,7 @@ void *map_io_sections(unsigned long phys, void *_start, size_t size) for (sec = start; sec < start + size; sec += (1 << 20)) ttb[sec >> 20] = (phys++ << 20) | PMD_SECT_DEF_UNCACHED; + dma_flush_range((unsigned long)ttb, (unsigned long)ttb + 0x4000); tlb_invalidate(); return _start; } diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 961873d6bb..264420d084 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -103,7 +103,7 @@ static noinline __noreturn void __start(unsigned long membase, /* * Maximum malloc space is the Kconfig value if given - * or 64MB. + * or 1GB. */ if (MALLOC_SIZE > 0) { malloc_start = malloc_end - MALLOC_SIZE; @@ -111,8 +111,8 @@ static noinline __noreturn void __start(unsigned long membase, malloc_start = membase; } else { malloc_start = malloc_end - (malloc_end - membase) / 2; - if (malloc_end - malloc_start > SZ_64M) - malloc_start = malloc_end - SZ_64M; + if (malloc_end - malloc_start > SZ_1G) + malloc_start = malloc_end - SZ_1G; } mem_malloc_init((void *)malloc_start, (void *)malloc_end - 1); diff --git a/arch/arm/dts/am335x-bone-common.dtsi b/arch/arm/dts/am335x-bone-common.dtsi index 4cf7fdbb48..e1effac323 100644 --- a/arch/arm/dts/am335x-bone-common.dtsi +++ b/arch/arm/dts/am335x-bone-common.dtsi @@ -276,13 +276,14 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; - + status = "okay"; }; &davinci_mdio { pinctrl-names = "default", "sleep"; pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; + status = "okay"; }; &mmc1 { diff --git a/arch/arm/dts/am335x-phytec-phycore.dts b/arch/arm/dts/am335x-phytec-phycore.dts index 6196eb3244..5678138f66 100644 --- a/arch/arm/dts/am335x-phytec-phycore.dts +++ b/arch/arm/dts/am335x-phytec-phycore.dts @@ -22,11 +22,6 @@ }; }; - memory { - device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512 MB */ - }; - gpio-leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -214,6 +209,7 @@ &davinci_mdio { pinctrl-names = "default"; pinctrl-0 = <&davinci_mdio_default>; + status = "okay"; }; &phy_sel { @@ -236,6 +232,7 @@ pinctrl-names = "default"; pinctrl-0 = <&emac_rmii1_pins>; dual_emac = <1>; + status = "okay"; }; &gpmc { diff --git a/arch/arm/dts/canon-a1100.dts b/arch/arm/dts/canon-a1100.dts new file mode 100644 index 0000000000..a88eacf4d4 --- /dev/null +++ b/arch/arm/dts/canon-a1100.dts @@ -0,0 +1,35 @@ +/dts-v1/; + +/include/ "digic4.dtsi" + +/ { + model = "Canon PowerShot A1100 IS"; + compatible = "canon,a1100"; + + memory { + reg = <0x00000000 0x04000000>; + }; + + flash@f8000000 { + compatible = "cfi-flash"; + reg = <0xf8000000 0x08000000>; + }; + + leds { + compatible = "gpio-leds"; + + direct_print { + label = "direct-print (blue)"; + gpios = <&gpio 51 0>; + }; + + auto_focus { + label = "auto-focus (red)"; + gpios = <&gpio 55 0>; + }; + }; +}; + +&timer2 { + status = "okay"; +}; diff --git a/arch/arm/dts/digic4.dtsi b/arch/arm/dts/digic4.dtsi new file mode 100644 index 0000000000..21b004d4a2 --- /dev/null +++ b/arch/arm/dts/digic4.dtsi @@ -0,0 +1,42 @@ +/include/ "skeleton.dtsi" + +/ { + compatible = "canon,digic4"; + + timer0: timer@c0210000 { + compatible = "canon,digic-timer"; + reg = <0xc0210000 0x1c>; + status = "disabled"; + }; + + timer1: timer@c0210100 { + compatible = "canon,digic-timer"; + reg = <0xc0210100 0x1c>; + status = "disabled"; + }; + + timer2: timer@c0210200 { + compatible = "canon,digic-timer"; + reg = <0xc0210200 0x1c>; + status = "disabled"; + }; + + /* + * I don't know real max GPIO number but this page + * http://magiclantern.wikia.com/wiki/Register_Map#GPIO_Ports + * says about 93 pins on 5DMkIII. + * Assume that DIGIC4 has at least 96 pins. + * So resource size is 96 * 4 = 0x180. + */ + gpio: gpio { + compatible = "canon,digic-gpio"; + reg = <0xc0220000 0x180>; + #gpio-cells = <2>; + gpio-controller; + }; + + uart: uart { + compatible = "canon,digic-uart"; + reg = <0xc0800000 0x1c>; + }; +}; diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 4896d01976..ffd56edfd3 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -314,7 +314,7 @@ static int do_bootz_linux(struct image_data *data) image_size - sizeof(*header)); if (ret < 0) goto err_out; - if (ret < end - sizeof(*header)) { + if (ret < image_size - sizeof(*header)) { printf("premature end of image\n"); ret = -EIO; goto err_out; @@ -414,6 +414,11 @@ static int do_bootm_aimage(struct image_data *data) int to_read; struct android_header_comp *cmp; unsigned long mem_free; + unsigned long mem_start, mem_size; + + ret = sdram_start_and_size(&mem_start, &mem_size); + if (ret) + return ret; fd = open(data->os_file, O_RDONLY); if (fd < 0) { @@ -447,8 +452,17 @@ static int do_bootm_aimage(struct image_data *data) cmp = &header->kernel; data->os_res = request_sdram_region("akernel", cmp->load_addr, cmp->size); if (!data->os_res) { - ret = -ENOMEM; - goto err_out; + pr_err("Cannot request region 0x%08x - 0x%08x, using default load address\n", + cmp->load_addr, cmp->size); + + data->os_address = mem_start + PAGE_ALIGN(cmp->size * 4); + data->os_res = request_sdram_region("akernel", data->os_address, cmp->size); + if (!data->os_res) { + pr_err("Cannot request region 0x%08x - 0x%08x\n", + cmp->load_addr, cmp->size); + ret = -ENOMEM; + goto err_out; + } } ret = aimage_load_resource(fd, data->os_res, buf, header->page_size); diff --git a/arch/arm/mach-at91/at91sam926x_lowlevel_init.c b/arch/arm/mach-at91/at91sam926x_lowlevel_init.c index 985203ae59..e69e4a86bf 100644 --- a/arch/arm/mach-at91/at91sam926x_lowlevel_init.c +++ b/arch/arm/mach-at91/at91sam926x_lowlevel_init.c @@ -130,7 +130,7 @@ void __bare_init at91sam926x_lowlevel_init(struct at91sam926x_lowlevel_cfg *cfg) at91_sys_write(cfg->matrix_csa, cfg->ebi_csa); /* flash */ - at91_smc_write(cfg->smc_cs, AT91_SMC_MODE, cfg->smc_mode); + at91_smc_write(cfg->smc_cs, AT91_SAM9_SMC_MODE, cfg->smc_mode); at91_smc_write(cfg->smc_cs, AT91_SMC_CYCLE, cfg->smc_cycle); diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 59c4d1111f..9d2a846447 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -65,7 +65,7 @@ #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ || cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ - || cpu_is_at91sam9n12())) + || cpu_is_sama5d3())) #define cpu_has_upll() (cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h index d5cf5f762d..d19cf82eca 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h @@ -43,12 +43,24 @@ struct sam9_smc_config { /* Mode register */ u32 mode; u8 tdf_cycles:4; + + /* Timings register */ + u8 tclr; + u8 tadl; + u8 tar; + u8 ocms; + u8 trr; + u8 twb; + u8 rbnsel; + u8 nfsel; }; extern void sam9_smc_configure(int id, int cs, struct sam9_smc_config *config); extern void sam9_smc_read(int id, int cs, struct sam9_smc_config *config); extern void sam9_smc_read_mode(int id, int cs, struct sam9_smc_config *config); extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config); + +extern void sama5_smc_configure(int id, int cs, struct sam9_smc_config *config); #endif #define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */ @@ -77,7 +89,26 @@ extern void sam9_smc_write_mode(int id, int cs, struct sam9_smc_config *config); #define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ #define AT91_SMC_NRDCYCLE_(x) ((x) << 16) -#define AT91_SMC_MODE 0x0c /* Mode Register for CS n */ +#define AT91_SAMA5_SMC_TIMINGS 0x0c /* Timings register for CS n */ +#define AT91_SMC_TCLR (0x0f << 0) /* CLE to REN Low Delay */ +#define AT91_SMC_TCLR_(x) ((x) << 0) +#define AT91_SMC_TADL (0x0f << 4) /* ALE to Data Start */ +#define AT91_SMC_TADL_(x) ((x) << 4) +#define AT91_SMC_TAR (0x0f << 8) /* ALE to REN Low Delay */ +#define AT91_SMC_TAR_(x) ((x) << 8) +#define AT91_SMC_OCMS (0x1 << 12) /* Off Chip Memory Scrambling Enable */ +#define AT91_SMC_OCMS_(x) ((x) << 12) +#define AT91_SMC_TRR (0x0f << 16) /* Ready to REN Low Delay */ +#define AT91_SMC_TRR_(x) ((x) << 16) +#define AT91_SMC_TWB (0x0f << 24) /* WEN High to REN to Busy */ +#define AT91_SMC_TWB_(x) ((x) << 24) +#define AT91_SMC_RBNSEL (0x07 << 28) /* Ready/Busy Line Selection */ +#define AT91_SMC_RBNSEL_(x) ((x) << 28) +#define AT91_SMC_NFSEL (0x01 << 31) /* Nand Flash Selection */ +#define AT91_SMC_NFSEL_(x) ((x) << 31) + +#define AT91_SAM9_SMC_MODE 0xc +#define AT91_SAMA5_SMC_MODE 0x10 #define AT91_SMC_READMODE (1 << 0) /* Read Mode */ #define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ #define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index c7bfdfda63..9f028079c2 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -17,7 +17,9 @@ #include <mach/at91sam9_smc.h> -#define AT91_SMC_CS_STRIDE ((at91_soc_initdata.type == AT91_SOC_SAMA5D3) ? 0x14 : 0x10) +#define AT91_SAM9_SMC_CS_STRIDE 0x10 +#define AT91_SAMA5_SMC_CS_STRIDE 0x14 +#define AT91_SMC_CS_STRIDE ((at91_soc_initdata.type == AT91_SOC_SAMA5D3) ? AT91_SAMA5_SMC_CS_STRIDE : AT91_SAM9_SMC_CS_STRIDE) #define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * AT91_SMC_CS_STRIDE)) static void __iomem *smc_base_addr[2]; @@ -25,9 +27,27 @@ static void __iomem *smc_base_addr[2]; static void sam9_smc_cs_write_mode(void __iomem *base, struct sam9_smc_config *config) { + void __iomem *mode_reg; + + mode_reg = base + ((at91_soc_initdata.type == AT91_SOC_SAMA5D3) ? AT91_SAMA5_SMC_MODE : AT91_SAM9_SMC_MODE); + __raw_writel(config->mode | AT91_SMC_TDF_(config->tdf_cycles), - base + AT91_SMC_MODE); + mode_reg); +} + +static void sam9_smc_cs_write_timings(void __iomem *base, + struct sam9_smc_config *config) +{ + __raw_writel(AT91_SMC_TCLR_(config->tclr) + | AT91_SMC_TADL_(config->tadl) + | AT91_SMC_TAR_(config->tar) + | AT91_SMC_OCMS_(config->ocms) + | AT91_SMC_TRR_(config->trr) + | AT91_SMC_TWB_(config->twb) + | AT91_SMC_RBNSEL_(config->rbnsel) + | AT91_SMC_NFSEL_(config->nfsel), + base + AT91_SAMA5_SMC_TIMINGS); } void sam9_smc_write_mode(int id, int cs, @@ -72,7 +92,12 @@ void sam9_smc_configure(int id, int cs, static void sam9_smc_cs_read_mode(void __iomem *base, struct sam9_smc_config *config) { - u32 val = __raw_readl(base + AT91_SMC_MODE); + u32 val; + void __iomem *mode_reg; + + mode_reg = base + ((at91_soc_initdata.type == AT91_SOC_SAMA5D3) ? AT91_SAMA5_SMC_MODE : AT91_SAM9_SMC_MODE); + + val = __raw_readl(mode_reg); config->mode = (val & ~AT91_SMC_NWECYCLE); config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ; @@ -120,6 +145,13 @@ void sam9_smc_read(int id, int cs, struct sam9_smc_config *config) sam9_smc_cs_read(AT91_SMC_CS(id, cs), config); } +void sama5_smc_configure(int id, int cs, struct sam9_smc_config *config) +{ + sam9_smc_configure(id, cs, config); + + sam9_smc_cs_write_timings(AT91_SMC_CS(id, cs), config); +} + static int at91sam9_smc_probe(struct device_d *dev) { int id = dev->id; diff --git a/arch/arm/mach-digic/Kconfig b/arch/arm/mach-digic/Kconfig new file mode 100644 index 0000000000..d25c3b3f51 --- /dev/null +++ b/arch/arm/mach-digic/Kconfig @@ -0,0 +1,15 @@ +if ARCH_DIGIC + +choice + prompt "camera type" + +config MACH_CANON_A1100 + bool "Canon PowerShot A1100 IS" + +endchoice + +config ARCH_TEXT_BASE + hex + default 0x00001900 if MACH_CANON_A1100 + +endif diff --git a/arch/arm/mach-digic/Makefile b/arch/arm/mach-digic/Makefile new file mode 100644 index 0000000000..820eb10ac2 --- /dev/null +++ b/arch/arm/mach-digic/Makefile @@ -0,0 +1 @@ +obj-y += core.o diff --git a/arch/arm/mach-digic/core.c b/arch/arm/mach-digic/core.c new file mode 100644 index 0000000000..b1caec0bc8 --- /dev/null +++ b/arch/arm/mach-digic/core.c @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> + +void __noreturn reset_cpu(unsigned long ignored) +{ + pr_err("%s: unimplemented\n", __func__); + hang(); +} +EXPORT_SYMBOL(reset_cpu); diff --git a/arch/arm/mach-digic/include/mach/debug_ll.h b/arch/arm/mach-digic/include/mach/debug_ll.h new file mode 100644 index 0000000000..721fd444c2 --- /dev/null +++ b/arch/arm/mach-digic/include/mach/debug_ll.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2013, 2014 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_DEBUG_LL_H__ +#define __MACH_DEBUG_LL_H__ + +#include <io.h> +#include <mach/digic4.h> +#include <mach/uart.h> + +#define DEBUG_LL_UART DIGIC4_UART + +/* Serial interface registers */ +#define DEBUG_LL_UART_TX (DEBUG_LL_UART + DIGIC_UART_TX) +#define DEBUG_LL_UART_ST (DEBUG_LL_UART + DIGIC_UART_ST) + +static inline void PUTC_LL(char ch) +{ + while (!(readl(DEBUG_LL_UART_ST) & DIGIC_UART_ST_TX_RDY)) + ; /* noop */ + + writel(0x06, DEBUG_LL_UART_ST); + writel(ch, DEBUG_LL_UART_TX); +} + +#endif /* __MACH_DEBUG_LL_H__ */ diff --git a/arch/arm/mach-digic/include/mach/digic4.h b/arch/arm/mach-digic/include/mach/digic4.h new file mode 100644 index 0000000000..ffc7979a9c --- /dev/null +++ b/arch/arm/mach-digic/include/mach/digic4.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __DIGIC4_H__ +#define __DIGIC4_H__ + +#define DIGIC4_UART 0xc0800000 + +#endif /* __DIGIC4_H__ */ diff --git a/arch/arm/mach-digic/include/mach/uart.h b/arch/arm/mach-digic/include/mach/uart.h new file mode 100644 index 0000000000..043f7cd0e9 --- /dev/null +++ b/arch/arm/mach-digic/include/mach/uart.h @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __DIGIC_UART_H__ +#define __DIGIC_UART_H__ + +/* Serial interface registers offsets */ +#define DIGIC_UART_TX 0x0 +#define DIGIC_UART_RX 0x4 +#define DIGIC_UART_ST 0x14 +# define DIGIC_UART_ST_RX_RDY 1 +# define DIGIC_UART_ST_TX_RDY 2 + +#endif /* __DIGIC_UART_H__ */ diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index bb8fec2d45..811592f7da 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -549,9 +549,9 @@ void __naked __noreturn imx53_barebox_entry(void *boarddata) unsigned long base, size; upper_or_coalesced_range(MX53_CSD0_BASE_ADDR, - imx_v3_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 0), + imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 0), MX53_CSD1_BASE_ADDR, - imx_v3_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 1), + imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 1), &base, &size); barebox_arm_entry(base, size, boarddata); diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile index c9b6f4bb9f..0ebfae7437 100644 --- a/arch/arm/mach-omap/Makefile +++ b/arch/arm/mach-omap/Makefile @@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o obj-pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o +obj-$(CONFIG_ARCH_AM33XX) += am33xx_scrm.o obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o pbl-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c index 606e3918b3..71c528ca8b 100644 --- a/arch/arm/mach-omap/am33xx_generic.c +++ b/arch/arm/mach-omap/am33xx_generic.c @@ -19,6 +19,7 @@ #include <init.h> #include <io.h> #include <net.h> +#include <asm/barebox-arm.h> #include <mach/am33xx-silicon.h> #include <mach/am33xx-clock.h> #include <mach/generic.h> @@ -318,6 +319,61 @@ void am33xx_config_sdram(const struct am33xx_emif_regs *regs) writel(regs->sdram_config, AM33XX_EMIF4_0_REG(SDRAM_CONFIG)); } +/** + * am335x_sdram_size - read back SDRAM size from sdram_config register + * + * @return: The SDRAM size + */ +unsigned long am335x_sdram_size(void) +{ + int rows, cols, width, banks; + unsigned long size; + uint32_t sdram_config = readl(CM_EMIF_SDRAM_CONFIG); + + rows = ((sdram_config >> 7) & 0x7) + 9; + cols = (sdram_config & 0x7) + 8; + + switch ((sdram_config >> 14) & 0x3) { + case 0: + width = 4; + break; + case 1: + width = 2; + break; + default: + return 0; + } + + switch ((sdram_config >> 4) & 0x7) { + case 0: + banks = 1; + break; + case 1: + banks = 2; + break; + case 2: + banks = 4; + break; + case 3: + banks = 8; + break; + default: + return 0; + } + + size = (1 << rows) * (1 << cols) * banks * width; + + debug("%s: sdram_config: 0x%08x cols: %2d rows: %2d width: %2d banks: %2d size: 0x%08lx\n", + __func__, sdram_config, cols, rows, width, banks, size); + + return size; +} + +void __noreturn am335x_barebox_entry(void *boarddata) +{ + barebox_arm_entry(0x80000000, am335x_sdram_size(), boarddata); +} + void am33xx_config_io_ctrl(int ioctrl) { writel(ioctrl, AM33XX_DDR_CMD0_IOCTRL); diff --git a/arch/arm/mach-omap/am33xx_scrm.c b/arch/arm/mach-omap/am33xx_scrm.c new file mode 100644 index 0000000000..67529f8226 --- /dev/null +++ b/arch/arm/mach-omap/am33xx_scrm.c @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2014 Sascha Hauer <s.hauer@pengutronix.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#include <common.h> +#include <io.h> +#include <errno.h> +#include <sizes.h> +#include <init.h> +#include <of.h> +#include <asm/barebox-arm.h> +#include <asm/memory.h> +#include <mach/am33xx-silicon.h> + +static int am33xx_scrm_probe(struct device_d *dev) +{ + arm_add_mem_device("ram0", 0x80000000, am335x_sdram_size()); + + return 0; +} + +static __maybe_unused struct of_device_id am33xx_scrm_dt_ids[] = { + { + .compatible = "ti,am3-scrm", + }, { + /* sentinel */ + } +}; + +static struct driver_d am33xx_scrm_driver = { + .name = "am33xx-scrm", + .probe = am33xx_scrm_probe, + .of_compatible = DRV_OF_COMPAT(am33xx_scrm_dt_ids), +}; + +static int am33xx_scrm_init(void) +{ + return platform_driver_register(&am33xx_scrm_driver); +} + +mem_initcall(am33xx_scrm_init); diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h index 20b8e81c1c..ceca10a619 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h +++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h @@ -237,5 +237,7 @@ void am33xx_config_ddr_data(const struct am33xx_ddr_data *data, int macronr); void am335x_sdram_init(int ioctrl, const struct am33xx_cmd_control *cmd_ctrl, const struct am33xx_emif_regs *emif_regs, const struct am33xx_ddr_data *ddr_data); +unsigned long am335x_sdram_size(void); +void am335x_barebox_entry(void *boarddata); #endif |