1 files changed, 42 insertions, 13 deletions
diff --git a/arch/mips/dts/ar9344.dtsi b/arch/mips/dts/ar9344.dtsi
index 0838e8d7f7..0a7171b8dc 100644
--- a/arch/mips/dts/ar9344.dtsi
+++ b/arch/mips/dts/ar9344.dtsi
@@ -13,6 +13,7 @@
 		cpu@0 {
 			device_type = "cpu";
 			compatible = "mips,mips74Kc";
+			clocks = <&pll ATH79_CLK_CPU>;
 			reg = <0>;
 		};
 	};
@@ -29,23 +30,51 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 
-		uart0: uart@18020000 {
-			compatible = "ns16550a", "qca,ar9344-uart0";
-			reg = <0x18020000 0x20>;
+		apb {
+			compatible = "simple-bus";
+			ranges;
 
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			big-endian;
+			#address-cells = <1>;
+			#size-cells = <1>;
 
-			status = "disabled";
-		};
+			uart0: uart@18020000 {
+				compatible = "ns16550a", "qca,ar9344-uart0";
+				reg = <0x18020000 0x20>;
 
-		spi: spi@1f000000 {
-			compatible = "qca,ar7100-spi", "qca,ar9344-spi";
-			reg = <0x1f000000 0x1c>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				big-endian;
 
-			#address-cells = <1>;
-			#size-cells = <0>;
+				status = "disabled";
+			};
+
+			pll: pll-controller@18050000 {
+				compatible = "qca,ar9344-pll";
+				reg = <0x18050000 0x100>;
+
+				clocks = <&ref>;
+				clock-names = "ref";
+
+				#clock-cells = <1>;
+			};
+
+			spi: spi@1f000000 {
+				compatible = "qca,ar7100-spi", "qca,ar9344-spi";
+				reg = <0x1f000000 0x1c>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				status = "disabled";
+			};
+		};
+
+		mac0: mac@19000000 {
+			compatible = "qca,ar9344-gmac0";
+			reg = <0x18070000 0x00000100>,
+			      <0x19000000 0x01000000>;
+			reg-names = "gmac", "ge0";
+			phy-mode = "rgmii";
 
 			status = "disabled";
 		};