1 files changed, 89 insertions, 0 deletions
diff --git a/arch/mips/dts/qca4531.dtsi b/arch/mips/dts/qca4531.dtsi
new file mode 100644
index 0000000000..2b0bcd816a
--- /dev/null
+++ b/arch/mips/dts/qca4531.dtsi
@@ -0,0 +1,89 @@
+#include <dt-bindings/clock/ath79-clk.h>
+
+/ {
+	compatible = "qca,qca4531";
+
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "mips,mips24Kc";
+			clocks = <&pll ATH79_CLK_CPU>;
+			reg = <0>;
+		};
+	};
+
+	ref: ref {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+	};
+
+	ahb {
+		compatible = "simple-bus";
+		ranges;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		apb {
+			compatible = "simple-bus";
+			ranges;
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart0: uart@18020000 {
+				compatible = "ns16550a", "qca,qca4531-uart0", "qca,ar9344-uart0";
+				reg = <0x18020000 0x20>;
+
+				reg-shift = <2>;
+				reg-io-width = <4>;
+				big-endian;
+
+				status = "disabled";
+			};
+
+			pll: pll-controller@18050000 {
+				compatible = "qca,qca4531-pll";
+				reg = <0x18050000 0x100>;
+
+				clocks = <&ref>;
+				clock-names = "ref";
+
+				#clock-cells = <1>;
+			};
+
+			wdt0: wdt@18060008 {
+				compatible = "qca,qca4531-wdt", "qca,ar9344-wdt";
+				reg = <0x18060008 0x8>;
+				clocks = <&pll ATH79_CLK_CPU>;
+				status = "disabled";
+			};
+
+			spi: spi@1f000000 {
+				compatible = "qca,qca4531-spi", "qca,ar7100-spi";
+				reg = <0x1f000000 0x1c>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				status = "disabled";
+			};
+		};
+
+		mac0: mac@19000000 {
+			compatible = "qca,qca4531-gmac0", "qca,ar9344-gmac0";
+			reg = <0x18070000 0x00000100>,
+			      <0x19000000 0x01000000>;
+			reg-names = "gmac", "ge0";
+			phy-mode = "rgmii";
+
+			status = "disabled";
+		};
+	};
+};