diff options
Diffstat (limited to 'arch/mips')
117 files changed, 764 insertions, 460 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 7774abe948..14062dee34 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1,6 +1,5 @@ -# -# -# +# SPDX-License-Identifier: GPL-2.0-only + config MIPS bool select GENERIC_LIB_ASHLDI3 @@ -11,6 +10,7 @@ config MIPS select HAVE_PBL_MULTI_IMAGES select HAS_DMA select ARCH_HAS_DATA_ABORT_MASK + select ARCH_HAS_SJLJ select ELF default y @@ -71,11 +71,16 @@ config MACH_MIPS_MALTA select CSRC_R4K_LIB select DRIVER_SERIAL_NS16550 select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS64_R1 select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_CPU_MIPS64_R2 select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN select HAS_DEBUG_LL + select COMMON_CLK + select COMMON_CLK_OF_PROVIDER select GPIOLIB select HW_HAS_PCI select HAVE_PBL_IMAGE @@ -100,7 +105,6 @@ config MACH_MIPS_ATH79 select HAS_DEBUG_LL select COMMON_CLK select COMMON_CLK_OF_PROVIDER - select CLKDEV_LOOKUP select OFTREE select GPIOLIB @@ -175,7 +179,6 @@ config CPU_LOONGSON1B bool "Loongson 1B" depends on SYS_HAS_CPU_LOONGSON1B select CPU_GS232 - select CLKDEV_LOOKUP select COMMON_CLK select COMMON_CLK_OF_PROVIDER help @@ -303,7 +306,6 @@ choice config 32BIT bool "32-bit barebox" depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL - select HAS_ARCH_SJLJ help Select this option if you want to build a 32-bit barebox. @@ -317,6 +319,16 @@ config 64BIT endchoice +config BOARD_MIPS_GENERIC_DT + select BOARD_GENERIC_DT + depends on OFDEVICE + bool "Build generic MIPS device tree 2nd stage image" + help + This enables compilation of a generic image that can be started 2nd + stage from barebox or from qemu. It picks up a device tree passed + in a1 like the Kernel does. + The image will be called images/barebox-dt-2nd.img + menu "MIPS specific settings" config CMD_MIPS_CPUINFO @@ -374,7 +386,6 @@ config NMON_HELP config MIPS_OPTIMIZED_STRING_FUNCTIONS bool "use assembler optimized string functions" - depends on !64BIT default y help Say yes here to use assembler optimized memcpy / memset functions. diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 4eb6ba7721..65a00379ab 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + KBUILD_DEFCONFIG := qemu-malta_defconfig # @@ -43,8 +45,8 @@ mips-ldflags-y += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL endif KBUILD_LDFLAGS += $(mips-ldflags-y) -m $(ld-emul) -LDFLAGS_barebox += $(mips-ldflags-y) -LDFLAGS_pbl += $(mips-ldflags-y) +LDFLAGS_barebox += $(KBUILD_LDFLAGS) +LDFLAGS_pbl += $(KBUILD_LDFLAGS) # # CPU-dependent compiler/assembler options for optimization. @@ -55,7 +57,13 @@ cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) -Wa,-mips64r2 -Wa,--trap cflags-$(CONFIG_CPU_GS232) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) -Wa,-mips32r2 -Wa,--trap -KBUILD_CPPFLAGS += -DTEXT_BASE=$(CONFIG_TEXT_BASE) +ifdef CONFIG_64BIT +MIPS_TEXT_BASE = $(subst 0x,0xffffffff,$(CONFIG_TEXT_BASE)) +else +MIPS_TEXT_BASE = $(CONFIG_TEXT_BASE) +endif + +KBUILD_CPPFLAGS += -DTEXT_BASE=$(MIPS_TEXT_BASE) ifndef CONFIG_MODULES # Add cleanup flags @@ -72,8 +80,6 @@ KBUILD_BINARY := barebox.bin KBUILD_TARGET := barebox.bin endif -LDFLAGS_barebox += -nostdlib - machine-$(CONFIG_MACH_MIPS_MALTA) := malta machine-$(CONFIG_MACH_MIPS_AR231X) := ar231x machine-$(CONFIG_MACH_MIPS_ATH79) := ath79 @@ -100,7 +106,7 @@ KBUILD_CFLAGS += $(cflags-y) lds-$(CONFIG_GENERIC_LINKER_SCRIPT) := arch/mips/lib/barebox.lds -cmd_barebox__ ?= $(LD) $(KBUILD_LDFLAGS) $(LDFLAGS_barebox) -o $@ \ +cmd_barebox__ ?= $(LD) $(LDFLAGS_barebox) -o $@ \ -T $(BAREBOX_LDS) \ --whole-archive $(BAREBOX_OBJS) --no-whole-archive \ $(filter-out $(BAREBOX_LDS) $(BAREBOX_OBJS) FORCE ,$^); \ diff --git a/arch/mips/boards/8devices-lima/Makefile b/arch/mips/boards/8devices-lima/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/8devices-lima/Makefile +++ b/arch/mips/boards/8devices-lima/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/8devices-lima/lowlevel.S b/arch/mips/boards/8devices-lima/lowlevel.S index dd1ab6247d..fad4d8b4af 100644 --- a/arch/mips/boards/8devices-lima/lowlevel.S +++ b/arch/mips/boards/8devices-lima/lowlevel.S @@ -15,7 +15,7 @@ ENTRY_FUNCTION(BOARD_PBL_START) - mips_barebox_10h + mips_cpu_setup debug_ll_ath79_init diff --git a/arch/mips/boards/Makefile b/arch/mips/boards/Makefile index 5f9b61e754..c4ce599c93 100644 --- a/arch/mips/boards/Makefile +++ b/arch/mips/boards/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + obj-$(CONFIG_BOARD_8DEVICES_LIMA) += 8devices-lima/ obj-$(CONFIG_BOARD_BLACK_SWIFT) += black-swift/ obj-$(CONFIG_BOARD_CI20) += img-ci20/ @@ -11,3 +13,5 @@ obj-$(CONFIG_BOARD_QEMU_MALTA) += qemu-malta/ obj-$(CONFIG_BOARD_RZX50) += ritmix-rzx50/ obj-$(CONFIG_BOARD_TPLINK_MR3020) += tplink-mr3020/ obj-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink-wdr4300/ + +pbl-$(CONFIG_BOARD_MIPS_GENERIC_DT) += board-dt-2nd.o diff --git a/arch/mips/boards/black-swift/Makefile b/arch/mips/boards/black-swift/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/black-swift/Makefile +++ b/arch/mips/boards/black-swift/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/board-dt-2nd.S b/arch/mips/boards/board-dt-2nd.S new file mode 100644 index 0000000000..a1465f09e3 --- /dev/null +++ b/arch/mips/boards/board-dt-2nd.S @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Startup Code for generic MIPS device tree 2nd stage image + * + * Copyright (C) 2024 Antony Pavlov <antonynpavlov@gmail.com> + */ + +#include <asm/asm.h> +#include <asm/pbl_macros.h> +#include <linux/sizes.h> + +ENTRY_FUNCTION(start_dt_2nd) + + /* save device tree address in v1 */ + move v1, a1 + + mips_cpu_setup + + copy_to_link_location start_dt_2nd + + stack_setup + + /* pbl_main_entry() computes fdt_len by itself + * if fdt == fdt_end */ + move a0, v1 /* fdt */ + move a1, v1 /* fdt_end */ + PTR_LI a2, SZ_256M /* ram_size */ + PTR_LA v0, pbl_main_entry + jal v0 + nop + + /* No return */ +1: + b 1b + nop diff --git a/arch/mips/boards/dlink-dir-320/Makefile b/arch/mips/boards/dlink-dir-320/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/dlink-dir-320/Makefile +++ b/arch/mips/boards/dlink-dir-320/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/dlink-dir-320/lowlevel.S b/arch/mips/boards/dlink-dir-320/lowlevel.S index da969bc74e..d0376c515c 100644 --- a/arch/mips/boards/dlink-dir-320/lowlevel.S +++ b/arch/mips/boards/dlink-dir-320/lowlevel.S @@ -13,9 +13,7 @@ ENTRY_FUNCTION(BOARD_PBL_START) - mips_barebox_10h - - mips_disable_interrupts + mips_cpu_setup /* CPU/SoC specific setup ... */ /* ... absent */ diff --git a/arch/mips/boards/dptechnics-dpt-module/Makefile b/arch/mips/boards/dptechnics-dpt-module/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/dptechnics-dpt-module/Makefile +++ b/arch/mips/boards/dptechnics-dpt-module/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/img-ci20/Makefile b/arch/mips/boards/img-ci20/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/img-ci20/Makefile +++ b/arch/mips/boards/img-ci20/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/img-ci20/lowlevel.S b/arch/mips/boards/img-ci20/lowlevel.S index 0295e44d1a..8ff9871c51 100644 --- a/arch/mips/boards/img-ci20/lowlevel.S +++ b/arch/mips/boards/img-ci20/lowlevel.S @@ -14,7 +14,7 @@ ENTRY_FUNCTION(BOARD_PBL_START) - mips_disable_interrupts + mips_cpu_setup /* CPU/SoC specific setup ... */ /* ... absent */ diff --git a/arch/mips/boards/loongson-ls1b/Makefile b/arch/mips/boards/loongson-ls1b/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/loongson-ls1b/Makefile +++ b/arch/mips/boards/loongson-ls1b/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/loongson-ls1b/lowlevel.S b/arch/mips/boards/loongson-ls1b/lowlevel.S index 7240d351b4..e823bb37dd 100644 --- a/arch/mips/boards/loongson-ls1b/lowlevel.S +++ b/arch/mips/boards/loongson-ls1b/lowlevel.S @@ -17,9 +17,7 @@ ENTRY_FUNCTION(BOARD_PBL_START) - mips_barebox_10h - - mips_disable_interrupts + mips_cpu_setup pbl_blt 0xbf000000 skip_pll_ram_config t0 diff --git a/arch/mips/boards/netgear-wg102/Makefile b/arch/mips/boards/netgear-wg102/Makefile index 344a6711b2..fe0616fdb8 100644 --- a/arch/mips/boards/netgear-wg102/Makefile +++ b/arch/mips/boards/netgear-wg102/Makefile @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o obj-y += ram.o diff --git a/arch/mips/boards/netgear-wg102/lowlevel.S b/arch/mips/boards/netgear-wg102/lowlevel.S index e48dded269..6fdcfa3cca 100644 --- a/arch/mips/boards/netgear-wg102/lowlevel.S +++ b/arch/mips/boards/netgear-wg102/lowlevel.S @@ -14,9 +14,7 @@ ENTRY_FUNCTION(BOARD_PBL_START) - mips_barebox_10h - - mips_disable_interrupts + mips_cpu_setup pbl_ar2312_pll diff --git a/arch/mips/boards/netgear-wg102/ram.c b/arch/mips/boards/netgear-wg102/ram.c index 4cde573982..fe9c881623 100644 --- a/arch/mips/boards/netgear-wg102/ram.c +++ b/arch/mips/boards/netgear-wg102/ram.c @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0-only + #include <common.h> #include <init.h> #include <linux/sizes.h> diff --git a/arch/mips/boards/okud-max9331/Makefile b/arch/mips/boards/okud-max9331/Makefile index c58bf72354..c28b1a9059 100644 --- a/arch/mips/boards/okud-max9331/Makefile +++ b/arch/mips/boards/okud-max9331/Makefile @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o lwl-y += lowlevel_boot0.o diff --git a/arch/mips/boards/openembed-som9331/Makefile b/arch/mips/boards/openembed-som9331/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/openembed-som9331/Makefile +++ b/arch/mips/boards/openembed-som9331/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/qemu-malta/Makefile b/arch/mips/boards/qemu-malta/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/qemu-malta/Makefile +++ b/arch/mips/boards/qemu-malta/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/qemu-malta/lowlevel.S b/arch/mips/boards/qemu-malta/lowlevel.S index 98821e0426..8ff7d93a74 100644 --- a/arch/mips/boards/qemu-malta/lowlevel.S +++ b/arch/mips/boards/qemu-malta/lowlevel.S @@ -11,10 +11,9 @@ #include <asm/pbl_macros.h> #include <asm/pbl_nmon.h> #include <linux/sizes.h> - #include <asm/addrspace.h> -#include <asm/gt64120.h> -#include <mach/mach-gt64120.h> + +#include <mach/gt64120.h> #ifdef CONFIG_CPU_LITTLE_ENDIAN #define GT_CPU_TO_LE32(x) (x) @@ -32,18 +31,8 @@ #define GT_HD(x) (GT_CPU_TO_LE32(((x) >> 21) & 0x7f)) ENTRY_FUNCTION(BOARD_PBL_START) - b __start - nop - - /* - On MIPS Technologies boards - 0x1fc00010 address is reserved for BoardID - */ - .org 0x10 - .asciiz "barebox" -__start: - mips_disable_interrupts + mips_cpu_setup /* cpu specific setup ... */ /* ... absent */ @@ -56,14 +45,14 @@ __start: */ /* move GT64120 registers to 0x1be00000 */ - li t1, KSEG1ADDR(GT_DEF_BASE) + li t1, CKSEG1ADDR(GT_DEF_BASE) li t0, GT_LD(MIPS_GT_BASE) sw t0, GT_ISD_OFS(t1) /* * setup MEM-to-PCI0 mapping */ - li t1, KSEG1ADDR(MIPS_GT_BASE) + li t1, CKSEG1ADDR(MIPS_GT_BASE) /* setup PCI0 io window */ li t0, GT_LD(0x18000000) diff --git a/arch/mips/boards/ritmix-rzx50/Makefile b/arch/mips/boards/ritmix-rzx50/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/ritmix-rzx50/Makefile +++ b/arch/mips/boards/ritmix-rzx50/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/ritmix-rzx50/lowlevel.S b/arch/mips/boards/ritmix-rzx50/lowlevel.S index 33810f67f5..4fccf0ddb9 100644 --- a/arch/mips/boards/ritmix-rzx50/lowlevel.S +++ b/arch/mips/boards/ritmix-rzx50/lowlevel.S @@ -14,7 +14,7 @@ ENTRY_FUNCTION(BOARD_PBL_START) - mips_disable_interrupts + mips_cpu_setup /* CPU/SoC specific setup ... */ /* ... absent */ diff --git a/arch/mips/boards/tplink-mr3020/Makefile b/arch/mips/boards/tplink-mr3020/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/tplink-mr3020/Makefile +++ b/arch/mips/boards/tplink-mr3020/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/tplink-wdr4300/Makefile b/arch/mips/boards/tplink-wdr4300/Makefile index b08c4a93ca..458f520900 100644 --- a/arch/mips/boards/tplink-wdr4300/Makefile +++ b/arch/mips/boards/tplink-wdr4300/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel.o diff --git a/arch/mips/boards/tplink-wdr4300/lowlevel.S b/arch/mips/boards/tplink-wdr4300/lowlevel.S index 8aed5ddcf1..94ae707b0b 100644 --- a/arch/mips/boards/tplink-wdr4300/lowlevel.S +++ b/arch/mips/boards/tplink-wdr4300/lowlevel.S @@ -15,7 +15,7 @@ ENTRY_FUNCTION(BOARD_PBL_START) - mips_barebox_10h + mips_cpu_setup debug_ll_ath79_init diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile index 3d46e836f7..d1e27b5e6b 100644 --- a/arch/mips/boot/Makefile +++ b/arch/mips/boot/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + obj-y += start.o obj-y += main_entry.o diff --git a/arch/mips/boot/dtb.c b/arch/mips/boot/dtb.c index 6fce4700cc..ece1494e5f 100644 --- a/arch/mips/boot/dtb.c +++ b/arch/mips/boot/dtb.c @@ -14,21 +14,24 @@ void *glob_fdt; u32 glob_fdt_size; -void of_add_memory_bank(struct device_node *node, bool dump, int r, +int of_add_memory_bank(struct device_node *node, bool dump, int r, u64 base, u64 size) { static char str[12]; + int ret; if (IS_ENABLED(CONFIG_MMU)) { sprintf(str, "kseg0_ram%d", r); - barebox_add_memory_bank(str, CKSEG0 | base, size); + ret = barebox_add_memory_bank(str, CKSEG0 | base, size); } else { sprintf(str, "kseg1_ram%d", r); - barebox_add_memory_bank(str, CKSEG1 | base, size); + ret = barebox_add_memory_bank(str, CKSEG1 | base, size); } if (dump) pr_info("%s: %s: 0x%llx@0x%llx\n", node->name, str, size, base); + + return ret; } extern char __dtb_start[]; @@ -41,8 +44,6 @@ static int of_mips_init(void) if (!fdt) fdt = __dtb_start; - barebox_register_fdt(fdt); - - return 0; + return barebox_register_fdt(fdt); } core_initcall(of_mips_init); diff --git a/arch/mips/boot/main_entry-pbl.c b/arch/mips/boot/main_entry-pbl.c index 02ddd5ec24..389dc94f37 100644 --- a/arch/mips/boot/main_entry-pbl.c +++ b/arch/mips/boot/main_entry-pbl.c @@ -11,6 +11,7 @@ #include <asm/sections.h> #include <asm-generic/memory_layout.h> #include <debug_ll.h> +#include <asm/unaligned.h> extern void *input_data; extern void *input_data_end; @@ -20,23 +21,19 @@ unsigned long free_mem_end_ptr; void pbl_main_entry(void *fdt, void *fdt_end, u32 ram_size); -static unsigned long *ttb; - static void barebox_uncompress(void *compressed_start, unsigned int len) { /* set 128 KiB at the end of the MALLOC_BASE for early malloc */ free_mem_ptr = TEXT_BASE - SZ_128K; free_mem_end_ptr = free_mem_ptr + SZ_128K; - ttb = (void *)((free_mem_ptr - 0x4000) & ~0x3fff); - pbl_barebox_uncompress((void*)TEXT_BASE, compressed_start, len); } void __section(.text_entry) pbl_main_entry(void *fdt, void *fdt_end, u32 ram_size) { - u32 pg_start, pg_end, pg_len, fdt_len; + u32 piggy_len, fdt_len; void *fdt_new; void (*barebox)(void *fdt, u32 fdt_len, u32 ram_size); @@ -45,13 +42,13 @@ void __section(.text_entry) pbl_main_entry(void *fdt, void *fdt_end, /* clear bss */ memset(__bss_start, 0, __bss_stop - __bss_start); - pg_start = (u32)&input_data; - pg_end = (u32)&input_data_end; - pg_len = pg_end - pg_start; - - barebox_uncompress(&input_data, pg_len); + piggy_len = (unsigned long)&input_data_end - (unsigned long)&input_data; + barebox_uncompress(&input_data, piggy_len); - fdt_len = (u32)fdt_end - (u32)fdt; + fdt_len = (unsigned long)fdt_end - (unsigned long)fdt; + if (!fdt_len) { + fdt_len = get_unaligned_be32((void *)((unsigned long)fdt + 4)); + } fdt_new = (void *)PAGE_ALIGN_DOWN(TEXT_BASE - MALLOC_SIZE - STACK_SIZE - fdt_len); memcpy(fdt_new, fdt, fdt_len); diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c index 2c18bc81c3..d0c69f3c82 100644 --- a/arch/mips/boot/main_entry.c +++ b/arch/mips/boot/main_entry.c @@ -14,47 +14,22 @@ #include <asm/addrspace.h> #include <linux/sizes.h> -extern void handle_reserved(void); +extern void exception_vec(void); +extern void exception_vec_end(void); void main_entry(void *fdt, u32 fdt_size); -unsigned long exception_handlers[32]; - -static void set_except_vector(int n, void *addr) -{ - unsigned handler = (unsigned long) addr; - - exception_handlers[n] = handler; -} - static void trap_init(void) { - extern char except_vec3_generic; - int i; - - unsigned long ebase; - - ebase = CKSEG1; - - /* - * Copy the generic exception handlers to their final destination. - * This will be overriden later as suitable for a particular - * configuration. - */ - memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80); - - /* - * Setup default vectors - */ - for (i = 0; i <= 31; i++) { - set_except_vector(i, &handle_reserved); - } + const unsigned long vec_size = exception_vec_end - exception_vec; + const unsigned long ebase = CKSEG1; - if (!cpu_has_4kex) - memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80); + /* copy the generic exception handlers to their final destination */ + memcpy((void *)(ebase + 0x180), &exception_vec, vec_size); /* FIXME: handle tlb */ - memcpy((void *)(ebase), &except_vec3_generic, 0x80); + memcpy((void *)(ebase), &exception_vec, vec_size); + memcpy((void *)(ebase + 0x80), &exception_vec, vec_size); /* unset BOOT EXCEPTION VECTOR bit */ write_c0_status(read_c0_status() & ~ST0_BEV); @@ -89,7 +64,7 @@ void __bare_init main_entry(void *fdt, u32 fdt_size) pr_debug("initializing malloc pool at 0x%08lx (size 0x%08lx)\n", malloc_start, malloc_end - malloc_start); - mem_malloc_init((void *)malloc_start, (void *)_stext - 1); + mem_malloc_init((void *)malloc_start, (void *)malloc_end - 1); mips_stack_top = malloc_start; glob_fdt = fdt; diff --git a/arch/mips/boot/start.S b/arch/mips/boot/start.S deleted file mode 100644 index c1cd2d9dd5..0000000000 --- a/arch/mips/boot/start.S +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Startup Code for MIPS CPU - * - * Copyright (C) 2011, 2015 Antony Pavlov <antonynpavlov@gmail.com> - */ - -#include <asm/pbl_macros.h> - - .set noreorder - .section ".text_entry" - .align 4 - -EXPORT(_start) - - mips_barebox_10h - - /* save dtb pointer */ - move s0, a0 - move s1, a1 - move s2, a2 - - /* disable watchpoints */ - mtc0 zero, CP0_WATCHLO - mtc0 zero, CP0_WATCHHI - - mips_disable_interrupts - - copy_to_link_location _start - - stack_setup - - /* restore dtb pointer */ - move a0, s0 - move a1, s1 - move a2, s2 - la v0, relocate_code - jal v0 - nop - - /* No return */ -__error: - b __error - nop diff --git a/arch/mips/boot/start.c b/arch/mips/boot/start.c new file mode 100644 index 0000000000..81603c8d7a --- /dev/null +++ b/arch/mips/boot/start.c @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Startup Code for MIPS CPU + * + * Copyright (C) 2011, 2015 Antony Pavlov <antonynpavlov@gmail.com> + */ + +#include <linux/kernel.h> + +void __noreturn _start(void *fdt, u32 fdt_size, u32 relocaddr); +void __noreturn relocate_code(void *fdt, u32 fdt_size, u32 relocaddr); + +void __noreturn __section(.text_entry) _start(void *fdt, u32 fdt_size, + u32 relocaddr) +{ + relocate_code(fdt, fdt_size, relocaddr); +} diff --git a/arch/mips/configs/qemu-malta64el_defconfig b/arch/mips/configs/qemu-malta64el_defconfig new file mode 100644 index 0000000000..c1f7366d76 --- /dev/null +++ b/arch/mips/configs/qemu-malta64el_defconfig @@ -0,0 +1,97 @@ +CONFIG_BOARD_QEMU_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS64_R2=y +CONFIG_64BIT=y +CONFIG_IMAGE_COMPRESSION_XZKERN=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x400000 +CONFIG_STACK_SIZE=0x7000 +CONFIG_EXPERIMENTAL=y +CONFIG_BAUDRATE=38400 +CONFIG_HUSH_FANCY_PROMPT=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +CONFIG_MENU=y +CONFIG_BOOTM_SHOW_TYPE=y +CONFIG_CONSOLE_ALLOW_COLOR=y +CONFIG_PARTITION_DISK_EFI=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y +CONFIG_CMD_DMESG=y +CONFIG_LONGHELP=y +CONFIG_CMD_IOMEM=y +CONFIG_CMD_IMD=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_GO=y +CONFIG_CMD_LOADB=y +CONFIG_CMD_LOADY=y +CONFIG_CMD_RESET=y +CONFIG_CMD_PARTITION=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_DEFAULTENV=y +CONFIG_CMD_LOADENV=y +CONFIG_CMD_PRINTENV=y +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_SHA256SUM=y +CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MIITOOL=y +CONFIG_CMD_PING=y +CONFIG_CMD_TFTP=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_EDIT=y +CONFIG_CMD_LOGIN=y +CONFIG_CMD_MENU=y +CONFIG_CMD_MENU_MANAGEMENT=y +CONFIG_CMD_PASSWD=y +CONFIG_CMD_FBTEST=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_CRC=y +CONFIG_CMD_CRC_CMP=y +CONFIG_CMD_FLASH=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_OF_NODE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OFTREE=y +CONFIG_CMD_TIME=y +CONFIG_NET=y +CONFIG_NET_NFS=y +CONFIG_NET_NETCONSOLE=y +CONFIG_OFDEVICE=y +CONFIG_OF_BAREBOX_DRIVERS=y +CONFIG_VIRTIO_CONSOLE=y +CONFIG_DRIVER_NET_E1000=y +CONFIG_DRIVER_NET_RTL8139=y +CONFIG_DRIVER_NET_VIRTIO=y +# CONFIG_SPI is not set +CONFIG_I2C=y +CONFIG_I2C_GPIO=y +CONFIG_MTD=y +CONFIG_DRIVER_CFI=y +# CONFIG_DRIVER_CFI_AMD is not set +# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set +# CONFIG_DRIVER_CFI_BANK_WIDTH_2 is not set +CONFIG_CFI_BUFFER_WRITE=y +CONFIG_DISK=y +CONFIG_VIRTIO_BLK=y +CONFIG_VIDEO=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_DRIVER_VIDEO_BOCHS_PCI=y +CONFIG_VIRTIO_INPUT=y +CONFIG_HWRNG=y +CONFIG_HW_RANDOM_VIRTIO=y +CONFIG_GPIO_MALTA_FPGA_I2C=y +CONFIG_PCI=y +CONFIG_PCI_DEBUG=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_VIRTIO_PCI=y +CONFIG_FS_CRAMFS=y +CONFIG_FS_EXT4=y +CONFIG_FS_TFTP=y +CONFIG_FS_FAT=y +CONFIG_FS_FAT_WRITE=y +CONFIG_FS_FAT_LFN=y diff --git a/arch/mips/configs/qemu-malta_defconfig b/arch/mips/configs/qemu-malta_defconfig index ab3abb7a2a..99714aa306 100644 --- a/arch/mips/configs/qemu-malta_defconfig +++ b/arch/mips/configs/qemu-malta_defconfig @@ -10,7 +10,7 @@ CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y CONFIG_BOOTM_SHOW_TYPE=y CONFIG_CONSOLE_ALLOW_COLOR=y -CONFIG_PARTITION=y +CONFIG_PARTITION_DISK_EFI=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y CONFIG_CMD_DMESG=y CONFIG_LONGHELP=y @@ -59,7 +59,10 @@ CONFIG_NET_NFS=y CONFIG_NET_NETCONSOLE=y CONFIG_OFDEVICE=y CONFIG_OF_BAREBOX_DRIVERS=y +CONFIG_VIRTIO_CONSOLE=y +CONFIG_DRIVER_NET_E1000=y CONFIG_DRIVER_NET_RTL8139=y +CONFIG_DRIVER_NET_VIRTIO=y # CONFIG_SPI is not set CONFIG_I2C=y CONFIG_I2C_GPIO=y @@ -69,15 +72,22 @@ CONFIG_DRIVER_CFI=y # CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set # CONFIG_DRIVER_CFI_BANK_WIDTH_2 is not set CONFIG_CFI_BUFFER_WRITE=y +CONFIG_DISK=y +CONFIG_VIRTIO_BLK=y CONFIG_VIDEO=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_DRIVER_VIDEO_BOCHS_PCI=y +CONFIG_VIRTIO_INPUT=y +CONFIG_HWRNG=y +CONFIG_HW_RANDOM_VIRTIO=y CONFIG_GPIO_MALTA_FPGA_I2C=y CONFIG_PCI=y CONFIG_PCI_DEBUG=y CONFIG_SYSCON_REBOOT_MODE=y CONFIG_POWER_RESET_SYSCON=y +CONFIG_VIRTIO_PCI=y CONFIG_FS_CRAMFS=y +CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y CONFIG_FS_FAT=y CONFIG_FS_FAT_WRITE=y diff --git a/arch/mips/dts/.gitignore b/arch/mips/dts/.gitignore deleted file mode 100644 index 077903c50a..0000000000 --- a/arch/mips/dts/.gitignore +++ /dev/null @@ -1 +0,0 @@ -*dtb* diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index e5900c971b..d99c4c6358 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_NAME)) ifneq ($(BUILTIN_DTB),) obj-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o @@ -16,4 +18,4 @@ pbl-$(CONFIG_BOARD_RZX50) += rzx50.dtb.o pbl-$(CONFIG_BOARD_TPLINK_MR3020) += ar9331_tl_mr3020.dtb.o pbl-$(CONFIG_BOARD_TPLINK_WDR4300) += ar9344-tl-wdr4300-v1.7.dtb.o -clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo +clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.z diff --git a/arch/mips/dts/ar9331-dptechnics-dpt-module.dts b/arch/mips/dts/ar9331-dptechnics-dpt-module.dts index 24ce0d0d67..25eabc9b7e 100644 --- a/arch/mips/dts/ar9331-dptechnics-dpt-module.dts +++ b/arch/mips/dts/ar9331-dptechnics-dpt-module.dts @@ -11,7 +11,7 @@ environment { compatible = "barebox,environment"; - device-path = &spiflash, "partname:barebox-environment"; + device-path = &env_nor; }; art@0 { @@ -20,18 +20,14 @@ barebox,provide-mac-address = <ð0>; }; }; +}; - leds { - system { - barebox,default-trigger = "heartbeat"; - }; - }; +&{/leds/led-0} { + barebox,default-trigger = "heartbeat"; +}; - gpio-keys { - button@0 { - gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; - }; - }; +&{/gpio-keys/button-0} { + gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; }; &spiflash { @@ -40,7 +36,7 @@ reg = <0 0x80000>; }; - partition@80000 { + env_nor: partition@80000 { label = "barebox-environment"; reg = <0x80000 0x10000>; }; diff --git a/arch/mips/dts/ar9331-okud-max9331.dts b/arch/mips/dts/ar9331-okud-max9331.dts index 3b93bee93b..f65272905b 100644 --- a/arch/mips/dts/ar9331-okud-max9331.dts +++ b/arch/mips/dts/ar9331-okud-max9331.dts @@ -21,7 +21,7 @@ environment { compatible = "barebox,environment"; - device-path = &spiflash, "partname:barebox-environment"; + device-path = &env_nor; }; art@0 { @@ -120,7 +120,7 @@ reg = <0 0x10000>; }; - partition@10000 { + env_nor: partition@10000 { label = "barebox-environment"; reg = <0x10000 0x10000>; }; diff --git a/arch/mips/dts/ar9331-openembed-som9331-board.dts b/arch/mips/dts/ar9331-openembed-som9331-board.dts index 4736332f8f..78f5ef1ea2 100644 --- a/arch/mips/dts/ar9331-openembed-som9331-board.dts +++ b/arch/mips/dts/ar9331-openembed-som9331-board.dts @@ -37,7 +37,7 @@ environment { compatible = "barebox,environment"; - device-path = &spiflash, "partname:barebox-environment"; + device-path = &env_nor; }; art@0 { @@ -95,7 +95,7 @@ reg = <0 0x80000>; }; - partition@80000 { + env_nor: partition@80000 { label = "barebox-environment"; reg = <0x80000 0x10000>; }; diff --git a/arch/mips/dts/ar9331.dtsi b/arch/mips/dts/ar9331.dtsi index 72f029754e..20e4d64c04 100644 --- a/arch/mips/dts/ar9331.dtsi +++ b/arch/mips/dts/ar9331.dtsi @@ -1,10 +1,8 @@ -/ { - ahb { - wdt0: wdt@18060008 { - compatible = "qca,ar9331-wdt", "qca,ar9344-wdt"; - reg = <0x18060008 0x8>; - clocks = <&pll ATH79_CLK_CPU>; - }; +&{/ahb} { + wdt0: wdt@18060008 { + compatible = "qca,ar9331-wdt", "qca,ar9344-wdt"; + reg = <0x18060008 0x8>; + clocks = <&pll ATH79_CLK_CPU>; }; }; diff --git a/arch/mips/dts/ar9331_tl_mr3020.dts b/arch/mips/dts/ar9331_tl_mr3020.dts index c6ae154f4f..66587912c4 100644 --- a/arch/mips/dts/ar9331_tl_mr3020.dts +++ b/arch/mips/dts/ar9331_tl_mr3020.dts @@ -11,7 +11,7 @@ environment { compatible = "barebox,environment"; - device-path = &spiflash, "partname:barebox-environment"; + device-path = &env_nor; }; }; }; @@ -22,7 +22,7 @@ reg = <0 0x80000>; }; - partition@80000 { + env_nor: partition@80000 { label = "barebox-environment"; reg = <0x80000 0x10000>; }; diff --git a/arch/mips/dts/ar9344-tl-wdr4300-v1.7.dts b/arch/mips/dts/ar9344-tl-wdr4300-v1.7.dts index 82daabbdd4..d788b5ed63 100644 --- a/arch/mips/dts/ar9344-tl-wdr4300-v1.7.dts +++ b/arch/mips/dts/ar9344-tl-wdr4300-v1.7.dts @@ -24,7 +24,7 @@ environment { compatible = "barebox,environment"; - device-path = &spiflash, "partname:barebox-environment"; + device-path = &env_nor; }; art@0 { @@ -65,7 +65,7 @@ reg = <0 0x80000>; }; - partition@80000 { + env_nor: partition@80000 { label = "barebox-environment"; reg = <0x80000 0x10000>; }; diff --git a/arch/mips/dts/qca4531-8devices-lima.dts b/arch/mips/dts/qca4531-8devices-lima.dts index 4b960e12bf..bb3e5247dc 100644 --- a/arch/mips/dts/qca4531-8devices-lima.dts +++ b/arch/mips/dts/qca4531-8devices-lima.dts @@ -24,7 +24,7 @@ environment { compatible = "barebox,environment"; - device-path = &spiflash, "partname:barebox-environment"; + device-path = &env_nor; }; }; }; @@ -59,7 +59,7 @@ reg = <0 0x80000>; }; - partition@80000 { + env_nor: partition@80000 { label = "barebox-environment"; reg = <0x80000 0x10000>; }; diff --git a/arch/mips/dts/qemu-malta.dts b/arch/mips/dts/qemu-malta.dts index 2d6f4a0ca3..c2bc03dd46 100644 --- a/arch/mips/dts/qemu-malta.dts +++ b/arch/mips/dts/qemu-malta.dts @@ -10,7 +10,7 @@ chosen { environment { compatible = "barebox,environment"; - device-path = &nor0, "partname:barebox-environment"; + device-path = &env_nor; }; }; @@ -19,6 +19,26 @@ reg = <0x00000000 0x10000000>; }; + clocks { + ref_clk: ref_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <320000000>; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "mips,mips24Kf"; + clocks = <&ref_clk>; + reg = <0>; + }; + }; + uart0: serial@180003f8 { compatible = "ns16550a"; reg = <0x180003f8 0x08>; @@ -79,7 +99,7 @@ read-only; }; - partition@80000 { + env_nor: partition@80000 { label = "barebox-environment"; reg = <0x80000 0x10000>; }; diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h index 11f10e5011..dd3b5570dd 100644 --- a/arch/mips/include/asm/addrspace.h +++ b/arch/mips/include/asm/addrspace.h @@ -49,6 +49,16 @@ #define XPHYSADDR(a) ((_ACAST64_(a)) & \ _CONST64_(0x000000ffffffffff)) +/* + * Memory segments (32bit kernel mode addresses) + * These are the traditional names used in the 32-bit universe. + */ +#define KUSEG 0x00000000 +#define KSEG0 0x80000000 +#define KSEG1 0xa0000000 +#define KSSEG 0xc0000000 +#define KSEG3 0xe0000000 + #ifdef CONFIG_64BIT /* @@ -65,11 +75,6 @@ #define CKSSEG _CONST64_(0xffffffffc0000000) #define CKSEG3 _CONST64_(0xffffffffe0000000) -#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) -#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) -#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) -#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) - /* * Cache modes for XKPHYS address conversion macros */ @@ -92,35 +97,25 @@ #else -#define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) -#define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) -#define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) -#define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) - /* * Map an address to a certain kernel segment */ #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) -#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) +#define KSSEGADDR(a) (CPHYSADDR(a) | KSSEG) #define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) -/* - * Memory segments (32bit kernel mode addresses) - * These are the traditional names used in the 32-bit universe. - */ -#define KUSEG 0x00000000 -#define KSEG0 0x80000000 -#define KSEG1 0xa0000000 -#define KSEG2 0xc0000000 -#define KSEG3 0xe0000000 - -#define CKUSEG 0x00000000 -#define CKSEG0 0x80000000 -#define CKSEG1 0xa0000000 -#define CKSEG2 0xc0000000 -#define CKSEG3 0xe0000000 +#define CKUSEG KUSEG +#define CKSEG0 KSEG0 +#define CKSEG1 KSEG1 +#define CKSSEG KSSEG +#define CKSEG3 KSEG3 #endif +#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) +#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) +#define CKSSEGADDR(a) (CPHYSADDR(a) | CKSSEG) +#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) + #endif /* _ASM_ADDRSPACE_H */ diff --git a/arch/mips/include/asm/asm-offsets.h b/arch/mips/include/asm/asm-offsets.h index d370ee36a1..33db5a47e5 100644 --- a/arch/mips/include/asm/asm-offsets.h +++ b/arch/mips/include/asm/asm-offsets.h @@ -1 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #include <generated/asm-offsets.h> diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h index 69931662ff..f6daae6757 100644 --- a/arch/mips/include/asm/asm.h +++ b/arch/mips/include/asm/asm.h @@ -83,8 +83,8 @@ symbol: .set noreorder; \ .section .text_head_entry.symbol; \ .align 4; \ - \ -EXPORT(symbol) +EXPORT(symbol) \ + mips_barebox_10h /* * ENTRY_FUNCTION_END - mark end of entry function @@ -94,10 +94,10 @@ EXPORT(symbol) copy_to_link_location symbol; \ stack_setup; \ \ - la a0, __dtb_ ## dtb##_start; \ - la a1, __dtb_ ## dtb##_end; \ - li a2, ram_size; \ - la v0, pbl_main_entry; \ + PTR_LA a0, __dtb_ ## dtb##_start; \ + PTR_LA a1, __dtb_ ## dtb##_end; \ + PTR_LI a2, ram_size; \ + PTR_LA v0, pbl_main_entry; \ jal v0; \ nop; \ \ @@ -122,7 +122,7 @@ EXPORT(symbol) /* Call some code from .text section. \ * It is needed to keep same linker script for \ * all images. */ \ - la v0, mips_dead_end; \ + PTR_LA v0, mips_dead_end; \ jal v0; \ nop; diff --git a/arch/mips/include/asm/barebox.lds.h b/arch/mips/include/asm/barebox.lds.h new file mode 100644 index 0000000000..124f3d5d66 --- /dev/null +++ b/arch/mips/include/asm/barebox.lds.h @@ -0,0 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#define BAREBOX_OUTPUT_ARCH "mips" + +#include <asm-generic/barebox.lds.h> diff --git a/arch/mips/include/asm/bitsperlong.h b/arch/mips/include/asm/bitsperlong.h index 6dc0bb0c13..bf000a04cc 100644 --- a/arch/mips/include/asm/bitsperlong.h +++ b/arch/mips/include/asm/bitsperlong.h @@ -1 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #include <asm-generic/bitsperlong.h> diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h index 4bb39b1cd4..f2f50986c7 100644 --- a/arch/mips/include/asm/cache.h +++ b/arch/mips/include/asm/cache.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_MIPS_CACHE_H #define _ASM_MIPS_CACHE_H diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h index 9f60e0287d..1e4e361e22 100644 --- a/arch/mips/include/asm/cacheops.h +++ b/arch/mips/include/asm/cacheops.h @@ -12,6 +12,7 @@ */ #define Cache_I 0x00 #define Cache_D 0x01 +#define Cache_SD 0x03 #define Index_Writeback_Inv 0x00 #define Index_Store_Tag 0x08 @@ -23,9 +24,13 @@ */ #define Index_Invalidate_I (Cache_I | Index_Writeback_Inv) #define Index_Writeback_Inv_D (Cache_D | Index_Writeback_Inv) +#define Index_Writeback_Inv_SD (Cache_SD | Index_Writeback_Inv) #define Index_Store_Tag_I (Cache_I | Index_Store_Tag) #define Index_Store_Tag_D (Cache_D | Index_Store_Tag) +#define Index_Store_Tag_SD (Cache_SD | Index_Store_Tag) #define Hit_Invalidate_D (Cache_D | Hit_Invalidate) +#define Hit_Invalidate_SD (Cache_SD | Hit_Invalidate) #define Hit_Writeback_Inv_D (Cache_D | Hit_Writeback_Inv) +#define Hit_Writeback_Inv_SD (Cache_SD | Hit_Writeback_Inv) #endif /* __ASM_CACHEOPS_H */ diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 9d94eb346b..155e254a81 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * cpu.h: Values of the PRId register used to match up * various MIPS cpu types. diff --git a/arch/mips/include/asm/debug_ll.h b/arch/mips/include/asm/debug_ll.h new file mode 100644 index 0000000000..96e2082dc8 --- /dev/null +++ b/arch/mips/include/asm/debug_ll.h @@ -0,0 +1,6 @@ +#ifndef __ASM_MIPS_DEBUG_LL_H +#define __ASM_MIPS_DEBUG_LL_H + +#include <mach/debug_ll.h> + +#endif /* __ASM_MIPS_DEBUG_LL_H */ diff --git a/arch/mips/include/asm/debug_ll_ns16550.h b/arch/mips/include/asm/debug_ll_ns16550.h index 703bfaee77..7cfd844cb6 100644 --- a/arch/mips/include/asm/debug_ll_ns16550.h +++ b/arch/mips/include/asm/debug_ll_ns16550.h @@ -60,7 +60,7 @@ static inline void PUTC_LL(char ch) .macro debug_ll_ns16550_init divisor=DEBUG_LL_UART_DIVISOR #ifdef CONFIG_DEBUG_LL - la t0, DEBUG_LL_UART_ADDR + PTR_LA t0, DEBUG_LL_UART_ADDR li t1, UART_LCR_DLAB /* DLAB on */ sb t1, UART_LCR(t0) /* Write it out */ @@ -83,7 +83,7 @@ static inline void PUTC_LL(char ch) .set push .set reorder - la t0, DEBUG_LL_UART_ADDR + PTR_LA t0, DEBUG_LL_UART_ADDR 201: lbu t1, UART_LSR(t0) /* get line status */ andi t1, t1, UART_LSR_THRE /* check for transmitter empty */ @@ -126,7 +126,7 @@ static inline void PUTC_LL(char ch) .set push .set reorder - la t0, DEBUG_LL_UART_ADDR + PTR_LA t0, DEBUG_LL_UART_ADDR /* get line status and check for data present */ lbu t1, UART_LSR(t0) diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h deleted file mode 100644 index c71a087038..0000000000 --- a/arch/mips/include/asm/dma-mapping.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef _ASM_DMA_MAPPING_H -#define _ASM_DMA_MAPPING_H - -#include <common.h> -#include <xfuncs.h> -#include <asm/addrspace.h> -#include <asm/types.h> -#include <malloc.h> -#include <asm/io.h> - -static inline void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle) -{ - void *ret; - - ret = xmemalign(PAGE_SIZE, size); - - memset(ret, 0, size); - - if (dma_handle) - *dma_handle = CPHYSADDR(ret); - - dma_flush_range((unsigned long)ret, (unsigned long)(ret + size)); - - return (void *)CKSEG1ADDR(ret); -} - -static inline void dma_free_coherent(void *vaddr, dma_addr_t dma_handle, - size_t size) -{ - if (IS_ENABLED(CONFIG_MMU)) - free((void *)CKSEG0ADDR(vaddr)); - else - free(vaddr); -} - -#endif /* _ASM_DMA_MAPPING_H */ diff --git a/arch/mips/include/asm/dma.h b/arch/mips/include/asm/dma.h index e0b4689172..5c5b6d5b3a 100644 --- a/arch/mips/include/asm/dma.h +++ b/arch/mips/include/asm/dma.h @@ -6,6 +6,44 @@ #ifndef __ASM_DMA_H #define __ASM_DMA_H -#include "asm/dma-mapping.h" +#include <common.h> +#include <malloc.h> +#include <xfuncs.h> +#include <asm/addrspace.h> +#include <asm/cpu-info.h> +#include <asm/io.h> +#include <asm/types.h> + +#define DMA_ALIGNMENT \ + max(current_cpu_data.dcache.linesz, current_cpu_data.scache.linesz) + +#define dma_alloc_coherent dma_alloc_coherent +static inline void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle) +{ + void *ptr; + unsigned long virt; + + ptr = xmemalign(PAGE_SIZE, size); + memset(ptr, 0, size); + + virt = (unsigned long)ptr; + + if (dma_handle) + *dma_handle = CPHYSADDR(virt); + + dma_flush_range(virt, virt + size); + + return (void *)CKSEG1ADDR(virt); +} + +#define dma_free_coherent dma_free_coherent +static inline void dma_free_coherent(void *vaddr, dma_addr_t dma_handle, + size_t size) +{ + if (IS_ENABLED(CONFIG_MMU) && vaddr) + free((void *)CKSEG0ADDR((unsigned long)vaddr)); + else + free(vaddr); +} #endif /* __ASM_DMA_H */ diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 4df9853680..4584eec8ca 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * Stolen from the linux-2.6/include/asm-generic/io.h */ @@ -25,9 +27,10 @@ void dma_inv_range(unsigned long, unsigned long); * The returned physical address is the physical (CPU) mapping for * the memory address given. */ -static inline unsigned long virt_to_phys(const void *address) +#define virt_to_phys virt_to_phys +static inline unsigned long virt_to_phys(const volatile void *address) { - return (unsigned long)CPHYSADDR(address); + return CPHYSADDR((unsigned long)address); } /* @@ -37,6 +40,7 @@ static inline unsigned long virt_to_phys(const void *address) * The returned virtual address is a current CPU mapping for * the memory address given. */ +#define phys_to_virt phys_to_virt static inline void *phys_to_virt(unsigned long address) { if (IS_ENABLED(CONFIG_MMU)) { diff --git a/arch/mips/include/asm/memory.h b/arch/mips/include/asm/memory.h index 2aa28b7686..0821b432f8 100644 --- a/arch/mips/include/asm/memory.h +++ b/arch/mips/include/asm/memory.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_MIPS_MEMORY_H #define __ASM_MIPS_MEMORY_H diff --git a/arch/mips/include/asm/mmu.h b/arch/mips/include/asm/mmu.h index 95af871420..1c2646ebb3 100644 --- a/arch/mips/include/asm/mmu.h +++ b/arch/mips/include/asm/mmu.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_MMU_H #define __ASM_MMU_H diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h index c62910ff60..61e12cd004 100644 --- a/arch/mips/include/asm/pbl_macros.h +++ b/arch/mips/include/asm/pbl_macros.h @@ -30,9 +30,9 @@ .set noreorder li t9, \addr li t8, \val - lw t7, 0(t9) - or t7, t8 - sw t7, 0(t9) + lw ta3, 0(t9) + or ta3, t8 + sw ta3, 0(t9) .set pop .endm @@ -41,10 +41,10 @@ .set noreorder li t9, \addr li t8, \clr - lw t7, 0(t9) + lw ta3, 0(t9) not t8, t8 - and t7, t8 - sw t7, 0(t9) + and ta3, t8 + sw ta3, 0(t9) .set pop .endm @@ -73,7 +73,7 @@ .macro pbl_probe_mem ret1 ret2 addr .set push .set noreorder - la \ret1, \addr + PTR_LA \ret1, \addr sw zero, 0(\ret1) li \ret2, 0x12345678 sw \ret2, 0(\ret1) @@ -97,7 +97,7 @@ move \temp, ra # preserve ra beforehand bal 255f nop -255: addiu \rd, ra, \label - 255b # label is assumed to be +255: PTR_ADDIU \rd, ra, \label - 255b # label is assumed to be move ra, \temp # within pc +/- 32KB .set pop .endm @@ -110,32 +110,31 @@ ADR a0, \start_addr, t1 /* a0 <- pc-relative position of start_addr */ - la a1, \start_addr /* a1 <- link (RAM) start_addr address */ + PTR_LA a1, \start_addr /* a1 <- link (RAM) start_addr address */ beq a0, a1, copy_loop_exit nop - la t0, \start_addr - la t1, __bss_start - subu t2, t1, t0 /* t2 <- size of pbl */ - addu a2, a0, t2 /* a2 <- source end address */ + PTR_LA t0, \start_addr + PTR_LA t1, __bss_start + PTR_SUBU t2, t1, t0 /* t2 <- size of pbl */ + PTR_ADDU a2, a0, t2 /* a2 <- source end address */ -#define WSIZE 4 copy_loop: /* copy from source address [a0] */ - lw t4, WSIZE * 0(a0) - lw t5, WSIZE * 1(a0) - lw t6, WSIZE * 2(a0) - lw t7, WSIZE * 3(a0) + LONG_L ta0, LONGSIZE * 0(a0) + LONG_L ta1, LONGSIZE * 1(a0) + LONG_L ta2, LONGSIZE * 2(a0) + LONG_L ta3, LONGSIZE * 3(a0) /* copy to target address [a1] */ - sw t4, WSIZE * 0(a1) - sw t5, WSIZE * 1(a1) - sw t6, WSIZE * 2(a1) - sw t7, WSIZE * 3(a1) - addi a0, WSIZE * 4 - subu t3, a0, a2 + LONG_S ta0, LONGSIZE * 0(a1) + LONG_S ta1, LONGSIZE * 1(a1) + LONG_S ta2, LONGSIZE * 2(a1) + LONG_S ta3, LONGSIZE * 3(a1) + PTR_ADDI a0, LONGSIZE * 4 + PTR_SUBU t3, a0, a2 blez t3, copy_loop - addi a1, WSIZE * 4 + PTR_ADDI a1, LONGSIZE * 4 copy_loop_exit: @@ -152,6 +151,34 @@ copy_loop_exit: .set pop .endm + .macro mips_disable_watchpoints + .set push + .set noreorder + mtc0 zero, CP0_WATCHLO + mtc0 zero, CP0_WATCHHI + .set pop + .endm + + .macro mips64_enable_64bit_addressing +#ifdef CONFIG_64BIT + .set push + .set noreorder + mfc0 k0, CP0_STATUS + or k0, ST0_KX + mtc0 k0, CP0_STATUS + .set pop +#endif + .endm + + .macro mips_cpu_setup + .set push + .set noreorder + mips_disable_interrupts + mips_disable_watchpoints + mips64_enable_64bit_addressing + .set pop + .endm + .macro mips_barebox_10h .set push .set noreorder @@ -160,8 +187,7 @@ copy_loop_exit: nop .org 0x10 - .ascii "barebox" - .byte 0 + .asciiz "barebox" .align 4 1: @@ -196,7 +222,7 @@ copy_loop_exit: .set noreorder /* set stack pointer; reserve four 32-bit argument slots */ - la sp, (TEXT_BASE - MALLOC_SIZE - 16) + PTR_LA sp, (TEXT_BASE - MALLOC_SIZE - 16) .set pop .endm diff --git a/arch/mips/include/asm/pbl_nmon.h b/arch/mips/include/asm/pbl_nmon.h index 0e4ec39967..73e4a9d2e9 100644 --- a/arch/mips/include/asm/pbl_nmon.h +++ b/arch/mips/include/asm/pbl_nmon.h @@ -5,6 +5,9 @@ * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> */ +#ifndef __ASM_PBL_NMON_H +#define __ASM_PBL_NMON_H + #include <mach/debug_ll.h> #define CODE_ESC 0x1b @@ -39,12 +42,12 @@ .set push .set reorder - move t6, a0 - li t5, 32 + move ta2, a0 + li ta1, 32 202: - addi t5, t5, -4 - srlv a0, t6, t5 + addi ta1, ta1, -4 + srlv a0, ta2, ta1 /* output one hex digit */ andi a0, a0, 15 @@ -57,7 +60,7 @@ debug_ll_outc_a0 - bgtz t5, 202b + bgtz ta1, 202b .set pop #endif /* CONFIG_DEBUG_LL */ @@ -286,3 +289,5 @@ nmon_exit: #endif /* CONFIG_NMON */ .set pop .endm + +#endif /* __ASM_PBL_NMON_H */ diff --git a/arch/mips/include/asm/regdef.h b/arch/mips/include/asm/regdef.h index 1300251661..df87582e8e 100644 --- a/arch/mips/include/asm/regdef.h +++ b/arch/mips/include/asm/regdef.h @@ -3,6 +3,8 @@ * Copyright (C) 1985 MIPS Computer Systems, Inc. * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. + * Copyright (C) 2011 Wind River Systems, + * written by Ralf Baechle <ralf@linux-mips.org> */ #ifndef _ASM_REGDEF_H #define _ASM_REGDEF_H @@ -27,9 +29,13 @@ #define t2 $10 #define t3 $11 #define t4 $12 +#define ta0 $12 #define t5 $13 +#define ta1 $13 #define t6 $14 +#define ta2 $14 #define t7 $15 +#define ta3 $15 #define s0 $16 /* callee saved */ #define s1 $17 #define s2 $18 diff --git a/arch/mips/include/asm/reloc.h b/arch/mips/include/asm/reloc.h new file mode 100644 index 0000000000..adffd6f1c7 --- /dev/null +++ b/arch/mips/include/asm/reloc.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _ASM_RELOC_H_ +#define _ASM_RELOC_H_ + +static inline unsigned long get_runtime_offset(void) +{ + /* On MIPS, we always relocate before jumping into C */ + return 0; +} + +#include <asm-generic/reloc.h> + +#endif diff --git a/arch/mips/include/asm/setjmp.h b/arch/mips/include/asm/setjmp.h index 81f4d4c15f..39e01e27df 100644 --- a/arch/mips/include/asm/setjmp.h +++ b/arch/mips/include/asm/setjmp.h @@ -19,7 +19,7 @@ typedef struct __jmp_buf_internal_tag { void *__sp; /* Callee-saved registers s0 through s7. */ - int __regs[8]; + unsigned long __regs[8]; /* The frame pointer. */ void *__fp; diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index 2295d7f02f..64ec37478a 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -89,8 +89,10 @@ #endif LONG_S v1, PT_EPC(sp) LONG_S $25, PT_R25(sp) + MFC0 v1, CP0_BADVADDR LONG_S $28, PT_R28(sp) LONG_S $31, PT_R31(sp) + LONG_S v1, PT_BVADDR(sp) .set pop .endm @@ -157,11 +159,13 @@ MTC0 v1, CP0_EPC LONG_L $31, PT_R31(sp) LONG_L $28, PT_R28(sp) + LONG_L v1, PT_BVADDR(sp) LONG_L $25, PT_R25(sp) #ifdef CONFIG_64BIT LONG_L $8, PT_R8(sp) LONG_L $9, PT_R9(sp) #endif + MTC0 v0, CP0_BADVADDR LONG_L $7, PT_R7(sp) LONG_L $6, PT_R6(sp) LONG_L $5, PT_R5(sp) diff --git a/arch/mips/include/asm/word-at-a-time.h b/arch/mips/include/asm/word-at-a-time.h new file mode 100644 index 0000000000..f6306fb896 --- /dev/null +++ b/arch/mips/include/asm/word-at-a-time.h @@ -0,0 +1,2 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include <asm-generic/word-at-a-time.h> diff --git a/arch/mips/lib/.gitignore b/arch/mips/lib/.gitignore index d1165788c9..03987a7009 100644 --- a/arch/mips/lib/.gitignore +++ b/arch/mips/lib/.gitignore @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + barebox.lds diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 88a2bdbd28..00d72d0a1a 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + extra-$(CONFIG_GENERIC_LINKER_SCRIPT) += barebox.lds obj-$(CONFIG_CSRC_R4K_LIB) += csrc-r4k.o obj-y += cpu-probe.o @@ -8,7 +10,7 @@ obj-y += reloc.o obj-y += sections.o obj-y += shutdown.o obj-y += dma-default.o -obj-$(CONFIG_HAS_ARCH_SJLJ) += setjmp.o +obj-$(CONFIG_ARCH_HAS_SJLJ) += setjmp.o obj-$(CONFIG_MIPS_OPTIMIZED_STRING_FUNCTIONS) += memcpy.o obj-$(CONFIG_MIPS_OPTIMIZED_STRING_FUNCTIONS) += memset.o diff --git a/arch/mips/lib/asm-offsets.c b/arch/mips/lib/asm-offsets.c index 457bc8ab7c..227d8cf54e 100644 --- a/arch/mips/lib/asm-offsets.c +++ b/arch/mips/lib/asm-offsets.c @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0-only + /* * offset.c: Calculate pt_regs and task_struct offsets. * diff --git a/arch/mips/lib/barebox.lds.S b/arch/mips/lib/barebox.lds.S index c954df41f3..0720f9295d 100644 --- a/arch/mips/lib/barebox.lds.S +++ b/arch/mips/lib/barebox.lds.S @@ -3,10 +3,9 @@ * Copyright (C) 2011 Antony Pavlov <antonynpavlov@gmail.com> */ +#include <asm/barebox.lds.h> -#include <asm-generic/barebox.lds.h> - -OUTPUT_ARCH(mips) +OUTPUT_ARCH(BAREBOX_OUTPUT_ARCH) ENTRY(_start) SECTIONS { @@ -67,5 +66,4 @@ SECTIONS . = ALIGN(4); __bss_stop = .; } - } diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c index 6c56202ea9..86573dec7f 100644 --- a/arch/mips/lib/bootm.c +++ b/arch/mips/lib/bootm.c @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0-only + #include <boot.h> #include <bootm.h> #include <common.h> @@ -14,12 +16,21 @@ static int do_bootm_barebox(struct image_data *data) { - void (*barebox)(void); + void (*barebox)(int, void *); + void *fdt = NULL; barebox = read_file(data->os_file, NULL); if (!barebox) return -EINVAL; + if (data->oftree_file) { + fdt = bootm_get_devicetree(data); + if (IS_ERR(fdt)) { + pr_err("Failed to load dtb\n"); + return PTR_ERR(fdt); + } + } + if (data->dryrun) { free(barebox); return 0; @@ -27,7 +38,7 @@ static int do_bootm_barebox(struct image_data *data) shutdown_barebox(); - barebox(); + barebox(-2, fdt); restart_machine(); } @@ -55,21 +66,25 @@ static int do_bootm_elf(struct image_data *data) fdt = bootm_get_devicetree(data); if (IS_ERR(fdt)) { - ret = PTR_ERR(fdt); - goto bootm_free_fdt; + pr_err("Failed to load dtb\n"); + return PTR_ERR(fdt); } - pr_info("Starting application at 0x%08lx, dts 0x%08lx...\n", - phys_to_virt(data->os_address), data->of_root_node); + pr_info("Starting application at 0x%08lx, dts 0x%p...\n", + data->os_address, data->of_root_node); if (data->dryrun) goto bootm_free_fdt; + ret = of_overlay_load_firmware(); + if (ret) + goto bootm_free_fdt; + shutdown_barebox(); entry = (void *) (unsigned long) data->os_address; - entry(-2, phys_to_virt((unsigned long)fdt)); + entry(-2, fdt); pr_err("ELF application terminated\n"); ret = -EINVAL; diff --git a/arch/mips/lib/c-r4k.c b/arch/mips/lib/c-r4k.c index 8bc0a7a411..44cf57d99b 100644 --- a/arch/mips/lib/c-r4k.c +++ b/arch/mips/lib/c-r4k.c @@ -13,6 +13,8 @@ #include <asm/cpu-info.h> #include <asm/bitops.h> +#define INDEX_BASE CKSEG0 + #define cache_op(op,addr) \ __asm__ __volatile__( \ " .set push \n" \ @@ -23,67 +25,67 @@ : \ : "i" (op), "R" (*(unsigned char *)(addr))) +#define __BUILD_BLAST_CACHE(pfx, desc, indexop) \ +static inline void blast_##pfx##cache(void) \ +{ \ + const unsigned long lsize = current_cpu_data.desc.linesz; \ + const unsigned long start = INDEX_BASE; \ + const unsigned long size = current_cpu_data.desc.waysize \ + * current_cpu_data.desc.ways; \ + const unsigned long aend = start + size - 1; \ + unsigned long addr; \ + \ + if (current_cpu_data.desc.flags & MIPS_CACHE_NOT_PRESENT) \ + return; \ + \ + for (addr = start; addr <= aend; addr += lsize) \ + cache_op(indexop, addr); \ +} + #define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop) \ static inline void blast_##pfx##cache##_range(unsigned long start, \ unsigned long end) \ { \ - unsigned long lsize = current_cpu_data.desc.linesz; \ - unsigned long addr = start & ~(lsize - 1); \ - unsigned long aend = (end - 1) & ~(lsize - 1); \ + const unsigned long lsize = current_cpu_data.desc.linesz; \ + const unsigned long astart = ALIGN_DOWN(start, lsize); \ + const unsigned long aend = ALIGN_DOWN(end - 1, lsize); \ + unsigned long addr; \ \ if (current_cpu_data.desc.flags & MIPS_CACHE_NOT_PRESENT) \ return; \ \ - while (1) { \ + for (addr = astart; addr <= aend; addr += lsize) \ cache_op(hitop, addr); \ - if (addr == aend) \ - break; \ - addr += lsize; \ - } \ } +__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D) +__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I) +__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD) + __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D) +__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD) __BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D) +__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD) void flush_cache_all(void) { - struct cpuinfo_mips *c = ¤t_cpu_data; - unsigned long lsize; - unsigned long addr; - unsigned long aend; - unsigned int icache_size, dcache_size; - - dcache_size = c->dcache.waysize * c->dcache.ways; - lsize = c->dcache.linesz; - aend = (CKSEG0 + dcache_size - 1) & ~(lsize - 1); - for (addr = CKSEG0; addr <= aend; addr += lsize) - cache_op(Index_Writeback_Inv_D, addr); - - icache_size = c->icache.waysize * c->icache.ways; - lsize = c->icache.linesz; - aend = (CKSEG0 + icache_size - 1) & ~(lsize - 1); - for (addr = CKSEG0; addr <= aend; addr += lsize) - cache_op(Index_Invalidate_I, addr); - - /* secondatory cache skipped */ + blast_dcache(); + blast_icache(); + blast_scache(); } void dma_flush_range(unsigned long start, unsigned long end) { blast_dcache_range(start, end); - - /* secondatory cache skipped */ + blast_scache_range(start, end); } void dma_inv_range(unsigned long start, unsigned long end) { blast_inv_dcache_range(start, end); - - /* secondatory cache skipped */ + blast_inv_scache_range(start, end); } -void r4k_cache_init(void); - static void probe_pcache(void) { struct cpuinfo_mips *c = ¤t_cpu_data; diff --git a/arch/mips/lib/cpuinfo.c b/arch/mips/lib/cpuinfo.c index fd27920f9b..41ec7b8d53 100644 --- a/arch/mips/lib/cpuinfo.c +++ b/arch/mips/lib/cpuinfo.c @@ -25,12 +25,12 @@ static int do_cpuinfo(int argc, char *argv[]) icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; - printk("Primary instruction cache %ldkB, %s, %s, linesize %d bytes.\n", + printk("Primary instruction cache %ukB, %s, %s, linesize %d bytes.\n", icache_size >> 10, c->icache.flags & MIPS_CACHE_VTAG ? "VIVT" : "VIPT", way_string[c->icache.ways], c->icache.linesz); - printk("Primary data cache %ldkB, %s, %s, %s, linesize %d bytes\n", + printk("Primary data cache %ukB, %s, %s, %s, linesize %d bytes\n", dcache_size >> 10, way_string[c->dcache.ways], (c->dcache.flags & MIPS_CACHE_PINDEX) ? "PIPT" : "VIPT", (c->dcache.flags & MIPS_CACHE_ALIASES) ? @@ -39,7 +39,7 @@ static int do_cpuinfo(int argc, char *argv[]) if (c->scache.flags & MIPS_CACHE_NOT_PRESENT) return 0; scache_size = c->scache.sets * c->scache.ways * c->scache.linesz; - printk("Secondary data cache %ldkB, %s, %s, %s, linesize %d bytes\n", + printk("Secondary data cache %ukB, %s, %s, %s, linesize %d bytes\n", scache_size >> 10, way_string[c->scache.ways], (c->scache.flags & MIPS_CACHE_PINDEX) ? "PIPT" : "VIPT", (c->scache.flags & MIPS_CACHE_ALIASES) ? diff --git a/arch/mips/lib/csrc-r4k.c b/arch/mips/lib/csrc-r4k.c index 9facf04bd3..35fba3a29c 100644 --- a/arch/mips/lib/csrc-r4k.c +++ b/arch/mips/lib/csrc-r4k.c @@ -23,6 +23,7 @@ static uint64_t c0_hpt_read(void) static struct clocksource cs = { .read = c0_hpt_read, .mask = CLOCKSOURCE_MASK(32), + .priority = 70, }; static int clocksource_init(void) diff --git a/arch/mips/lib/dma-default.c b/arch/mips/lib/dma-default.c index fbe627c24c..54e6665468 100644 --- a/arch/mips/lib/dma-default.c +++ b/arch/mips/lib/dma-default.c @@ -6,43 +6,37 @@ #include <dma.h> #include <asm/io.h> -#if defined(CONFIG_CPU_MIPS32) || \ - defined(CONFIG_CPU_MIPS64) -static inline void __dma_sync_mips(unsigned long addr, size_t size, - enum dma_data_direction direction) +void arch_sync_dma_for_cpu(void *vaddr, size_t size, + enum dma_data_direction dir) { - switch (direction) { + unsigned long start = (unsigned long)vaddr; + + switch (dir) { case DMA_TO_DEVICE: - dma_flush_range(addr, addr + size); break; - case DMA_FROM_DEVICE: - dma_inv_range(addr, addr + size); - break; - case DMA_BIDIRECTIONAL: - dma_flush_range(addr, addr + size); + dma_inv_range(start, start + size); break; - default: BUG(); } } -#else -static inline void __dma_sync_mips(void *addr, size_t size, - enum dma_data_direction direction) -{ -} -#endif -void dma_sync_single_for_cpu(dma_addr_t address, size_t size, - enum dma_data_direction dir) +void arch_sync_dma_for_device(void *vaddr, size_t size, + enum dma_data_direction dir) { - __dma_sync_mips(address, size, dir); -} + unsigned long start = (unsigned long)vaddr; -void dma_sync_single_for_device(dma_addr_t address, size_t size, - enum dma_data_direction dir) -{ - __dma_sync_mips(address, size, dir); + switch (dir) { + case DMA_FROM_DEVICE: + dma_inv_range(start, start + size); + break; + case DMA_TO_DEVICE: + case DMA_BIDIRECTIONAL: + dma_flush_range(start, start + size); + break; + default: + BUG(); + } } diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S index 5fb2223231..27dd9de67a 100644 --- a/arch/mips/lib/genex.S +++ b/arch/mips/lib/genex.S @@ -1,6 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #include <asm/asm.h> #include <asm/regdef.h> -#include <asm/mipsregs.h> #include <asm/stackframe.h> .text @@ -9,31 +10,19 @@ .set noreorder .align 5 -/* Exception vector */ -NESTED(handle_reserved, 0, sp) +NESTED(exception_vec, 0, sp) + j handle_reserved + nop +EXPORT(exception_vec_end) +END(exception_vec) + +handle_reserved: SAVE_ALL - la k0, barebox_exc_handler - jal k0 + PTR_LA k0, barebox_exc_handler + j k0 move a0, sp - /* will never return here */ - END(handle_reserved) - -/* General exception vector */ -NESTED(except_vec3_generic, 0, sp) - .set noat - mfc0 k1, CP0_CAUSE - la k0, exception_handlers - andi k1, k1, 0x7c - addu k0, k0, k1 - lw k0, (k0) - nop - jr k0 - nop - END(except_vec3_generic) - .set at FEXPORT(ret_from_exception) .set noat RESTORE_ALL_AND_RET - nop .set at diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S index cee0319dcf..5c01dbdcd3 100644 --- a/arch/mips/lib/memcpy.S +++ b/arch/mips/lib/memcpy.S @@ -20,7 +20,26 @@ #define src a1 #define len a2 -#define LOADK lw /* No exception */ +#ifdef CONFIG_64BIT + +#define LOAD(reg, addr) ld reg, addr +#define LOADL(reg, addr) ldl reg, addr +#define LOADR(reg, addr) ldr reg, addr +#define STOREL(reg, addr) sdl reg, addr +#define STORER(reg, addr) sdr reg, addr +#define STORE(reg, addr) sd reg, addr +#define ADD daddu +#define SUB dsubu +#define SRL dsrl +#define SRA dsra +#define SLL dsll +#define SLLV dsllv +#define SRLV dsrlv +#define NBYTES 8 +#define LOG_NBYTES 3 + +#else + #define LOAD(reg, addr) lw reg, addr #define LOADL(reg, addr) lwl reg, addr #define LOADR(reg, addr) lwr reg, addr @@ -37,6 +56,8 @@ #define NBYTES 4 #define LOG_NBYTES 2 +#endif /* CONFIG_64BIT */ + #define LOADB(reg, addr) lb reg, addr #define STOREB(reg, addr) sb reg, addr @@ -101,8 +122,8 @@ LEAF(memcpy) /* a0=dst a1=src a2=len */ LOAD(t2, UNIT(2)(src)) LOAD(t3, UNIT(3)(src)) SUB len, len, 8*NBYTES - LOAD(t4, UNIT(4)(src)) - LOAD(t7, UNIT(5)(src)) + LOAD(ta0, UNIT(4)(src)) + LOAD(ta3, UNIT(5)(src)) STORE(t0, UNIT(0)(dst)) STORE(t1, UNIT(1)(dst)) LOAD(t0, UNIT(6)(src)) @@ -111,8 +132,8 @@ LEAF(memcpy) /* a0=dst a1=src a2=len */ ADD dst, dst, 8*NBYTES STORE(t2, UNIT(-6)(dst)) STORE(t3, UNIT(-5)(dst)) - STORE(t4, UNIT(-4)(dst)) - STORE(t7, UNIT(-3)(dst)) + STORE(ta0, UNIT(-4)(dst)) + STORE(ta3, UNIT(-3)(dst)) STORE(t0, UNIT(-2)(dst)) STORE(t1, UNIT(-1)(dst)) bne len, rem, 1b @@ -263,6 +284,12 @@ LEAF(memcpy) /* a0=dst a1=src a2=len */ COPY_BYTE(0) COPY_BYTE(1) +#ifdef CONFIG_64BIT + COPY_BYTE(2) + COPY_BYTE(3) + COPY_BYTE(4) + COPY_BYTE(5) +#endif LOADB(t0, NBYTES-2(src)) SUB len, len, 1 jr ra diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S index 0b81bd7d8d..cd4e4ccfe8 100644 --- a/arch/mips/lib/memset.S +++ b/arch/mips/lib/memset.S @@ -34,8 +34,8 @@ */ LEAF(memset) - beqz a1, 1f move v0, a0 /* result */ + beqz a1, 1f andi a1, 0xff /* spread fillword */ LONG_SLL t1, a1, 8 diff --git a/arch/mips/lib/pbl.lds.S b/arch/mips/lib/pbl.lds.S index 75069b0c50..4cf0398f33 100644 --- a/arch/mips/lib/pbl.lds.S +++ b/arch/mips/lib/pbl.lds.S @@ -4,13 +4,13 @@ * (C) Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix */ -#include <asm-generic/barebox.lds.h> +#include <asm/barebox.lds.h> #include <asm-generic/memory_layout.h> #include <linux/sizes.h> #define BASE (TEXT_BASE - SZ_2M) -OUTPUT_ARCH("mips") +OUTPUT_ARCH(BAREBOX_OUTPUT_ARCH) SECTIONS { . = BASE; @@ -48,7 +48,8 @@ SECTIONS .piggydata : { *(.piggydata) } - __piggydata_end = . - BASE; + + .image_end : { KEEP(*(.__image_end)) } pbl_image_size = .; diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c index b084a88be7..a9078aa813 100644 --- a/arch/mips/lib/reloc.c +++ b/arch/mips/lib/reloc.c @@ -41,7 +41,7 @@ #include <asm-generic/memory_layout.h> void main_entry(void *fdt, u32 fdt_size); -void relocate_code(void *fdt, u32 fdt_size, u32 relocaddr); +void __noreturn relocate_code(void *fdt, u32 fdt_size, u32 relocaddr); /** * read_uint() - Read an unsigned integer from the buffer @@ -106,10 +106,9 @@ static void apply_reloc(unsigned int type, void *addr, long off) } } -void relocate_code(void *fdt, u32 fdt_size, u32 ram_size) +void __noreturn relocate_code(void *fdt, u32 fdt_size, u32 ram_size) { - unsigned long addr, length, bss_len; - u32 relocaddr, new_stack; + unsigned long addr, length, bss_len, relocaddr, new_stack; uint8_t *buf; unsigned int type; long off; @@ -121,9 +120,9 @@ void relocate_code(void *fdt, u32 fdt_size, u32 ram_size) length = __bss_stop - __image_start; relocaddr = ALIGN_DOWN(ram_size - length, SZ_64K); if (IS_ENABLED(CONFIG_MMU)) { - relocaddr = KSEG0ADDR(relocaddr); + relocaddr = CKSEG0ADDR(relocaddr); } else { - relocaddr = KSEG1ADDR(relocaddr); + relocaddr = CKSEG1ADDR(relocaddr); } new_stack = relocaddr - MALLOC_SIZE - 16; @@ -134,7 +133,7 @@ void relocate_code(void *fdt, u32 fdt_size, u32 ram_size) * space in the Barebox binary & complexity in handling them. */ off = relocaddr - (unsigned long)__image_start; - if (off & 0xffff) + if (!IS_ALIGNED(off, SZ_64K)) panic("Mis-aligned relocation\n"); /* Copy Barebox to RAM */ diff --git a/arch/mips/lib/sections.c b/arch/mips/lib/sections.c index 66d559f94a..46fca5ca79 100644 --- a/arch/mips/lib/sections.c +++ b/arch/mips/lib/sections.c @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0-only + #include <common.h> #include <asm/sections.h> #include <linux/types.h> diff --git a/arch/mips/lib/setjmp.S b/arch/mips/lib/setjmp.S index b09a7c5529..42a2ec15a9 100644 --- a/arch/mips/lib/setjmp.S +++ b/arch/mips/lib/setjmp.S @@ -6,34 +6,34 @@ /* int setjmp (jmp_buf); */ LEAF(setjmp) - sw ra, (0 * 4)(a0) - sw sp, (1 * 4)(a0) - sw s0, (2 * 4)(a0) - sw s1, (3 * 4)(a0) - sw s2, (4 * 4)(a0) - sw s3, (5 * 4)(a0) - sw s4, (6 * 4)(a0) - sw s5, (7 * 4)(a0) - sw s6, (8 * 4)(a0) - sw s7, (9 * 4)(a0) - sw fp, (10 * 4)(a0) + REG_S ra, (0 * SZREG)(a0) + REG_S sp, (1 * SZREG)(a0) + REG_S s0, (2 * SZREG)(a0) + REG_S s1, (3 * SZREG)(a0) + REG_S s2, (4 * SZREG)(a0) + REG_S s3, (5 * SZREG)(a0) + REG_S s4, (6 * SZREG)(a0) + REG_S s5, (7 * SZREG)(a0) + REG_S s6, (8 * SZREG)(a0) + REG_S s7, (9 * SZREG)(a0) + REG_S fp, (10 * SZREG)(a0) move v0, zero j ra END(setjmp) /* volatile void longjmp (jmp_buf, int); */ LEAF(longjmp) - lw ra, (0 * 4)(a0) - lw sp, (1 * 4)(a0) - lw s0, (2 * 4)(a0) - lw s1, (3 * 4)(a0) - lw s2, (4 * 4)(a0) - lw s3, (5 * 4)(a0) - lw s4, (6 * 4)(a0) - lw s5, (7 * 4)(a0) - lw s6, (8 * 4)(a0) - lw s7, (9 * 4)(a0) - lw fp, (10 * 4)(a0) + REG_L ra, (0 * SZREG)(a0) + REG_L sp, (1 * SZREG)(a0) + REG_L s0, (2 * SZREG)(a0) + REG_L s1, (3 * SZREG)(a0) + REG_L s2, (4 * SZREG)(a0) + REG_L s3, (5 * SZREG)(a0) + REG_L s4, (6 * SZREG)(a0) + REG_L s5, (7 * SZREG)(a0) + REG_L s6, (8 * SZREG)(a0) + REG_L s7, (9 * SZREG)(a0) + REG_L fp, (10 * SZREG)(a0) bne a1, zero, 1f li a1, 1 1: @@ -43,8 +43,8 @@ END(longjmp) /* int initjmp(jmp_buf jmp, void __noreturn (*func)(void), void *stack_top); */ LEAF(initjmp) - sw a1, (0 * 4)(a0) - sw a2, (1 * 4)(a0) + REG_S a1, (0 * SZREG)(a0) + REG_S a2, (1 * SZREG)(a0) move v0, zero j ra END(initjmp) diff --git a/arch/mips/lib/shutdown.c b/arch/mips/lib/shutdown.c index 973cd23c71..9f993ab7a9 100644 --- a/arch/mips/lib/shutdown.c +++ b/arch/mips/lib/shutdown.c @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0-only + /** * This function is called by shutdown_barebox to get a clean * memory/cache state. diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c index 5fc32fe7e4..638a511fee 100644 --- a/arch/mips/lib/traps.c +++ b/arch/mips/lib/traps.c @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0-only + #include <common.h> #include <abort.h> #include <asm/mipsregs.h> @@ -151,7 +153,8 @@ static void show_regs(const struct pt_regs *regs) printf("Status: %08x\n", (uint32_t)regs->cp0_status); printf("Cause : %08x\n", (uint32_t)regs->cp0_cause); - printf("Config: %08x\n\n", read_c0_config()); + printf("Config: %08x\n", read_c0_config()); + printf("BadVA : %0*lx\n\n", field, regs->cp0_badvaddr); } void barebox_exc_handler(struct pt_regs *regs) @@ -171,7 +174,7 @@ void barebox_exc_handler(struct pt_regs *regs) "move\t$29, %0\n\t" "j\tret_from_exception" :/* no outputs */ - :"r" (®s)); + :"r" (regs)); /* Unreached */ diff --git a/arch/mips/mach-ar231x/Kconfig b/arch/mips/mach-ar231x/Kconfig index f920f300bd..f3e17000a7 100644 --- a/arch/mips/mach-ar231x/Kconfig +++ b/arch/mips/mach-ar231x/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + if MACH_MIPS_AR231X choice diff --git a/arch/mips/mach-ar231x/Makefile b/arch/mips/mach-ar231x/Makefile index eba8e818b5..65e32c7bc3 100644 --- a/arch/mips/mach-ar231x/Makefile +++ b/arch/mips/mach-ar231x/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + obj-y += ar231x.o obj-y += board.o obj-y += ar231x_reset.o diff --git a/arch/mips/mach-ar231x/ar231x_reset.c b/arch/mips/mach-ar231x/ar231x_reset.c index 91414edd26..7479f3ce4a 100644 --- a/arch/mips/mach-ar231x/ar231x_reset.c +++ b/arch/mips/mach-ar231x/ar231x_reset.c @@ -48,7 +48,7 @@ void ar231x_reset_bit(u32 val, enum reset_state state) } EXPORT_SYMBOL(ar231x_reset_bit); -static int ar231x_reset_probe(struct device_d *dev) +static int ar231x_reset_probe(struct device *dev) { struct resource *iores; iores = dev_request_mem_resource(dev, 0); @@ -61,7 +61,7 @@ static int ar231x_reset_probe(struct device_d *dev) return 0; } -static struct driver_d ar231x_reset_driver = { +static struct driver ar231x_reset_driver = { .probe = ar231x_reset_probe, .name = "ar231x_reset", }; diff --git a/arch/mips/mach-ar231x/include/mach/pbl_macros.h b/arch/mips/mach-ar231x/include/mach/pbl_macros.h index cb72dbe466..b93760a81b 100644 --- a/arch/mips/mach-ar231x/include/mach/pbl_macros.h +++ b/arch/mips/mach-ar231x/include/mach/pbl_macros.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_MACH_AR2312_PBL_MACROS_H #define __ASM_MACH_AR2312_PBL_MACROS_H diff --git a/arch/mips/mach-ath79/Kconfig b/arch/mips/mach-ath79/Kconfig index 2dfe0e587a..7564050489 100644 --- a/arch/mips/mach-ath79/Kconfig +++ b/arch/mips/mach-ath79/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + if MACH_MIPS_ATH79 config SOC_QCA_AR9331 diff --git a/arch/mips/mach-ath79/Makefile b/arch/mips/mach-ath79/Makefile index 396df66bf1..9f3a34b3eb 100644 --- a/arch/mips/mach-ath79/Makefile +++ b/arch/mips/mach-ath79/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + lwl-y += lowlevel_ar9331_spi_trap.o lwl-y += lowlevel_ar9331_sram.o diff --git a/arch/mips/mach-ath79/art.c b/arch/mips/mach-ath79/art.c index d119ca6d1a..bdc14bee51 100644 --- a/arch/mips/mach-ath79/art.c +++ b/arch/mips/mach-ath79/art.c @@ -18,9 +18,9 @@ struct ar9300_eeprom { u8 mac_addr[6]; }; -static int art_set_mac(struct device_d *dev, struct ar9300_eeprom *eeprom) +static int art_set_mac(struct device *dev, struct ar9300_eeprom *eeprom) { - struct device_node *node = dev->device_node; + struct device_node *node = dev->of_node; struct device_node *rnode; if (!node) @@ -36,15 +36,14 @@ static int art_set_mac(struct device_d *dev, struct ar9300_eeprom *eeprom) return 0; } -static int art_read_mac(struct device_d *dev, const char *file) +static int art_read_mac(struct device *dev, const char *file) { int fd, rbytes; struct ar9300_eeprom eeprom; fd = open_and_lseek(file, O_RDONLY, AR93000_EPPROM_OFFSET); if (fd < 0) { - dev_err(dev, "Failed to open eeprom path %s %d\n", - file, -errno); + dev_err(dev, "Failed to open eeprom path \"%s\": %m\n", file); return -errno; } @@ -73,14 +72,14 @@ static int art_read_mac(struct device_d *dev, const char *file) return art_set_mac(dev, &eeprom); } -static int art_probe(struct device_d *dev) +static int art_probe(struct device *dev) { char *path; int ret; dev_dbg(dev, "found ART partition\n"); - ret = of_find_path(dev->device_node, "device-path", &path, 0); + ret = of_find_path(dev->of_node, "device-path", &path, 0); if (ret) { dev_err(dev, "can't find path\n"); return ret; @@ -96,8 +95,9 @@ static struct of_device_id art_dt_ids[] = { /* sentinel */ } }; +MODULE_DEVICE_TABLE(of, art_dt_ids); -static struct driver_d art_driver = { +static struct driver art_driver = { .name = "qca-art", .probe = art_probe, .of_compatible = art_dt_ids, diff --git a/arch/mips/mach-ath79/include/mach/pbl_ll_init_ar9344_1.1.h b/arch/mips/mach-ath79/include/mach/pbl_ll_init_ar9344_1.1.h index 594ec11553..08a3256a79 100644 --- a/arch/mips/mach-ath79/include/mach/pbl_ll_init_ar9344_1.1.h +++ b/arch/mips/mach-ath79/include/mach/pbl_ll_init_ar9344_1.1.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_MACH_ATH79_PBL_LL_INIT_AR9344_1_1_H #define __ASM_MACH_ATH79_PBL_LL_INIT_AR9344_1_1_H diff --git a/arch/mips/mach-ath79/include/mach/pbl_ll_init_qca4531.h b/arch/mips/mach-ath79/include/mach/pbl_ll_init_qca4531.h index 002778b3ec..18bf26b8ac 100644 --- a/arch/mips/mach-ath79/include/mach/pbl_ll_init_qca4531.h +++ b/arch/mips/mach-ath79/include/mach/pbl_ll_init_qca4531.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_MACH_ATH79_PBL_LL_INIT_QCA4531_H #define __ASM_MACH_ATH79_PBL_LL_INIT_QCA4531_H diff --git a/arch/mips/mach-ath79/include/mach/pbl_macros.h b/arch/mips/mach-ath79/include/mach/pbl_macros.h index c5f3d4150e..4b7b48618b 100644 --- a/arch/mips/mach-ath79/include/mach/pbl_macros.h +++ b/arch/mips/mach-ath79/include/mach/pbl_macros.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_MACH_ATH79_PBL_MACROS_H #define __ASM_MACH_ATH79_PBL_MACROS_H @@ -372,7 +374,7 @@ normal_path: .set push .set noreorder - mips_barebox_10h + mips_cpu_setup pbl_blt 0xbf000000 skip_pll_ram_config t8 @@ -404,7 +406,7 @@ skip_pll_ram_config: .set push .set noreorder - mips_barebox_10h + mips_cpu_setup hornet_mips24k_cp0_setup diff --git a/arch/mips/mach-bcm47xx/Kconfig b/arch/mips/mach-bcm47xx/Kconfig index c4791901af..606d9e6000 100644 --- a/arch/mips/mach-bcm47xx/Kconfig +++ b/arch/mips/mach-bcm47xx/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + if MACH_MIPS_BCM47XX choice diff --git a/arch/mips/mach-bcm47xx/Makefile b/arch/mips/mach-bcm47xx/Makefile index f3cc6684b8..d19b1f2950 100644 --- a/arch/mips/mach-bcm47xx/Makefile +++ b/arch/mips/mach-bcm47xx/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + obj-y += reset.o diff --git a/arch/mips/mach-loongson/Kconfig b/arch/mips/mach-loongson/Kconfig index ab7ccd0cb5..38d05e415b 100644 --- a/arch/mips/mach-loongson/Kconfig +++ b/arch/mips/mach-loongson/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + if MACH_MIPS_LOONGSON choice diff --git a/arch/mips/mach-loongson/Makefile b/arch/mips/mach-loongson/Makefile index 52b36f3cf9..451c572e76 100644 --- a/arch/mips/mach-loongson/Makefile +++ b/arch/mips/mach-loongson/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + obj-y += loongson1_reset.o diff --git a/arch/mips/mach-loongson/include/mach/pbl_macros.h b/arch/mips/mach-loongson/include/mach/pbl_macros.h index 93402d1c54..8e9b231c45 100644 --- a/arch/mips/mach-loongson/include/mach/pbl_macros.h +++ b/arch/mips/mach-loongson/include/mach/pbl_macros.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_MACH_LOONGSON1_PBL_MACROS_H #define __ASM_MACH_LOONGSON1_PBL_MACROS_H diff --git a/arch/mips/mach-loongson/loongson1_reset.c b/arch/mips/mach-loongson/loongson1_reset.c index 85752f4ab8..9b4da217f8 100644 --- a/arch/mips/mach-loongson/loongson1_reset.c +++ b/arch/mips/mach-loongson/loongson1_reset.c @@ -11,9 +11,13 @@ static void __noreturn longhorn_restart_soc(struct restart_handler *rst) { - __raw_writel(0x1, WDT_EN); - __raw_writel(0x1, WDT_SET); - __raw_writel(0x1, WDT_TIMER); + void __iomem *wdt = IOMEM(0); + + OPTIMIZER_HIDE_VAR(wdt); + + __raw_writel(0x1, wdt + WDT_EN); + __raw_writel(0x1, wdt + WDT_SET); + __raw_writel(0x1, wdt + WDT_TIMER); hang(); } diff --git a/arch/mips/mach-malta/Kconfig b/arch/mips/mach-malta/Kconfig index 4671075140..cf061f6670 100644 --- a/arch/mips/mach-malta/Kconfig +++ b/arch/mips/mach-malta/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + if MACH_MIPS_MALTA config BOARD_QEMU_MALTA diff --git a/arch/mips/mach-malta/Makefile b/arch/mips/mach-malta/Makefile index 7d56f215b0..d937083bbb 100644 --- a/arch/mips/mach-malta/Makefile +++ b/arch/mips/mach-malta/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + obj-$(CONFIG_PCI) += pci.o diff --git a/arch/mips/include/asm/gt64120.h b/arch/mips/mach-malta/include/mach/gt64120.h index 34d2382593..f8a257acb7 100644 --- a/arch/mips/include/asm/gt64120.h +++ b/arch/mips/mach-malta/include/mach/gt64120.h @@ -6,12 +6,15 @@ * Maciej W. Rozycki <macro@mips.com> * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) */ -#ifndef _ASM_GT64120_H -#define _ASM_GT64120_H -#define MSK(n) ((1 << (n)) - 1) +#ifndef _MALTA_GT64120_H +#define _MALTA_GT64120_H -#define GT_DEF_BASE 0x14000000 +#define GT_DEF_BASE 0x14000000 +#define MIPS_GT_BASE 0x1be00000 +#define GT64120_BASE CKSEG1ADDR(MIPS_GT_BASE) + +#define MSK(n) ((1 << (n)) - 1) /* * Register offset addresses @@ -85,4 +88,4 @@ #define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs)) #define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data)) -#endif /* _ASM_GT64120_H */ +#endif /* _MALTA_GT64120_H */ diff --git a/arch/mips/mach-malta/include/mach/mach-gt64120.h b/arch/mips/mach-malta/include/mach/mach-gt64120.h deleted file mode 100644 index 8f20fcf26f..0000000000 --- a/arch/mips/mach-malta/include/mach/mach-gt64120.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * This is a direct copy of the ev96100.h file, with a global - * search and replace. The numbers are the same. - * - * The reason I'm duplicating this is so that the 64120/96100 - * defines won't be confusing in the source code. - */ -#ifndef _ASM_MACH_MIPS_MACH_GT64120_DEP_H -#define _ASM_MACH_MIPS_MACH_GT64120_DEP_H - -#define MIPS_GT_BASE 0x1be00000 - -#define GT64120_BASE 0xbbe00000 - -#endif /* _ASM_MACH_MIPS_MACH_GT64120_DEP_H */ diff --git a/arch/mips/mach-malta/pci.c b/arch/mips/mach-malta/pci.c index 4561123d22..c9c1c7790b 100644 --- a/arch/mips/mach-malta/pci.c +++ b/arch/mips/mach-malta/pci.c @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0-only + #include <common.h> #include <types.h> #include <driver.h> @@ -5,11 +7,9 @@ #include <mach/hardware.h> #include <asm/io.h> #include <asm/addrspace.h> - #include <linux/pci.h> -#include <asm/gt64120.h> -#include <mach/mach-gt64120.h> +#include <mach/gt64120.h> #define PCI_ACCESS_READ 0 #define PCI_ACCESS_WRITE 1 @@ -134,7 +134,7 @@ static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn, static resource_size_t gt64xxx_res_start(struct pci_bus *bus, resource_size_t res_addr) { - return KSEG0ADDR(res_addr); + return CKSEG0ADDR(res_addr); } struct pci_ops gt64xxx_pci0_ops = { diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig index ae8093d1a3..954e295fd1 100644 --- a/arch/mips/mach-xburst/Kconfig +++ b/arch/mips/mach-xburst/Kconfig @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + if MACH_MIPS_XBURST config CPU_JZ4755 diff --git a/arch/mips/mach-xburst/Makefile b/arch/mips/mach-xburst/Makefile index e5634ba9cc..0d2bb542c7 100644 --- a/arch/mips/mach-xburst/Makefile +++ b/arch/mips/mach-xburst/Makefile @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + obj-$(CONFIG_CPU_JZ4755) += csrc-jz4750.o reset-jz4750.o diff --git a/arch/mips/mach-xburst/csrc-jz4750.c b/arch/mips/mach-xburst/csrc-jz4750.c index 302709e597..43135ac498 100644 --- a/arch/mips/mach-xburst/csrc-jz4750.c +++ b/arch/mips/mach-xburst/csrc-jz4750.c @@ -23,6 +23,7 @@ static uint64_t jz4750_cs_read(void) static struct clocksource jz4750_cs = { .read = jz4750_cs_read, .mask = CLOCKSOURCE_MASK(32), + .priority = 80, }; static int clocksource_init(void) diff --git a/arch/mips/mach-xburst/include/mach/devices.h b/arch/mips/mach-xburst/include/mach/devices.h index 931749d424..ea567a3161 100644 --- a/arch/mips/mach-xburst/include/mach/devices.h +++ b/arch/mips/mach-xburst/include/mach/devices.h @@ -1,8 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __MACH_XBURST_DEVICES_H #define __MACH_XBURST_DEVICES_H #include <driver.h> -struct device_d *jz_add_uart(int id, unsigned long base, unsigned int clock); +struct device *jz_add_uart(int id, unsigned long base, unsigned int clock); #endif /* __MACH_XBURST_DEVICES_H */ diff --git a/arch/mips/pbl/.gitignore b/arch/mips/pbl/.gitignore index be604a81bf..667b44eaf3 100644 --- a/arch/mips/pbl/.gitignore +++ b/arch/mips/pbl/.gitignore @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + piggy.gzip piggy.lzo piggy.lz4 diff --git a/arch/mips/pbl/Makefile b/arch/mips/pbl/Makefile index f85c7a6d6d..38dfbd4724 100644 --- a/arch/mips/pbl/Makefile +++ b/arch/mips/pbl/Makefile @@ -1,3 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip suffix_$(CONFIG_IMAGE_COMPRESSION_LZO) = lzo diff --git a/arch/mips/pbl/piggy.gzip.S b/arch/mips/pbl/piggy.gzip.S index 1e6bbef66c..b99ba8aeab 100644 --- a/arch/mips/pbl/piggy.gzip.S +++ b/arch/mips/pbl/piggy.gzip.S @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #include <asm/asm.h> .section .data diff --git a/arch/mips/pbl/piggy.lz4.S b/arch/mips/pbl/piggy.lz4.S index be9425bf00..c3ddbdace0 100644 --- a/arch/mips/pbl/piggy.lz4.S +++ b/arch/mips/pbl/piggy.lz4.S @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #include <asm/asm.h> .section .data diff --git a/arch/mips/pbl/piggy.lzo.S b/arch/mips/pbl/piggy.lzo.S index 6f1af1f314..2c1f4cb34e 100644 --- a/arch/mips/pbl/piggy.lzo.S +++ b/arch/mips/pbl/piggy.lzo.S @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #include <asm/asm.h> .section .data diff --git a/arch/mips/pbl/piggy.shipped.S b/arch/mips/pbl/piggy.shipped.S index 8a35f6bc05..fc2859e673 100644 --- a/arch/mips/pbl/piggy.shipped.S +++ b/arch/mips/pbl/piggy.shipped.S @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #include <asm/asm.h> .section .data diff --git a/arch/mips/pbl/piggy.xzkern.S b/arch/mips/pbl/piggy.xzkern.S index edfa53b86c..8c99d959f8 100644 --- a/arch/mips/pbl/piggy.xzkern.S +++ b/arch/mips/pbl/piggy.xzkern.S @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #include <asm/asm.h> .section .data diff --git a/arch/mips/pbl/zbarebox.lds.S b/arch/mips/pbl/zbarebox.lds.S index 04b5b8680f..e3114dfe22 100644 --- a/arch/mips/pbl/zbarebox.lds.S +++ b/arch/mips/pbl/zbarebox.lds.S @@ -3,10 +3,10 @@ * (C) Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix */ -#include <asm-generic/barebox.lds.h> +#include <asm/barebox.lds.h> #include <asm-generic/memory_layout.h> -OUTPUT_ARCH("mips") +OUTPUT_ARCH(BAREBOX_OUTPUT_ARCH) ENTRY(pbl_start) SECTIONS { |