diff options
Diffstat (limited to 'arch/riscv/Kconfig.socs')
| -rw-r--r-- | arch/riscv/Kconfig.socs | 28 |
1 files changed, 23 insertions, 5 deletions
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 828b65a0c1..cef9cd5230 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -5,7 +5,7 @@ menu "SoC selection" config SOC_ERIZO bool "Erizo SoC" depends on ARCH_RV32I - select HAS_ASM_DEBUG_LL + select HAS_DEBUG_LL select HAS_NMON select USE_COMPRESSED_DTB select RISCV_M_MODE @@ -20,7 +20,7 @@ config SOC_VIRT select RISCV_S_MODE select BOARD_RISCV_GENERIC_DT select HAS_CACHE - select HAS_ASM_DEBUG_LL + select HAS_DEBUG_LL help Generates an image tht can be be booted by QEMU. The image is called barebox-dt-2nd.img @@ -38,6 +38,7 @@ config BOARD_RISCV_VIRT config BOARD_RISCVEMU depends on SOC_VIRT bool "TinyEMU Virt Machine (riscvemu)" + select OF_OVERLAY default y help TinyEMU's Virt machine differs from QEMU in poweroff and restart @@ -55,7 +56,7 @@ config SOC_SIFIVE select CLK_SIFIVE_PRCI select RISCV_TIMER select HAS_MACB - select HAS_ASM_DEBUG_LL + select HAS_DEBUG_LL help This enables support for SiFive SoC platform hardware. @@ -72,7 +73,7 @@ config SOC_STARFIVE bool "StarFive SoCs" select ARCH_HAS_RESET_CONTROLLER select RISCV_S_MODE - select HAS_ASM_DEBUG_LL + select HAS_DEBUG_LL select HAS_NMON help This enables support for SiFive SoC platform hardware. @@ -87,6 +88,7 @@ config SOC_STARFIVE_JH7100 bool select SOC_STARFIVE_JH71XX select SIFIVE_L2 + select OF_DMA_COHERENCY help Unlike JH7110 and later, CPU on the JH7100 are not cache-coherent with respect to DMA masters like GMAC and DW MMC controller. @@ -110,6 +112,22 @@ config BOARD_BEAGLEV_BETA endif +config SOC_ALLWINNER_SUN20I + bool "Allwinner Sun20i SoCs" + depends on ARCH_RV64I + select HAS_DEBUG_LL + select HAS_CACHE + +if SOC_ALLWINNER_SUN20I + +config BOARD_ALLWINNER_D1 + bool "Allwinner D1 Nezha" + select RISCV_S_MODE + select RISCV_M_MODE + def_bool y + +endif + comment "CPU features" config SIFIVE_L2 @@ -119,7 +137,7 @@ config SIFIVE_L2 config SOC_LITEX bool "LiteX SoCs" depends on ARCH_RV32I - select HAS_ASM_DEBUG_LL + select HAS_DEBUG_LL select HAS_NMON select USE_COMPRESSED_DTB select RISCV_TIMER |