summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/cpu.c2
-rw-r--r--arch/arm/cpu/start.c3
-rw-r--r--arch/arm/include/asm/barebox-arm.h1
-rw-r--r--arch/arm/mach-omap/omap3_core.S2
4 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 2b36a793dc..133d144e8c 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -72,8 +72,6 @@ int icache_status(void)
*/
void arch_shutdown(void)
{
- int i;
-
#ifdef CONFIG_MMU
/* nearly the same as below, but this could also disable
* second level cache.
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index eea7dcfa3c..53d7ac199f 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -56,6 +56,9 @@ void __naked __bare_init reset(void)
r |= 0xd3;
__asm__ __volatile__("msr cpsr, %0" : : "r"(r));
+#ifdef CONFIG_ARCH_HAS_LOWLEVEL_INIT
+ arch_init_lowlevel();
+#endif
__asm__ __volatile__ (
"bl __mmu_cache_flush;"
:
diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h
index 54561c3cd6..5f0bb73413 100644
--- a/arch/arm/include/asm/barebox-arm.h
+++ b/arch/arm/include/asm/barebox-arm.h
@@ -38,5 +38,6 @@ int dram_init (void);
void board_init_lowlevel(void);
void board_init_lowlevel_return(void);
+void arch_init_lowlevel(void);
#endif /* _BAREBOX_ARM_H_ */
diff --git a/arch/arm/mach-omap/omap3_core.S b/arch/arm/mach-omap/omap3_core.S
index 7337d4c545..d904231171 100644
--- a/arch/arm/mach-omap/omap3_core.S
+++ b/arch/arm/mach-omap/omap3_core.S
@@ -92,7 +92,7 @@ next:
arch_start:
.word arch_init_lowlevel
barebox_start:
- .word _start
+ .word exception_vectors
SRAM_INTVECT:
.word OMAP_SRAM_INTVECT