diff options
Diffstat (limited to 'arch')
55 files changed, 493 insertions, 763 deletions
diff --git a/arch/arm/boards/at91sam9m10g45ek/init.c b/arch/arm/boards/at91sam9m10g45ek/init.c index f32215deef..d9a2f1f28f 100644 --- a/arch/arm/boards/at91sam9m10g45ek/init.c +++ b/arch/arm/boards/at91sam9m10g45ek/init.c @@ -38,6 +38,7 @@ #include <mach/at91sam9_smc.h> #include <gpio_keys.h> #include <readkey.h> +#include <spi/spi.h> /* * board revision encoding @@ -125,6 +126,22 @@ static void ek_add_device_mci(void) static void ek_add_device_mci(void) {} #endif +static const struct spi_board_info ek_spi_devices[] = { + { + .name = "mtd_dataflash", + .chip_select = 0, + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + } +}; + +static void ek_add_device_spi(void) +{ + spi_register_board_info(ek_spi_devices, + ARRAY_SIZE(ek_spi_devices)); + at91_add_device_spi(0, NULL); +} + #ifdef CONFIG_LED_GPIO struct gpio_led ek_leds[] = { { @@ -281,6 +298,7 @@ static void ek_add_device_lcdc(void) {} static int at91sam9m10g45ek_devices_init(void) { ek_add_device_nand(); + ek_add_device_spi(); at91_add_device_eth(0, &macb_pdata); ek_add_device_mci(); ek_add_device_usb(); diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c index a9737d9f93..28959ff9ab 100644 --- a/arch/arm/boards/beaglebone/lowlevel.c +++ b/arch/arm/boards/beaglebone/lowlevel.c @@ -55,7 +55,7 @@ static void beaglebone_data_macro_config(int dataMacroNum) { - u32 BaseAddrOffset = 0x00;; + u32 BaseAddrOffset = 0x00; if (dataMacroNum == 1) BaseAddrOffset = 0xA4; diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c index a14c9bc876..df565d97d5 100644 --- a/arch/arm/boards/ccxmx51/ccxmx51.c +++ b/arch/arm/boards/ccxmx51/ccxmx51.c @@ -196,7 +196,8 @@ static const struct spi_board_info ccxmx51_spi_board_info[] = { }; static struct imxusb_platformdata ccxmx51_otg_pdata = { - .flags = MXC_EHCI_MODE_UTMI_16_BIT | MXC_EHCI_POWER_PINS_ENABLED, + .flags = MXC_EHCI_MODE_UTMI_16_BIT | MXC_EHCI_INTERNAL_PHY | + MXC_EHCI_POWER_PINS_ENABLED, .mode = IMX_USB_MODE_HOST, }; diff --git a/arch/arm/boards/ccxmx51/ccxmx51js.c b/arch/arm/boards/ccxmx51/ccxmx51js.c index 8c1d2dcd63..ae31cafedf 100644 --- a/arch/arm/boards/ccxmx51/ccxmx51js.c +++ b/arch/arm/boards/ccxmx51/ccxmx51js.c @@ -20,6 +20,8 @@ #include <init.h> #include <mci.h> #include <asm/armlinux.h> +#include <mach/gpio.h> +#include <mach/generic.h> #include <mach/imx51-regs.h> #include <mach/iomux-mx51.h> #include <mach/devices-imx51.h> @@ -27,6 +29,8 @@ #include "ccxmx51.h" +#define CCXMX51JS_USBHOST1_RESET IMX_GPIO_NR(3, 8) + static iomux_v3_cfg_t ccxmx51js_pads[] = { /* SD1 */ MX51_PAD_SD1_CLK__SD1_CLK, @@ -74,6 +78,11 @@ static struct esdhc_platform_data sdhc3_pdata = { .caps = MMC_MODE_4BIT | MMC_MODE_8BIT, }; +static struct imxusb_platformdata ccxmx51js_usbhost1_pdata = { + .flags = MXC_EHCI_MODE_ULPI | MXC_EHCI_ITC_NO_THRESHOLD, + .mode = IMX_USB_MODE_HOST, +}; + static int ccxmx51js_init(void) { mxc_iomux_v3_setup_multiple_pads(ccxmx51js_pads, ARRAY_SIZE(ccxmx51js_pads)); @@ -83,6 +92,12 @@ static int ccxmx51js_init(void) imx51_add_mmc2(&sdhc3_pdata); } + gpio_direction_output(CCXMX51JS_USBHOST1_RESET, 0); + mdelay(10); + gpio_set_value(CCXMX51JS_USBHOST1_RESET, 1); + mdelay(10); + imx51_add_usbh1(&ccxmx51js_usbhost1_pdata); + armlinux_set_architecture(ccxmx51_id->wless ? MACH_TYPE_CCWMX51JS : MACH_TYPE_CCMX51JS); return 0; diff --git a/arch/arm/boards/chumby_falconwing/falconwing.c b/arch/arm/boards/chumby_falconwing/falconwing.c index fd5bc4c07e..720fe325d4 100644 --- a/arch/arm/boards/chumby_falconwing/falconwing.c +++ b/arch/arm/boards/chumby_falconwing/falconwing.c @@ -293,7 +293,7 @@ static int falconwing_devices_init(void) imx_set_ioclk(480000000); /* enable IOCLK to run at the PLL frequency */ /* run the SSP unit clock at 100,000 kHz */ imx_set_sspclk(0, 100000000, 1); - add_generic_device("mxs_mci", 0, NULL, IMX_SSP1_BASE, 0, + add_generic_device("mxs_mci", 0, NULL, IMX_SSP1_BASE, 0x2000, IORESOURCE_MEM, &mci_pdata); add_generic_device("stmfb", 0, NULL, IMX_FB_BASE, 4096, IORESOURCE_MEM, &fb_mode); diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c index 5e77f90322..523a805dcb 100644 --- a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c +++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c @@ -55,23 +55,23 @@ static iomux_v3_cfg_t eukrea_cpuimx51_pads[] = { MX51_PAD_UART1_RTS__UART1_RTS, MX51_PAD_UART1_CTS__UART1_CTS, /* FEC */ - MX51_PAD_DISP2_DAT1__FEC_RX_ER, + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT1__FEC_RX_ER, MX51_PAD_CTRL_5), MX51_PAD_DISP2_DAT15__FEC_TDATA0, MX51_PAD_DISP2_DAT6__FEC_TDATA1, MX51_PAD_DISP2_DAT7__FEC_TDATA2, MX51_PAD_DISP2_DAT8__FEC_TDATA3, MX51_PAD_DISP2_DAT9__FEC_TX_EN, - MX51_PAD_DISP2_DAT10__FEC_COL, - MX51_PAD_DISP2_DAT11__FEC_RX_CLK, - MX51_PAD_DISP2_DAT12__FEC_RX_DV, + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT10__FEC_COL, MX51_PAD_CTRL_5), + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT11__FEC_RX_CLK, MX51_PAD_CTRL_5), + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT12__FEC_RX_DV, MX51_PAD_CTRL_5), MX51_PAD_DISP2_DAT13__FEC_TX_CLK, MX51_PAD_DI2_PIN4__FEC_CRS, MX51_PAD_DI2_PIN2__FEC_MDC, - MX51_PAD_DI2_PIN3__FEC_MDIO, + NEW_PAD_CTRL(MX51_PAD_DI2_PIN3__FEC_MDIO, MX51_PAD_CTRL_5), MX51_PAD_DISP2_DAT14__FEC_RDATA0, MX51_PAD_DI2_DISP_CLK__FEC_RDATA1, - MX51_PAD_DI_GP4__FEC_RDATA2, - MX51_PAD_DISP2_DAT0__FEC_RDATA3, + NEW_PAD_CTRL(MX51_PAD_DI_GP4__FEC_RDATA2, MX51_PAD_CTRL_5), + NEW_PAD_CTRL(MX51_PAD_DISP2_DAT0__FEC_RDATA3, MX51_PAD_CTRL_5), MX51_PAD_DI_GP3__FEC_TX_ER, MX51_PAD_EIM_DTACK__GPIO2_31, /* LAN8700 reset pin */ /* NAND */ diff --git a/arch/arm/boards/highbank/env/boot.d/010-ahci-boot b/arch/arm/boards/highbank/env/boot.d/010-ahci-boot new file mode 120000 index 0000000000..3672f0495e --- /dev/null +++ b/arch/arm/boards/highbank/env/boot.d/010-ahci-boot @@ -0,0 +1 @@ +../boot/ahci-boot
\ No newline at end of file diff --git a/arch/arm/boards/highbank/env/boot.d/011-ahci b/arch/arm/boards/highbank/env/boot.d/011-ahci new file mode 120000 index 0000000000..36b3b2815b --- /dev/null +++ b/arch/arm/boards/highbank/env/boot.d/011-ahci @@ -0,0 +1 @@ +../boot/ahci
\ No newline at end of file diff --git a/arch/arm/boards/highbank/env/boot.d/020-mmc-boot b/arch/arm/boards/highbank/env/boot.d/020-mmc-boot new file mode 120000 index 0000000000..85c19bbd66 --- /dev/null +++ b/arch/arm/boards/highbank/env/boot.d/020-mmc-boot @@ -0,0 +1 @@ +../boot/mmc-boot
\ No newline at end of file diff --git a/arch/arm/boards/highbank/env/boot.d/021-mmc b/arch/arm/boards/highbank/env/boot.d/021-mmc new file mode 120000 index 0000000000..5af95d0ac7 --- /dev/null +++ b/arch/arm/boards/highbank/env/boot.d/021-mmc @@ -0,0 +1 @@ +../boot/mmc
\ No newline at end of file diff --git a/arch/arm/boards/highbank/env/boot.d/030-net b/arch/arm/boards/highbank/env/boot.d/030-net new file mode 120000 index 0000000000..70b8ea3965 --- /dev/null +++ b/arch/arm/boards/highbank/env/boot.d/030-net @@ -0,0 +1 @@ +../boot/net
\ No newline at end of file diff --git a/arch/arm/boards/highbank/env/boot.d/031-net-eth1 b/arch/arm/boards/highbank/env/boot.d/031-net-eth1 new file mode 120000 index 0000000000..5a30a308c7 --- /dev/null +++ b/arch/arm/boards/highbank/env/boot.d/031-net-eth1 @@ -0,0 +1 @@ +../boot/net-eth1
\ No newline at end of file diff --git a/arch/arm/boards/highbank/env/boot/ahci b/arch/arm/boards/highbank/env/boot/ahci new file mode 100644 index 0000000000..3bdb809932 --- /dev/null +++ b/arch/arm/boards/highbank/env/boot/ahci @@ -0,0 +1,21 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "AHCI" + exit +fi + +path="/mnt/ahci" + +global.bootm.image="${path}/zImage" + +. /env/data/oftree + +oftree=${path}/oftree +if [ -f $oftree ]; then + global.bootm.oftree="$oftree" +fi + +# The rootdevice may actually be mmcblk1p2 if a card +# is inserted to the back MMC slot +global.linux.bootargs.dyn.root="root=/dev/sda2" diff --git a/arch/arm/boards/highbank/env/boot/ahci-boot b/arch/arm/boards/highbank/env/boot/ahci-boot new file mode 100644 index 0000000000..0064a46fcc --- /dev/null +++ b/arch/arm/boards/highbank/env/boot/ahci-boot @@ -0,0 +1,21 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "AHCI (UEFI boot partiton)" + exit +fi + +path="/mnt/ahci-boot" + +global.bootm.image="${path}/zImage" + +. /env/data/oftree + +oftree=${path}/oftree +if [ -f $oftree ]; then + global.bootm.oftree="$oftree" +fi + +# The rootdevice may actually be mmcblk1p2 if a card +# is inserted to the back MMC slot +global.linux.bootargs.dyn.root="root=/dev/sda2" diff --git a/arch/arm/boards/highbank/env/boot/mmc b/arch/arm/boards/highbank/env/boot/mmc new file mode 100644 index 0000000000..43a04b5d6b --- /dev/null +++ b/arch/arm/boards/highbank/env/boot/mmc @@ -0,0 +1,21 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "MMC slot" + exit +fi + +path="/mnt/mmc" + +global.bootm.image="${path}/zimage" + +. /env/data/oftree + +oftree=${path}/oftree +if [ -f $oftree ]; then + global.bootm.oftree="$oftree" +fi + +# The rootdevice may actually be mmcblk1p2 if a card +# is inserted to the back MMC slot +global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2" diff --git a/arch/arm/boards/highbank/env/boot/mmc-boot b/arch/arm/boards/highbank/env/boot/mmc-boot new file mode 100644 index 0000000000..93cd99b684 --- /dev/null +++ b/arch/arm/boards/highbank/env/boot/mmc-boot @@ -0,0 +1,21 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "MMC slot (UEFI boot partiton)" + exit +fi + +path="/mnt/mmc-boot" + +global.bootm.image="${path}/zimage" + +. /env/data/oftree + +oftree=${path}/oftree +if [ -f $oftree ]; then + global.bootm.oftree="$oftree" +fi + +# The rootdevice may actually be mmcblk1p2 if a card +# is inserted to the back MMC slot +global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2" diff --git a/arch/arm/boards/highbank/env/boot/net b/arch/arm/boards/highbank/env/boot/net new file mode 100644 index 0000000000..80862cdac1 --- /dev/null +++ b/arch/arm/boards/highbank/env/boot/net @@ -0,0 +1,18 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "network (tftp, nfs) (eth0)" + exit +fi + +ethact eth0 + +path="/mnt/tftp" + +. /env/data/oftree + +global.bootm.image="${path}/${global.user}-linux-${global.hostname}" +#global.bootm.oftree="${path}/${global.user}-oftree-${global.hostname}" +nfsroot="/home/${global.user}/nfsroot/${global.hostname}" +bootargs-ip +global.linux.bootargs.dyn.root="root=/dev/nfs nfsroot=$nfsroot,v3,tcp" diff --git a/arch/arm/boards/highbank/env/boot/net-eth1 b/arch/arm/boards/highbank/env/boot/net-eth1 new file mode 100644 index 0000000000..d9e9804a02 --- /dev/null +++ b/arch/arm/boards/highbank/env/boot/net-eth1 @@ -0,0 +1,18 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "network (tftp, nfs) (eth1)" + exit +fi + +ethact eth1 + +path="/mnt/tftp" + +. /env/data/oftree + +global.bootm.image="${path}/${global.user}-linux-${global.hostname}" +#global.bootm.oftree="${path}/${global.user}-oftree-${global.hostname}" +nfsroot="/home/${global.user}/nfsroot/${global.hostname}" +bootargs-ip +global.linux.bootargs.dyn.root="root=/dev/nfs nfsroot=$nfsroot,v3,tcp" diff --git a/arch/arm/boards/highbank/env/config b/arch/arm/boards/highbank/env/config deleted file mode 100644 index 1bb2c493b2..0000000000 --- a/arch/arm/boards/highbank/env/config +++ /dev/null @@ -1,33 +0,0 @@ -#!/bin/sh - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp -global.dhcp.vendor_id=barebox-highbank - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'nfs', 'tftp' or 'nor' -kernel_loc=tftp -# can be either 'net', 'nor' or 'initrd' -rootfs_loc=initrd - -# can be either 'jffs2' or 'ubifs' -rootfs_type=ubifs -rootfsimage=root.$rootfs_type - -kernelimage=zImage -#kernelimage=uImage -#kernelimage=Image -#kernelimage=Image.lzo - -autoboot_timeout=3 - -bootargs="console=ttyAMA0,115200n8 CONSOLE=/dev/ttyAMA0" - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;31m[barebox@\h]:\w\e[0m\n# " diff --git a/arch/arm/boards/highbank/env/config-board b/arch/arm/boards/highbank/env/config-board new file mode 100644 index 0000000000..a64d9e3245 --- /dev/null +++ b/arch/arm/boards/highbank/env/config-board @@ -0,0 +1,11 @@ +#!/bin/sh + +# board defaults, do not change in running system. Change /env/config +# instead + +global.hostname=highbank +global.allow_color=true +global.autoboot_timeout=3 +global.bootm.oftree="/dev/dtb" +global.linux.bootargs.base="console=ttyAMA0,115200n8 CONSOLE=/dev/ttyAMA0" +global.boot.default=/env/boot.d diff --git a/arch/arm/boards/highbank/env/data/oftree b/arch/arm/boards/highbank/env/data/oftree new file mode 100644 index 0000000000..9a94b310c3 --- /dev/null +++ b/arch/arm/boards/highbank/env/data/oftree @@ -0,0 +1,4 @@ +#!/bin/sh + +#device tree provided by the firmware +global.bootm.oftree="/dev/dtb" diff --git a/arch/arm/boards/highbank/env/bin/init_board b/arch/arm/boards/highbank/env/init/001-dtb-probe index 610db1500e..610db1500e 100644 --- a/arch/arm/boards/highbank/env/bin/init_board +++ b/arch/arm/boards/highbank/env/init/001-dtb-probe diff --git a/arch/arm/boards/highbank/env/init/automount b/arch/arm/boards/highbank/env/init/automount new file mode 100644 index 0000000000..2c283c6eed --- /dev/null +++ b/arch/arm/boards/highbank/env/init/automount @@ -0,0 +1,27 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + init-menu-add-entry "$0" "Automountpoints" + exit +fi + +# automount tftp server based on $eth0.serverip + +mkdir -p /mnt/tftp +automount /mnt/tftp 'ifup eth0 && mount -t tftp $eth0.serverip /mnt/tftp' + +# SD card slot, boot partition +mkdir -p /mnt/mmc-boot +automount -d /mnt/mmc 'mount /dev/disk0.boot /mnt/mmc-boot' + +# SD card slot, first partition +mkdir -p /mnt/mmc +automount -d /mnt/mmc 'mount /dev/disk0.0 /mnt/mmc' + +# AHCI, boot partition +mkdir -p /mnt/ahci-boot +automount -d /mnt/ahci 'mount /dev/ata0.boot /mnt/ahci-boot' + +# AHCI, first partition +mkdir -p /mnt/ahci +automount -d /mnt/ahci 'mount /dev/ata0.0 /mnt/ahci' diff --git a/arch/arm/boards/highbank/env/init/ps1 b/arch/arm/boards/highbank/env/init/ps1 new file mode 100644 index 0000000000..a94acc14f8 --- /dev/null +++ b/arch/arm/boards/highbank/env/init/ps1 @@ -0,0 +1,9 @@ +#!/bin/sh + +/env/config + +if [ ${global.allow_color} = "true" ]; then + export PS1="\e[1;32mbarebox@\e[1;36m\h:\w\e[0m\n# " +else + export PS1="barebox@\h:\w\n# " +fi diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c index df8b1f949c..4b2fa6c6ca 100644 --- a/arch/arm/boards/pcm038/pcm038.c +++ b/arch/arm/boards/pcm038/pcm038.c @@ -46,12 +46,15 @@ #include "pll.h" +#define PCM038_GPIO_FEC_RST (GPIO_PORTC + 30) +#define PCM038_GPIO_SPI_CS0 (GPIO_PORTD + 28) + static struct fec_platform_data fec_info = { .xcv_type = PHY_INTERFACE_MODE_MII, .phy_addr = 1, }; -static int pcm038_spi_cs[] = {GPIO_PORTD + 28}; +static int pcm038_spi_cs[] = { PCM038_GPIO_SPI_CS0 }; static struct spi_imx_master pcm038_spi_0_data = { .chipselect = pcm038_spi_cs, @@ -191,6 +194,7 @@ static int pcm038_devices_init(void) long sram_size; unsigned int mode[] = { + /* FEC */ PD0_AIN_FEC_TXD0, PD1_AIN_FEC_TXD1, PD2_AIN_FEC_TXD2, @@ -209,16 +213,19 @@ static int pcm038_devices_init(void) PD15_AOUT_FEC_COL, PD16_AIN_FEC_TX_ER, PF23_AIN_FEC_TX_EN, + PCM038_GPIO_FEC_RST | GPIO_GPIO | GPIO_OUT, + /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, PE14_PF_UART1_CTS, PE15_PF_UART1_RTS, + /* CSPI1 */ PD25_PF_CSPI1_RDY, - GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT, + PCM038_GPIO_SPI_CS0 | GPIO_GPIO | GPIO_OUT, PD29_PF_CSPI1_SCLK, PD30_PF_CSPI1_MISO, PD31_PF_CSPI1_MOSI, - /* display */ + /* Display */ PA5_PF_LSCLK, PA6_PF_LD0, PA7_PF_LD1, @@ -298,6 +305,7 @@ static int pcm038_devices_init(void) /* Register the fec device after the PLL re-initialisation * as the fec depends on the (now higher) ipg clock */ + gpio_set_value(PCM038_GPIO_FEC_RST, 1); imx27_add_fec(&fec_info); switch (bootsource_get()) { diff --git a/arch/arm/configs/at91sam9m10g45ek_defconfig b/arch/arm/configs/at91sam9m10g45ek_defconfig index 1df34f7511..7e05e95760 100644 --- a/arch/arm/configs/at91sam9m10g45ek_defconfig +++ b/arch/arm/configs/at91sam9m10g45ek_defconfig @@ -64,8 +64,10 @@ CONFIG_NET_RESOLV=y CONFIG_DRIVER_NET_MACB=y CONFIG_NET_USB=y CONFIG_NET_USB_ASIX=y -# CONFIG_SPI is not set +CONFIG_DRIVER_SPI_ATMEL=y CONFIG_MTD=y +# CONFIG_MTD_OOB_DEVICE is not set +CONFIG_MTD_DATAFLASH=y CONFIG_NAND=y # CONFIG_NAND_ECC_HW is not set # CONFIG_NAND_ECC_HW_SYNDROME is not set diff --git a/arch/arm/configs/phycard_a_l1_defconfig b/arch/arm/configs/phycard_a_l1_defconfig index d90a333e0a..fabaa2d688 100644 --- a/arch/arm/configs/phycard_a_l1_defconfig +++ b/arch/arm/configs/phycard_a_l1_defconfig @@ -7,7 +7,6 @@ CONFIG_CPU_V7=y CONFIG_CPU_32v7=y CONFIG_BOARDINFO="Phytec phyCARD-A-L1" CONFIG_ARCH_OMAP3=y -CONFIG_OMAP_CLOCK_ALL=y CONFIG_OMAP_CLOCK_SOURCE_S32K=y CONFIG_OMAP3_CLOCK_CONFIG=y CONFIG_OMAP3_COPY_CLOCK_SRAM=n diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 34fe5c3515..e3ea3b6b9e 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -189,7 +189,7 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank) ptes, ttb_start, ttb_end); for (i = 0; i < num_ptes; i++) { - ptes[i] = (phys + i * 4096) | PTE_TYPE_SMALL | + ptes[i] = (phys + i * PAGE_SIZE) | PTE_TYPE_SMALL | pte_flags_cached; } @@ -300,7 +300,7 @@ static int mmu_init(void) asm volatile ("mcr p15,0,%0,c3,c0,0" : : "r"(i) /*:*/); /* create a flat mapping using 1MiB sections */ - create_sections(0, 0, 4096, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | + create_sections(0, 0, PAGE_SIZE, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT); vectors_init(); @@ -332,7 +332,7 @@ void *dma_alloc_coherent(size_t size) void *ret; size = PAGE_ALIGN(size); - ret = xmemalign(4096, size); + ret = xmemalign(PAGE_SIZE, size); dma_inv_range((unsigned long)ret, (unsigned long)ret + size); @@ -353,6 +353,7 @@ void *phys_to_virt(unsigned long phys) void dma_free_coherent(void *mem, size_t size) { + size = PAGE_ALIGN(size); remap_range(mem, size, pte_flags_cached); free(mem); diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index c2618c7b56..0e39a526d2 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -185,10 +185,10 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = { int at91_mux_pin(unsigned pin, enum at91_mux mux, int use_pullup) { struct at91_gpio_chip *at91_gpio = pin_to_controller(pin); - void __iomem *pio = at91_gpio->regbase; + void __iomem *pio; + struct device_d *dev; unsigned mask = pin_to_mask(pin); int bank = pin_to_bank(pin); - struct device_d *dev = at91_gpio->chip.dev; if (!at91_gpio) return -EINVAL; @@ -197,6 +197,7 @@ int at91_mux_pin(unsigned pin, enum at91_mux mux, int use_pullup) if (!pio) return -EINVAL; + dev = at91_gpio->chip.dev; at91_mux_disable_interrupt(pio, mask); pin %= MAX_NB_GPIO_PER_BANK; diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index b48275e07e..a137da4266 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -120,12 +120,12 @@ void sam9_smc_read(int id, int cs, struct sam9_smc_config *config) static int at91sam9_smc_probe(struct device_d *dev) { - int id; + int id = dev->id; - if (dev->id < 0) { + if (id < 0) { id = 0; - } else if (dev->id > 1) { - dev_warn(dev, ": id > 2\n"); + } else if (id > 1) { + dev_warn(dev, "id > 1\n"); return -EIO; } diff --git a/arch/arm/mach-highbank/Kconfig b/arch/arm/mach-highbank/Kconfig index 47c6405eb1..9cfe53968b 100644 --- a/arch/arm/mach-highbank/Kconfig +++ b/arch/arm/mach-highbank/Kconfig @@ -12,6 +12,7 @@ choice config MACH_HIGHBANK bool "Calxeda Highbank" + select HAVE_DEFAULT_ENVIRONMENT_NEW endchoice diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 8ddec9d605..359b5cd091 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -17,9 +17,9 @@ config ARCH_TEXT_BASE default 0x87f00000 if MACH_PCM043 default 0x08f80000 if MACH_SCB9328 default 0xa7e00000 if MACH_NESO - default 0x97f00000 if MACH_MX51_PDK - default 0x7ff00000 if MACH_MX53_LOCO - default 0x7ff00000 if MACH_MX53_SMD + default 0x97f00000 if MACH_FREESCALE_MX51_PDK + default 0x7ff00000 if MACH_FREESCALE_MX53_LOCO + default 0x7ff00000 if MACH_FREESCALE_MX53_SMD default 0x87f00000 if MACH_GUF_CUPID default 0x93d00000 if MACH_TX25 default 0x7ff00000 if MACH_TQMA53 @@ -165,44 +165,53 @@ choice config ARCH_IMX1 bool "i.MX1" select CPU_ARM920T + select PINCTRL_IMX_IOMUX_V1 config ARCH_IMX21 bool "i.MX21" select CPU_ARM926T + select PINCTRL_IMX_IOMUX_V1 config ARCH_IMX25 bool "i.MX25" select CPU_ARM926T select ARCH_HAS_FEC_IMX + select PINCTRL_IMX_IOMUX_V3 config ARCH_IMX27 bool "i.MX27" select CPU_ARM926T select ARCH_HAS_FEC_IMX + select PINCTRL_IMX_IOMUX_V1 config ARCH_IMX31 select CPU_V6 bool "i.MX31" + select PINCTRL_IMX_IOMUX_V2 config ARCH_IMX35 bool "i.MX35" select CPU_V6 select ARCH_HAS_FEC_IMX + select PINCTRL_IMX_IOMUX_V3 config ARCH_IMX51 bool "i.MX51" select CPU_V7 select ARCH_HAS_FEC_IMX + select PINCTRL_IMX_IOMUX_V3 config ARCH_IMX53 bool "i.MX53" select CPU_V7 select ARCH_HAS_FEC_IMX + select PINCTRL_IMX_IOMUX_V3 config ARCH_IMX6 bool "i.MX6" select ARCH_HAS_FEC_IMX select CPU_V7 + select PINCTRL_IMX_IOMUX_V3 endchoice diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index ff8f15b8c0..72125e775b 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -1,14 +1,14 @@ -obj-y += clocksource.o gpio.o -obj-$(CONFIG_ARCH_IMX1) += imx1.o iomux-v1.o clk-imx1.o -obj-$(CONFIG_ARCH_IMX25) += imx25.o iomux-v3.o clk-imx25.o -obj-$(CONFIG_ARCH_IMX21) += imx21.o iomux-v1.o clk-imx21.o -obj-$(CONFIG_ARCH_IMX27) += imx27.o iomux-v1.o clk-imx27.o -obj-$(CONFIG_ARCH_IMX31) += imx31.o iomux-v2.o clk-imx31.o -obj-$(CONFIG_ARCH_IMX35) += imx35.o iomux-v3.o clk-imx35.o -obj-$(CONFIG_ARCH_IMX51) += imx51.o iomux-v3.o imx5.o clk-imx5.o -obj-$(CONFIG_ARCH_IMX53) += imx53.o iomux-v3.o imx5.o clk-imx5.o esdctl-v4.o +obj-y += clocksource.o +obj-$(CONFIG_ARCH_IMX1) += imx1.o clk-imx1.o +obj-$(CONFIG_ARCH_IMX25) += imx25.o clk-imx25.o +obj-$(CONFIG_ARCH_IMX21) += imx21.o clk-imx21.o +obj-$(CONFIG_ARCH_IMX27) += imx27.o clk-imx27.o +obj-$(CONFIG_ARCH_IMX31) += imx31.o clk-imx31.o +obj-$(CONFIG_ARCH_IMX35) += imx35.o clk-imx35.o +obj-$(CONFIG_ARCH_IMX51) += imx51.o imx5.o clk-imx5.o +obj-$(CONFIG_ARCH_IMX53) += imx53.o imx5.o clk-imx5.o esdctl-v4.o pbl-$(CONFIG_ARCH_IMX53) += imx53.o imx5.o esdctl-v4.o -obj-$(CONFIG_ARCH_IMX6) += imx6.o iomux-v3.o usb-imx6.o clk-imx6.o +obj-$(CONFIG_ARCH_IMX6) += imx6.o usb-imx6.o clk-imx6.o lwl-$(CONFIG_ARCH_IMX6) += imx6-mmdc.o obj-$(CONFIG_IMX_IIM) += iim.o obj-$(CONFIG_NAND_IMX) += nand.o diff --git a/arch/arm/mach-imx/gpio.c b/arch/arm/mach-imx/gpio.c deleted file mode 100644 index 1bf4100964..0000000000 --- a/arch/arm/mach-imx/gpio.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * arch/arm/mach-imx/gpio.c - * - * author: Sascha Hauer - * Created: april 20th, 2004 - * Copyright: Synertronixx GmbH - * - * Common code for i.MX machines - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - */ - -#include <common.h> -#include <errno.h> -#include <io.h> -#include <gpio.h> -#include <init.h> - -struct imx_gpio_chip { - void __iomem *base; - struct gpio_chip chip; - struct imx_gpio_regs *regs; -}; - -struct imx_gpio_regs { - unsigned int dr; - unsigned int gdir; - unsigned int psr; -}; - -static struct imx_gpio_regs regs_imx1 = { - .dr = 0x1c, - .gdir = 0x00, - .psr = 0x24, -}; - -static struct imx_gpio_regs regs_imx31 = { - .dr = 0x00, - .gdir = 0x04, - .psr = 0x08, -}; - -static void imx_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value) -{ - struct imx_gpio_chip *imxgpio = container_of(chip, struct imx_gpio_chip, chip); - void __iomem *base = imxgpio->base; - u32 val; - - if (!base) - return; - - val = readl(base + imxgpio->regs->dr); - - if (value) - val |= 1 << gpio; - else - val &= ~(1 << gpio); - - writel(val, base + imxgpio->regs->dr); -} - -static int imx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) -{ - struct imx_gpio_chip *imxgpio = container_of(chip, struct imx_gpio_chip, chip); - void __iomem *base = imxgpio->base; - u32 val; - - if (!base) - return -EINVAL; - - val = readl(base + imxgpio->regs->gdir); - val &= ~(1 << gpio); - writel(val, base + imxgpio->regs->gdir); - - return 0; -} - - -static int imx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value) -{ - struct imx_gpio_chip *imxgpio = container_of(chip, struct imx_gpio_chip, chip); - void __iomem *base = imxgpio->base; - u32 val; - - gpio_set_value(gpio + chip->base, value); - - val = readl(base + imxgpio->regs->gdir); - val |= 1 << gpio; - writel(val, base + imxgpio->regs->gdir); - - return 0; -} - -static int imx_gpio_get_value(struct gpio_chip *chip, unsigned gpio) -{ - struct imx_gpio_chip *imxgpio = container_of(chip, struct imx_gpio_chip, chip); - void __iomem *base = imxgpio->base; - u32 val; - - val = readl(base + imxgpio->regs->psr); - - return val & (1 << gpio) ? 1 : 0; -} - -static struct gpio_ops imx_gpio_ops = { - .direction_input = imx_gpio_direction_input, - .direction_output = imx_gpio_direction_output, - .get = imx_gpio_get_value, - .set = imx_gpio_set_value, -}; - -static int imx_gpio_probe(struct device_d *dev) -{ - struct imx_gpio_chip *imxgpio; - struct imx_gpio_regs *regs; - int ret; - - ret = dev_get_drvdata(dev, (unsigned long *)®s); - if (ret) - return ret; - - imxgpio = xzalloc(sizeof(*imxgpio)); - imxgpio->base = dev_request_mem_region(dev, 0); - imxgpio->chip.ops = &imx_gpio_ops; - if (dev->id < 0) { - imxgpio->chip.base = of_alias_get_id(dev->device_node, "gpio"); - if (imxgpio->chip.base < 0) - return imxgpio->chip.base; - imxgpio->chip.base *= 32; - } else { - imxgpio->chip.base = dev->id * 32; - } - imxgpio->chip.ngpio = 32; - imxgpio->chip.dev = dev; - imxgpio->regs = regs; - gpiochip_add(&imxgpio->chip); - - dev_dbg(dev, "probed gpiochip%d with base %d\n", dev->id, imxgpio->chip.base); - - return 0; -} - -static __maybe_unused struct of_device_id imx_gpio_dt_ids[] = { - { - .compatible = "fsl,imx1-gpio", - .data = (unsigned long)®s_imx1, - }, { - .compatible = "fsl,imx21-gpio", - .data = (unsigned long)®s_imx1, - }, { - .compatible = "fsl,imx27-gpio", - .data = (unsigned long)®s_imx1, - }, { - .compatible = "fsl,imx31-gpio", - .data = (unsigned long)®s_imx31, - }, { - .compatible = "fsl,imx35-gpio", - .data = (unsigned long)®s_imx31, - }, { - .compatible = "fsl,imx51-gpio", - .data = (unsigned long)®s_imx31, - }, { - .compatible = "fsl,imx53-gpio", - .data = (unsigned long)®s_imx31, - }, { - .compatible = "fsl,imx6q-gpio", - .data = (unsigned long)®s_imx31, - }, { - /* sentinel */ - } -}; - -static struct platform_device_id imx_gpio_ids[] = { - { - .name = "imx1-gpio", - .driver_data = (unsigned long)®s_imx1, - }, { - .name = "imx31-gpio", - .driver_data = (unsigned long)®s_imx31, - }, { - /* sentinel */ - }, -}; - -static struct driver_d imx_gpio_driver = { - .name = "imx-gpio", - .probe = imx_gpio_probe, - .of_compatible = DRV_OF_COMPAT(imx_gpio_dt_ids), - .id_table = imx_gpio_ids, -}; - -static int imx_gpio_add(void) -{ - platform_driver_register(&imx_gpio_driver); - return 0; -} -coredevice_initcall(imx_gpio_add); diff --git a/arch/arm/mach-imx/include/mach/iomux-mx27.h b/arch/arm/mach-imx/include/mach/iomux-mx27.h index 7d2496708e..b6e334559d 100644 --- a/arch/arm/mach-imx/include/mach/iomux-mx27.h +++ b/arch/arm/mach-imx/include/mach/iomux-mx27.h @@ -25,12 +25,6 @@ #define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2) #define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3) #define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4) -#define PB4_PF_SD2_D0 (GPIO_PORTB | GPIO_PF | 4) -#define PB5_PF_SD2_D1 (GPIO_PORTB | GPIO_PF | 5) -#define PB6_PF_SD2_D2 (GPIO_PORTB | GPIO_PF | 6) -#define PB7_PF_SD2_D3 (GPIO_PORTB | GPIO_PF | 7) -#define PB8_PF_SD2_CMD (GPIO_PORTB | GPIO_PF | 8) -#define PB9_PF_SD2_CLK (GPIO_PORTB | GPIO_PF | 9) #define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22) #define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25) #define PC5_PF_I2C2_SDA (GPIO_PORTC | GPIO_PF | GPIO_IN | 5) diff --git a/arch/arm/mach-imx/include/mach/iomux-mx2x.h b/arch/arm/mach-imx/include/mach/iomux-mx2x.h index 2f9560fa71..15c2e2b060 100644 --- a/arch/arm/mach-imx/include/mach/iomux-mx2x.h +++ b/arch/arm/mach-imx/include/mach/iomux-mx2x.h @@ -86,12 +86,12 @@ #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) -#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) -#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) -#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) -#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) -#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) -#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) +#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19) +#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20) +#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21) +#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22) +#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 23) +#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24) #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) diff --git a/arch/arm/mach-imx/include/mach/iomux-mx51.h b/arch/arm/mach-imx/include/mach/iomux-mx51.h index 0252d412c6..2623e7a2e1 100644 --- a/arch/arm/mach-imx/include/mach/iomux-mx51.h +++ b/arch/arm/mach-imx/include/mach/iomux-mx51.h @@ -107,11 +107,13 @@ #define MX51_PAD_EIM_D25__UART2_CTS IOMUX_PAD(0x414, 0x080, 4, __NA_, 0, MX51_UART_PAD_CTRL) #define MX51_PAD_EIM_D25__UART3_RXD IOMUX_PAD(0x414, 0x080, 3, 0x9f4, 0, MX51_UART_PAD_CTRL) #define MX51_PAD_EIM_D25__USBOTG_DATA1 IOMUX_PAD(0x414, 0x080, 2, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_D25__GPT_CMPOUT1 IOMUX_PAD(0x414, 0x080, 5, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_D26__EIM_D26 IOMUX_PAD(0x418, 0x084, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_D26__KEY_COL7 IOMUX_PAD(0x418, 0x084, 1, 0x9cc, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_D26__UART2_RTS IOMUX_PAD(0x418, 0x084, 4, 0x9e8, 3, MX51_UART_PAD_CTRL) #define MX51_PAD_EIM_D26__UART3_TXD IOMUX_PAD(0x418, 0x084, 3, __NA_, 0, MX51_UART_PAD_CTRL) #define MX51_PAD_EIM_D26__USBOTG_DATA2 IOMUX_PAD(0x418, 0x084, 2, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_EIM_D26__GPT_CMPOUT2 IOMUX_PAD(0x418, 0x084, 5, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_D27__AUD6_RXC IOMUX_PAD(0x41c, 0x088, 5, 0x8f4, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_D27__EIM_D27 IOMUX_PAD(0x41c, 0x088, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_D27__GPIO2_9 IOMUX_PAD(0x41c, 0x088, 1, __NA_, 0, MX51_GPIO_PAD_CTRL) @@ -228,6 +230,7 @@ #define MX51_PAD_EIM_CRE__EIM_CRE IOMUX_PAD(0x4a0, 0x100, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_EIM_CRE__GPIO3_2 IOMUX_PAD(0x4a0, 0x100, 1, 0x97c, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_DRAM_CS1__DRAM_CS1 IOMUX_PAD(0x4d0, 0x104, 0, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_DRAM_CS1__CCM_CLKO IOMUX_PAD(0x4d0, 0x104, 1, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_WE_B__GPIO3_3 IOMUX_PAD(0x4e4, 0x108, 3, 0x980, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_NANDF_WE_B__NANDF_WE_B IOMUX_PAD(0x4e4, 0x108, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_WE_B__PATA_DIOW IOMUX_PAD(0x4e4, 0x108, 1, __NA_, 0, NO_PAD_CTRL) @@ -256,12 +259,14 @@ #define MX51_PAD_NANDF_RB1__GPIO3_9 IOMUX_PAD(0x4fc, 0x120, 3, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_NANDF_RB1__NANDF_RB1 IOMUX_PAD(0x4fc, 0x120, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB1__PATA_IORDY IOMUX_PAD(0x4fc, 0x120, 1, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_RB1__GPT_CMPOUT2 IOMUX_PAD(0x4fc, 0x120, 4, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB1__SD4_CMD IOMUX_PAD(0x4fc, 0x120, 0x15, __NA_, 0, MX51_SDHCI_PAD_CTRL) #define MX51_PAD_NANDF_RB2__DISP2_WAIT IOMUX_PAD(0x500, 0x124, 5, 0x9a8, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB2__ECSPI2_SCLK IOMUX_PAD(0x500, 0x124, 2, __NA_, 0, MX51_ECSPI_PAD_CTRL) #define MX51_PAD_NANDF_RB2__FEC_COL IOMUX_PAD(0x500, 0x124, 1, 0x94c, 0, MX51_PAD_CTRL_2) #define MX51_PAD_NANDF_RB2__GPIO3_10 IOMUX_PAD(0x500, 0x124, 3, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_NANDF_RB2__NANDF_RB2 IOMUX_PAD(0x500, 0x124, 0, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_NANDF_RB2__GPT_CMPOUT3 IOMUX_PAD(0x500, 0x124, 4, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB2__USBH3_H3_DP IOMUX_PAD(0x500, 0x124, 0x17, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB2__USBH3_NXT IOMUX_PAD(0x500, 0x124, 6, 0xa20, 0, NO_PAD_CTRL) #define MX51_PAD_NANDF_RB3__DISP1_WAIT IOMUX_PAD(0x504, 0x128, 5, __NA_, 0, NO_PAD_CTRL) @@ -637,7 +642,9 @@ #define MX51_PAD_DISP1_DAT23__DISP2_DAT17 IOMUX_PAD(0x728, 0x328, 5, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_DISP1_DAT23__DISP2_SER_CS IOMUX_PAD(0x728, 0x328, 4, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_DI1_PIN3__DI1_PIN3 IOMUX_PAD(0x72c, 0x32c, 0, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_DI1_DISP_CLK__DI1_DISP_CLK IOMUX_PAD(0x730, __NA_, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_DI1_PIN2__DI1_PIN2 IOMUX_PAD(0x734, 0x330, 0, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_DI1_PIN15__DI1_PIN15 IOMUX_PAD(0x738, __NA_, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_DI_GP2__DISP1_SER_CLK IOMUX_PAD(0x740, 0x338, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_DI_GP2__DISP2_WAIT IOMUX_PAD(0x740, 0x338, 2, 0x9a8, 1, NO_PAD_CTRL) #define MX51_PAD_DI_GP3__CSI1_DATA_EN IOMUX_PAD(0x744, 0x33c, 3, 0x9a0, 1, NO_PAD_CTRL) @@ -649,20 +656,20 @@ #define MX51_PAD_DI2_PIN2__DI2_PIN2 IOMUX_PAD(0x74c, 0x344, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_DI2_PIN2__FEC_MDC IOMUX_PAD(0x74c, 0x344, 2, __NA_, 0, MX51_PAD_CTRL_5) #define MX51_PAD_DI2_PIN3__DI2_PIN3 IOMUX_PAD(0x750, 0x348, 0, __NA_, 0, NO_PAD_CTRL) -#define MX51_PAD_DI2_PIN3__FEC_MDIO IOMUX_PAD(0x750, 0x348, 2, 0x954, 1, MX51_PAD_CTRL_5) +#define MX51_PAD_DI2_PIN3__FEC_MDIO IOMUX_PAD(0x750, 0x348, 2, 0x954, 1, NO_PAD_CTRL) #define MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK IOMUX_PAD(0x754, 0x34c, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 IOMUX_PAD(0x754, 0x34c, 2, 0x95c, 1, NO_PAD_CTRL) #define MX51_PAD_DI_GP4__DI2_PIN15 IOMUX_PAD(0x758, 0x350, 4, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_DI_GP4__DISP1_SER_DIN IOMUX_PAD(0x758, 0x350, 0, 0x9c0, 1, NO_PAD_CTRL) #define MX51_PAD_DI_GP4__DISP2_PIN1 IOMUX_PAD(0x758, 0x350, 3, __NA_, 0, NO_PAD_CTRL) -#define MX51_PAD_DI_GP4__FEC_RDATA2 IOMUX_PAD(0x758, 0x350, 2, 0x960, 1, MX51_PAD_CTRL_5) +#define MX51_PAD_DI_GP4__FEC_RDATA2 IOMUX_PAD(0x758, 0x350, 2, 0x960, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT0__DISP2_DAT0 IOMUX_PAD(0x75c, 0x354, 0, __NA_, 0, NO_PAD_CTRL) -#define MX51_PAD_DISP2_DAT0__FEC_RDATA3 IOMUX_PAD(0x75c, 0x354, 2, 0x964, 1, MX51_PAD_CTRL_5) +#define MX51_PAD_DISP2_DAT0__FEC_RDATA3 IOMUX_PAD(0x75c, 0x354, 2, 0x964, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT0__KEY_COL6 IOMUX_PAD(0x75c, 0x354, 4, 0x9c8, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT0__UART3_RXD IOMUX_PAD(0x75c, 0x354, 5, 0x9f4, 8, MX51_UART_PAD_CTRL) #define MX51_PAD_DISP2_DAT0__USBH3_CLK IOMUX_PAD(0x75c, 0x354, 3, 0x9f8, 1, MX51_UART_PAD_CTRL) #define MX51_PAD_DISP2_DAT1__DISP2_DAT1 IOMUX_PAD(0x760, 0x358, 0, __NA_, 0, NO_PAD_CTRL) -#define MX51_PAD_DISP2_DAT1__FEC_RX_ER IOMUX_PAD(0x760, 0x358, 2, 0x970, 1, MX51_PAD_CTRL_5) +#define MX51_PAD_DISP2_DAT1__FEC_RX_ER IOMUX_PAD(0x760, 0x358, 2, 0x970, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT1__KEY_COL7 IOMUX_PAD(0x760, 0x358, 4, 0x9cc, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT1__UART3_TXD IOMUX_PAD(0x760, 0x358, 5, __NA_, 0, MX51_UART_PAD_CTRL) #define MX51_PAD_DISP2_DAT1__USBH3_DIR IOMUX_PAD(0x760, 0x358, 3, 0xa1c, 1, NO_PAD_CTRL) @@ -692,17 +699,17 @@ #define MX51_PAD_DISP2_DAT9__USBH3_DATA1 IOMUX_PAD(0x780, 0x378, 3, 0xa00, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT10__DISP2_DAT10 IOMUX_PAD(0x784, 0x37c, 0, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT10__DISP2_SER_CS IOMUX_PAD(0x784, 0x37c, 5, __NA_, 0, NO_PAD_CTRL) -#define MX51_PAD_DISP2_DAT10__FEC_COL IOMUX_PAD(0x784, 0x37c, 2, 0x94c, 1, MX51_PAD_CTRL_5) +#define MX51_PAD_DISP2_DAT10__FEC_COL IOMUX_PAD(0x784, 0x37c, 2, 0x94c, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT10__KEY_ROW7 IOMUX_PAD(0x784, 0x37c, 4, 0x9dc, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT10__USBH3_DATA2 IOMUX_PAD(0x784, 0x37c, 3, 0xa04, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT11__AUD6_TXD IOMUX_PAD(0x788, 0x380, 4, 0x8f0, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT11__DISP2_DAT11 IOMUX_PAD(0x788, 0x380, 0, __NA_, 0, NO_PAD_CTRL) -#define MX51_PAD_DISP2_DAT11__FEC_RX_CLK IOMUX_PAD(0x788, 0x380, 2, 0x968, 1, MX51_PAD_CTRL_5) +#define MX51_PAD_DISP2_DAT11__FEC_RX_CLK IOMUX_PAD(0x788, 0x380, 2, 0x968, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT11__GPIO1_10 IOMUX_PAD(0x788, 0x380, 7, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_DISP2_DAT11__USBH3_DATA3 IOMUX_PAD(0x788, 0x380, 3, 0xa08, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT12__AUD6_RXD IOMUX_PAD(0x78c, 0x384, 4, 0x8ec, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT12__DISP2_DAT12 IOMUX_PAD(0x78c, 0x384, 0, __NA_, 0, NO_PAD_CTRL) -#define MX51_PAD_DISP2_DAT12__FEC_RX_DV IOMUX_PAD(0x78c, 0x384, 2, 0x96c, 1, MX51_PAD_CTRL_5) +#define MX51_PAD_DISP2_DAT12__FEC_RX_DV IOMUX_PAD(0x78c, 0x384, 2, 0x96c, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT12__USBH3_DATA4 IOMUX_PAD(0x78c, 0x384, 3, 0xa0c, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT13__AUD6_TXC IOMUX_PAD(0x790, 0x388, 4, 0x8fc, 1, NO_PAD_CTRL) #define MX51_PAD_DISP2_DAT13__DISP2_DAT13 IOMUX_PAD(0x790, 0x388, 0, __NA_, 0, NO_PAD_CTRL) @@ -780,6 +787,8 @@ #define MX51_PAD_GPIO1_2__PWM1_PWMO IOMUX_PAD(0x7d4, 0x3cc, 1, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_3__GPIO1_3 IOMUX_PAD(0x7d8, 0x3d0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_GPIO1_3__I2C2_SDA IOMUX_PAD(0x7d8, 0x3d0, 0x12, 0x9bc, 3, MX51_I2C_PAD_CTRL) +#define MX51_PAD_GPIO1_3__CCM_CLKO2 IOMUX_PAD(0x7d8, 0x3d0, 5, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_GPIO1_3__GPT_CLKIN IOMUX_PAD(0x7d8, 0x3d0, 6, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_3__PLL2_BYP IOMUX_PAD(0x7d8, 0x3d0, 7, 0x910, 1, NO_PAD_CTRL) #define MX51_PAD_GPIO1_3__PWM2_PWMO IOMUX_PAD(0x7d8, 0x3d0, 1, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ IOMUX_PAD(0x7fc, 0x3d4, 0, __NA_, 0, NO_PAD_CTRL) @@ -788,13 +797,16 @@ #define MX51_PAD_GPIO1_4__EIM_RDY IOMUX_PAD(0x804, 0x3d8, 3, 0x938, 1, NO_PAD_CTRL) #define MX51_PAD_GPIO1_4__GPIO1_4 IOMUX_PAD(0x804, 0x3d8, 0, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_GPIO1_4__WDOG1_WDOG_B IOMUX_PAD(0x804, 0x3d8, 2, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_GPIO1_4__GPT_CAPIN1 IOMUX_PAD(0x804, 0x3d8, 6, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_5__CSI2_MCLK IOMUX_PAD(0x808, 0x3dc, 6, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_5__DISP2_PIN16 IOMUX_PAD(0x808, 0x3dc, 3, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_5__GPIO1_5 IOMUX_PAD(0x808, 0x3dc, 0, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_GPIO1_5__WDOG2_WDOG_B IOMUX_PAD(0x808, 0x3dc, 2, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_GPIO1_5__CCM_CLKO IOMUX_PAD(0x808, 0x3dc, 5, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_6__DISP2_PIN17 IOMUX_PAD(0x80c, 0x3e0, 4, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_6__GPIO1_6 IOMUX_PAD(0x80c, 0x3e0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_GPIO1_6__REF_EN_B IOMUX_PAD(0x80c, 0x3e0, 3, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_GPIO1_6__GPT_CAPIN2 IOMUX_PAD(0x80c, 0x3e0, 6, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_7__CCM_OUT_0 IOMUX_PAD(0x810, 0x3e4, 3, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_7__GPIO1_7 IOMUX_PAD(0x810, 0x3e4, 0, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_GPIO1_7__SD2_WP IOMUX_PAD(0x810, 0x3e4, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL) @@ -803,11 +815,13 @@ #define MX51_PAD_GPIO1_8__GPIO1_8 IOMUX_PAD(0x814, 0x3e8, 0, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_GPIO1_8__SD2_CD IOMUX_PAD(0x814, 0x3e8, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL) #define MX51_PAD_GPIO1_8__USBH3_PWR IOMUX_PAD(0x814, 0x3e8, 1, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_GPIO1_8__CCM_CLKO2 IOMUX_PAD(0x814, 0x3e8, 4, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_9__CCM_OUT_1 IOMUX_PAD(0x818, 0x3ec, 3, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_9__DISP2_D1_CS IOMUX_PAD(0x818, 0x3ec, 2, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_9__DISP2_SER_CS IOMUX_PAD(0x818, 0x3ec, 7, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_9__GPIO1_9 IOMUX_PAD(0x818, 0x3ec, 0, __NA_, 0, MX51_GPIO_PAD_CTRL) #define MX51_PAD_GPIO1_9__SD2_LCTL IOMUX_PAD(0x818, 0x3ec, 6, __NA_, 0, NO_PAD_CTRL) #define MX51_PAD_GPIO1_9__USBH3_OC IOMUX_PAD(0x818, 0x3ec, 1, __NA_, 0, NO_PAD_CTRL) +#define MX51_PAD_GPIO1_9__CCM_CLKO IOMUX_PAD(0x818, 0x3ec, 4, __NA_, 0, NO_PAD_CTRL) #endif /* __MACH_IOMUX_MX51_H__ */ diff --git a/arch/arm/mach-imx/iomux-v1.c b/arch/arm/mach-imx/iomux-v1.c deleted file mode 100644 index f8f90615c6..0000000000 --- a/arch/arm/mach-imx/iomux-v1.c +++ /dev/null @@ -1,116 +0,0 @@ -#include <common.h> -#include <io.h> -#include <mach/iomux-v1.h> - -/* - * GPIO Module and I/O Multiplexer - * x = 0..3 for reg_A, reg_B, reg_C, reg_D - * - * i.MX1 and i.MXL: 0 <= x <= 3 - * i.MX27 : 0 <= x <= 5 - */ -#define DDIR 0x00 -#define OCR1 0x04 -#define OCR2 0x08 -#define ICONFA1 0x0c -#define ICONFA2 0x10 -#define ICONFB1 0x14 -#define ICONFB2 0x18 -#define DR 0x1c -#define GIUS 0x20 -#define SSR 0x24 -#define ICR1 0x28 -#define ICR2 0x2c -#define IMR 0x30 -#define ISR 0x34 -#define GPR 0x38 -#define SWR 0x3c -#define PUEN 0x40 - -static void __iomem *iomuxv1_base; - -void imx_gpio_mode(int gpio_mode) -{ - unsigned int pin = gpio_mode & GPIO_PIN_MASK; - unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; - unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT; - unsigned int aout = (gpio_mode & GPIO_AOUT_MASK) >> GPIO_AOUT_SHIFT; - unsigned int bout = (gpio_mode & GPIO_BOUT_MASK) >> GPIO_BOUT_SHIFT; - void __iomem *portbase = iomuxv1_base + port * 0x100; - uint32_t val; - - if (!iomuxv1_base) - return; - - /* Pullup enable */ - val = readl(portbase + PUEN); - if (gpio_mode & GPIO_PUEN) - val |= (1 << pin); - else - val &= ~(1 << pin); - writel(val, portbase + PUEN); - - /* Data direction */ - val = readl(portbase + DDIR); - if (gpio_mode & GPIO_OUT) - val |= 1 << pin; - else - val &= ~(1 << pin); - writel(val, portbase + DDIR); - - /* Primary / alternate function */ - val = readl(portbase + GPR); - if (gpio_mode & GPIO_AF) - val |= (1 << pin); - else - val &= ~(1 << pin); - writel(val, portbase + GPR); - - /* use as gpio? */ - val = readl(portbase + GIUS); - if (!(gpio_mode & (GPIO_PF | GPIO_AF))) - val |= (1 << pin); - else - val &= ~(1 << pin); - writel(val, portbase + GIUS); - - /* Output / input configuration */ - if (pin < 16) { - val = readl(portbase + OCR1); - val &= ~(3 << (pin * 2)); - val |= (ocr << (pin * 2)); - writel(val, portbase + OCR1); - - val = readl(portbase + ICONFA1); - val &= ~(3 << (pin * 2)); - val |= aout << (pin * 2); - writel(val, portbase + ICONFA1); - - val = readl(portbase + ICONFB1); - val &= ~(3 << (pin * 2)); - val |= bout << (pin * 2); - writel(val, portbase + ICONFB1); - } else { - pin -= 16; - - val = readl(portbase + OCR2); - val &= ~(3 << (pin * 2)); - val |= (ocr << (pin * 2)); - writel(val, portbase + OCR2); - - val = readl(portbase + ICONFA2); - val &= ~(3 << (pin * 2)); - val |= aout << (pin * 2); - writel(val, portbase + ICONFA2); - - val = readl(portbase + ICONFB2); - val &= ~(3 << (pin * 2)); - val |= bout << (pin * 2); - writel(val, portbase + ICONFB2); - } -} - -void imx_iomuxv1_init(void __iomem *base) -{ - iomuxv1_base = base; -} diff --git a/arch/arm/mach-imx/iomux-v2.c b/arch/arm/mach-imx/iomux-v2.c deleted file mode 100644 index cef0340909..0000000000 --- a/arch/arm/mach-imx/iomux-v2.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * (C) 2007, Sascha Hauer <sha@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - */ - -#include <common.h> -#include <io.h> -#include <init.h> -#include <mach/iomux-mx31.h> - -/* - * IOMUX register (base) addresses - */ -#define IOMUXINT_OBS1 0x000 -#define IOMUXINT_OBS2 0x004 -#define IOMUXGPR 0x008 -#define IOMUXSW_MUX_CTL 0x00C -#define IOMUXSW_PAD_CTL 0x154 - -#define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3) - -static void __iomem *base; - -/* - * set the mode for a IOMUX pin. - */ -int imx_iomux_mode(unsigned int pin_mode) -{ - u32 field, l, mode, ret = 0; - void __iomem *reg; - - if (!base) - return -EINVAL; - - reg = base + IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK); - field = pin_mode & 0x3; - mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT; - - pr_debug("%s: reg offset = 0x%x field = %d mode = 0x%02x\n", - __func__, (pin_mode & IOMUX_REG_MASK), field, mode); - - l = readl(reg); - l &= ~(0xff << (field * 8)); - l |= mode << (field * 8); - writel(l, reg); - - return ret; -} -EXPORT_SYMBOL(mxc_iomux_mode); - -/* - * This function configures the pad value for a IOMUX pin. - */ -void imx_iomux_set_pad(enum iomux_pins pin, u32 config) -{ - u32 field, l; - void __iomem *reg; - - if (!base) - return; - - pin &= IOMUX_PADNUM_MASK; - reg = base + IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4; - field = (pin + 2) % 3; - - pr_debug("%s: reg offset = 0x%x, field = %d\n", - __func__, (pin + 2) / 3, field); - - l = readl(reg); - l &= ~(0x1ff << (field * 10)); - l |= config << (field * 10); - writel(l, reg); -} -EXPORT_SYMBOL(mxc_iomux_set_pad); - -/* - * This function enables/disables the general purpose function for a particular - * signal. - */ -void imx_iomux_set_gpr(enum iomux_gp_func gp, bool en) -{ - u32 l; - - if (!base) - return; - - l = readl(base + IOMUXGPR); - if (en) - l |= gp; - else - l &= ~gp; - - writel(l, base + IOMUXGPR); -} -EXPORT_SYMBOL(mxc_iomux_set_gpr); - -int imx_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count) -{ - int i; - - for (i = 0; i < count; i++) - imx_iomux_mode(pin_list[i]); - - return 0; -} - -static int imx_iomux_probe(struct device_d *dev) -{ - base = dev_request_mem_region(dev, 0); - - return 0; -} - -static __maybe_unused struct of_device_id imx_iomux_dt_ids[] = { - { - .compatible = "fsl,imx31-iomux", - }, { - /* sentinel */ - } -}; - -static struct platform_device_id imx_iomux_ids[] = { - { - .name = "imx31-iomux", - }, { - /* sentinel */ - }, -}; - -static struct driver_d imx_iomux_driver = { - .name = "imx-iomuxv2", - .probe = imx_iomux_probe, - .of_compatible = DRV_OF_COMPAT(imx_iomux_dt_ids), - .id_table = imx_iomux_ids, -}; - -static int imx_iomux_init(void) -{ - return platform_driver_register(&imx_iomux_driver); -} -postcore_initcall(imx_iomux_init); diff --git a/arch/arm/mach-imx/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c deleted file mode 100644 index 8a6064da6c..0000000000 --- a/arch/arm/mach-imx/iomux-v3.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> - * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH, - * <armlinux@phytec.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#include <common.h> -#include <init.h> -#include <io.h> -#include <mach/iomux-v3.h> - -static void __iomem *base; - -/* - * configures a single pad in the iomuxer - */ -int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad) -{ - u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT; - u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; - u32 sel_input_ofs = (pad & MUX_SEL_INPUT_OFS_MASK) >> MUX_SEL_INPUT_OFS_SHIFT; - u32 sel_input = (pad & MUX_SEL_INPUT_MASK) >> MUX_SEL_INPUT_SHIFT; - u32 pad_ctrl_ofs = (pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT; - u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; - - if (!base) - return -EINVAL; - - debug("%s: mux 0x%08x -> 0x%04x pad: 0x%08x -> 0x%04x sel_inp: 0x%08x -> 0x%04x\n", - __func__, mux_mode, mux_ctrl_ofs, pad_ctrl, pad_ctrl_ofs, sel_input, - sel_input_ofs); - - if (mux_ctrl_ofs) - __raw_writel(mux_mode, base + mux_ctrl_ofs); - - if (sel_input_ofs) - __raw_writel(sel_input, base + sel_input_ofs); - - if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs) - __raw_writel(pad_ctrl, base + pad_ctrl_ofs); - - return 0; -} -EXPORT_SYMBOL(mxc_iomux_v3_setup_pad); - - -int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count) -{ - iomux_v3_cfg_t *p = pad_list; - int i; - int ret; - - for (i = 0; i < count; i++) { - ret = mxc_iomux_v3_setup_pad(*p); - if (ret) - return ret; - p++; - } - return 0; -} -EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads); - -static int imx_iomux_probe(struct device_d *dev) -{ - base = dev_request_mem_region(dev, 0); - - return 0; -} - -static __maybe_unused struct of_device_id imx_iomux_dt_ids[] = { - { - .compatible = "fsl,imx35-iomux", - }, { - /* sentinel */ - } -}; - -static struct platform_device_id imx_iomux_ids[] = { - { - .name = "imx35-iomux", - }, { - /* sentinel */ - }, -}; - -static struct driver_d imx_iomux_driver = { - .name = "imx-iomuxv3", - .probe = imx_iomux_probe, - .of_compatible = DRV_OF_COMPAT(imx_iomux_dt_ids), - .id_table = imx_iomux_ids, -}; - -static int imx_iomux_init(void) -{ - return platform_driver_register(&imx_iomux_driver); -} -postcore_initcall(imx_iomux_init); diff --git a/arch/arm/mach-mxs/soc-imx28.c b/arch/arm/mach-mxs/soc-imx28.c index 8972a3d909..ed931afc32 100644 --- a/arch/arm/mach-mxs/soc-imx28.c +++ b/arch/arm/mach-mxs/soc-imx28.c @@ -39,12 +39,16 @@ EXPORT_SYMBOL(reset_cpu); static int imx28_init(void) { + u32 reg; + /* * The default setting for the WDT is to do a POR. If the SoC is only * powered via battery, then a WDT reset powers the chip down instead * of resetting it. Use a software reset only. */ - writel(HW_CLKCTRL_WDOG_POR_DISABLE, IMX_CCM_BASE + HW_CLKCTRL_RESET); + reg = readl(IMX_CCM_BASE + HW_CLKCTRL_RESET) | + HW_CLKCTRL_WDOG_POR_DISABLE; + writel(reg, IMX_CCM_BASE + HW_CLKCTRL_RESET); return 0; } diff --git a/arch/arm/mach-netx/Kconfig b/arch/arm/mach-netx/Kconfig index 8d8f49b85d..3c62d605a9 100644 --- a/arch/arm/mach-netx/Kconfig +++ b/arch/arm/mach-netx/Kconfig @@ -9,35 +9,19 @@ config BOARDINFO config NETX_SDRAM_CTRL hex - default 0x010D0001 if MACH_NXDKN default 0x010D0121 if MACH_NXDB500 - default 0x030D0111 if MACH_NXHMIBB - default 0x010D0111 if MACH_NXEB500HMI - default 0x030D0001 if MACH_NXHX config NETX_SDRAM_TIMING_CTRL hex - default 0x03C12151 if MACH_NXDKN default 0x03C13261 if MACH_NXDB500 - default 0x03C13251 if MACH_NXHMIBB - default 0x03C13251 if MACH_NXEB500HMI - default 0x03C23251 if MACH_NXHX config NETX_MEM_CTRL hex - default 0x0103030F if MACH_NXDKN default 0x0203030F if MACH_NXDB500 - default 0x0103030F if MACH_NXHMIBB - default 0x0103030F if MACH_NXEB500HMI - default 0x0103030F if MACH_NXHX config NETX_COOKIE hex - default 16 if MACH_NXDKN default 32 if MACH_NXDB500 - default 16 if MACH_NXHMIBB - default 16 if MACH_NXEB500HMI - default 16 if MACH_NXHX choice prompt "Netx Board Type" diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig index 42e5f4af07..f7aa8c5a28 100644 --- a/arch/arm/mach-omap/Kconfig +++ b/arch/arm/mach-omap/Kconfig @@ -104,6 +104,13 @@ config OMAP4_USBBOOT You need the utility program omap4_usbboot to boot from USB. Please read omap4_usb_booting.txt for more information. +config CMD_BOOT_ORDER + tristate + depends on ARCH_OMAP4 + prompt "boot_order" + help + A command to choose the next boot device on a warm reset. + config BOARDINFO default "Archos G9" if MACH_ARCHOSG9 default "Texas Instrument's SDP343x" if MACH_OMAP343xSDP @@ -134,7 +141,6 @@ config MACH_BEAGLE config MACH_BEAGLEBONE bool "Texas Instrument's Beagle Bone" - select OMAP_CLOCK_ALL depends on ARCH_AM33XX help Say Y here if you are using Beagle Bone @@ -179,7 +185,6 @@ config MACH_PCAAXL2 config MACH_PCM051 bool "Phytec phyCORE pcm051" - select OMAP_CLOCK_ALL select HAVE_DEFAULT_ENVIRONMENT_NEW depends on ARCH_AM33XX help diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile index d9e00f77ae..973068db58 100644 --- a/arch/arm/mach-omap/Makefile +++ b/arch/arm/mach-omap/Makefile @@ -30,4 +30,5 @@ obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o obj-$(CONFIG_SHELL_NONE) += xload.o obj-$(CONFIG_MFD_TWL6030) += omap4_twl6030_mmc.o obj-$(CONFIG_OMAP4_USBBOOT) += omap4_rom_usb.o +obj-$(CONFIG_CMD_BOOT_ORDER) += boot_order.o obj-y += gpio.o diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c index 059c55e3b0..96432c9ff2 100644 --- a/arch/arm/mach-omap/am33xx_generic.c +++ b/arch/arm/mach-omap/am33xx_generic.c @@ -19,12 +19,13 @@ */ #include <common.h> +#include <bootsource.h> +#include <init.h> #include <io.h> #include <net.h> #include <mach/am33xx-silicon.h> #include <mach/am33xx-clock.h> #include <mach/sys_info.h> -#include <mach/generic.h> #include <mach/am33xx-generic.h> void __noreturn reset_cpu(unsigned long addr) @@ -94,10 +95,13 @@ u32 running_in_sdram(void) return 0; /* running in SRAM or FLASH */ } -enum omap_boot_src am33xx_bootsrc(void) +static int am33xx_bootsource(void) { - return OMAP_BOOTSRC_MMC1; /* only MMC for now */ + bootsource_set(BOOTSOURCE_MMC); /* only MMC for now */ + bootsource_set_instance(0); + return 0; } +postcore_initcall(am33xx_bootsource); int am33xx_register_ethaddr(int eth_id, int mac_id) { diff --git a/arch/arm/mach-omap/boot_order.c b/arch/arm/mach-omap/boot_order.c new file mode 100644 index 0000000000..2f2846d119 --- /dev/null +++ b/arch/arm/mach-omap/boot_order.c @@ -0,0 +1,83 @@ +/* + * boot_order.c - configure omap warm boot + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <command.h> +#include <complete.h> +#include <mach/omap4-silicon.h> + +struct bootsrc { + const char *name; + uint32_t sar; +}; + +const struct bootsrc src_list[] = { + {"xip" , OMAP44XX_SAR_BOOT_XIP }, + {"xipwait" , OMAP44XX_SAR_BOOT_XIPWAIT }, + {"nand" , OMAP44XX_SAR_BOOT_NAND }, + {"onenand" , OMAP44XX_SAR_BOOT_ONENAND }, + {"mmc1" , OMAP44XX_SAR_BOOT_MMC1 }, + {"mmc2_1" , OMAP44XX_SAR_BOOT_MMC2_1 }, + {"mmc2_2" , OMAP44XX_SAR_BOOT_MMC2_2 }, + {"uart" , OMAP44XX_SAR_BOOT_UART }, + {"usb_1" , OMAP44XX_SAR_BOOT_USB_1 }, + {"usb_ulpi", OMAP44XX_SAR_BOOT_USB_ULPI}, + {"usb_2" , OMAP44XX_SAR_BOOT_USB_2 }, +}; + +static uint32_t parse_device(char *str) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(src_list); i++) { + if (strcmp(str, src_list[i].name) == 0) + return src_list[i].sar; + } + printf("Unknown device '%s'\n", str); + return OMAP44XX_SAR_BOOT_VOID; +} + +static int cmd_boot_order(int argc, char *argv[]) +{ + uint32_t device_list[] = { + OMAP44XX_SAR_BOOT_VOID, + OMAP44XX_SAR_BOOT_VOID, + OMAP44XX_SAR_BOOT_VOID, + OMAP44XX_SAR_BOOT_VOID, + }; + int i; + + if (argc < 2) + return COMMAND_ERROR_USAGE; + for (i = 0; i + 1 < argc && i < ARRAY_SIZE(device_list); i++) { + device_list[i] = parse_device(argv[i + 1]); + if (device_list[i] == OMAP44XX_SAR_BOOT_VOID) + return COMMAND_ERROR_USAGE; + } + omap4_set_warmboot_order(device_list); + return 0; +} + +static const __maybe_unused char cmd_boot_order_help[] = +"Usage: boot_order <device 1> [<device n>]\n" +"Set warm boot order of up to four devices.\n" +"Each device can be one of:\n" +"xip xipwait nand onenand mmc1 mmc2_1 mmc2_2 uart usb_1 usb_ulpi usb_2\n"; + +BAREBOX_CMD_START(boot_order) + .cmd = cmd_boot_order, + .usage = "boot_order <device 1> [<device n>]", + BAREBOX_CMD_HELP(cmd_boot_order_help) + BAREBOX_CMD_COMPLETE(empty_complete) +BAREBOX_CMD_END diff --git a/arch/arm/mach-omap/include/mach/am33xx-clock.h b/arch/arm/mach-omap/include/mach/am33xx-clock.h index 39c107f9c7..2ecfc5fc8d 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-clock.h +++ b/arch/arm/mach-omap/include/mach/am33xx-clock.h @@ -31,12 +31,12 @@ #define MPUPLL_M_600 600 /* 125 * n */ #define MPUPLL_M_720 720 /* 125 * n */ -#define MPUPLL_N 23 /* (n -1 ) */ +#define MPUPLL_N (OSC - 1) #define MPUPLL_M2 1 /* Core PLL Fdll = 1 GHZ, */ #define COREPLL_M 1000 /* 125 * n */ -#define COREPLL_N 23 /* (n -1 ) */ +#define COREPLL_N (OSC - 1) #define COREPLL_M4 10 /* CORE_CLKOUTM4 = 200 MHZ */ #define COREPLL_M5 8 /* CORE_CLKOUTM5 = 250 MHZ */ @@ -48,19 +48,13 @@ * For clkout = 192 MHZ, Fdll = 960 MHZ, divider values are given below */ #define PERPLL_M 960 -#define PERPLL_N 23 +#define PERPLL_N (OSC - 1) #define PERPLL_M2 5 -/* DDR Freq is 166 MHZ for now*/ +/* DDR Freq is 266 MHZ for now*/ /* Set Fdll = 400 MHZ , Fdll = M * 2 * CLKINP/ N + 1; clkout = Fdll /(2 * M2) */ -//#if (CONFIG_AM335X_EVM_IS_13x13 == 1) -#if 0 -#define DDRPLL_M 166 /* M/N + 1 = 25/3 */ -#else #define DDRPLL_M 266 -#endif - -#define DDRPLL_N 23 +#define DDRPLL_N (OSC - 1) #define DDRPLL_M2 1 /* PRCM */ @@ -139,7 +133,9 @@ #define CM_PER_CPGMAC0_CLKCTRL (CM_PER + 0x14) /* Ethernet */ #define CM_PER_CPSW_CLKSTCTRL (CM_PER + 0x144)/* Ethernet */ #define CM_PER_OCMCRAM_CLKCTRL (CM_PER + 0x2C) /* OCMC RAM */ +#define CM_PER_GPIO1_CLKCTRL (CM_PER + 0xAC) /* GPIO1 */ #define CM_PER_GPIO2_CLKCTRL (CM_PER + 0xB0) /* GPIO2 */ +#define CM_PER_GPIO3_CLKCTRL (CM_PER + 0xB4) /* GPIO3 */ #define CM_PER_UART3_CLKCTRL (CM_PER + 0x74) /* UART3 */ #define CM_PER_I2C1_CLKCTRL (CM_PER + 0x48) /* I2C1 */ #define CM_PER_I2C2_CLKCTRL (CM_PER + 0x44) /* I2C2 */ diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h index e69d345b07..9edf4ca977 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h +++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h @@ -29,6 +29,12 @@ #define AM33XX_UART1_BASE (AM33XX_L4_PER_BASE + 0x22000) #define AM33XX_UART2_BASE (AM33XX_L4_PER_BASE + 0x24000) +/* GPIO */ +#define AM33XX_GPIO0_BASE (AM33XX_L4_WKUP_BASE + 0x207000 + 0x100) +#define AM33XX_GPIO1_BASE (AM33XX_L4_PER_BASE + 0x4C000 + 0x100) +#define AM33XX_GPIO2_BASE (AM33XX_L4_PER_BASE + 0x1AC000 + 0x100) +#define AM33XX_GPIO3_BASE (AM33XX_L4_PER_BASE + 0x1AE000 + 0x100) + /* EMFI Registers */ #define AM33XX_EMFI0_BASE 0x4C000000 diff --git a/arch/arm/mach-omap/include/mach/generic.h b/arch/arm/mach-omap/include/mach/generic.h index 7455404ca5..5a10a548a9 100644 --- a/arch/arm/mach-omap/include/mach/generic.h +++ b/arch/arm/mach-omap/include/mach/generic.h @@ -27,17 +27,4 @@ #define cpu_is_omap4xxx() (0) #endif -enum omap_boot_src { - OMAP_BOOTSRC_UNKNOWN, - OMAP_BOOTSRC_MMC1, - OMAP_BOOTSRC_NAND, - OMAP_BOOTSRC_SPI1, - OMAP_BOOTSRC_USB1, -}; - -enum omap_boot_src omap_bootsrc(void); -enum omap_boot_src am33xx_bootsrc(void); -enum omap_boot_src omap3_bootsrc(void); -enum omap_boot_src omap4_bootsrc(void); - #endif diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h b/arch/arm/mach-omap/include/mach/omap4-silicon.h index 9e82435e9c..666e721551 100644 --- a/arch/arm/mach-omap/include/mach/omap4-silicon.h +++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h @@ -161,6 +161,25 @@ #define OMAP44XX_PRM_RSTCTRL_RESET 0x01 /* + * SAR (Save & Rescue) memory region + */ +#define OMAP44XX_SAR_RAM_BASE 0x4a326000 +#define OMAP44XX_SAR_CH_ADDRESS (OMAP44XX_SAR_RAM_BASE + 0xA00) +#define OMAP44XX_SAR_CH_START (OMAP44XX_SAR_RAM_BASE + 0xA0C) +#define OMAP44XX_SAR_BOOT_VOID 0x00 +#define OMAP44XX_SAR_BOOT_XIP 0x01 +#define OMAP44XX_SAR_BOOT_XIPWAIT 0x02 +#define OMAP44XX_SAR_BOOT_NAND 0x03 +#define OMAP44XX_SAR_BOOT_ONENAND 0x04 +#define OMAP44XX_SAR_BOOT_MMC1 0x05 +#define OMAP44XX_SAR_BOOT_MMC2_1 0x06 +#define OMAP44XX_SAR_BOOT_MMC2_2 0x07 +#define OMAP44XX_SAR_BOOT_UART 0x43 +#define OMAP44XX_SAR_BOOT_USB_1 0x45 +#define OMAP44XX_SAR_BOOT_USB_ULPI 0x46 +#define OMAP44XX_SAR_BOOT_USB_2 0x47 + +/* * Non-secure SRAM Addresses * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE * at 0x40304000(EMU base) so that our code works for both EMU and GP @@ -212,6 +231,7 @@ void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *); void omap4_power_i2c_send(u32); unsigned int omap4_revision(void); noinline int omap4_scale_vcores(unsigned vsel0_pin); +void omap4_set_warmboot_order(u32 *device_list); #endif diff --git a/arch/arm/mach-omap/omap3_clock.c b/arch/arm/mach-omap/omap3_clock.c index bcde48ff64..03aca492a1 100644 --- a/arch/arm/mach-omap/omap3_clock.c +++ b/arch/arm/mach-omap/omap3_clock.c @@ -652,12 +652,6 @@ void prcm_init(void) /** * @brief Enable the clks & power for perifs * - * GPT2 Sysclk, ICLK,FCLK, 32k Sync is enabled by default - * Uses CONFIG_OMAP_CLOCK_UART to enable UART clocks - * Uses CONFIG_OMAP_CLOCK_I2C to enable I2C clocks - * Uses CONFIG_OMAP_CLOCK_ALL to enable All Clocks! - * - Not a wise idea in most cases - * * @return void */ static void per_clocks_enable(void) diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c index 10e03aec02..f144813cf9 100644 --- a/arch/arm/mach-omap/omap3_generic.c +++ b/arch/arm/mach-omap/omap3_generic.c @@ -28,6 +28,7 @@ */ #include <common.h> +#include <bootsource.h> #include <init.h> #include <io.h> #include <mach/omap3-silicon.h> @@ -40,7 +41,6 @@ #include <mach/wdt.h> #include <mach/sys_info.h> #include <mach/syslib.h> -#include <mach/generic.h> /** * @brief Reset the CPU @@ -461,21 +461,25 @@ void omap3_core_init(void) #ifdef CONFIG_OMAP3_CLOCK_CONFIG prcm_init(); #endif - } #define OMAP3_TRACING_VECTOR1 0x4020ffb4 -enum omap_boot_src omap3_bootsrc(void) +static int omap3_bootsource(void) { + enum bootsource src = BOOTSOURCE_UNKNOWN; u32 bootsrc = readl(OMAP3_TRACING_VECTOR1); if (bootsrc & (1 << 2)) - return OMAP_BOOTSRC_NAND; + src = BOOTSOURCE_NAND; if (bootsrc & (1 << 6)) - return OMAP_BOOTSRC_MMC1; - return OMAP_BOOTSRC_UNKNOWN; + src = BOOTSOURCE_MMC; + bootsource_set(src); + bootsource_set_instance(0); + + return 0; } +postcore_initcall(omap3_bootsource); /* GPMC timing for OMAP3 nand device */ const struct gpmc_config omap3_nand_cfg = { diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c index e1edffa351..3d6ec25c93 100644 --- a/arch/arm/mach-omap/omap4_generic.c +++ b/arch/arm/mach-omap/omap4_generic.c @@ -1,11 +1,11 @@ #include <common.h> +#include <bootsource.h> #include <init.h> #include <io.h> #include <mach/omap4-clock.h> #include <mach/omap4-silicon.h> #include <mach/omap4-mux.h> #include <mach/syslib.h> -#include <mach/generic.h> #include <mach/gpmc.h> #include <mach/gpio.h> #include <mach/omap4_rom_usb.h> @@ -41,6 +41,26 @@ void __noreturn reset_cpu(unsigned long addr) while (1); } +void omap4_set_warmboot_order(u32 *device_list) +{ + const u32 CH[] = { + 0xCF00AA01, + 0x0000000C, + (device_list[0] << 16) | 0x0000, + (device_list[2] << 16) | device_list[1], + 0x0000 | device_list[3], + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000 + }; + int i; + + for (i = 0; i < ARRAY_SIZE(CH); i++) + writel(CH[i], OMAP44XX_SAR_CH_START + i*sizeof(CH[0])); + writel(OMAP44XX_SAR_CH_START, OMAP44XX_SAR_CH_ADDRESS); +} + #define WATCHDOG_WSPR 0x48 #define WATCHDOG_WWPS 0x34 @@ -339,7 +359,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs, /* PHY control values */ sr32(CM_MEMIF_EMIF_1_CLKCTRL, 0, 32, 0x1); - sr32(CM_MEMIF_EMIF_2_CLKCTRL, 0, 32, 0x1); + sr32(CM_MEMIF_EMIF_2_CLKCTRL, 0, 32, 0x1); /* Put the Core Subsystem PD to ON State */ @@ -466,7 +486,7 @@ static int omap_vector_init(void) * The ROM code uses interrupts for the transfers, so do not modify the * interrupt vectors in this case. */ - if (omap4_bootsrc() != OMAP_BOOTSRC_USB1) { + if (bootsource_get() != BOOTSOURCE_USB) { __asm__ __volatile__ ( "mov r0, #0;" "mcr p15, #0, r0, c12, c0, #0;" @@ -478,22 +498,28 @@ static int omap_vector_init(void) return 0; } -core_initcall(omap_vector_init); #define OMAP4_TRACING_VECTOR3 0x4030d048 -enum omap_boot_src omap4_bootsrc(void) +static int omap4_bootsource(void) { + enum bootsource src = BOOTSOURCE_UNKNOWN; u32 bootsrc = readl(OMAP4_TRACING_VECTOR3); if (bootsrc & (1 << 5)) - return OMAP_BOOTSRC_MMC1; + src = BOOTSOURCE_MMC; if (bootsrc & (1 << 3)) - return OMAP_BOOTSRC_NAND; + src = BOOTSOURCE_NAND; if (bootsrc & (1<<20)) - return OMAP_BOOTSRC_USB1; - return OMAP_BOOTSRC_UNKNOWN; + src = BOOTSOURCE_USB; + bootsource_set(src); + bootsource_set_instance(0); + + omap_vector_init(); + + return 0; } +core_initcall(omap4_bootsource); #define GPIO_MASK 0x1f diff --git a/arch/arm/mach-omap/omap_generic.c b/arch/arm/mach-omap/omap_generic.c index 580ed3e165..cfd3dec453 100644 --- a/arch/arm/mach-omap/omap_generic.c +++ b/arch/arm/mach-omap/omap_generic.c @@ -13,23 +13,12 @@ * */ #include <common.h> +#include <bootsource.h> #include <envfs.h> #include <init.h> #include <io.h> #include <fs.h> #include <linux/stat.h> -#include <mach/generic.h> - -enum omap_boot_src omap_bootsrc(void) -{ -#if defined(CONFIG_ARCH_OMAP3) - return omap3_bootsrc(); -#elif defined(CONFIG_ARCH_OMAP4) - return omap4_bootsrc(); -#elif defined(CONFIG_ARCH_AM33XX) - return am33xx_bootsrc(); -#endif -} #if defined(CONFIG_DEFAULT_ENVIRONMENT) && defined(CONFIG_MCI_STARTUP) static int omap_env_init(void) @@ -38,7 +27,7 @@ static int omap_env_init(void) char *diskdev = "/dev/disk0.0"; int ret; - if (omap_bootsrc() != OMAP_BOOTSRC_MMC1) + if (bootsource_get() != BOOTSOURCE_MMC) return 0; ret = stat(diskdev, &s); diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c index 72aa3791e4..3cce3f2be9 100644 --- a/arch/arm/mach-omap/xload.c +++ b/arch/arm/mach-omap/xload.c @@ -1,4 +1,5 @@ #include <common.h> +#include <bootsource.h> #include <partition.h> #include <nand.h> #include <init.h> @@ -6,7 +7,6 @@ #include <linux/mtd/mtd.h> #include <fs.h> #include <fcntl.h> -#include <mach/generic.h> #include <sizes.h> #include <filetype.h> @@ -165,30 +165,32 @@ static __noreturn int omap_xload(void) { int (*func)(void) = NULL; - switch (omap_bootsrc()) + switch (bootsource_get()) { - case OMAP_BOOTSRC_MMC1: - printf("booting from MMC1\n"); + case BOOTSOURCE_MMC: + printf("booting from MMC\n"); func = omap_xload_boot_mmc(); break; - case OMAP_BOOTSRC_USB1: + case BOOTSOURCE_USB: if (IS_ENABLED(CONFIG_FS_OMAP4_USBBOOT)) { - printf("booting from USB1\n"); + printf("booting from USB\n"); func = omap4_xload_boot_usb(); break; } else { - printf("booting from usb1 not enabled\n"); + printf("booting from USB not enabled\n"); } - case OMAP_BOOTSRC_UNKNOWN: - printf("unknown boot source. Fall back to nand\n"); - case OMAP_BOOTSRC_NAND: + case BOOTSOURCE_NAND: printf("booting from NAND\n"); func = omap_xload_boot_nand(SZ_128K); break; - case OMAP_BOOTSRC_SPI1: - printf("booting from SPI1\n"); + case BOOTSOURCE_SPI: + printf("booting from SPI\n"); func = omap_xload_boot_spi(SZ_128K); break; + default: + printf("unknown boot source. Fall back to nand\n"); + func = omap_xload_boot_nand(SZ_128K); + break; } if (!func) { |