3 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 6a02a5459c..ddc042ee5a 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -5,3 +5,4 @@ obj-y += devices.o
 
 obj-$(CONFIG_ARCH_PXA2XX) += mfp-pxa2xx.o
 obj-$(CONFIG_ARCH_PXA27X) += speed-pxa27x.o
+obj-$(CONFIG_RESET_SOURCE) += reset_source.o
diff --git a/arch/arm/mach-pxa/common.c b/arch/arm/mach-pxa/common.c
index 82e81b75d9..69ec0a7c80 100644
--- a/arch/arm/mach-pxa/common.c
+++ b/arch/arm/mach-pxa/common.c
@@ -16,6 +16,7 @@
  */
 
 #include <common.h>
+#include <mach/pxa-regs.h>
 #include <asm/io.h>
 
 #define OSMR3	0x40A0000C
@@ -28,6 +29,9 @@
 
 void reset_cpu(ulong addr)
 {
+	/* Clear last reset source */
+	RCSR = RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR;
+
 	/* Initialize the watchdog and let it fire */
 	writel(OWER_WME, OWER);
 	writel(OSSR_M3, OSSR);
diff --git a/arch/arm/mach-pxa/reset_source.c b/arch/arm/mach-pxa/reset_source.c
new file mode 100644
index 0000000000..2b650c644d
--- /dev/null
+++ b/arch/arm/mach-pxa/reset_source.c
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2014 Robert Jarzmik <robert.jarzmik@free.fr>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <reset_source.h>
+#include <mach/pxa-regs.h>
+
+static int pxa_detect_reset_source(void)
+{
+	u32 reg = RCSR;
+
+	/*
+	 * Order is important, as many bits can be set together
+	 */
+	if (reg & RCSR_GPR)
+		set_reset_source(RESET_RST);
+	else if (reg & RCSR_WDR)
+		set_reset_source(RESET_WDG);
+	else if (reg & RCSR_HWR)
+		set_reset_source(RESET_POR);
+	else if (reg & RCSR_SMR)
+		set_reset_source(RESET_WKE);
+	else
+		set_reset_source(RESET_UKWN);
+
+	return 0;
+}
+
+device_initcall(pxa_detect_reset_source);