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-rw-r--r--arch/arm/mach-omap/include/mach/sys_info.h1
-rw-r--r--arch/arm/mach-omap/omap3_generic.c19
2 files changed, 0 insertions, 20 deletions
diff --git a/arch/arm/mach-omap/include/mach/sys_info.h b/arch/arm/mach-omap/include/mach/sys_info.h
index e54791d54c..4d9b138fd8 100644
--- a/arch/arm/mach-omap/include/mach/sys_info.h
+++ b/arch/arm/mach-omap/include/mach/sys_info.h
@@ -85,7 +85,6 @@ u32 get_cpu_rev(void);
u32 get_sdr_cs_size(u32 offset);
u32 get_sdr_cs1_base(void);
inline u32 get_sysboot_value(void);
-u32 get_gpmc0_base(void);
u32 get_base(void);
u32 running_in_flash(void);
u32 running_in_sram(void);
diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c
index 7cfb3e4eb1..cbac06f786 100644
--- a/arch/arm/mach-omap/omap3_generic.c
+++ b/arch/arm/mach-omap/omap3_generic.c
@@ -204,25 +204,6 @@ inline u32 get_sysboot_value(void)
}
/**
- * @brief Return the current CS0 base address
- *
- * Return current address hardware will be
- * fetching from. The below effectively gives what is correct, its a bit
- * mis-leading compared to the TRM. For the most general case the mask
- * needs to be also taken into account this does work in practice.
- *
- * @return base address
- */
-u32 get_gpmc0_base(void)
-{
- u32 b;
- b = readl(GPMC_REG(CONFIG7_0));
- b &= 0x1F; /* keep base [5:0] */
- b = b << 24; /* ret 0x0b000000 */
- return b;
-}
-
-/**
* @brief Get the upper address of current execution
*
* we can use this to figure out if we are running in SRAM /