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-rw-r--r--arch/arm/boards/afi-gf/lowlevel.c6
-rw-r--r--arch/arm/boards/beaglebone/lowlevel.c12
-rw-r--r--arch/arm/boards/phytec-som-am335x/lowlevel.c10
-rw-r--r--arch/arm/boards/phytec-som-am335x/ram-timings.h40
-rw-r--r--arch/arm/configs/am335x_defconfig4
-rw-r--r--arch/arm/cpu/lowlevel.S4
-rw-r--r--arch/arm/dts/am335x-bone-common.dts1
-rw-r--r--arch/arm/dts/am335x-phytec-phycard-som.dtsi2
-rw-r--r--arch/arm/dts/am335x-phytec-phycore-som.dtsi2
-rw-r--r--arch/arm/dts/imx53-qsb-common.dtsi18
-rw-r--r--arch/arm/lib/bootm.c82
-rw-r--r--arch/arm/mach-omap/Kconfig1
-rw-r--r--arch/efi/efi/efi-device.c4
13 files changed, 132 insertions, 54 deletions
diff --git a/arch/arm/boards/afi-gf/lowlevel.c b/arch/arm/boards/afi-gf/lowlevel.c
index efe15ec99f..91b4b68c6d 100644
--- a/arch/arm/boards/afi-gf/lowlevel.c
+++ b/arch/arm/boards/afi-gf/lowlevel.c
@@ -196,7 +196,7 @@ static const struct module_pin_mux board_can_pin_mux[] = {
{-1},
};
-extern char __dtb_am335x_afi_gf_start[];
+extern char __dtb_z_am335x_afi_gf_start[];
/**
* @brief The basic entry point for board initialization.
@@ -211,7 +211,7 @@ static noinline int gf_sram_init(void)
{
void *fdt;
- fdt = __dtb_am335x_afi_gf_start;
+ fdt = __dtb_z_am335x_afi_gf_start;
/* WDT1 is already running when the bootloader gets control
* Disable it to avoid "random" resets
@@ -258,7 +258,7 @@ ENTRY_FUNCTION(start_am33xx_afi_gf_sdram, r0, r1, r2)
{
void *fdt;
- fdt = __dtb_am335x_afi_gf_start - get_runtime_offset();
+ fdt = __dtb_z_am335x_afi_gf_start - get_runtime_offset();
putc_ll('>');
diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c
index 79d598561c..100f64fdd9 100644
--- a/arch/arm/boards/beaglebone/lowlevel.c
+++ b/arch/arm/boards/beaglebone/lowlevel.c
@@ -103,9 +103,9 @@ static const struct am33xx_emif_regs ddr3_regs = {
.sdram_ref_ctrl = 0xC30,
};
-extern char __dtb_am335x_boneblack_start[];
-extern char __dtb_am335x_bone_common_start[];
-extern char __dtb_am335x_bone_start[];
+extern char __dtb_z_am335x_boneblack_start[];
+extern char __dtb_z_am335x_bone_common_start[];
+extern char __dtb_z_am335x_bone_start[];
/**
* @brief The basic entry point for board initialization.
@@ -121,7 +121,7 @@ static noinline int beaglebone_sram_init(void)
uint32_t sdram_size;
void *fdt;
- fdt = __dtb_am335x_bone_common_start;
+ fdt = __dtb_z_am335x_bone_common_start;
if (is_beaglebone_black())
sdram_size = SZ_512M;
@@ -176,10 +176,10 @@ ENTRY_FUNCTION(start_am33xx_beaglebone_sdram, r0, r1, r2)
if (is_beaglebone_black()) {
sdram_size = SZ_512M;
- fdt = __dtb_am335x_boneblack_start;
+ fdt = __dtb_z_am335x_boneblack_start;
} else {
sdram_size = SZ_256M;
- fdt = __dtb_am335x_bone_start;
+ fdt = __dtb_z_am335x_bone_start;
}
fdt -= get_runtime_offset();
diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
index d7afbb6af3..73e75eb491 100644
--- a/arch/arm/boards/phytec-som-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
@@ -102,8 +102,8 @@ static noinline void physom_board_entry(unsigned long bootinfo, int sdram, void
#define PHYTEC_ENTRY_MLO(name, fdt_name, sdram) \
ENTRY_FUNCTION(name, bootinfo, r1, r2) \
{ \
- extern char __dtb_##fdt_name##_start[]; \
- void *fdt =__dtb_##fdt_name##_start - \
+ extern char __dtb_z_##fdt_name##_start[]; \
+ void *fdt = __dtb_z_##fdt_name##_start - \
get_runtime_offset(); \
physom_board_entry(bootinfo, sdram, fdt); \
}
@@ -111,8 +111,8 @@ static noinline void physom_board_entry(unsigned long bootinfo, int sdram, void
#define PHYTEC_ENTRY(name, fdt_name) \
ENTRY_FUNCTION(name, r0, r1, r2) \
{ \
- extern char __dtb_##fdt_name##_start[]; \
- void *fdt =__dtb_##fdt_name##_start - \
+ extern char __dtb_z_##fdt_name##_start[]; \
+ void *fdt = __dtb_z_##fdt_name##_start - \
get_runtime_offset(); \
am335x_barebox_entry(fdt); \
}
@@ -123,6 +123,8 @@ PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_256mb, am335x_phytec_phycore_s
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J256M16HA15EIT_512MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_2x512mb, am335x_phytec_phycore_som_mlo, PHYCORE_MT41J512M8125IT_2x512MB);
PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_sram_1024mb, am335x_phytec_phycore_som_mlo, PHYCORE_IM8G16D3FBBG15EI_1024MB);
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_512mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K256M16TW107IT_512MB);
+PHYTEC_ENTRY_MLO(start_am33xx_phytec_phycore_r2_sram_256mb, am335x_phytec_phycore_som_mlo, PHYCORE_R2_MT41K128M16JT_256MB);
PHYTEC_ENTRY(start_am33xx_phytec_phycore_sdram, am335x_phytec_phycore_som);
PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_spi_sdram, am335x_phytec_phycore_som_no_spi);
PHYTEC_ENTRY(start_am33xx_phytec_phycore_no_eeprom_sdram, am335x_phytec_phycore_som_no_eeprom);
diff --git a/arch/arm/boards/phytec-som-am335x/ram-timings.h b/arch/arm/boards/phytec-som-am335x/ram-timings.h
index 698b0732b0..884874caf7 100644
--- a/arch/arm/boards/phytec-som-am335x/ram-timings.h
+++ b/arch/arm/boards/phytec-som-am335x/ram-timings.h
@@ -30,6 +30,8 @@ enum {
PHYCORE_MT41J256M16HA15EIT_512MB,
PHYCORE_MT41J512M8125IT_2x512MB,
PHYCORE_IM8G16D3FBBG15EI_1024MB,
+ PHYCORE_R2_MT41K256M16TW107IT_512MB,
+ PHYCORE_R2_MT41K128M16JT_256MB,
PHYCARD_NT5CB128M16BP_256MB,
};
@@ -192,6 +194,44 @@ struct am335x_sdram_timings physom_timings[] = {
.dll_lock_diff0 = 0x0,
},
},
+
+ /* 512MB R2 */
+ [PHYCORE_R2_MT41K256M16TW107IT_512MB] = {
+ .regs = {
+ .emif_read_latency = 0x7,
+ .emif_tim1 = 0x0AAAD4DB,
+ .emif_tim2 = 0x266B7FDA,
+ .emif_tim3 = 0x501F867F,
+ .sdram_config = 0x61C05332,
+ .zq_config = 0x50074BE4,
+ .sdram_ref_ctrl = 0x00000C30,
+ },
+ .data = {
+ .rd_slave_ratio0 = 0x37,
+ .wr_dqs_slave_ratio0 = 0x38,
+ .fifo_we_slave_ratio0 = 0x92,
+ .wr_slave_ratio0 = 0x72,
+ },
+ },
+
+ /* 256MB R2 */
+ [PHYCORE_R2_MT41K128M16JT_256MB] = {
+ .regs = {
+ .emif_read_latency = 0x7,
+ .emif_tim1 = 0x0AAAD4DB,
+ .emif_tim2 = 0x26437FDA,
+ .emif_tim3 = 0x501F83FF,
+ .sdram_config = 0x61C052B2,
+ .zq_config = 0x50074BE4,
+ .sdram_ref_ctrl = 0x00000C30,
+ },
+ .data = {
+ .rd_slave_ratio0 = 0x36,
+ .wr_dqs_slave_ratio0 = 0x38,
+ .fifo_we_slave_ratio0 = 0x99,
+ .wr_slave_ratio0 = 0x73,
+ },
+ },
};
#endif
diff --git a/arch/arm/configs/am335x_defconfig b/arch/arm/configs/am335x_defconfig
index 9563865065..7cf48b841a 100644
--- a/arch/arm/configs/am335x_defconfig
+++ b/arch/arm/configs/am335x_defconfig
@@ -75,9 +75,11 @@ CONFIG_CMD_FLASH=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_LED=y
+CONFIG_CMD_NANDTEST=y
CONFIG_CMD_SPI=y
CONFIG_CMD_LED_TRIGGER=y
CONFIG_CMD_USBGADGET=y
+CONFIG_CMD_WD=y
CONFIG_CMD_BAREBOX_UPDATE=y
CONFIG_CMD_OF_NODE=y
CONFIG_CMD_OF_PROPERTY=y
@@ -123,6 +125,8 @@ CONFIG_LED_GPIO=y
CONFIG_LED_GPIO_OF=y
CONFIG_LED_TRIGGERS=y
CONFIG_EEPROM_AT24=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_OMAP=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_BUS_OMAP_GPMC=y
diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S
index b76222d8f3..e5baa12346 100644
--- a/arch/arm/cpu/lowlevel.S
+++ b/arch/arm/cpu/lowlevel.S
@@ -4,6 +4,8 @@
.section ".text_bare_init_","ax"
ENTRY(arm_cpu_lowlevel_init)
+ /* save lr, since it may be banked away with a processor mode change */
+ mov r2, lr
/* set the cpu to SVC32 mode, mask irq and fiq */
mrs r12, cpsr
bic r12, r12, #0x1f
@@ -54,5 +56,5 @@ ENTRY(arm_cpu_lowlevel_init)
mcr p15, 0, r12, c1, c0, 0 /* SCTLR */
- mov pc, lr
+ mov pc, r2
ENDPROC(arm_cpu_lowlevel_init)
diff --git a/arch/arm/dts/am335x-bone-common.dts b/arch/arm/dts/am335x-bone-common.dts
index 91745d3f62..0488cbe1fc 100644
--- a/arch/arm/dts/am335x-bone-common.dts
+++ b/arch/arm/dts/am335x-bone-common.dts
@@ -9,6 +9,7 @@
#include "am33xx.dtsi"
#include "am33xx-strip.dtsi"
+#include "am33xx-clocks-strip.dtsi"
#include "am335x-bone-common.dtsi"
/ {
diff --git a/arch/arm/dts/am335x-phytec-phycard-som.dtsi b/arch/arm/dts/am335x-phytec-phycard-som.dtsi
index c0b2456636..d1dfa86bca 100644
--- a/arch/arm/dts/am335x-phytec-phycard-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phycard-som.dtsi
@@ -92,7 +92,7 @@
status = "okay";
clock-frequency = <400000>;
- eeprom: 24c32@52 {
+ eeprom: eeprom@54 {
status = "disabled";
compatible = "atmel,24c32";
pagesize = <32>;
diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
index ba0589cdc5..f3a1d4d45a 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
@@ -143,7 +143,7 @@
status = "okay";
clock-frequency = <400000>;
- eeprom: 24c32@52 {
+ eeprom: eeprom@52 {
status = "disabled";
compatible = "atmel,24c32";
pagesize = <32>;
diff --git a/arch/arm/dts/imx53-qsb-common.dtsi b/arch/arm/dts/imx53-qsb-common.dtsi
index bf634e49d4..85e1b8bd01 100644
--- a/arch/arm/dts/imx53-qsb-common.dtsi
+++ b/arch/arm/dts/imx53-qsb-common.dtsi
@@ -19,6 +19,24 @@
device-path = &bareboxenv;
};
};
+
+ /*
+ * The buttons are marked as active high in the upstream dts.
+ * Remove these once fixed upstream.
+ */
+ gpio-keys {
+ power {
+ gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ };
+
+ volume-up {
+ gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
+ };
+
+ volume-down {
+ gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&esdhc1 {
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 1913d5f97a..28b4f4a4b4 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -67,6 +67,42 @@ static int sdram_start_and_size(unsigned long *start, unsigned long *size)
return 0;
}
+static void get_kernel_addresses(unsigned long mem_start, size_t image_size,
+ int verbose, unsigned long *load_address,
+ unsigned long *spacing)
+{
+ /*
+ * We don't know the exact decompressed size so just use a conservative
+ * default of 4 times the size of the compressed image.
+ */
+ size_t image_decomp_size = PAGE_ALIGN(image_size * 4);
+
+ /*
+ * By default put oftree/initrd close behind compressed kernel image to
+ * avoid placing it outside of the kernels lowmem region.
+ */
+ *spacing = SZ_1M;
+
+ if (*load_address == UIMAGE_INVALID_ADDRESS) {
+ /*
+ * Place the kernel at an address where it does not need to
+ * relocate itself before decompression.
+ */
+ *load_address = mem_start + image_decomp_size;
+ if (verbose)
+ printf("no OS load address, defaulting to 0x%08lx\n",
+ *load_address);
+ } else if (*load_address <= mem_start + image_decomp_size) {
+ /*
+ * If the user/image specified an address where the kernel needs
+ * to relocate itself before decompression we need to extend the
+ * spacing to allow this relocation to happen without
+ * overwriting anything placed behind the kernel.
+ */
+ *spacing += image_decomp_size;
+ }
+}
+
static int __do_bootm_linux(struct image_data *data, unsigned long free_mem, int swap)
{
unsigned long kernel;
@@ -124,7 +160,7 @@ static int __do_bootm_linux(struct image_data *data, unsigned long free_mem, int
static int do_bootm_linux(struct image_data *data)
{
- unsigned long load_address, mem_start, mem_size, mem_free;
+ unsigned long load_address, mem_start, mem_size, mem_free, spacing;
int ret;
ret = sdram_start_and_size(&mem_start, &mem_size);
@@ -133,28 +169,14 @@ static int do_bootm_linux(struct image_data *data)
load_address = data->os_address;
- if (load_address == UIMAGE_INVALID_ADDRESS) {
- /*
- * Just use a conservative default of 4 times the size of the
- * compressed image, to avoid the need for the kernel to
- * relocate itself before decompression.
- */
- load_address = mem_start + PAGE_ALIGN(
- bootm_get_os_size(data) * 4);
- if (bootm_verbose(data))
- printf("no OS load address, defaulting to 0x%08lx\n",
- load_address);
- }
+ get_kernel_addresses(mem_start, bootm_get_os_size(data),
+ bootm_verbose(data), &load_address, &spacing);
ret = bootm_load_os(data, load_address);
if (ret)
return ret;
- /*
- * put oftree/initrd close behind compressed kernel image to avoid
- * placing it outside of the kernels lowmem.
- */
- mem_free = PAGE_ALIGN(data->os_res->end + SZ_1M);
+ mem_free = PAGE_ALIGN(data->os_res->end + spacing);
return __do_bootm_linux(data, mem_free, 0);
}
@@ -251,7 +273,7 @@ static int do_bootz_linux(struct image_data *data)
u32 end, start;
size_t image_size;
unsigned long load_address = data->os_address;
- unsigned long mem_start, mem_size, mem_free;
+ unsigned long mem_start, mem_size, mem_free, spacing;
ret = sdram_start_and_size(&mem_start, &mem_size);
if (ret)
@@ -291,20 +313,10 @@ static int do_bootz_linux(struct image_data *data)
}
image_size = end - start;
+ load_address = data->os_address;
- if (load_address == UIMAGE_INVALID_ADDRESS) {
- /*
- * Just use a conservative default of 4 times the size of the
- * compressed image, to avoid the need for the kernel to
- * relocate itself before decompression.
- */
- data->os_address = mem_start + PAGE_ALIGN(image_size * 4);
-
- load_address = data->os_address;
- if (bootm_verbose(data))
- printf("no OS load address, defaulting to 0x%08lx\n",
- load_address);
- }
+ get_kernel_addresses(mem_start, image_size, bootm_verbose(data),
+ &load_address, &spacing);
data->os_res = request_sdram_region("zimage", load_address, image_size);
if (!data->os_res) {
@@ -340,11 +352,7 @@ static int do_bootz_linux(struct image_data *data)
close(fd);
- /*
- * put oftree/initrd close behind compressed kernel image to avoid
- * placing it outside of the kernels lowmem.
- */
- mem_free = PAGE_ALIGN(data->os_res->end + SZ_1M);
+ mem_free = PAGE_ALIGN(data->os_res->end + spacing);
return __do_bootm_linux(data, mem_free, swap);
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 5c68062365..d7c863ca12 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -44,6 +44,7 @@ config ARCH_AM33XX
select GENERIC_GPIO
select OFTREE
select OMAP_CLOCK_SOURCE_DMTIMER
+ select ARM_USE_COMPRESSED_DTB
help
Say Y here if you are using Texas Instrument's AM33xx based platform
diff --git a/arch/efi/efi/efi-device.c b/arch/efi/efi/efi-device.c
index 7db8e48f7b..678a28399d 100644
--- a/arch/efi/efi/efi-device.c
+++ b/arch/efi/efi/efi-device.c
@@ -168,8 +168,10 @@ static struct efi_device *efi_add_device(efi_handle_t *handle, efi_guid_t **guid
efiret = BS->open_protocol(handle, &efi_device_path_protocol_guid,
&devpath, NULL, NULL, EFI_OPEN_PROTOCOL_GET_PROTOCOL);
- if (EFI_ERROR(efiret))
+ if (EFI_ERROR(efiret)) {
+ free(guidarr);
return ERR_PTR(-EINVAL);
+ }
efidev = xzalloc(sizeof(*efidev));
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-21 23:33:01 +0000