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-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boards/avnet-zedboard/flash_header.c4
-rw-r--r--arch/arm/boards/beaglebone/lowlevel.c2
-rw-r--r--arch/arm/boards/friendlyarm-tiny210/lowlevel.c2
-rw-r--r--arch/arm/boards/phytec-som-am335x/ram-timings.h11
-rw-r--r--arch/arm/boards/phytec-som-rk3288/lowlevel.c11
-rw-r--r--arch/arm/configs/rk3288_defconfig2
-rw-r--r--arch/arm/cpu/common.c3
-rw-r--r--arch/arm/cpu/start.c2
-rw-r--r--arch/arm/dts/rk3288-phycore-som.dts2
-rw-r--r--arch/arm/include/asm/barebox-arm.h2
-rw-r--r--arch/arm/lib32/barebox.lds.S2
-rw-r--r--arch/arm/lib32/runtime-offset.S1
-rw-r--r--arch/arm/mach-omap/Kconfig1
-rw-r--r--arch/arm/mach-omap/am33xx_generic.c3
-rw-r--r--arch/arm/mach-omap/include/mach/am33xx-silicon.h2
16 files changed, 38 insertions, 14 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 96ec588da0..620a3ccb0b 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -32,7 +32,7 @@ endif
# testing for a specific architecture or later rather impossible.
arch-$(CONFIG_CPU_64v8) := -D__LINUX_ARM_ARCH__=8 $(call cc-option,-march=armv8-a)
arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a)
-arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6)
+arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6)
arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4t)
arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t
diff --git a/arch/arm/boards/avnet-zedboard/flash_header.c b/arch/arm/boards/avnet-zedboard/flash_header.c
index ea2052405a..d9eb35b0d5 100644
--- a/arch/arm/boards/avnet-zedboard/flash_header.c
+++ b/arch/arm/boards/avnet-zedboard/flash_header.c
@@ -52,10 +52,10 @@ struct zynq_flash_header __flash_header_section flash_header = {
.enc_stat = 0x0,
.user = 0x0,
.flash_offset = 0x8c0,
- .length = barebox_image_size,
+ .length = (unsigned int)&_barebox_image_size,
.res0 = 0x0,
.start_of_exec = 0x0,
- .total_len = barebox_image_size,
+ .total_len = (unsigned int)&_barebox_image_size,
.res1 = 0x1,
.checksum = 0x0,
.res2 = 0x0,
diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c
index 100f64fdd9..a56b4b6240 100644
--- a/arch/arm/boards/beaglebone/lowlevel.c
+++ b/arch/arm/boards/beaglebone/lowlevel.c
@@ -41,6 +41,7 @@ static const struct am33xx_emif_regs ddr2_regs = {
.emif_tim1 = 0x0666B3C9,
.emif_tim2 = 0x243631CA,
.emif_tim3 = 0x0000033F,
+ .ocp_config = 0x00141414,
.sdram_config = 0x41805332,
.sdram_config2 = 0x41805332,
.sdram_ref_ctrl = 0x0000081A,
@@ -97,6 +98,7 @@ static const struct am33xx_emif_regs ddr3_regs = {
.emif_tim1 = 0x0AAAD4DB,
.emif_tim2 = 0x266B7FDA,
.emif_tim3 = 0x501F867F,
+ .ocp_config = 0x00141414,
.zq_config = 0x50074BE4,
.sdram_config = 0x61C05332,
.sdram_config2 = 0x0,
diff --git a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c
index 3ab8d66060..fea00ef503 100644
--- a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c
+++ b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c
@@ -97,7 +97,7 @@ void __bare_init barebox_arm_reset_vector(void)
debug_led(1, 1);
if (! load_stage2((void*)(ld_var(_text) - 16),
- ld_var(_barebox_image_size) + 16)) {
+ barebox_image_size + 16)) {
debug_led(3, 1);
while (1) { } /* hang */
}
diff --git a/arch/arm/boards/phytec-som-am335x/ram-timings.h b/arch/arm/boards/phytec-som-am335x/ram-timings.h
index 9576d265e5..4ea654db12 100644
--- a/arch/arm/boards/phytec-som-am335x/ram-timings.h
+++ b/arch/arm/boards/phytec-som-am335x/ram-timings.h
@@ -45,6 +45,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAD4DB,
.emif_tim2 = 0x26437FDA,
.emif_tim3 = 0x501F83FF,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C052B2,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30,
@@ -66,6 +67,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAE4DB,
.emif_tim2 = 0x266B7FDA,
.emif_tim3 = 0x501F867F,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C05332,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30,
@@ -87,6 +89,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAD4DB,
.emif_tim2 = 0x26437FDA,
.emif_tim3 = 0x501F83FF,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C052B2,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30,
@@ -106,6 +109,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAE4DB,
.emif_tim2 = 0x262F7FDA,
.emif_tim3 = 0x501F82BF,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C05232,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30,
@@ -125,6 +129,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAE4DB,
.emif_tim2 = 0x266B7FDA,
.emif_tim3 = 0x501F867F,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C05332,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30
@@ -144,6 +149,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAE4DB,
.emif_tim2 = 0x266B7FDA,
.emif_tim3 = 0x501F867F,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C053B2,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30
@@ -163,6 +169,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAE4DB,
.emif_tim2 = 0x268F7FDA,
.emif_tim3 = 0x501F88BF,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C053B2,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30
@@ -182,6 +189,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAD4DB,
.emif_tim2 = 0x26437FDA,
.emif_tim3 = 0x501F83FF,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C052B2,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30,
@@ -203,6 +211,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAD4DB,
.emif_tim2 = 0x266B7FDA,
.emif_tim3 = 0x501F867F,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C05332,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30,
@@ -222,6 +231,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAD4DB,
.emif_tim2 = 0x26437FDA,
.emif_tim3 = 0x501F83FF,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C052B2,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30,
@@ -241,6 +251,7 @@ struct am335x_sdram_timings physom_timings[] = {
.emif_tim1 = 0x0AAAD4DB,
.emif_tim2 = 0x268F7FDA,
.emif_tim3 = 0x501F88BF,
+ .ocp_config = 0x003d3d3d,
.sdram_config = 0x61C053B2,
.zq_config = 0x50074BE4,
.sdram_ref_ctrl = 0x00000C30,
diff --git a/arch/arm/boards/phytec-som-rk3288/lowlevel.c b/arch/arm/boards/phytec-som-rk3288/lowlevel.c
index 7804a55bcd..7649ef864a 100644
--- a/arch/arm/boards/phytec-som-rk3288/lowlevel.c
+++ b/arch/arm/boards/phytec-som-rk3288/lowlevel.c
@@ -30,14 +30,13 @@ ENTRY_FUNCTION(start_rk3288_phycore_som, r0, r1, r2)
if (IS_ENABLED(CONFIG_DEBUG_LL)) {
struct rk3288_grf * const grf = (void *)RK3288_GRF_BASE;
- rk_clrsetreg(&grf->gpio4c_iomux,
- GPIO4C1_MASK << GPIO4C1_SHIFT |
- GPIO4C0_MASK << GPIO4C0_SHIFT,
- GPIO4C1_UART0BT_SOUT << GPIO4C1_SHIFT |
- GPIO4C0_UART0BT_SIN << GPIO4C0_SHIFT);
+ rk_clrsetreg(&grf->gpio7ch_iomux,
+ GPIO7C7_MASK << GPIO7C7_SHIFT |
+ GPIO7C6_MASK << GPIO7C6_SHIFT,
+ GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
+ GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
INIT_LL();
}
-
fdt = __dtb_rk3288_phycore_som_start - get_runtime_offset();
barebox_arm_entry(0x0, SZ_1G, fdt);
diff --git a/arch/arm/configs/rk3288_defconfig b/arch/arm/configs/rk3288_defconfig
index f54f4cc3c3..15e6c15a03 100644
--- a/arch/arm/configs/rk3288_defconfig
+++ b/arch/arm/configs/rk3288_defconfig
@@ -26,7 +26,7 @@ CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
CONFIG_RESET_SOURCE=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_ROCKCHIP_UART_PORT=0
+CONFIG_DEBUG_ROCKCHIP_UART_PORT=2
CONFIG_CMD_DMESG=y
CONFIG_LONGHELP=y
CONFIG_CMD_IOMEM=y
diff --git a/arch/arm/cpu/common.c b/arch/arm/cpu/common.c
index 46ce942187..dcd8f0b732 100644
--- a/arch/arm/cpu/common.c
+++ b/arch/arm/cpu/common.c
@@ -78,3 +78,6 @@ int __pure cpu_architecture(void)
return __cpu_architecture;
}
#endif
+
+char __image_start[0] __attribute__((section(".__image_start")));
+char __image_end[0] __attribute__((section(".__image_end"))); \ No newline at end of file
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index a62b0d5563..171e6ad0eb 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -116,7 +116,7 @@ static inline unsigned long arm_mem_boarddata(unsigned long membase,
{
unsigned long mem;
- mem = arm_mem_barebox_image(membase, endmem, barebox_image_size);
+ mem = arm_mem_barebox_image(membase, endmem, arm_barebox_size);
mem -= ALIGN(size, 64);
return mem;
diff --git a/arch/arm/dts/rk3288-phycore-som.dts b/arch/arm/dts/rk3288-phycore-som.dts
index 5410bd1f76..dd74bcfb11 100644
--- a/arch/arm/dts/rk3288-phycore-som.dts
+++ b/arch/arm/dts/rk3288-phycore-som.dts
@@ -44,7 +44,7 @@
};
chosen {
- stdout-path = &uart0;
+ stdout-path = &uart2;
environment-emmc {
compatible = "barebox,environment";
diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h
index e8dfd02389..3aea2e070e 100644
--- a/arch/arm/include/asm/barebox-arm.h
+++ b/arch/arm/include/asm/barebox-arm.h
@@ -179,4 +179,6 @@ static inline unsigned long arm_mem_barebox_image(unsigned long membase,
*/
#define MAX_BSS_SIZE SZ_1M
+#define barebox_image_size (__image_end - __image_start)
+
#endif /* _BAREBOX_ARM_H_ */
diff --git a/arch/arm/lib32/barebox.lds.S b/arch/arm/lib32/barebox.lds.S
index 6dc8bd2f3c..5fd39dc66c 100644
--- a/arch/arm/lib32/barebox.lds.S
+++ b/arch/arm/lib32/barebox.lds.S
@@ -30,6 +30,7 @@ SECTIONS
#else
. = TEXT_BASE;
#endif
+ .image_start : { *(.__image_start) }
#ifndef CONFIG_PBL_IMAGE
PRE_IMAGE
@@ -116,6 +117,7 @@ SECTIONS
}
_edata = .;
+ .image_end : { *(.__image_end) }
. = ALIGN(4);
__bss_start = .;
diff --git a/arch/arm/lib32/runtime-offset.S b/arch/arm/lib32/runtime-offset.S
index f10c4c8469..7375cb961b 100644
--- a/arch/arm/lib32/runtime-offset.S
+++ b/arch/arm/lib32/runtime-offset.S
@@ -39,7 +39,6 @@ ld_var_entry __rel_dyn_start
ld_var_entry __rel_dyn_end
ld_var_entry __dynsym_start
ld_var_entry __dynsym_end
-ld_var_entry _barebox_image_size
ld_var_entry __bss_start
ld_var_entry __bss_stop
#ifdef __PBL__
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 93fa35a208..9c41741b50 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -149,6 +149,7 @@ config OMAP_SERIALBOOT
select XYMODEM
select FS_RAMFS
depends on ARCH_AM33XX && SHELL_NONE
+ depends on !CONSOLE_NONE
help
Say Y here if you want to load the 2nd stage barebox.bin with
xmodem after booting from serial line.
diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c
index 5eead5c589..513746248e 100644
--- a/arch/arm/mach-omap/am33xx_generic.c
+++ b/arch/arm/mach-omap/am33xx_generic.c
@@ -341,6 +341,9 @@ void am33xx_config_sdram(const struct am33xx_emif_regs *regs)
writel(regs->emif_tim3, AM33XX_EMIF4_0_REG(SDRAM_TIM_3));
writel(regs->emif_tim3, AM33XX_EMIF4_0_REG(SDRAM_TIM_3_SHADOW));
+ if (regs->ocp_config)
+ writel(regs->ocp_config, AM33XX_EMIF4_0_REG(OCP_CONFIG));
+
if (regs->zq_config) {
/*
* A value of 0x2800 for the REF CTRL will give us
diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
index 10595d5ee7..0729369255 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
@@ -114,6 +114,7 @@
#define EMIF4_SDRAM_TIM_3_SHADOW 0x2C
#define EMIF0_SDRAM_MGMT_CTRL 0x38
#define EMIF0_SDRAM_MGMT_CTRL_SHD 0x3C
+#define EMIF4_OCP_CONFIG 0x54
#define EMIF4_ZQ_CONFIG 0xC8
#define EMIF4_DDR_PHY_CTRL_1 0xE4
#define EMIF4_DDR_PHY_CTRL_1_SHADOW 0xE8
@@ -217,6 +218,7 @@ struct am33xx_emif_regs {
u32 emif_tim1;
u32 emif_tim2;
u32 emif_tim3;
+ u32 ocp_config;
u32 sdram_config;
u32 sdram_config2;
u32 zq_config;
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-24 21:40:10 +0000