diff options
Diffstat (limited to 'cpu/mpc824x/cpu_init.c')
| -rw-r--r-- | cpu/mpc824x/cpu_init.c | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/cpu/mpc824x/cpu_init.c b/cpu/mpc824x/cpu_init.c index 7871031b97..64c7af5311 100644 --- a/cpu/mpc824x/cpu_init.c +++ b/cpu/mpc824x/cpu_init.c @@ -106,35 +106,6 @@ cpu_init_f (void) CONFIG_READ_BYTE(AMBOR,val); CONFIG_WRITE_BYTE(AMBOR,val|0x1); -#if 0 - /* - * The following bug only affects older (XPC8245) processors. - * DMA transfers initiated by external devices get corrupted due - * to a hardware scheduling problem. - * - * The effect is: - * when transferring X words, the first 32 words are transferred - * OK, the next 3 x 32 words are 'old' data (from previous DMA) - * while the rest of the X words is xferred fine. - * - * Disabling 3 of the 4 32 word hardware buffers solves the problem - * with no significant performance loss. - */ - - CONFIG_READ_BYTE(PCMBCR,val); - /* in order not to corrupt data which is being read over the PCI bus - * with the PPC as slave, we need to reduce the number of PCMRBs to 1, - * 4.11 in the processor user manual - * */ - -#if 1 - CONFIG_WRITE_BYTE(PCMBCR,(val|0xC0)); /* 1 PCMRB */ -#else - CONFIG_WRITE_BYTE(PCMBCR,(val|0x80)); /* 2 PCMRBs */ - CONFIG_WRITE_BYTE(PCMBCR,(val|0x40)); /* 3 PCMRBs */ - /* default, 4 PCMRBs are used */ -#endif -#endif #endif CONFIG_READ_WORD(PICR1, val); |