1 files changed, 136 insertions, 95 deletions

diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
index 00852672da..bd4b50b142 100644
--- a/drivers/clk/at91/clk-peripheral.c
+++ b/drivers/clk/at91/clk-peripheral.c
@@ -1,57 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
 /*
  *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
  */
 
-#include <common.h>
-#include <clock.h>
-#include <linux/list.h>
-#include <linux/clk.h>
+#include <linux/bitops.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
 #include <linux/clk/at91_pmc.h>
+#include <of.h>
 #include <mfd/syscon.h>
-#include <regmap.h>
+#include <linux/regmap.h>
 
 #include "pmc.h"
 
+DEFINE_SPINLOCK(pmc_pcr_lock);
+
 #define PERIPHERAL_ID_MIN	2
 #define PERIPHERAL_ID_MAX	31
 #define PERIPHERAL_MASK(id)	(1 << ((id) & PERIPHERAL_ID_MAX))
 
-#define PERIPHERAL_RSHIFT_MASK	0x3
-#define PERIPHERAL_RSHIFT(val)	(((val) >> 16) & PERIPHERAL_RSHIFT_MASK)
-
 #define PERIPHERAL_MAX_SHIFT	3
 
 struct clk_peripheral {
-	struct clk clk;
+	struct clk_hw hw;
 	struct regmap *regmap;
 	u32 id;
-	const char *parent;
 };
 
-#define to_clk_peripheral(clk) container_of(clk, struct clk_peripheral, clk)
+#define to_clk_peripheral(hw) container_of(hw, struct clk_peripheral, hw)
 
 struct clk_sam9x5_peripheral {
-	struct clk clk;
+	struct clk_hw hw;
 	struct regmap *regmap;
 	struct clk_range range;
+	spinlock_t *lock;
 	u32 id;
 	u32 div;
+	const struct clk_pcr_layout *layout;
+	struct at91_clk_pms pms;
 	bool auto_div;
-	const char *parent;
+	int chg_pid;
 };
 
-#define to_clk_sam9x5_peripheral(clk) \
-	container_of(clk, struct clk_sam9x5_peripheral, clk)
+#define to_clk_sam9x5_peripheral(hw) \
+	container_of(hw, struct clk_sam9x5_peripheral, hw)
 
-static int clk_peripheral_enable(struct clk *clk)
+static int clk_peripheral_enable(struct clk_hw *hw)
 {
-	struct clk_peripheral *periph = to_clk_peripheral(clk);
+	struct clk_peripheral *periph = to_clk_peripheral(hw);
 	int offset = AT91_PMC_PCER;
 	u32 id = periph->id;
 
@@ -64,9 +60,9 @@ static int clk_peripheral_enable(struct clk *clk)
 	return 0;
 }
 
-static void clk_peripheral_disable(struct clk *clk)
+static void clk_peripheral_disable(struct clk_hw *hw)
 {
-	struct clk_peripheral *periph = to_clk_peripheral(clk);
+	struct clk_peripheral *periph = to_clk_peripheral(hw);
 	int offset = AT91_PMC_PCDR;
 	u32 id = periph->id;
 
@@ -77,9 +73,9 @@ static void clk_peripheral_disable(struct clk *clk)
 	regmap_write(periph->regmap, offset, PERIPHERAL_MASK(id));
 }
 
-static int clk_peripheral_is_enabled(struct clk *clk)
+static int clk_peripheral_is_enabled(struct clk_hw *hw)
 {
-	struct clk_peripheral *periph = to_clk_peripheral(clk);
+	struct clk_peripheral *periph = to_clk_peripheral(hw);
 	int offset = AT91_PMC_PCSR;
 	unsigned int status;
 	u32 id = periph->id;
@@ -99,42 +95,45 @@ static const struct clk_ops peripheral_ops = {
 	.is_enabled = clk_peripheral_is_enabled,
 };
 
-struct clk *
+struct clk_hw * __init
 at91_clk_register_peripheral(struct regmap *regmap, const char *name,
 			     const char *parent_name, u32 id)
 {
-	int ret;
 	struct clk_peripheral *periph;
+	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name || id > PERIPHERAL_ID_MAX)
 		return ERR_PTR(-EINVAL);
 
-	periph = xzalloc(sizeof(*periph));
-
-	periph->clk.name = name;
-	periph->clk.ops = &peripheral_ops;
+	periph = kzalloc(sizeof(*periph), GFP_KERNEL);
+	if (!periph)
+		return ERR_PTR(-ENOMEM);
 
-	if (parent_name) {
-		periph->parent = parent_name;
-		periph->clk.parent_names = &periph->parent;
-		periph->clk.num_parents = 1;
-	}
+	init.name = name;
+	init.ops = &peripheral_ops;
+	init.parent_names = &parent_name;
+	init.num_parents = 1;
+	init.flags = 0;
 
 	periph->id = id;
+	periph->hw.init = &init;
 	periph->regmap = regmap;
 
-	ret = clk_register(&periph->clk);
+	hw = &periph->hw;
+	ret = clk_hw_register(NULL, &periph->hw);
 	if (ret) {
 		kfree(periph);
-		return ERR_PTR(ret);
+		hw = ERR_PTR(ret);
 	}
 
-	return &periph->clk;
+	return hw;
 }
 
 static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)
 {
-	struct clk *parent;
+	struct clk_hw *parent;
 	unsigned long parent_rate;
 	int shift = 0;
 
@@ -142,8 +141,8 @@ static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)
 		return;
 
 	if (periph->range.max) {
-		parent = clk_get_parent(&periph->clk);
-		parent_rate = clk_get_rate(parent);
+		parent = clk_hw_get_parent_by_index(&periph->hw, 0);
+		parent_rate = clk_hw_get_rate(parent);
 		if (!parent_rate)
 			return;
 
@@ -157,70 +156,89 @@ static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)
 	periph->div = shift;
 }
 
-static int clk_sam9x5_peripheral_enable(struct clk *clk)
+static int clk_sam9x5_peripheral_set(struct clk_sam9x5_peripheral *periph,
+				     unsigned int status)
 {
-	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(clk);
+	unsigned long flags;
+	unsigned int enable = status ? AT91_PMC_PCR_EN : 0;
 
 	if (periph->id < PERIPHERAL_ID_MIN)
 		return 0;
 
-	regmap_write(periph->regmap, AT91_PMC_PCR,
-		     (periph->id & AT91_PMC_PCR_PID_MASK));
-	regmap_write_bits(periph->regmap, AT91_PMC_PCR,
-			  AT91_PMC_PCR_DIV_MASK | AT91_PMC_PCR_CMD |
-			  AT91_PMC_PCR_EN,
-			  AT91_PMC_PCR_DIV(periph->div) |
-			  AT91_PMC_PCR_CMD |
-			  AT91_PMC_PCR_EN);
+	spin_lock_irqsave(periph->lock, flags);
+	regmap_write(periph->regmap, periph->layout->offset,
+		     (periph->id & periph->layout->pid_mask));
+	regmap_update_bits(periph->regmap, periph->layout->offset,
+			   periph->layout->div_mask | periph->layout->cmd |
+			   enable,
+			   field_prep(periph->layout->div_mask, periph->div) |
+			   periph->layout->cmd | enable);
+	spin_unlock_irqrestore(periph->lock, flags);
 
 	return 0;
 }
 
-static void clk_sam9x5_peripheral_disable(struct clk *clk)
+static int clk_sam9x5_peripheral_enable(struct clk_hw *hw)
 {
-	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(clk);
+	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+
+	return clk_sam9x5_peripheral_set(periph, 1);
+}
+
+static void clk_sam9x5_peripheral_disable(struct clk_hw *hw)
+{
+	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+	unsigned long flags;
 
 	if (periph->id < PERIPHERAL_ID_MIN)
 		return;
 
-	regmap_write(periph->regmap, AT91_PMC_PCR,
-		     (periph->id & AT91_PMC_PCR_PID_MASK));
-	regmap_write_bits(periph->regmap, AT91_PMC_PCR,
-			  AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD,
-			  AT91_PMC_PCR_CMD);
+	spin_lock_irqsave(periph->lock, flags);
+	regmap_write(periph->regmap, periph->layout->offset,
+		     (periph->id & periph->layout->pid_mask));
+	regmap_update_bits(periph->regmap, periph->layout->offset,
+			   AT91_PMC_PCR_EN | periph->layout->cmd,
+			   periph->layout->cmd);
+	spin_unlock_irqrestore(periph->lock, flags);
 }
 
-static int clk_sam9x5_peripheral_is_enabled(struct clk *clk)
+static int clk_sam9x5_peripheral_is_enabled(struct clk_hw *hw)
 {
-	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(clk);
+	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+	unsigned long flags;
 	unsigned int status;
 
 	if (periph->id < PERIPHERAL_ID_MIN)
 		return 1;
 
-	regmap_write(periph->regmap, AT91_PMC_PCR,
-		     (periph->id & AT91_PMC_PCR_PID_MASK));
-	regmap_read(periph->regmap, AT91_PMC_PCR, &status);
+	spin_lock_irqsave(periph->lock, flags);
+	regmap_write(periph->regmap, periph->layout->offset,
+		     (periph->id & periph->layout->pid_mask));
+	regmap_read(periph->regmap, periph->layout->offset, &status);
+	spin_unlock_irqrestore(periph->lock, flags);
 
-	return status & AT91_PMC_PCR_EN ? 1 : 0;
+	return !!(status & AT91_PMC_PCR_EN);
 }
 
 static unsigned long
-clk_sam9x5_peripheral_recalc_rate(struct clk *clk,
+clk_sam9x5_peripheral_recalc_rate(struct clk_hw *hw,
 				  unsigned long parent_rate)
 {
-	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(clk);
+	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+	unsigned long flags;
 	unsigned int status;
 
 	if (periph->id < PERIPHERAL_ID_MIN)
 		return parent_rate;
 
-	regmap_write(periph->regmap, AT91_PMC_PCR,
-		     (periph->id & AT91_PMC_PCR_PID_MASK));
-	regmap_read(periph->regmap, AT91_PMC_PCR, &status);
+	spin_lock_irqsave(periph->lock, flags);
+	regmap_write(periph->regmap, periph->layout->offset,
+		     (periph->id & periph->layout->pid_mask));
+	regmap_read(periph->regmap, periph->layout->offset, &status);
+	spin_unlock_irqrestore(periph->lock, flags);
 
 	if (status & AT91_PMC_PCR_EN) {
-		periph->div = PERIPHERAL_RSHIFT(status);
+		periph->div = field_get(periph->layout->div_mask, status);
 		periph->auto_div = false;
 	} else {
 		clk_sam9x5_peripheral_autodiv(periph);
@@ -229,7 +247,7 @@ clk_sam9x5_peripheral_recalc_rate(struct clk *clk,
 	return parent_rate >> periph->div;
 }
 
-static long clk_sam9x5_peripheral_round_rate(struct clk *clk,
+static long clk_sam9x5_peripheral_round_rate(struct clk_hw *hw,
 					     unsigned long rate,
 					     unsigned long *parent_rate)
 {
@@ -238,7 +256,7 @@ static long clk_sam9x5_peripheral_round_rate(struct clk *clk,
 	unsigned long best_diff;
 	unsigned long cur_rate = *parent_rate;
 	unsigned long cur_diff;
-	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(clk);
+	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
 
 	if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max)
 		return *parent_rate;
@@ -275,12 +293,12 @@ static long clk_sam9x5_peripheral_round_rate(struct clk *clk,
 	return best_rate;
 }
 
-static int clk_sam9x5_peripheral_set_rate(struct clk *clk,
+static int clk_sam9x5_peripheral_set_rate(struct clk_hw *hw,
 					  unsigned long rate,
 					  unsigned long parent_rate)
 {
 	int shift;
-	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(clk);
+	struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
 	if (periph->id < PERIPHERAL_ID_MIN || !periph->range.max) {
 		if (parent_rate == rate)
 			return 0;
@@ -311,41 +329,64 @@ static const struct clk_ops sam9x5_peripheral_ops = {
 	.set_rate = clk_sam9x5_peripheral_set_rate,
 };
 
-struct clk *
-at91_clk_register_sam9x5_peripheral(struct regmap *regmap,
+static const struct clk_ops sam9x5_peripheral_chg_ops = {
+	.enable = clk_sam9x5_peripheral_enable,
+	.disable = clk_sam9x5_peripheral_disable,
+	.is_enabled = clk_sam9x5_peripheral_is_enabled,
+	.recalc_rate = clk_sam9x5_peripheral_recalc_rate,
+	.set_rate = clk_sam9x5_peripheral_set_rate,
+};
+
+struct clk_hw * __init
+at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
+				    const struct clk_pcr_layout *layout,
 				    const char *name, const char *parent_name,
-				    u32 id, const struct clk_range *range)
+				    u32 id, const struct clk_range *range,
+				    int chg_pid, unsigned long flags)
 {
-	int ret;
 	struct clk_sam9x5_peripheral *periph;
+	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name)
 		return ERR_PTR(-EINVAL);
 
-	periph = xzalloc(sizeof(*periph));
-
-	periph->clk.name = name;
-	periph->clk.ops = &sam9x5_peripheral_ops;
+	periph = kzalloc(sizeof(*periph), GFP_KERNEL);
+	if (!periph)
+		return ERR_PTR(-ENOMEM);
 
-	if (parent_name) {
-		periph->parent = parent_name;
-		periph->clk.parent_names = &periph->parent;
-		periph->clk.num_parents = 1;
+	init.name = name;
+	init.parent_names = &parent_name;
+	init.num_parents = 1;
+	init.flags = flags;
+	if (chg_pid < 0) {
+		init.ops = &sam9x5_peripheral_ops;
+	} else {
+		init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
+			      CLK_SET_RATE_PARENT;
+		init.ops = &sam9x5_peripheral_chg_ops;
 	}
 
 	periph->id = id;
+	periph->hw.init = &init;
 	periph->div = 0;
 	periph->regmap = regmap;
-	periph->auto_div = true;
+	periph->lock = lock;
+	if (layout->div_mask)
+		periph->auto_div = true;
+	periph->layout = layout;
 	periph->range = *range;
+	periph->chg_pid = chg_pid;
 
-	ret = clk_register(&periph->clk);
+	hw = &periph->hw;
+	ret = clk_hw_register(NULL, &periph->hw);
 	if (ret) {
 		kfree(periph);
-		return ERR_PTR(ret);
+		hw = ERR_PTR(ret);
+	} else {
+		clk_sam9x5_peripheral_autodiv(periph);
 	}
 
-	clk_sam9x5_peripheral_autodiv(periph);
-
-	return &periph->clk;
+	return hw;
 }