1 files changed, 25 insertions, 32 deletions

diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index 8d5ed7e05c..af83e93b12 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -1,16 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
 /*
  * clk-gate2.c - barebox 2-bit clock support. Based on Linux clk support
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
  */
 
 #include <common.h>
@@ -23,25 +13,27 @@
 
 
 struct clk_gate2 {
-	struct clk clk;
+	struct clk_hw hw;
 	void __iomem *reg;
 	int shift;
 	u8 cgr_val;
 	const char *parent;
-#define CLK_GATE_INVERTED	(1 << 0)
 	unsigned flags;
 };
 
-#define to_clk_gate2(_clk) container_of(_clk, struct clk_gate2, clk)
+static inline struct clk_gate2 *to_clk_gate2(struct clk_hw *hw)
+{
+	return container_of(hw, struct clk_gate2, hw);
+}
 
-static int clk_gate2_enable(struct clk *clk)
+static int clk_gate2_enable(struct clk_hw *hw)
 {
-	struct clk_gate2 *g = to_clk_gate2(clk);
+	struct clk_gate2 *g = to_clk_gate2(hw);
 	u32 val;
 
 	val = readl(g->reg);
 
-	if (g->flags & CLK_GATE_INVERTED)
+	if (g->flags & CLK_GATE_SET_TO_DISABLE)
 		val &= ~(3 << g->shift);
 	else
 		val |= g->cgr_val << g->shift;
@@ -51,14 +43,14 @@ static int clk_gate2_enable(struct clk *clk)
 	return 0;
 }
 
-static void clk_gate2_disable(struct clk *clk)
+static void clk_gate2_disable(struct clk_hw *hw)
 {
-	struct clk_gate2 *g = to_clk_gate2(clk);
+	struct clk_gate2 *g = to_clk_gate2(hw);
 	u32 val;
 
 	val = readl(g->reg);
 
-	if (g->flags & CLK_GATE_INVERTED)
+	if (g->flags & CLK_GATE_SET_TO_DISABLE)
 		val |= 3 << g->shift;
 	else
 		val &= ~(3 << g->shift);
@@ -66,17 +58,17 @@ static void clk_gate2_disable(struct clk *clk)
 	writel(val, g->reg);
 }
 
-static int clk_gate2_is_enabled(struct clk *clk)
+static int clk_gate2_is_enabled(struct clk_hw *hw)
 {
-	struct clk_gate2 *g = to_clk_gate2(clk);
+	struct clk_gate2 *g = to_clk_gate2(hw);
 	u32 val;
 
 	val = readl(g->reg);
 
 	if (val & (1 << g->shift))
-		return g->flags & CLK_GATE_INVERTED ? 0 : 1;
+		return g->flags & CLK_GATE_SET_TO_DISABLE ? 0 : 1;
 	else
-		return g->flags & CLK_GATE_INVERTED ? 1 : 0;
+		return g->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
 }
 
 static struct clk_ops clk_gate2_ops = {
@@ -97,13 +89,13 @@ static struct clk *clk_gate2_alloc(const char *name, const char *parent,
 	g->reg = reg;
 	g->cgr_val = cgr_val;
 	g->shift = shift;
-	g->clk.ops = &clk_gate2_ops;
-	g->clk.name = name;
-	g->clk.parent_names = &g->parent;
-	g->clk.num_parents = 1;
-	g->clk.flags = CLK_SET_RATE_PARENT | flags;
+	g->hw.clk.ops = &clk_gate2_ops;
+	g->hw.clk.name = name;
+	g->hw.clk.parent_names = &g->parent;
+	g->hw.clk.num_parents = 1;
+	g->hw.clk.flags = CLK_SET_RATE_PARENT | flags;
 
-	return &g->clk;
+	return &g->hw.clk;
 }
 
 struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
@@ -114,9 +106,10 @@ struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
 
 	g = clk_gate2_alloc(name , parent, reg, shift, cgr_val, flags);
 
-	ret = clk_register(g);
+	ret = bclk_register(g);
 	if (ret) {
-		free(to_clk_gate2(g));
+		struct clk_hw *hw = clk_to_clk_hw(g);
+		free(to_clk_gate2(hw));
 		return ERR_PTR(ret);
 	}