1 files changed, 22 insertions, 23 deletions

diff --git a/drivers/clk/imx/clk-pllv1.c b/drivers/clk/imx/clk-pllv1.c
index f992134f7e..62afa2b6b2 100644
--- a/drivers/clk/imx/clk-pllv1.c
+++ b/drivers/clk/imx/clk-pllv1.c
@@ -1,15 +1,5 @@
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
+// SPDX-License-Identifier: GPL-2.0-or-later
+
 #include <common.h>
 #include <init.h>
 #include <driver.h>
@@ -18,20 +8,29 @@
 #include <linux/clkdev.h>
 #include <linux/err.h>
 #include <malloc.h>
-#include <asm-generic/div64.h>
+#include <linux/math64.h>
 
 #include "clk.h"
 
+#define MFN_BITS	(10)
+#define MFN_SIGN	(BIT(MFN_BITS - 1))
+#define MFN_MASK	(MFN_SIGN - 1)
+
 struct clk_pllv1 {
-	struct clk clk;
+	struct clk_hw hw;
 	void __iomem *reg;
 	const char *parent;
 };
 
-static unsigned long clk_pllv1_recalc_rate(struct clk *clk,
+static inline bool mfn_is_negative(unsigned int mfn)
+{
+    return mfn & MFN_SIGN;
+}
+
+static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw,
 		unsigned long parent_rate)
 {
-	struct clk_pllv1 *pll = container_of(clk, struct clk_pllv1, clk);
+	struct clk_pllv1 *pll = container_of(hw, struct clk_pllv1, hw);
 	unsigned long long ll;
 	int mfn_abs;
 	unsigned int mfi, mfn, mfd, pd;
@@ -60,7 +59,7 @@ static unsigned long clk_pllv1_recalc_rate(struct clk *clk,
 	ll = (unsigned long long)freq * mfn_abs;
 
 	do_div(ll, mfd + 1);
-	if (mfn < 0)
+	if (mfn_is_negative(mfn))
 		ll = (freq * mfi) - ll;
 	else
 		ll = (freq * mfi) + ll;
@@ -80,16 +79,16 @@ struct clk *imx_clk_pllv1(const char *name, const char *parent,
 
 	pll->parent = parent;
 	pll->reg = base;
-	pll->clk.ops = &clk_pllv1_ops;
-	pll->clk.name = name;
-	pll->clk.parent_names = &pll->parent;
-	pll->clk.num_parents = 1;
+	pll->hw.clk.ops = &clk_pllv1_ops;
+	pll->hw.clk.name = name;
+	pll->hw.clk.parent_names = &pll->parent;
+	pll->hw.clk.num_parents = 1;
 
-	ret = clk_register(&pll->clk);
+	ret = bclk_register(&pll->hw.clk);
 	if (ret) {
 		free(pll);
 		return ERR_PTR(ret);
 	}
 
-	return &pll->clk;
+	return &pll->hw.clk;
 }