5 files changed, 8 insertions, 18 deletions
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index 87a3969c28..39ccf0a226 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -352,7 +352,8 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
 	pll_parents[1] = pll->pll_name;
 	pll_parents[2] = parent_names[1];
 
-	pll_mux = clk_mux_alloc(name, base + mode_offset, mode_shift, PLL_MODE_MASK, pll_parents, 3, CLK_SET_RATE_PARENT);
+	pll_mux = clk_mux_alloc(name, CLK_SET_RATE_PARENT, base + mode_offset, mode_shift,
+				PLL_MODE_MASK, pll_parents, 3, 0);
 	pll->pll_mux_ops = pll_mux->ops;
 	mux_clk = pll_mux;
 
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index 7dda2963e3..9340739945 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -25,9 +25,6 @@
 #define RK3066_GRF_SOC_STATUS	0x15c
 #define RK3188_GRF_SOC_STATUS	0xac
 
-#define CLK_SET_RATE_NO_REPARENT 0
-#define CLK_DIVIDER_READ_ONLY 0
-
 enum rk3188_plls {
 	apll, cpll, dpll, gpll,
 };
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index bb111e1e0b..dcfaae2407 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -25,9 +25,6 @@
 #define RK3288_GRF_SOC_CON(x)	(0x244 + x * 4)
 #define RK3288_GRF_SOC_STATUS1	0x284
 
-#define CLK_SET_RATE_NO_REPARENT 0
-#define CLK_DIVIDER_READ_ONLY 0
-
 enum rk3288_plls {
 	apll, dpll, cpll, gpll, npll,
 };
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index 3222a4e09e..9e0cbadd57 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -50,7 +50,7 @@ static struct clk *rockchip_clk_register_branch(const char *name,
 	struct clk *div = NULL;
 
 	if (num_parents > 1) {
-		mux = clk_mux_alloc(name, base + muxdiv_offset, mux_shift,
+		mux = clk_mux_alloc(name, 0, base + muxdiv_offset, mux_shift,
 		    mux_width, parent_names, num_parents, mux_flags);
 		if (!mux)
 			return ERR_PTR(-ENOMEM);
@@ -64,7 +64,7 @@ static struct clk *rockchip_clk_register_branch(const char *name,
 	}
 
 	if (div_width > 0) {
-		div = clk_divider_alloc(name, *parent_names,
+		div = clk_divider_alloc(name, *parent_names, 0,
 		    base + muxdiv_offset, div_shift, div_width, div_flags);
 		if (!div)
 			return ERR_PTR(-ENOMEM);
@@ -176,25 +176,21 @@ void __init rockchip_clk_register_branches(
 		/* catch simple muxes */
 		switch (list->branch_type) {
 		case branch_mux:
-			/*
-			 * mux_flags and flags are ored, this is safe,
-			 * since there is no value clash, but isn't that elegant
-			 */
-			clk = clk_mux(list->name,
+			clk = clk_mux(list->name, flags,
 			    reg_base + list->muxdiv_offset, list->mux_shift,
 			    list->mux_width, list->parent_names,
-			    list->num_parents, list->mux_flags | flags);
+			    list->num_parents, list->mux_flags);
 			break;
 		case branch_divider:
 			if (list->div_table)
 				clk = clk_divider_table(list->name,
-				    list->parent_names[0],
+				    list->parent_names[0], flags,
 				    reg_base + list->muxdiv_offset,
 				    list->div_shift, list->div_width,
 				    list->div_table, list->div_flags);
 			else
 				clk = clk_divider(list->name,
-				    list->parent_names[0],
+				    list->parent_names[0], flags,
 				    reg_base + list->muxdiv_offset,
 				    list->div_shift, list->div_width,
 				    list->div_flags);
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index aa52638f70..d6798a9055 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -27,7 +27,6 @@
 #include <linux/clk.h>
 
 /* To keep changes from kernel smaller */
-#define CLK_IGNORE_UNUSED 0
 #define CLK_GATE_SET_TO_DISABLE	CLK_GATE_INVERTED
 #define CLK_GET_RATE_NOCACHE 0