diff options
Diffstat (limited to 'drivers/clk/socfpga/clk-periph-a10.c')
| -rw-r--r-- | drivers/clk/socfpga/clk-periph-a10.c | 41 |
1 files changed, 15 insertions, 26 deletions
diff --git a/drivers/clk/socfpga/clk-periph-a10.c b/drivers/clk/socfpga/clk-periph-a10.c index 9dd7fc9c25..f9cf40b0aa 100644 --- a/drivers/clk/socfpga/clk-periph-a10.c +++ b/drivers/clk/socfpga/clk-periph-a10.c @@ -1,17 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2015 Altera Corporation. All rights reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. */ #include <common.h> @@ -28,12 +17,12 @@ #define SOCFPGA_MPU_FREE_CLK "mpu_free_clk" #define SOCFPGA_NOC_FREE_CLK "noc_free_clk" #define SOCFPGA_SDMMC_FREE_CLK "sdmmc_free_clk" -#define to_socfpga_periph_clk(p) container_of(p, struct socfpga_periph_clk, clk) +#define to_socfpga_periph_clk(p) container_of(p, struct socfpga_periph_clk, hw) -static unsigned long clk_periclk_recalc_rate(struct clk *clk, +static unsigned long clk_periclk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { - struct socfpga_periph_clk *socfpgaclk = to_socfpga_periph_clk(clk); + struct socfpga_periph_clk *socfpgaclk = to_socfpga_periph_clk(hw); u32 div; if (socfpgaclk->fixed_div) { @@ -49,15 +38,15 @@ static unsigned long clk_periclk_recalc_rate(struct clk *clk, return parent_rate / div; } -static int clk_periclk_get_parent(struct clk *clk) +static int clk_periclk_get_parent(struct clk_hw *hw) { - struct socfpga_periph_clk *socfpgaclk = to_socfpga_periph_clk(clk); + struct socfpga_periph_clk *socfpgaclk = to_socfpga_periph_clk(hw); u32 clk_src; clk_src = readl(socfpgaclk->reg); - if (streq(clk->name, SOCFPGA_MPU_FREE_CLK) || - streq(clk->name, SOCFPGA_NOC_FREE_CLK) || - streq(clk->name, SOCFPGA_SDMMC_FREE_CLK)) + if (streq(clk_hw_get_name(hw), SOCFPGA_MPU_FREE_CLK) || + streq(clk_hw_get_name(hw), SOCFPGA_NOC_FREE_CLK) || + streq(clk_hw_get_name(hw), SOCFPGA_SDMMC_FREE_CLK)) return (clk_src >> CLK_MGR_FREE_SHIFT) & CLK_MGR_FREE_MASK; else @@ -109,19 +98,19 @@ static struct clk *__socfpga_periph_init(struct device_node *node, break; } - periph_clk->clk.num_parents = i; - periph_clk->clk.parent_names = periph_clk->parent_names; + periph_clk->hw.clk.num_parents = i; + periph_clk->hw.clk.parent_names = periph_clk->parent_names; - periph_clk->clk.name = xstrdup(clk_name); - periph_clk->clk.ops = ops; + periph_clk->hw.clk.name = xstrdup(clk_name); + periph_clk->hw.clk.ops = ops; - rc = clk_register(&periph_clk->clk); + rc = bclk_register(&periph_clk->hw.clk); if (rc) { free(periph_clk); return ERR_PTR(rc); } - return &periph_clk->clk; + return &periph_clk->hw.clk; } struct clk *socfpga_a10_periph_init(struct device_node *node) |