diff options
Diffstat (limited to 'drivers/clk/zynqmp/clkc.c')
| -rw-r--r-- | drivers/clk/zynqmp/clkc.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/clk/zynqmp/clkc.c b/drivers/clk/zynqmp/clkc.c index 86d85b6daa..35eaf6f18e 100644 --- a/drivers/clk/zynqmp/clkc.c +++ b/drivers/clk/zynqmp/clkc.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0-only /* * Zynq UltraScale+ MPSoC Clock Controller * @@ -14,7 +14,7 @@ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/clkdev.h> -#include <mach/firmware-zynqmp.h> +#include <mach/zynqmp/firmware-zynqmp.h> #include "clk-zynqmp.h" @@ -446,13 +446,13 @@ static struct clk *zynqmp_register_clk_topology(char *clk_name, return clk; } -static int zynqmp_register_clocks(struct device_d *dev, +static int zynqmp_register_clocks(struct device *dev, struct clk **clks, size_t num_clocks) { unsigned int i; const char *parent_names[MAX_PARENT]; char *name; - struct device_node *node = dev->device_node; + struct device_node *node = dev->of_node; int num_parents; for (i = 0; i < num_clocks; i++) { @@ -518,7 +518,7 @@ static void zynqmp_fill_clock_info(struct zynqmp_clock_info *clock_info, } } -static int zynqmp_clock_probe(struct device_d *dev) +static int zynqmp_clock_probe(struct device *dev) { int err; u32 api_version; @@ -558,7 +558,7 @@ static int zynqmp_clock_probe(struct device_d *dev) zynqmp_register_clocks(dev, clk_data->clks, num_clocks); clk_data->clk_num = num_clocks; - of_clk_add_provider(dev->device_node, of_clk_src_onecell_get, clk_data); + of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, clk_data); /* * We can free clock_info now, as is only used to store clock info @@ -573,8 +573,9 @@ static struct of_device_id zynqmp_clock_of_match[] = { {.compatible = "xlnx,zynqmp-clk"}, {}, }; +MODULE_DEVICE_TABLE(of, zynqmp_clock_of_match); -static struct driver_d zynqmp_clock_driver = { +static struct driver zynqmp_clock_driver = { .probe = zynqmp_clock_probe, .name = "zynqmp_clock", .of_compatible = DRV_OF_COMPAT(zynqmp_clock_of_match), |