diff options
Diffstat (limited to 'drivers/mtd/nand/nand_s3c24xx.c')
| -rw-r--r-- | drivers/mtd/nand/nand_s3c24xx.c | 62 |
1 files changed, 28 insertions, 34 deletions
diff --git a/drivers/mtd/nand/nand_s3c24xx.c b/drivers/mtd/nand/nand_s3c24xx.c index 9fbc0f90d3..59bd6c9fed 100644 --- a/drivers/mtd/nand/nand_s3c24xx.c +++ b/drivers/mtd/nand/nand_s3c24xx.c @@ -26,6 +26,7 @@ #include <malloc.h> #include <init.h> #include <linux/mtd/mtd.h> +#include <linux/mtd/rawnand.h> #include <linux/mtd/nand.h> #include <mach/s3c-generic.h> #include <mach/s3c-iomap.h> @@ -200,10 +201,9 @@ static void __nand_boot_init disable_nand_controller(void __iomem *host) * * This is a special block read variant for the S3C2440 CPU. */ -static void s3c2440_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +static void s3c2440_nand_read_buf(struct nand_chip *chip, uint8_t *buf, int len) { - struct nand_chip *nand_chip = mtd_to_nand(mtd); - struct s3c24x0_nand_host *host = nand_chip->priv; + struct s3c24x0_nand_host *host = chip->priv; readsl(host->base + NFDATA, buf, len >> 2); @@ -224,11 +224,10 @@ static void s3c2440_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) * * This is a special block write variant for the S3C2440 CPU. */ -static void s3c2440_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, +static void s3c2440_nand_write_buf(struct nand_chip *chip, const uint8_t *buf, int len) { - struct nand_chip *nand_chip = mtd_to_nand(mtd); - struct s3c24x0_nand_host *host = nand_chip->priv; + struct s3c24x0_nand_host *host = chip->priv; writesl(host->base + NFDATA, buf, len >> 2); @@ -252,7 +251,7 @@ static void s3c2440_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, * * @note: This routine works always on a 24 bit ECC */ -static int s3c2410_nand_correct_data(struct mtd_info *mtd, uint8_t *dat, +static int s3c2410_nand_correct_data(struct nand_chip *chip, uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc) { unsigned int diff0, diff1, diff2; @@ -313,10 +312,9 @@ static int s3c2410_nand_correct_data(struct mtd_info *mtd, uint8_t *dat, return -1; } -static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) +static void s3c2410_nand_enable_hwecc(struct nand_chip *chip, int mode) { - struct nand_chip *nand_chip = mtd_to_nand(mtd); - struct s3c24x0_nand_host *host = nand_chip->priv; + struct s3c24x0_nand_host *host = chip->priv; #ifdef CONFIG_CPU_S3C2410 writel(readl(host->base + NFCONF) | NFCONF_INITECC , host->base + NFCONF); @@ -326,10 +324,9 @@ static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) #endif } -static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, uint8_t *ecc_code) +static int s3c2410_nand_calculate_ecc(struct nand_chip *chip, const uint8_t *dat, uint8_t *ecc_code) { - struct nand_chip *nand_chip = mtd_to_nand(mtd); - struct s3c24x0_nand_host *host = nand_chip->priv; + struct s3c24x0_nand_host *host = chip->priv; #ifdef CONFIG_CPU_S3C2410 ecc_code[0] = readb(host->base + NFECC); @@ -346,30 +343,27 @@ static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, return 0; } -static void s3c24x0_nand_select_chip(struct mtd_info *mtd, int chip) +static void s3c24x0_nand_select_chip(struct nand_chip *chip, int num) { - struct nand_chip *nand_chip = mtd_to_nand(mtd); - struct s3c24x0_nand_host *host = nand_chip->priv; + struct s3c24x0_nand_host *host = chip->priv; - if (chip == -1) + if (num == -1) disable_cs(host->base); else enable_cs(host->base); } -static int s3c24x0_nand_devready(struct mtd_info *mtd) +static int s3c24x0_nand_devready(struct nand_chip *chip) { - struct nand_chip *nand_chip = mtd_to_nand(mtd); - struct s3c24x0_nand_host *host = nand_chip->priv; + struct s3c24x0_nand_host *host = chip->priv; return readw(host->base + NFSTAT) & NFSTAT_BUSY; } -static void s3c24x0_nand_hwcontrol(struct mtd_info *mtd, int cmd, +static void s3c24x0_nand_hwcontrol(struct nand_chip *chip, int cmd, unsigned int ctrl) { - struct nand_chip *nand_chip = mtd_to_nand(mtd); - struct s3c24x0_nand_host *host = nand_chip->priv; + struct s3c24x0_nand_host *host = chip->priv; if (cmd == NAND_CMD_NONE) return; @@ -427,24 +421,24 @@ static int s3c24x0_nand_probe(struct device_d *dev) /* structures must be linked */ chip = &host->nand; - mtd = &chip->mtd; - mtd->parent = dev; + mtd = nand_to_mtd(chip); + mtd->dev.parent = dev; /* init the default settings */ /* 50 us command delay time */ - chip->chip_delay = 50; + chip->legacy.chip_delay = 50; chip->priv = host; - chip->IO_ADDR_R = chip->IO_ADDR_W = host->base + NFDATA; + chip->legacy.IO_ADDR_R = chip->legacy.IO_ADDR_W = host->base + NFDATA; #ifdef CONFIG_CPU_S3C2440 - chip->read_buf = s3c2440_nand_read_buf; - chip->write_buf = s3c2440_nand_write_buf; + chip->legacy.read_buf = s3c2440_nand_read_buf; + chip->legacy.write_buf = s3c2440_nand_write_buf; #endif - chip->cmd_ctrl = s3c24x0_nand_hwcontrol; - chip->dev_ready = s3c24x0_nand_devready; - chip->select_chip = s3c24x0_nand_select_chip; + chip->legacy.cmd_ctrl = s3c24x0_nand_hwcontrol; + chip->legacy.dev_ready = s3c24x0_nand_devready; + chip->legacy.select_chip = s3c24x0_nand_select_chip; /* we are using the hardware ECC feature of this device */ chip->ecc.calculate = s3c2410_nand_calculate_ecc; @@ -469,7 +463,7 @@ static int s3c24x0_nand_probe(struct device_d *dev) { /* small page (512 bytes per page) */ chip->ecc.size = 512; - chip->ecc.layout = &nand_hw_eccoob; + mtd_set_ecclayout(mtd, &nand_hw_eccoob); } if (pdata->flash_bbt) { @@ -482,7 +476,7 @@ static int s3c24x0_nand_probe(struct device_d *dev) goto on_error; /* Scan to find existence of the device */ - ret = nand_scan(mtd, 1); + ret = nand_scan(chip, 1); if (ret != 0) { ret = -ENXIO; goto on_error; |