1 files changed, 90 insertions, 0 deletions
diff --git a/drivers/nor/m25p80.h b/drivers/nor/m25p80.h
new file mode 100644
index 0000000000..3f9dd9cc59
--- /dev/null
+++ b/drivers/nor/m25p80.h
@@ -0,0 +1,90 @@
+#ifndef _M25P80_H_
+#define _M25P80_H_
+
+/* Flash opcodes. */
+#define	OPCODE_WREN		0x06	/* Write enable */
+#define	OPCODE_RDSR		0x05	/* Read status register */
+#define	OPCODE_WRSR		0x01	/* Write status register 1 byte */
+#define	OPCODE_NORM_READ	0x03	/* Read data bytes (low frequency) */
+#define	OPCODE_FAST_READ	0x0b	/* Read data bytes (high frequency) */
+#define	OPCODE_PP		0x02	/* Page program (up to 256 bytes) */
+#define	OPCODE_BE_4K		0x20	/* Erase 4KiB block */
+#define	OPCODE_BE_32K		0x52	/* Erase 32KiB block */
+#define	OPCODE_CHIP_ERASE	0xc7	/* Erase whole flash chip */
+#define	OPCODE_SE		0xd8	/* Sector erase (usually 64KiB) */
+#define	OPCODE_RDID		0x9f	/* Read JEDEC ID */
+
+/* Used for SST flashes only. */
+#define	OPCODE_BP		0x02	/* Byte program */
+#define	OPCODE_WRDI		0x04	/* Write disable */
+#define	OPCODE_AAI_WP		0xad	/* Auto address increment word program */
+
+/* Used for Macronix flashes only. */
+#define	OPCODE_EN4B		0xb7	/* Enter 4-byte mode */
+#define	OPCODE_EX4B		0xe9	/* Exit 4-byte mode */
+
+/* Status Register bits. */
+#define	SR_WIP			1	/* Write in progress */
+#define	SR_WEL			2	/* Write enable latch */
+/* meaning of other SR_* bits may differ between vendors */
+#define	SR_BP0			4	/* Block protect 0 */
+#define	SR_BP1			8	/* Block protect 1 */
+#define	SR_BP2			0x10	/* Block protect 2 */
+#define	SR_SRWD			0x80	/* SR write protect */
+
+/* Define max times to check status register before we give up. */
+#define	MAX_READY_WAIT		40	/* M25P16 specs 40s max chip erase */
+#define MAX_CMD_SIZE		5
+
+#ifdef CONFIG_M25PXX_USE_FAST_READ
+#define OPCODE_READ		OPCODE_FAST_READ
+#define FAST_READ_DUMMY_BYTE	1
+#else
+#define OPCODE_READ		OPCODE_NORM_READ
+#define FAST_READ_DUMMY_BYTE	0
+#endif
+
+#define SPI_NAME_SIZE   32
+
+struct spi_device_id {
+	char name[SPI_NAME_SIZE];
+	unsigned long driver_data;
+};
+
+struct m25p {
+	struct spi_device	*spi;
+	struct flash_info	*info;
+	struct mtd_info	mtd;
+	struct cdev		cdev;
+	char			*name;
+	u32			erasesize;
+	u16			page_size;
+	u16			addr_width;
+	u8			erase_opcode;
+	u8			*command;
+	u32			size;
+};
+
+struct flash_info {
+	/* JEDEC id zero means "no ID" (most older chips); otherwise it has
+	 * a high byte of zero plus three data bytes: the manufacturer id,
+	 * then a two byte device id.
+	 */
+	u32		jedec_id;
+	u16		ext_id;
+
+	/* The size listed here is what works with OPCODE_SE, which isn't
+	 * necessarily called a "sector" by the vendor.
+	 */
+	unsigned	sector_size;
+	u16		n_sectors;
+
+	u16		page_size;
+	u16		addr_width;
+
+	u16		flags;
+#define	SECT_4K		0x01		/* OPCODE_BE_4K works uniformly */
+#define	M25P_NO_ERASE	0x02		/* No erase command needed */
+};
+
+#endif