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-rw-r--r--drivers/bus/omap-gpmc.c3
-rw-r--r--drivers/clocksource/Kconfig4
-rw-r--r--drivers/clocksource/Makefile1
-rw-r--r--drivers/clocksource/digic.c93
-rw-r--r--drivers/gpio/Kconfig4
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/gpio-digic.c180
-rw-r--r--drivers/mtd/nand/nand_omap_gpmc.c20
-rw-r--r--drivers/of/partition.c4
-rw-r--r--drivers/serial/Kconfig4
-rw-r--r--drivers/serial/Makefile1
-rw-r--r--drivers/serial/serial_digic.c132
12 files changed, 431 insertions, 16 deletions
diff --git a/drivers/bus/omap-gpmc.c b/drivers/bus/omap-gpmc.c
index ad21af2903..d7b02cf6ec 100644
--- a/drivers/bus/omap-gpmc.c
+++ b/drivers/bus/omap-gpmc.c
@@ -382,9 +382,6 @@ static struct dt_eccmode modes[] = {
.mode = OMAP_ECC_BCH4_CODE_HW,
}, {
.name = "bch8",
- .mode = OMAP_ECC_BCH8_CODE_HW,
- }, {
- .name = "bch8-romcode",
.mode = OMAP_ECC_BCH8_CODE_HW_ROMCODE,
},
};
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index c1480ceaaf..fc5a389b95 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -14,6 +14,10 @@ config CLOCKSOURCE_CLPS711X
bool
depends on ARCH_CLPS711X
+config CLOCKSOURCE_DIGIC
+ bool
+ depends on ARCH_DIGIC
+
config CLOCKSOURCE_DUMMY
bool "Enable dummy software-only clocksource"
help
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 97c0288aaa..b80df6b2c9 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -2,6 +2,7 @@ obj-$(CONFIG_AMBA_SP804) += amba-sp804.o
obj-$(CONFIG_ARM_SMP_TWD) += arm_smp_twd.o
obj-$(CONFIG_CLOCKSOURCE_BCM2835) += bcm2835.o
obj-$(CONFIG_CLOCKSOURCE_CLPS711X) += clps711x.o
+obj-$(CONFIG_CLOCKSOURCE_DIGIC) += digic.o
obj-$(CONFIG_CLOCKSOURCE_DUMMY) += dummy.o
obj-$(CONFIG_CLOCKSOURCE_MVEBU) += mvebu.o
obj-$(CONFIG_CLOCKSOURCE_NOMADIK) += nomadik.o
diff --git a/drivers/clocksource/digic.c b/drivers/clocksource/digic.c
new file mode 100644
index 0000000000..b80ef6f6fa
--- /dev/null
+++ b/drivers/clocksource/digic.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2013, 2014 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <io.h>
+#include <init.h>
+#include <clock.h>
+
+#define DIGIC_TIMER_CLOCK 1000000
+
+#define DIGIC_TIMER_CONTROL 0x00
+#define DIGIC_TIMER_VALUE 0x0c
+
+static void __iomem *timer_base;
+
+static uint64_t digic_cs_read(void)
+{
+ return (uint64_t)(0xffff - readl(timer_base + DIGIC_TIMER_VALUE));
+}
+
+static struct clocksource digic_cs = {
+ .read = digic_cs_read,
+ .mask = CLOCKSOURCE_MASK(16),
+};
+
+static int digic_timer_probe(struct device_d *dev)
+{
+ /* use only one timer */
+ if (timer_base)
+ return -EBUSY;
+
+ timer_base = dev_request_mem_region(dev, 0);
+ if (!timer_base) {
+ dev_err(dev, "could not get memory region\n");
+ return -ENODEV;
+ }
+
+ clocks_calc_mult_shift(&digic_cs.mult, &digic_cs.shift,
+ DIGIC_TIMER_CLOCK, NSEC_PER_SEC, 1);
+
+ /* disable timer */
+ writel(0x80000000, timer_base + DIGIC_TIMER_CONTROL);
+
+ /* magic values... divider? */
+ writel(0x00000002, timer_base + 0x04);
+ writel(0x00000003, timer_base + 0x14);
+
+ /* max counter value */
+ writel(0x0000ffff, timer_base + 0x08);
+
+ init_clock(&digic_cs);
+
+ /* enable timer */
+ writel(0x00000001, timer_base + DIGIC_TIMER_CONTROL);
+ /* start timer */
+ writel(0x00000001, timer_base + 0x10);
+
+ return 0;
+}
+
+static __maybe_unused struct of_device_id digic_timer_dt_ids[] = {
+ {
+ .compatible = "canon,digic-timer",
+ }, {
+ /* sentinel */
+ }
+};
+
+static struct driver_d digic_timer_driver = {
+ .probe = digic_timer_probe,
+ .name = "digic-timer",
+ .of_compatible = DRV_OF_COMPAT(digic_timer_dt_ids),
+};
+
+static int digic_timer_init(void)
+{
+ return platform_driver_register(&digic_timer_driver);
+}
+coredevice_initcall(digic_timer_init);
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index f98a9c00ef..545c132107 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -9,6 +9,10 @@ menu "GPIO"
config GPIO_GENERIC
bool
+config GPIO_DIGIC
+ bool "GPIO support for Canon DIGIC"
+ depends on ARCH_DIGIC
+
config GPIO_BCM2835
bool "GPIO support for BCM2835"
depends on ARCH_BCM2835
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 22d2ac0706..045a18c15e 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_GPIOLIB) += gpiolib.o
obj-$(CONFIG_GPIO_BCM2835) += gpio-bcm2835.o
obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o
obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o
+obj-$(CONFIG_GPIO_DIGIC) += gpio-digic.o
obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
obj-$(CONFIG_GPIO_IMX) += gpio-imx.o
obj-$(CONFIG_GPIO_JZ4740) += gpio-jz4740.o
diff --git a/drivers/gpio/gpio-digic.c b/drivers/gpio/gpio-digic.c
new file mode 100644
index 0000000000..468aaa79ab
--- /dev/null
+++ b/drivers/gpio/gpio-digic.c
@@ -0,0 +1,180 @@
+/*
+ * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <errno.h>
+#include <io.h>
+#include <gpio.h>
+#include <init.h>
+
+/*
+ * See http://magiclantern.wikia.com/wiki/Register_Map#GPIO_Ports
+ */
+
+#define DIGIC_GPIO_IN_LVL 1
+#define DIGIC_GPIO_OUT_LVL 2
+#define DIGIC_GPIO_DIR 4
+#define DIGIC_GPIO_TRISTATE 8
+
+struct digic_gpio_chip {
+ void __iomem *base;
+ struct gpio_chip gc;
+};
+
+#define to_digic_gpio_chip(c) container_of(c, struct digic_gpio_chip, gc)
+
+static inline uint32_t digic_gpio_readl(struct digic_gpio_chip *chip,
+ uint32_t offset)
+{
+ return readl(chip->base + 4 * offset);
+}
+
+static inline void digic_gpio_writel(struct digic_gpio_chip *chip,
+ uint32_t value, uint32_t offset)
+{
+ writel(value, chip->base + 4 * offset);
+}
+
+static int digic_gpio_get_value(struct gpio_chip *gc, unsigned offset)
+{
+ struct digic_gpio_chip *chip = to_digic_gpio_chip(gc);
+
+ if (offset >= gc->ngpio)
+ return -EINVAL;
+
+ return digic_gpio_readl(chip, offset) & DIGIC_GPIO_IN_LVL;
+}
+
+static void digic_gpio_set_value(struct gpio_chip *gc, unsigned offset,
+ int value)
+{
+ struct digic_gpio_chip *chip = to_digic_gpio_chip(gc);
+ uint32_t t;
+
+ if (offset >= gc->ngpio)
+ return;
+
+ t = digic_gpio_readl(chip, offset);
+ /* Port direction (1 = OUT, 0 = IN) */
+ if (value)
+ t |= DIGIC_GPIO_OUT_LVL;
+ else
+ t &= ~(DIGIC_GPIO_OUT_LVL);
+ digic_gpio_writel(chip, t, offset);
+}
+
+static int digic_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
+{
+ struct digic_gpio_chip *chip = to_digic_gpio_chip(gc);
+ uint32_t t;
+
+ if (offset >= gc->ngpio)
+ return -EINVAL;
+
+ t = digic_gpio_readl(chip, offset);
+ /* Port direction (1 = OUT, 0 = IN) */
+ t &= ~(DIGIC_GPIO_DIR);
+ digic_gpio_writel(chip, t, offset);
+
+ return 0;
+}
+
+static int digic_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
+ int value)
+{
+ struct digic_gpio_chip *chip = to_digic_gpio_chip(gc);
+ uint32_t t;
+
+ if (offset >= gc->ngpio)
+ return -EINVAL;
+
+ t = digic_gpio_readl(chip, offset);
+ /* Port direction (1 = OUT, 0 = IN) */
+ t |= DIGIC_GPIO_DIR;
+ digic_gpio_writel(chip, t, offset);
+
+ digic_gpio_set_value(gc, offset, value);
+
+ return 0;
+}
+
+static struct gpio_ops digic_gpio_ops = {
+ .direction_input = digic_gpio_direction_input,
+ .direction_output = digic_gpio_direction_output,
+ .get = digic_gpio_get_value,
+ .set = digic_gpio_set_value,
+};
+
+static int digic_gpio_probe(struct device_d *dev)
+{
+ struct digic_gpio_chip *chip;
+ struct resource *res;
+ resource_size_t rsize;
+ int ret = -EINVAL;
+
+ chip = xzalloc(sizeof(*chip));
+
+ res = dev_get_resource(dev, IORESOURCE_MEM, 0);
+ if (!res)
+ goto err;
+
+ rsize = resource_size(res);
+ chip->gc.ngpio = rsize / sizeof(int32_t);
+
+ chip->base = dev_request_mem_region(dev, 0);
+ chip->gc.ops = &digic_gpio_ops;
+ chip->gc.base = 0;
+
+ chip->gc.dev = dev;
+
+ ret = gpiochip_add(&chip->gc);
+ if (ret) {
+ dev_err(dev, "couldn't add gpiochip, ret = %d\n", ret);
+ goto err;
+ }
+
+ dev_info(dev, "probed gpiochip%d with base %d\n",
+ dev->id, chip->gc.base);
+
+ return 0;
+
+err:
+ kfree(chip);
+
+ return ret;
+}
+
+static __maybe_unused struct of_device_id digic_gpio_dt_ids[] = {
+ {
+ .compatible = "canon,digic-gpio",
+ }, {
+ /* sentinel */
+ }
+};
+
+static struct driver_d digic_gpio_driver = {
+ .name = "digic-gpio",
+ .probe = digic_gpio_probe,
+ .of_compatible = DRV_OF_COMPAT(digic_gpio_dt_ids),
+};
+
+static int digic_gpio_init(void)
+{
+ return platform_driver_register(&digic_gpio_driver);
+}
+coredevice_initcall(digic_gpio_init);
diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c
index 59712b8119..b1d266f4d6 100644
--- a/drivers/mtd/nand/nand_omap_gpmc.c
+++ b/drivers/mtd/nand/nand_omap_gpmc.c
@@ -804,8 +804,8 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
offset - omap_oobinfo.eccbytes;
break;
case OMAP_ECC_BCH4_CODE_HW:
- oinfo->nand.ecc.bytes = 4 * 7;
- oinfo->nand.ecc.size = 4 * 512;
+ oinfo->nand.ecc.bytes = 7;
+ oinfo->nand.ecc.size = 512;
oinfo->nand.ecc.strength = BCH4_MAX_ERROR;
omap_oobinfo.oobfree->offset = offset;
omap_oobinfo.oobfree->length = minfo->oobsize -
@@ -815,8 +815,8 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
omap_oobinfo.eccpos[i] = i + offset;
break;
case OMAP_ECC_BCH8_CODE_HW:
- oinfo->nand.ecc.bytes = 4 * 13;
- oinfo->nand.ecc.size = 4 * 512;
+ oinfo->nand.ecc.bytes = 13;
+ oinfo->nand.ecc.size = 512;
oinfo->nand.ecc.strength = BCH8_MAX_ERROR;
omap_oobinfo.oobfree->offset = offset;
omap_oobinfo.oobfree->length = minfo->oobsize -
@@ -826,19 +826,13 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
omap_oobinfo.eccpos[i] = i + offset;
break;
case OMAP_ECC_BCH8_CODE_HW_ROMCODE:
- oinfo->nand.ecc.bytes = 4 * 13;
- oinfo->nand.ecc.size = 4 * 512;
+ oinfo->nand.ecc.bytes = 13 + 1;
+ oinfo->nand.ecc.size = 512;
oinfo->nand.ecc.strength = BCH8_MAX_ERROR;
nand->ecc.read_page = omap_gpmc_read_page_bch_rom_mode;
omap_oobinfo.oobfree->length = 0;
j = 0;
- for (i = 2; i < 15; i++)
- omap_oobinfo.eccpos[j++] = i;
- for (i = 16; i < 29; i++)
- omap_oobinfo.eccpos[j++] = i;
- for (i = 30; i < 43; i++)
- omap_oobinfo.eccpos[j++] = i;
- for (i = 44; i < 57; i++)
+ for (i = 2; i < 58; i++)
omap_oobinfo.eccpos[j++] = i;
break;
case OMAP_ECC_SOFT:
diff --git a/drivers/of/partition.c b/drivers/of/partition.c
index e2ddec564e..3dce84404f 100644
--- a/drivers/of/partition.c
+++ b/drivers/of/partition.c
@@ -21,6 +21,7 @@
#include <of.h>
#include <malloc.h>
#include <linux/mtd/mtd.h>
+#include <linux/err.h>
#include <nand.h>
struct cdev *of_parse_partition(struct cdev *cdev, struct device_node *node)
@@ -60,6 +61,9 @@ struct cdev *of_parse_partition(struct cdev *cdev, struct device_node *node)
filename = asprintf("%s.%s", cdev->name, partname);
new = devfs_add_partition(cdev->name, offset, size, flags, filename);
+ if (IS_ERR(new))
+ new = NULL;
+
if (new && new->dev)
new->dev->device_node = node;
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index f51c6e6b02..aa8833126c 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -129,4 +129,8 @@ config DRIVER_SERIAL_CADENCE
help
Say Y here if you have a Cadence serial IP core.
+config DRIVER_SERIAL_DIGIC
+ bool "Canon DIGIC serial driver"
+ depends on ARCH_DIGIC
+
endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index e1865f725a..2d0e98eed3 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -18,3 +18,4 @@ obj-$(CONFIG_DRIVER_SERIAL_PXA) += serial_pxa.o
obj-$(CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT) += serial_omap4_usbboot.o
obj-$(CONFIG_DRIVER_SERIAL_AUART) += serial_auart.o
obj-$(CONFIG_DRIVER_SERIAL_CADENCE) += serial_cadence.o
+obj-$(CONFIG_DRIVER_SERIAL_DIGIC) += serial_digic.o
diff --git a/drivers/serial/serial_digic.c b/drivers/serial/serial_digic.c
new file mode 100644
index 0000000000..235ea0ff47
--- /dev/null
+++ b/drivers/serial/serial_digic.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (C) 2013, 2014 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <malloc.h>
+#include <io.h>
+
+#include <mach/uart.h>
+
+/*
+ * This driver is based on the "Serial terminal" docs here:
+ * http://magiclantern.wikia.com/wiki/Register_Map#Misc_Registers
+ *
+ * See also disassembler output for Canon A1100IS firmware
+ * (version a1100_100c):
+ * * a outc-like function can be found at address 0xffff18f0;
+ * * a getc-like function can be found at address 0xffff192c.
+ */
+
+static inline uint32_t digic_serial_readl(struct console_device *cdev,
+ uint32_t offset)
+{
+ void __iomem *base = cdev->dev->priv;
+
+ return readl(base + offset);
+}
+
+static inline void digic_serial_writel(struct console_device *cdev,
+ uint32_t value, uint32_t offset)
+{
+ void __iomem *base = cdev->dev->priv;
+
+ writel(value, base + offset);
+}
+
+static int digic_serial_setbaudrate(struct console_device *cdev, int baudrate)
+{
+ /* I don't know how to setup baudrate :( */
+
+ return 0;
+}
+
+static void digic_serial_putc(struct console_device *cdev, char c)
+{
+ uint32_t status;
+
+ do {
+ status = digic_serial_readl(cdev, DIGIC_UART_ST);
+ } while (!(status & DIGIC_UART_ST_TX_RDY));
+
+ digic_serial_writel(cdev, 0x06, DIGIC_UART_ST);
+ digic_serial_writel(cdev, c, DIGIC_UART_TX);
+}
+
+static int digic_serial_getc(struct console_device *cdev)
+{
+ uint32_t status;
+
+ do {
+ status = digic_serial_readl(cdev, DIGIC_UART_ST);
+ } while (!(status & DIGIC_UART_ST_RX_RDY));
+
+ digic_serial_writel(cdev, 0x01, DIGIC_UART_ST);
+
+ return digic_serial_readl(cdev, DIGIC_UART_RX);
+}
+
+static int digic_serial_tstc(struct console_device *cdev)
+{
+ uint32_t status = digic_serial_readl(cdev, DIGIC_UART_ST);
+
+ return ((status & DIGIC_UART_ST_RX_RDY) != 0);
+
+ /*
+ * Canon folks use additional check, something like this:
+ *
+ * if (digic_serial_readl(cdev, DIGIC_UART_ST) & 0x38) {
+ * digic_serial_writel(cdev, 0x38, DIGIC_UART_ST);
+ * return 0;
+ * }
+ *
+ * But I know nothing about these magic bits in the status register...
+ *
+ */
+}
+
+static int digic_serial_probe(struct device_d *dev)
+{
+ struct console_device *cdev;
+
+ cdev = xzalloc(sizeof(struct console_device));
+ dev->priv = dev_request_mem_region(dev, 0);
+ cdev->dev = dev;
+ cdev->tstc = &digic_serial_tstc;
+ cdev->putc = &digic_serial_putc;
+ cdev->getc = &digic_serial_getc;
+ cdev->setbrg = &digic_serial_setbaudrate;
+
+ console_register(cdev);
+
+ return 0;
+}
+
+static __maybe_unused struct of_device_id digic_serial_dt_ids[] = {
+ {
+ .compatible = "canon,digic-uart",
+ }, {
+ /* sentinel */
+ }
+};
+
+static struct driver_d digic_serial_driver = {
+ .name = "digic-uart",
+ .probe = digic_serial_probe,
+ .of_compatible = DRV_OF_COMPAT(digic_serial_dt_ids),
+};
+console_platform_driver(digic_serial_driver);