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-rw-r--r--drivers/clk/clk.c22
-rw-r--r--drivers/misc/state.c8
-rw-r--r--drivers/mtd/core.c35
-rw-r--r--drivers/mtd/nand/nand_mxs.c10
-rw-r--r--drivers/mtd/spi-nor/spi-nor.c1
-rw-r--r--drivers/mtd/ubi/build.c6
-rw-r--r--drivers/net/designware.c12
-rw-r--r--drivers/net/e1000/main.c1
-rw-r--r--drivers/net/phy/micrel.c6
-rw-r--r--drivers/of/base.c2
-rw-r--r--drivers/of/fdt.c2
-rw-r--r--drivers/of/of_path.c10
-rw-r--r--drivers/of/partition.c7
-rw-r--r--drivers/pci/pci.c52
-rw-r--r--drivers/pinctrl/imx-iomux-v3.c2
-rw-r--r--drivers/pinctrl/mvebu/armada-370.c22
-rw-r--r--drivers/pinctrl/mvebu/armada-xp.c95
-rw-r--r--drivers/reset/Makefile1
-rw-r--r--drivers/reset/reset-socfpga.c124
-rw-r--r--drivers/serial/serial_imx.c3
-rw-r--r--drivers/spi/mvebu_spi.c2
-rw-r--r--drivers/watchdog/Kconfig6
-rw-r--r--drivers/watchdog/Makefile1
-rw-r--r--drivers/watchdog/dw_wdt.c193
24 files changed, 516 insertions, 107 deletions
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index a38f339420..19377b893c 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -17,6 +17,8 @@
#include <common.h>
#include <errno.h>
#include <malloc.h>
+#include <stringlist.h>
+#include <complete.h>
#include <linux/clk.h>
#include <linux/err.h>
@@ -583,3 +585,23 @@ void clk_dump(int verbose)
dump_one(c, verbose, 0);
}
}
+
+int clk_name_complete(struct string_list *sl, char *instr)
+{
+ struct clk *c;
+ int len;
+
+ if (!instr)
+ instr = "";
+
+ len = strlen(instr);
+
+ list_for_each_entry(c, &clks, list) {
+ if (strncmp(instr, c->name, len))
+ continue;
+
+ string_list_add_asprintf(sl, "%s ", c->name);
+ }
+
+ return COMPLETE_CONTINUE;
+}
diff --git a/drivers/misc/state.c b/drivers/misc/state.c
index b9eb1b7bb2..b43aee60fe 100644
--- a/drivers/misc/state.c
+++ b/drivers/misc/state.c
@@ -28,8 +28,12 @@ static int state_probe(struct device_d *dev)
bool readonly = false;
state = state_new_from_node(np, NULL, 0, 0, readonly);
- if (IS_ERR(state))
- return PTR_ERR(state);
+ if (IS_ERR(state)) {
+ int ret = PTR_ERR(state);
+ if (ret == -ENODEV)
+ ret = -EPROBE_DEFER;
+ return ret;
+ }
return 0;
}
diff --git a/drivers/mtd/core.c b/drivers/mtd/core.c
index 6d04b88553..90b800c7b2 100644
--- a/drivers/mtd/core.c
+++ b/drivers/mtd/core.c
@@ -18,6 +18,7 @@
#include <common.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/mtd.h>
+#include <mtd/mtd-peb.h>
#include <mtd/ubi-user.h>
#include <cmdlinepart.h>
#include <filetype.h>
@@ -622,9 +623,11 @@ static int mtd_detect(struct device_d *dev)
struct mtd_info *mtd = container_of(dev, struct mtd_info, class_dev);
int bufsize = 512;
void *buf;
- int ret;
+ int ret = 0, i;
enum filetype filetype;
- size_t retlen;
+ int npebs = mtd_div_by_eb(mtd->size, mtd);
+
+ npebs = max(npebs, 64);
/*
* Do not try to attach an UBI device if this device has partitions
@@ -636,17 +639,27 @@ static int mtd_detect(struct device_d *dev)
buf = xmalloc(bufsize);
- ret = mtd_read(mtd, 0, bufsize, &retlen, buf);
- if (ret)
- goto out;
+ for (i = 0; i < npebs; i++) {
+ if (mtd_peb_is_bad(mtd, i))
+ continue;
- filetype = file_detect_type(buf, bufsize);
- if (filetype == filetype_ubi) {
- ret = ubi_attach_mtd_dev(mtd, UBI_DEV_NUM_AUTO, 0, 20);
- if (ret == -EEXIST)
- ret = 0;
+ ret = mtd_peb_read(mtd, buf, i, 0, 512);
+ if (ret)
+ continue;
+
+ if (mtd_buf_all_ff(buf, 512))
+ continue;
+
+ filetype = file_detect_type(buf, bufsize);
+ if (filetype == filetype_ubi) {
+ ret = ubi_attach_mtd_dev(mtd, UBI_DEV_NUM_AUTO, 0, 20);
+ if (ret == -EEXIST)
+ ret = 0;
+ }
+
+ break;
}
-out:
+
free(buf);
return ret;
diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index 01aa06333a..cba0beedbb 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -728,15 +728,15 @@ static int __mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand
uint32_t corrected = 0, failed = 0;
uint8_t *status;
unsigned int max_bitflips = 0;
- int i, ret, readtotal, nchunks, eccstrength, ecc_parity_size;
+ int i, ret, readtotal, nchunks, eccstrength;
eccstrength = mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize);
readlen = roundup(readlen, MXS_NAND_CHUNK_DATA_CHUNK_SIZE);
nchunks = mxs_nand_ecc_chunk_cnt(readlen);
- ecc_parity_size = 13 * eccstrength / 8;
- readtotal = MXS_NAND_METADATA_SIZE +
- (MXS_NAND_CHUNK_DATA_CHUNK_SIZE + ecc_parity_size) * nchunks;
+ readtotal = MXS_NAND_METADATA_SIZE;
+ readtotal += MXS_NAND_CHUNK_DATA_CHUNK_SIZE * nchunks;
+ readtotal += DIV_ROUND_UP(13 * eccstrength * nchunks, 8);
mxs_nand_config_bch(mtd, readtotal);
@@ -2145,7 +2145,7 @@ static int mxs_nand_probe(struct device_d *dev)
if (mxs_nand_is_imx6(nand_info)) {
clk_disable(nand_info->clk);
- clk_set_rate(nand_info->clk, 96000000);
+ clk_set_rate(nand_info->clk, 22000000);
clk_enable(nand_info->clk);
nand_info->dma_channel_base = 0;
} else {
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 748b328589..45be586238 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -526,6 +526,7 @@ static const struct spi_device_id spi_nor_ids[] = {
{ "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, 0) },
{ "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) },
{ "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) },
+ { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) },
{ "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8, SECT_4K) },
{ "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16, SECT_4K) },
{ "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index dd90e17cb7..2ea66ed067 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -492,13 +492,13 @@ static int autoresize(struct ubi_device *ubi, int vol_id)
* @vid_hdr_offset: VID header offset
* @max_beb_per1024: maximum expected number of bad PEB per 1024 PEBs
*
- * This function attaches MTD device @mtd_dev to UBI and assign @ubi_num number
+ * This function attaches MTD device @mtd_dev to UBI and assigns @ubi_num number
* to the newly created UBI device, unless @ubi_num is %UBI_DEV_NUM_AUTO, in
* which case this function finds a vacant device number and assigns it
* automatically. Returns the new UBI device number in case of success and a
* negative error code in case of failure.
*
- * Note, the invocations of this function has to be serialized by the
+ * Note, the invocation of this function has to be serialized by the
* @ubi_devices_mutex.
*/
int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num,
@@ -693,7 +693,7 @@ out_free:
* UBI device is busy and cannot be destroyed, and %-EINVAL if it does not
* exist.
*
- * Note, the invocations of this function has to be serialized by the
+ * Note, the invocation of this function has to be serialized by the
* @ubi_devices_mutex.
*/
int ubi_detach_mtd_dev(int ubi_num, int anyway)
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 1d662a71d9..bd20a8793a 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -128,8 +128,10 @@ static int mac_reset(struct eth_device *dev)
struct eth_dma_regs *dma_p = priv->dma_regs_p;
u64 start;
- writel(DMAMAC_SRST, &dma_p->busmode);
- writel(MII_PORTSELECT, &mac_p->conf);
+ writel(readl(&dma_p->busmode) | DMAMAC_SRST, &dma_p->busmode);
+
+ if (priv->interface != PHY_INTERFACE_MODE_RGMII)
+ writel(MII_PORTSELECT, &mac_p->conf);
start = get_time_ns();
while (readl(&dma_p->busmode) & DMAMAC_SRST) {
@@ -174,6 +176,7 @@ static void tx_descs_init(struct eth_device *dev)
desc_p->dmamac_next = &desc_table_p[0];
writel((ulong)&desc_table_p[0], &dma_p->txdesclistaddr);
+ priv->tx_currdescnum = 0;
}
static void rx_descs_init(struct eth_device *dev)
@@ -205,6 +208,7 @@ static void rx_descs_init(struct eth_device *dev)
desc_p->dmamac_next = &desc_table_p[0];
writel((ulong)&desc_table_p[0], &dma_p->rxdesclistaddr);
+ priv->rx_currdescnum = 0;
}
static void descs_init(struct eth_device *dev)
@@ -248,8 +252,8 @@ static int dwc_ether_init(struct eth_device *dev)
dev->set_ethaddr(dev, priv->macaddr);
writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode);
- writel(FLUSHTXFIFO | readl(&dma_p->opmode), &dma_p->opmode);
- writel(STOREFORWARD | TXSECONDFRAME, &dma_p->opmode);
+ writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD |
+ TXSECONDFRAME, &dma_p->opmode);
writel(FRAMEBURSTENABLE | DISABLERXOWN, &mac_p->conf);
return 0;
}
diff --git a/drivers/net/e1000/main.c b/drivers/net/e1000/main.c
index 77bcd179a8..6f9dddaf23 100644
--- a/drivers/net/e1000/main.c
+++ b/drivers/net/e1000/main.c
@@ -3600,6 +3600,7 @@ static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *id)
e1000_get_ethaddr(edev, edev->ethaddr);
/* Set up the function pointers and register the device */
+ edev->parent = &pdev->dev;
edev->init = e1000_init;
edev->recv = e1000_poll;
edev->send = e1000_transmit;
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 9a30cb7e90..0ca359b0ba 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -72,8 +72,12 @@ static int kszphy_config_init(struct phy_device *phydev)
static int ksz8021_config_init(struct phy_device *phydev)
{
- const u16 val = KSZPHY_OMSO_B_CAST_OFF | KSZPHY_OMSO_RMII_OVERRIDE;
+ u16 val;
+
+ val = phy_read(phydev, MII_KSZPHY_OMSO);
+ val |= KSZPHY_OMSO_B_CAST_OFF;
phy_write(phydev, MII_KSZPHY_OMSO, val);
+
return 0;
}
diff --git a/drivers/of/base.c b/drivers/of/base.c
index 1e6c33dbf2..767d4e1e36 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1631,7 +1631,7 @@ struct device_node *of_get_next_available_child(const struct device_node *node,
EXPORT_SYMBOL(of_get_next_available_child);
/**
- * of_get_next_child - Iterate a node childs
+ * of_get_next_child - Iterate a node children
* @node: parent node
* @prev: previous child of the parent node, or NULL to get first
*
diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
index b2253aa7a2..614e136de6 100644
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -525,7 +525,7 @@ void of_clean_reserve_map(void)
* fdt_add_reserve_map - Add reserve map entries to a devicetree binary
* @__fdt: The devicetree blob
*
- * This adds the reservemap entries previously colllected in
+ * This adds the reservemap entries previously collected in
* of_add_reserve_entry() to a devicetree binary blob. This also
* adds the devicetree itself to the reserved list, so after calling
* this function the tree should not be relocated anymore.
diff --git a/drivers/of/of_path.c b/drivers/of/of_path.c
index 8e1931f939..946b9c7aa1 100644
--- a/drivers/of/of_path.c
+++ b/drivers/of/of_path.c
@@ -56,11 +56,19 @@ static int __of_find_path(struct device_node *node, const char *part, char **out
dev = of_find_device_by_node_path(node->full_name);
if (!dev) {
- dev = of_find_device_by_node_path(node->parent->full_name);
+ struct device_node *devnode = node->parent;
+
+ if (of_device_is_compatible(devnode, "fixed-partitions"))
+ devnode = devnode->parent;
+
+ dev = of_find_device_by_node_path(devnode->full_name);
if (!dev)
return -ENODEV;
}
+ if (!dev->driver)
+ return -ENODEV;
+
device_detect(dev);
if (part)
diff --git a/drivers/of/partition.c b/drivers/of/partition.c
index b6621f7dad..bdf5945627 100644
--- a/drivers/of/partition.c
+++ b/drivers/of/partition.c
@@ -80,6 +80,13 @@ int of_parse_partitions(struct cdev *cdev, struct device_node *node)
return -EINVAL;
for_each_child_of_node(node, n) {
+ if (of_device_is_compatible(n, "fixed-partitions")) {
+ node = n;
+ break;
+ }
+ }
+
+ for_each_child_of_node(node, n) {
of_parse_partition(cdev, n);
}
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 191561da03..b2570eb151 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -28,6 +28,20 @@ static struct pci_bus *pci_alloc_bus(void)
return b;
}
+static void pci_bus_register_devices(struct pci_bus *bus)
+{
+ struct pci_dev *dev;
+ struct pci_bus *child_bus;
+
+ /* activate all devices on this bus */
+ list_for_each_entry(dev, &bus->devices, bus_list)
+ pci_register_device(dev);
+
+ /* walk down the hierarchy */
+ list_for_each_entry(child_bus, &bus->children, node)
+ pci_bus_register_devices(child_bus);
+}
+
void register_pci_controller(struct pci_controller *hose)
{
struct pci_bus *bus;
@@ -64,6 +78,7 @@ void register_pci_controller(struct pci_controller *hose)
last_io = 0;
pci_scan_bus(bus);
+ pci_bus_register_devices(bus);
list_add_tail(&bus->node, &pci_root_buses);
@@ -174,11 +189,13 @@ static void setup_device(struct pci_dev *dev, int max_bar)
continue;
}
pr_debug("pbar%d: mask=%08x io %d bytes\n", bar, mask, size);
- if (last_io + size >
+ if (ALIGN(last_io, size) + size >
dev->bus->resource[PCI_BUS_RESOURCE_IO]->end) {
pr_debug("BAR does not fit within bus IO res\n");
return;
}
+ last_io = ALIGN(last_io, size);
+ pr_debug("pbar%d: allocated at 0x%08x\n", bar, last_io);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_io);
dev->resource[bar].flags = IORESOURCE_IO;
last_addr = last_io;
@@ -192,11 +209,13 @@ static void setup_device(struct pci_dev *dev, int max_bar)
}
pr_debug("pbar%d: mask=%08x P memory %d bytes\n",
bar, mask, size);
- if (last_mem_pref + size >
+ if (ALIGN(last_mem_pref, size) + size >
dev->bus->resource[PCI_BUS_RESOURCE_MEM_PREF]->end) {
pr_debug("BAR does not fit within bus p-mem res\n");
return;
}
+ last_mem_pref = ALIGN(last_mem_pref, size);
+ pr_debug("pbar%d: allocated at 0x%08x\n", bar, last_mem_pref);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_mem_pref);
dev->resource[bar].flags = IORESOURCE_MEM |
IORESOURCE_PREFETCH;
@@ -210,11 +229,13 @@ static void setup_device(struct pci_dev *dev, int max_bar)
}
pr_debug("pbar%d: mask=%08x NP memory %d bytes\n",
bar, mask, size);
- if (last_mem + size >
+ if (ALIGN(last_mem, size) + size >
dev->bus->resource[PCI_BUS_RESOURCE_MEM]->end) {
pr_debug("BAR does not fit within bus np-mem res\n");
return;
}
+ last_mem = ALIGN(last_mem, size);
+ pr_debug("pbar%d: allocated at 0x%08x\n", bar, last_mem);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar * 4, last_mem);
dev->resource[bar].flags = IORESOURCE_MEM;
last_addr = last_mem;
@@ -224,8 +245,7 @@ static void setup_device(struct pci_dev *dev, int max_bar)
dev->resource[bar].start = last_addr;
dev->resource[bar].end = last_addr + size - 1;
- if ((mask & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
- PCI_BASE_ADDRESS_MEM_TYPE_64) {
+ if ((mask & PCI_BASE_ADDRESS_MEM_TYPE_64)) {
dev->resource[bar].flags |= IORESOURCE_MEM_64;
pci_write_config_dword(dev,
PCI_BASE_ADDRESS_1 + bar * 4, 0);
@@ -250,6 +270,7 @@ static void prescan_setup_bridge(struct pci_dev *dev)
if (last_mem) {
/* Set up memory and I/O filter limits, assume 32-bit I/O space */
+ last_mem = ALIGN(last_mem, SZ_1M);
pci_write_config_word(dev, PCI_MEMORY_BASE,
(last_mem & 0xfff00000) >> 16);
cmdstat |= PCI_COMMAND_MEMORY;
@@ -257,6 +278,7 @@ static void prescan_setup_bridge(struct pci_dev *dev)
if (last_mem_pref) {
/* Set up memory and I/O filter limits, assume 32-bit I/O space */
+ last_mem_pref = ALIGN(last_mem_pref, SZ_1M);
pci_write_config_word(dev, PCI_PREF_MEMORY_BASE,
(last_mem_pref & 0xfff00000) >> 16);
cmdstat |= PCI_COMMAND_MEMORY;
@@ -268,6 +290,7 @@ static void prescan_setup_bridge(struct pci_dev *dev)
}
if (last_io) {
+ last_io = ALIGN(last_io, SZ_4K);
pci_write_config_byte(dev, PCI_IO_BASE,
(last_io & 0x0000f000) >> 8);
pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
@@ -286,18 +309,21 @@ static void postscan_setup_bridge(struct pci_dev *dev)
if (last_mem) {
last_mem = ALIGN(last_mem, SZ_1M);
+ pr_debug("bridge NP limit at 0x%08x\n", last_mem);
pci_write_config_word(dev, PCI_MEMORY_LIMIT,
((last_mem - 1) & 0xfff00000) >> 16);
}
if (last_mem_pref) {
last_mem_pref = ALIGN(last_mem_pref, SZ_1M);
+ pr_debug("bridge P limit at 0x%08x\n", last_mem_pref);
pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT,
((last_mem_pref - 1) & 0xfff00000) >> 16);
}
if (last_io) {
last_io = ALIGN(last_io, SZ_4K);
+ pr_debug("bridge IO limit at 0x%08x\n", last_io);
pci_write_config_byte(dev, PCI_IO_LIMIT,
((last_io - 1) & 0x0000f000) >> 8);
pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
@@ -373,16 +399,8 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
dev->rom_address = (l == 0xffffffff) ? 0 : l;
setup_device(dev, 6);
- /*
- * If this device is on the root bus, there is no bridge
- * to configure, so we can activate it right away.
- */
- if (!bus->parent_bus)
- pci_register_device(dev);
break;
case PCI_HEADER_TYPE_BRIDGE:
- setup_device(dev, 2);
-
child_bus = pci_alloc_bus();
/* inherit parent properties */
child_bus->host = bus->host;
@@ -401,18 +419,12 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
list_add_tail(&child_bus->node, &bus->children);
dev->subordinate = child_bus;
- /* activate bridge device */
- pci_register_device(dev);
-
/* scan pci hierarchy behind bridge */
prescan_setup_bridge(dev);
pci_scan_bus(child_bus);
postscan_setup_bridge(dev);
- /* finally active all devices behind the bridge */
- list_for_each_entry(dev, &child_bus->devices, bus_list)
- if (!dev->subordinate)
- pci_register_device(dev);
+ setup_device(dev, 2);
break;
default:
bad:
diff --git a/drivers/pinctrl/imx-iomux-v3.c b/drivers/pinctrl/imx-iomux-v3.c
index 92fac18ef6..4b3f033894 100644
--- a/drivers/pinctrl/imx-iomux-v3.c
+++ b/drivers/pinctrl/imx-iomux-v3.c
@@ -207,6 +207,8 @@ static __maybe_unused struct of_device_id imx_iomux_v3_dt_ids[] = {
}, {
.compatible = "fsl,imx6sx-iomuxc",
}, {
+ .compatible = "fsl,imx6ul-iomuxc",
+ }, {
/* sentinel */
}
};
diff --git a/drivers/pinctrl/mvebu/armada-370.c b/drivers/pinctrl/mvebu/armada-370.c
index c2c1a0fa63..2fd07a7b87 100644
--- a/drivers/pinctrl/mvebu/armada-370.c
+++ b/drivers/pinctrl/mvebu/armada-370.c
@@ -50,12 +50,12 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
MPP_FUNCTION(0x2, "uart0", "rxd")),
MPP_MODE(4, "mpp4", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpio", NULL),
- MPP_FUNCTION(0x1, "cpu_pd", "vdd")),
+ MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
MPP_MODE(5, "mpp5", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpo", NULL),
- MPP_FUNCTION(0x1, "ge0", "txclko"),
+ MPP_FUNCTION(0x1, "ge0", "txclkout"),
MPP_FUNCTION(0x2, "uart1", "txd"),
- MPP_FUNCTION(0x4, "spi1", "clk"),
+ MPP_FUNCTION(0x4, "spi1", "sck"),
MPP_FUNCTION(0x5, "audio", "mclk")),
MPP_MODE(6, "mpp6", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpio", NULL),
@@ -66,7 +66,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
MPP_MODE(7, "mpp7", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpo", NULL),
MPP_FUNCTION(0x1, "ge0", "txd1"),
- MPP_FUNCTION(0x4, "tdm", "tdx"),
+ MPP_FUNCTION(0x4, "tdm", "dtx"),
MPP_FUNCTION(0x5, "audio", "lrclk")),
MPP_MODE(8, "mpp8", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpio", NULL),
@@ -205,11 +205,11 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
MPP_FUNCTION(0x2, "spi0", "cs0")),
MPP_MODE(34, "mpp34", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpo", NULL),
- MPP_FUNCTION(0x1, "dev", "wen0"),
+ MPP_FUNCTION(0x1, "dev", "we0"),
MPP_FUNCTION(0x2, "spi0", "mosi")),
MPP_MODE(35, "mpp35", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpo", NULL),
- MPP_FUNCTION(0x1, "dev", "oen"),
+ MPP_FUNCTION(0x1, "dev", "oe"),
MPP_FUNCTION(0x2, "spi0", "sck")),
MPP_MODE(36, "mpp36", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpo", NULL),
@@ -346,13 +346,13 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
MPP_FUNCTION(0x1, "dev", "ale1"),
MPP_FUNCTION(0x2, "uart1", "rxd"),
MPP_FUNCTION(0x3, "sata0", "prsnt"),
- MPP_FUNCTION(0x4, "pcie", "rst-out"),
+ MPP_FUNCTION(0x4, "pcie", "rstout"),
MPP_FUNCTION(0x5, "audio", "sdi")),
MPP_MODE(61, "mpp61", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpo", NULL),
- MPP_FUNCTION(0x1, "dev", "wen1"),
+ MPP_FUNCTION(0x1, "dev", "we1"),
MPP_FUNCTION(0x2, "uart1", "txd"),
- MPP_FUNCTION(0x5, "audio", "rclk")),
+ MPP_FUNCTION(0x5, "audio", "lrclk")),
MPP_MODE(62, "mpp62", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpio", NULL),
MPP_FUNCTION(0x1, "dev", "a2"),
@@ -368,11 +368,11 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
MPP_MODE(64, "mpp64", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpio", NULL),
MPP_FUNCTION(0x1, "spi0", "miso"),
- MPP_FUNCTION(0x2, "spi0-1", "cs1")),
+ MPP_FUNCTION(0x2, "spi0", "cs1")),
MPP_MODE(65, "mpp65", armada_370_mpp_ctrl,
MPP_FUNCTION(0x0, "gpio", NULL),
MPP_FUNCTION(0x1, "spi0", "mosi"),
- MPP_FUNCTION(0x2, "spi0-1", "cs2")),
+ MPP_FUNCTION(0x2, "spi0", "cs2")),
};
static struct mvebu_pinctrl_soc_info mv88f6710_pinctrl_info = {
diff --git a/drivers/pinctrl/mvebu/armada-xp.c b/drivers/pinctrl/mvebu/armada-xp.c
index f1bc8b498a..2657db5fcf 100644
--- a/drivers/pinctrl/mvebu/armada-xp.c
+++ b/drivers/pinctrl/mvebu/armada-xp.c
@@ -16,7 +16,7 @@
* both have 67 MPP pins (more GPIOs and address lines for the memory
* bus mainly). The only difference between the mv78260 and the
* mv78460 in terms of pin muxing is the addition of two functions on
- * pins 43 and 56 to access the VDD of the CPU2 and 3 (mv78260 has two
+ * pins 43 and 57 to access the VDD of the CPU2 and 3 (mv78260 has two
* cores, mv78460 has four cores).
*/
@@ -53,7 +53,7 @@ enum armada_xp_variant {
static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_MODE(0, "mpp0", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x1, "ge0", "txclko", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x1, "ge0", "txclkout", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d0", V_MV78230_PLUS)),
MPP_MODE(1, "mpp1", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
@@ -102,17 +102,19 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_MODE(12, "mpp12", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd4", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x2, "ge1", "clkout", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x2, "ge1", "txclkout", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d12", V_MV78230_PLUS)),
MPP_MODE(13, "mpp13", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd5", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd0", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi1", "mosi", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d13", V_MV78230_PLUS)),
MPP_MODE(14, "mpp14", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd6", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd1", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi1", "sck", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d14", V_MV78230_PLUS)),
MPP_MODE(15, "mpp15", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
@@ -123,11 +125,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txclk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd3", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi1", "cs0", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d16", V_MV78230_PLUS)),
MPP_MODE(17, "mpp17", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "col", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txctl", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi1", "miso", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d17", V_MV78230_PLUS)),
MPP_MODE(18, "mpp18", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
@@ -151,7 +155,7 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "rxd5", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "rxd3", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "mem", "bat", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "dram", "bat", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d21", V_MV78230_PLUS)),
MPP_MODE(22, "mpp22", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
@@ -168,20 +172,17 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_MODE(24, "mpp24", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sata1", "prsnt", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x2, "nf", "bootcs-re", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "rst", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "hsync", V_MV78230_PLUS)),
MPP_MODE(25, "mpp25", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sata0", "prsnt", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x2, "nf", "bootcs-we", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "pclk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "vsync", V_MV78230_PLUS)),
MPP_MODE(26, "mpp26", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "fsync", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "lcd", "clk", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x4, "lcd", "clk", V_MV78230_PLUS)),
MPP_MODE(27, "mpp27", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ptp", "trig", V_MV78230_PLUS),
@@ -196,8 +197,7 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ptp", "clk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int0", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk", V_MV78230_PLUS)),
MPP_MODE(30, "mpp30", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "clk", V_MV78230_PLUS),
@@ -205,23 +205,23 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_MODE(31, "mpp31", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "cmd", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "tdm", "int2", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x3, "tdm", "int2", V_MV78230_PLUS)),
MPP_MODE(32, "mpp32", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "d0", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "tdm", "int3", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x3, "tdm", "int3", V_MV78230_PLUS)),
MPP_MODE(33, "mpp33", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "d1", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int4", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "mem", "bat", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x4, "dram", "bat", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x5, "dram", "vttctrl", V_MV78230_PLUS)),
MPP_MODE(34, "mpp34", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "d2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "sata0", "prsnt", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "tdm", "int5", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x3, "tdm", "int5", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x4, "dram", "deccerr", V_MV78230_PLUS)),
MPP_MODE(35, "mpp35", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "sd0", "d3", V_MV78230_PLUS),
@@ -229,74 +229,80 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x3, "tdm", "int6", V_MV78230_PLUS)),
MPP_MODE(36, "mpp36", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x1, "spi", "mosi", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x1, "spi0", "mosi", V_MV78230_PLUS)),
MPP_MODE(37, "mpp37", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x1, "spi", "miso", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x1, "spi0", "miso", V_MV78230_PLUS)),
MPP_MODE(38, "mpp38", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x1, "spi", "sck", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x1, "spi0", "sck", V_MV78230_PLUS)),
MPP_MODE(39, "mpp39", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x1, "spi", "cs0", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x1, "spi0", "cs0", V_MV78230_PLUS)),
MPP_MODE(40, "mpp40", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x1, "spi", "cs1", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x1, "spi0", "cs1", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart2", "cts", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "vdd", "cpu1-pd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs1", V_MV78230_PLUS)),
MPP_MODE(41, "mpp41", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x1, "spi", "cs2", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x1, "spi0", "cs2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart2", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs2", V_MV78230_PLUS)),
MPP_MODE(42, "mpp42", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "rxd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart0", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "tdm", "int7", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "tdm-1", "timer", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x4, "tdm", "timer", V_MV78230_PLUS)),
MPP_MODE(43, "mpp43", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "txd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart0", "rts", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "spi", "cs3", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi0", "cs3", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "pcie", "rstout", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "vdd", "cpu2-3-pd", V_MV78460)),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs3", V_MV78230_PLUS)),
MPP_MODE(44, "mpp44", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart3", "rxd", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "spi", "cs4", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "mem", "bat", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x3, "spi0", "cs4", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x4, "dram", "bat", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs4", V_MV78230_PLUS)),
MPP_MODE(45, "mpp45", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart3", "txd", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "spi", "cs5", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x3, "spi0", "cs5", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x5, "dram", "vttctrl", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs5", V_MV78230_PLUS)),
MPP_MODE(46, "mpp46", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart3", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart1", "rts", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "spi", "cs6", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x3, "spi0", "cs6", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs6", V_MV78230_PLUS)),
MPP_MODE(47, "mpp47", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart3", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart1", "cts", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x3, "spi", "cs7", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi0", "cs7", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "ref", "clkout", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs7", V_MV78230_PLUS)),
MPP_MODE(48, "mpp48", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x1, "tclk", NULL, V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x1, "dev", "clkout", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "nand", "rb", V_MV78230_PLUS)),
MPP_MODE(49, "mpp49", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "we3", V_MV78260_PLUS)),
@@ -317,16 +323,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x1, "dev", "ad19", V_MV78260_PLUS)),
MPP_MODE(55, "mpp55", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
- MPP_VAR_FUNCTION(0x1, "dev", "ad20", V_MV78260_PLUS),
- MPP_VAR_FUNCTION(0x2, "vdd", "cpu0-pd", V_MV78260_PLUS)),
+ MPP_VAR_FUNCTION(0x1, "dev", "ad20", V_MV78260_PLUS)),
MPP_MODE(56, "mpp56", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
- MPP_VAR_FUNCTION(0x1, "dev", "ad21", V_MV78260_PLUS),
- MPP_VAR_FUNCTION(0x2, "vdd", "cpu1-pd", V_MV78260_PLUS)),
+ MPP_VAR_FUNCTION(0x1, "dev", "ad21", V_MV78260_PLUS)),
MPP_MODE(57, "mpp57", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
- MPP_VAR_FUNCTION(0x1, "dev", "ad22", V_MV78260_PLUS),
- MPP_VAR_FUNCTION(0x2, "vdd", "cpu2-3-pd", V_MV78460)),
+ MPP_VAR_FUNCTION(0x1, "dev", "ad22", V_MV78260_PLUS)),
MPP_MODE(58, "mpp58", armada_xp_mpp_ctrl,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "ad23", V_MV78260_PLUS)),
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 1e2d83f2b9..52b10cd480 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -1 +1,2 @@
obj-$(CONFIG_RESET_CONTROLLER) += core.o
+obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
new file mode 100644
index 0000000000..9214197e62
--- /dev/null
+++ b/drivers/reset/reset-socfpga.c
@@ -0,0 +1,124 @@
+/*
+ * Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * based on
+ * Allwinner SoCs Reset Controller driver
+ *
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <linux/err.h>
+#include <linux/reset-controller.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+
+#define NR_BANKS 4
+
+struct socfpga_reset_data {
+ spinlock_t lock;
+ void __iomem *membase;
+ u32 modrst_offset;
+ struct reset_controller_dev rcdev;
+};
+
+static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct socfpga_reset_data *data = container_of(rcdev,
+ struct socfpga_reset_data,
+ rcdev);
+ int bank = id / BITS_PER_LONG;
+ int offset = id % BITS_PER_LONG;
+ unsigned long flags;
+ u32 reg;
+
+ spin_lock_irqsave(&data->lock, flags);
+
+ reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS));
+ writel(reg | BIT(offset), data->membase + data->modrst_offset +
+ (bank * NR_BANKS));
+ spin_unlock_irqrestore(&data->lock, flags);
+
+ return 0;
+}
+
+static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct socfpga_reset_data *data = container_of(rcdev,
+ struct socfpga_reset_data,
+ rcdev);
+
+ int bank = id / BITS_PER_LONG;
+ int offset = id % BITS_PER_LONG;
+ unsigned long flags;
+ u32 reg;
+
+ spin_lock_irqsave(&data->lock, flags);
+
+ reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS));
+ writel(reg & ~BIT(offset), data->membase + data->modrst_offset +
+ (bank * NR_BANKS));
+
+ spin_unlock_irqrestore(&data->lock, flags);
+
+ return 0;
+}
+
+static struct reset_control_ops socfpga_reset_ops = {
+ .assert = socfpga_reset_assert,
+ .deassert = socfpga_reset_deassert,
+};
+
+static int socfpga_reset_probe(struct device_d *dev)
+{
+ struct socfpga_reset_data *data;
+ struct resource *res;
+ struct device_node *np = dev->device_node;
+
+ data = xzalloc(sizeof(*data));
+
+ res = dev_request_mem_resource(dev, 0);
+ data->membase = IOMEM(res->start);
+ if (IS_ERR(data->membase))
+ return PTR_ERR(data->membase);
+
+ if (of_property_read_u32(np, "altr,modrst-offset", &data->modrst_offset)) {
+ dev_warn(dev, "missing altr,modrst-offset property, assuming 0x10!\n");
+ data->modrst_offset = 0x10;
+ }
+
+ spin_lock_init(&data->lock);
+
+ data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG;
+ data->rcdev.ops = &socfpga_reset_ops;
+ data->rcdev.of_node = np;
+
+ return reset_controller_register(&data->rcdev);
+}
+
+static const struct of_device_id socfpga_reset_dt_ids[] = {
+ { .compatible = "altr,rst-mgr", },
+ { /* sentinel */ },
+};
+
+static struct driver_d socfpga_reset_driver = {
+ .probe = socfpga_reset_probe,
+ .of_compatible = DRV_OF_COMPAT(socfpga_reset_dt_ids),
+};
+
+static int socfpga_reset_init(void)
+{
+ return platform_driver_register(&socfpga_reset_driver);
+}
+postcore_initcall(socfpga_reset_init);
diff --git a/drivers/serial/serial_imx.c b/drivers/serial/serial_imx.c
index f140310fdc..2b1e5e07ab 100644
--- a/drivers/serial/serial_imx.c
+++ b/drivers/serial/serial_imx.c
@@ -287,6 +287,9 @@ static __maybe_unused struct of_device_id imx_serial_dt_ids[] = {
.compatible = "fsl,imx21-uart",
.data = &imx21_data,
}, {
+ .compatible = "fsl,imx6ul-uart",
+ .data = &imx21_data,
+ }, {
/* sentinel */
}
};
diff --git a/drivers/spi/mvebu_spi.c b/drivers/spi/mvebu_spi.c
index c679e64c42..335774d4c6 100644
--- a/drivers/spi/mvebu_spi.c
+++ b/drivers/spi/mvebu_spi.c
@@ -361,7 +361,7 @@ static int mvebu_spi_probe(struct device_d *dev)
master->bus_num = dev->id;
master->setup = mvebu_spi_setup;
master->transfer = mvebu_spi_transfer;
- master->num_chipselect = 1;
+ master->num_chipselect = 8;
ret = spi_register_master(master);
if (!ret)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 60a56bf4b0..63fb1a8c57 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -16,6 +16,12 @@ config WATCHDOG_DAVINCI
help
Add support for watchdog on the TI Davinci SoC.
+config WATCHDOG_DW
+ bool "Synopsys DesignWare watchdog"
+ select RESET_CONTROLLER
+ help
+ Add support for the Synopsys DesignWare watchdog timer.
+
config WATCHDOG_MXS28
bool "i.MX28"
depends on ARCH_IMX28
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index e3afe1c27e..5fca4c368c 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -2,5 +2,6 @@ obj-$(CONFIG_WATCHDOG) += wd_core.o
obj-$(CONFIG_WATCHDOG_DAVINCI) += davinci_wdt.o
obj-$(CONFIG_WATCHDOG_OMAP) += omap_wdt.o
obj-$(CONFIG_WATCHDOG_MXS28) += im28wd.o
+obj-$(CONFIG_WATCHDOG_DW) += dw_wdt.o
obj-$(CONFIG_WATCHDOG_JZ4740) += jz4740.o
obj-$(CONFIG_WATCHDOG_IMX_RESET_SOURCE) += imxwd.o
diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
new file mode 100644
index 0000000000..8fd8c81e6c
--- /dev/null
+++ b/drivers/watchdog/dw_wdt.c
@@ -0,0 +1,193 @@
+/*
+ * Copyright 2010-2011 Picochip Ltd., Jamie Iles
+ * http://www.picochip.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * This file implements a driver for the Synopsys DesignWare watchdog device
+ * in the many subsystems. The watchdog has 16 different timeout periods
+ * and these are a function of the input clock frequency.
+ *
+ * The DesignWare watchdog cannot be stopped once it has been started so we
+ * do not implement a stop function. The watchdog core will continue to send
+ * heartbeat requests after the watchdog device has been closed.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <of.h>
+#include <restart.h>
+#include <watchdog.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/reset.h>
+
+#define WDOG_CONTROL_REG_OFFSET 0x00
+#define WDOG_CONTROL_REG_WDT_EN_MASK 0x01
+#define WDOG_TIMEOUT_RANGE_REG_OFFSET 0x04
+#define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT 4
+#define WDOG_CURRENT_COUNT_REG_OFFSET 0x08
+#define WDOG_COUNTER_RESTART_REG_OFFSET 0x0c
+#define WDOG_COUNTER_RESTART_KICK_VALUE 0x76
+
+/* The maximum TOP (timeout period) value that can be set in the watchdog. */
+#define DW_WDT_MAX_TOP 15
+
+#define DW_WDT_DEFAULT_SECONDS 30
+
+struct dw_wdt {
+ void __iomem *regs;
+ struct clk *clk;
+ struct restart_handler restart;
+ struct watchdog wdd;
+ struct reset_control *rst;
+};
+
+#define to_dw_wdt(wdd) container_of(wdd, struct dw_wdt, wdd)
+
+static inline int dw_wdt_top_in_seconds(struct dw_wdt *dw_wdt, unsigned top)
+{
+ /*
+ * There are 16 possible timeout values in 0..15 where the number of
+ * cycles is 2 ^ (16 + i) and the watchdog counts down.
+ */
+ return (1U << (16 + top)) / clk_get_rate(dw_wdt->clk);
+}
+
+static int dw_wdt_start(struct watchdog *wdd)
+{
+ struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
+
+ writel(WDOG_CONTROL_REG_WDT_EN_MASK,
+ dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
+
+ return 0;
+}
+
+static int dw_wdt_stop(struct watchdog *wdd)
+{
+ struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
+
+ if (IS_ERR(dw_wdt->rst)) {
+ dev_warn(dw_wdt->wdd.dev, "No reset line. Will not stop.\n");
+ return PTR_ERR(dw_wdt->rst);
+ }
+
+ reset_control_assert(dw_wdt->rst);
+ reset_control_deassert(dw_wdt->rst);
+
+ return 0;
+}
+
+static int dw_wdt_set_timeout(struct watchdog *wdd, unsigned int top_s)
+{
+ struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
+ int i, top_val = DW_WDT_MAX_TOP;
+
+ if (top_s == 0)
+ return dw_wdt_stop(wdd);
+
+ /*
+ * Iterate over the timeout values until we find the closest match. We
+ * always look for >=.
+ */
+ for (i = 0; i <= DW_WDT_MAX_TOP; ++i) {
+ if (dw_wdt_top_in_seconds(dw_wdt, i) >= top_s) {
+ top_val = i;
+ break;
+ }
+ }
+
+ /*
+ * Set the new value in the watchdog. Some versions of dw_wdt
+ * have have TOPINIT in the TIMEOUT_RANGE register (as per
+ * CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1). On those we
+ * effectively get a pat of the watchdog right here.
+ */
+ writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
+ dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
+
+ dw_wdt_start(wdd);
+
+ return 0;
+}
+
+static void __noreturn dw_wdt_restart_handle(struct restart_handler *rst)
+{
+ struct dw_wdt *dw_wdt;
+
+ dw_wdt = container_of(rst, struct dw_wdt, restart);
+
+ dw_wdt->wdd.set_timeout(&dw_wdt->wdd, -1);
+
+ mdelay(1000);
+
+ hang();
+}
+
+static int dw_wdt_drv_probe(struct device_d *dev)
+{
+ struct watchdog *wdd;
+ struct dw_wdt *dw_wdt;
+ struct resource *mem;
+ int ret;
+
+ dw_wdt = xzalloc(sizeof(*dw_wdt));
+
+ mem = dev_request_mem_resource(dev, 0);
+ dw_wdt->regs = IOMEM(mem->start);
+ if (IS_ERR(dw_wdt->regs))
+ return PTR_ERR(dw_wdt->regs);
+
+ dw_wdt->clk = clk_get(dev, NULL);
+ if (IS_ERR(dw_wdt->clk))
+ return PTR_ERR(dw_wdt->clk);
+
+ ret = clk_enable(dw_wdt->clk);
+ if (ret)
+ return ret;
+
+ dw_wdt->rst = reset_control_get(dev, NULL);
+ if (IS_ERR(dw_wdt->rst))
+ dev_warn(dev, "No reset lines. Will not be able to stop once started.\n");
+
+ wdd = &dw_wdt->wdd;
+ wdd->name = "dw_wdt";
+ wdd->dev = dev;
+ wdd->set_timeout = dw_wdt_set_timeout;
+
+ ret = watchdog_register(wdd);
+ if (ret)
+ goto out_disable_clk;
+
+ dw_wdt->restart.name = "dw_wdt";
+ dw_wdt->restart.restart = dw_wdt_restart_handle;
+
+ ret = restart_handler_register(&dw_wdt->restart);
+ if (ret)
+ dev_warn(dev, "cannot register restart handler\n");
+
+ if (!IS_ERR(dw_wdt->rst))
+ reset_control_deassert(dw_wdt->rst);
+
+ return 0;
+
+out_disable_clk:
+ clk_disable(dw_wdt->clk);
+ return ret;
+}
+
+static struct of_device_id dw_wdt_of_match[] = {
+ { .compatible = "snps,dw-wdt", },
+ { /* sentinel */ }
+};
+
+static struct driver_d dw_wdt_driver = {
+ .probe = dw_wdt_drv_probe,
+ .of_compatible = DRV_OF_COMPAT(dw_wdt_of_match),
+};
+device_platform_driver(dw_wdt_driver);
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-11 04:54:52 +0000