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-rw-r--r--dts/Bindings/arm/altera/socfpga-clk-manager.txt11
-rw-r--r--dts/Bindings/arm/altera/socfpga-reset.txt11
-rw-r--r--dts/Bindings/arm/altera/socfpga-system.txt13
3 files changed, 35 insertions, 0 deletions
diff --git a/dts/Bindings/arm/altera/socfpga-clk-manager.txt b/dts/Bindings/arm/altera/socfpga-clk-manager.txt
new file mode 100644
index 0000000000..2c28f1d12f
--- /dev/null
+++ b/dts/Bindings/arm/altera/socfpga-clk-manager.txt
@@ -0,0 +1,11 @@
+Altera SOCFPGA Clock Manager
+
+Required properties:
+- compatible : "altr,clk-mgr"
+- reg : Should contain base address and length for Clock Manager
+
+Example:
+ clkmgr@ffd04000 {
+ compatible = "altr,clk-mgr";
+ reg = <0xffd04000 0x1000>;
+ };
diff --git a/dts/Bindings/arm/altera/socfpga-reset.txt b/dts/Bindings/arm/altera/socfpga-reset.txt
new file mode 100644
index 0000000000..ecdb57d69d
--- /dev/null
+++ b/dts/Bindings/arm/altera/socfpga-reset.txt
@@ -0,0 +1,11 @@
+Altera SOCFPGA Reset Manager
+
+Required properties:
+- compatible : "altr,rst-mgr"
+- reg : Should contain 1 register ranges(address and length)
+
+Example:
+ rstmgr@ffd05000 {
+ compatible = "altr,rst-mgr";
+ reg = <0xffd05000 0x1000>;
+ };
diff --git a/dts/Bindings/arm/altera/socfpga-system.txt b/dts/Bindings/arm/altera/socfpga-system.txt
new file mode 100644
index 0000000000..f4d04a0672
--- /dev/null
+++ b/dts/Bindings/arm/altera/socfpga-system.txt
@@ -0,0 +1,13 @@
+Altera SOCFPGA System Manager
+
+Required properties:
+- compatible : "altr,sys-mgr"
+- reg : Should contain 1 register ranges(address and length)
+- cpu1-start-addr : CPU1 start address in hex.
+
+Example:
+ sysmgr@ffd08000 {
+ compatible = "altr,sys-mgr";
+ reg = <0xffd08000 0x1000>;
+ cpu1-start-addr = <0xffd080c4>;
+ };