diff options
Diffstat (limited to 'dts/Bindings/arm/altera')
| -rw-r--r-- | dts/Bindings/arm/altera/socfpga-sdram-controller.txt | 12 | ||||
| -rw-r--r-- | dts/Bindings/arm/altera/socfpga-sdram-edac.txt | 2 |
2 files changed, 13 insertions, 1 deletions
diff --git a/dts/Bindings/arm/altera/socfpga-sdram-controller.txt b/dts/Bindings/arm/altera/socfpga-sdram-controller.txt new file mode 100644 index 0000000000..77ca635765 --- /dev/null +++ b/dts/Bindings/arm/altera/socfpga-sdram-controller.txt @@ -0,0 +1,12 @@ +Altera SOCFPGA SDRAM Controller + +Required properties: +- compatible : Should contain "altr,sdr-ctl" and "syscon". + syscon is required by the Altera SOCFPGA SDRAM EDAC. +- reg : Should contain 1 register range (address and length) + +Example: + sdr: sdr@ffc25000 { + compatible = "altr,sdr-ctl", "syscon"; + reg = <0xffc25000 0x1000>; + }; diff --git a/dts/Bindings/arm/altera/socfpga-sdram-edac.txt b/dts/Bindings/arm/altera/socfpga-sdram-edac.txt index d0ce01da5c..f5ad0ff69f 100644 --- a/dts/Bindings/arm/altera/socfpga-sdram-edac.txt +++ b/dts/Bindings/arm/altera/socfpga-sdram-edac.txt @@ -2,7 +2,7 @@ Altera SOCFPGA SDRAM Error Detection & Correction [EDAC] The EDAC accesses a range of registers in the SDRAM controller. Required properties: -- compatible : should contain "altr,sdram-edac"; +- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10" - altr,sdr-syscon : phandle of the sdr module - interrupts : Should contain the SDRAM ECC IRQ in the appropriate format for the IRQ controller. |