diff options
Diffstat (limited to 'dts/Bindings/arm/amlogic')
-rw-r--r-- | dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml | 10 | ||||
-rw-r--r-- | dts/Bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml | 42 | ||||
-rw-r--r-- | dts/Bindings/arm/amlogic/smp-sram.txt | 32 |
3 files changed, 48 insertions, 36 deletions
diff --git a/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml b/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml index 853d7d2b56..7dff32f373 100644 --- a/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml +++ b/dts/Bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml @@ -2,13 +2,13 @@ # Copyright 2019 BayLibre, SAS %YAML 1.2 --- -$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# title: Amlogic Meson Firmware registers Interface maintainers: - - Neil Armstrong <narmstrong@baylibre.com> + - Neil Armstrong <neil.armstrong@linaro.org> description: | The Meson SoCs have a register bank with status and data shared with the @@ -25,7 +25,7 @@ select: properties: compatible: - items: + items: - const: amlogic,meson-gx-ao-secure - const: syscon @@ -43,6 +43,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | ao-secure@140 { diff --git a/dts/Bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/dts/Bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml new file mode 100644 index 0000000000..09b27e98d4 --- /dev/null +++ b/dts/Bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface + +maintainers: + - Martin Blumenstingl <martin.blumenstingl@googlemail.com> + +description: | + The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which + contains registers for various IP blocks such as pin-controller bits for + the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. + The registers can be accessed directly when not running in "secure mode". + When "secure mode" is enabled then these registers have to be accessed + through secure monitor calls. + +properties: + compatible: + items: + - enum: + - amlogic,meson8-secbus2 + - amlogic,meson8b-secbus2 + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + secbus2: system-controller@4000 { + compatible = "amlogic,meson8-secbus2", "syscon"; + reg = <0x4000 0x2000>; + }; diff --git a/dts/Bindings/arm/amlogic/smp-sram.txt b/dts/Bindings/arm/amlogic/smp-sram.txt deleted file mode 100644 index 3473ddaadf..0000000000 --- a/dts/Bindings/arm/amlogic/smp-sram.txt +++ /dev/null @@ -1,32 +0,0 @@ -Amlogic Meson8 and Meson8b SRAM for smp bringup: ------------------------------------------------- - -Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores. -Once the core gets powered up it executes the code that is residing at a -specific location. - -Therefore a reserved section sub-node has to be added to the mmio-sram -declaration. - -Required sub-node properties: -- compatible : depending on the SoC this should be one of: - "amlogic,meson8-smp-sram" - "amlogic,meson8b-smp-sram" - -The rest of the properties should follow the generic mmio-sram discription -found in ../../misc/sram.txt - -Example: - - sram: sram@d9000000 { - compatible = "mmio-sram"; - reg = <0xd9000000 0x20000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xd9000000 0x20000>; - - smp-sram@1ff80 { - compatible = "amlogic,meson8b-smp-sram"; - reg = <0x1ff80 0x8>; - }; - }; |