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-rw-r--r--dts/Bindings/arm/arm,cci-400.yaml17
1 files changed, 6 insertions, 11 deletions
diff --git a/dts/Bindings/arm/arm,cci-400.yaml b/dts/Bindings/arm/arm,cci-400.yaml
index 4682f991a5..d28303d909 100644
--- a/dts/Bindings/arm/arm,cci-400.yaml
+++ b/dts/Bindings/arm/arm,cci-400.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: ARM CCI Cache Coherent Interconnect Device Tree Binding
+title: ARM CCI Cache Coherent Interconnect
maintainers:
- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
@@ -119,6 +119,11 @@ examples:
arm,hbi = <0x249>;
interrupt-parent = <&gic>;
+ gic: interrupt-controller {
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
/*
* This CCI node corresponds to a CCI component whose control
* registers sits at address 0x000000002c090000.
@@ -166,16 +171,6 @@ examples:
};
};
- dma0: dma@3000000 {
- /* compatible = "arm,pl330", "arm,primecell"; */
- cci-control-port = <&cci_control0>;
- reg = <0x0 0x3000000 0x0 0x1000>;
- interrupts = <10>;
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
cci@2c090000 {
compatible = "arm,cci-400";
#address-cells = <1>;