summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/arm/exynos/power_domain.txt
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/arm/exynos/power_domain.txt')
-rw-r--r--dts/Bindings/arm/exynos/power_domain.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/dts/Bindings/arm/exynos/power_domain.txt b/dts/Bindings/arm/exynos/power_domain.txt
index 1e09703734..5da38c5ed4 100644
--- a/dts/Bindings/arm/exynos/power_domain.txt
+++ b/dts/Bindings/arm/exynos/power_domain.txt
@@ -22,6 +22,9 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
+ - asbN: Clocks required by asynchronous bridges (ASB) present in
+ the power domain. These clock should be enabled during power
+ domain on/off operations.
- power-domains: phandle pointing to the parent power domain, for more details
see Documentation/devicetree/bindings/power/power_domain.txt