path: root/dts/Bindings/arm/exynos/power_domain.txt
diff options
Diffstat (limited to 'dts/Bindings/arm/exynos/power_domain.txt')
1 files changed, 4 insertions, 3 deletions
diff --git a/dts/Bindings/arm/exynos/power_domain.txt b/dts/Bindings/arm/exynos/power_domain.txt
index 5da38c5ed4..e151057d92 100644
--- a/dts/Bindings/arm/exynos/power_domain.txt
+++ b/dts/Bindings/arm/exynos/power_domain.txt
@@ -19,9 +19,10 @@ Optional Properties:
- clock-names: The following clocks can be specified:
- oscclk: Oscillator clock.
- - pclkN, clkN: Pairs of parent of input clock and input clock to the
- devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
- are supported currently.
+ - clkN: Input clocks to the devices in this power domain. These clocks
+ will be reparented to oscclk before swithing power domain off.
+ Their original parent will be brought back after turning on
+ the domain. Maximum of 4 clocks (N = 0 to 3) are supported.
- asbN: Clocks required by asynchronous bridges (ASB) present in
the power domain. These clock should be enabled during power
domain on/off operations.