summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/arm/marvell/ap806-system-controller.txt
diff options
context:
space:
mode:
Diffstat (limited to 'dts/Bindings/arm/marvell/ap806-system-controller.txt')
-rw-r--r--dts/Bindings/arm/marvell/ap806-system-controller.txt42
1 files changed, 37 insertions, 5 deletions
diff --git a/dts/Bindings/arm/marvell/ap806-system-controller.txt b/dts/Bindings/arm/marvell/ap806-system-controller.txt
index 7b8b8eb019..26410fbb85 100644
--- a/dts/Bindings/arm/marvell/ap806-system-controller.txt
+++ b/dts/Bindings/arm/marvell/ap806-system-controller.txt
@@ -18,17 +18,19 @@ Clocks:
-------
-The Device Tree node representing the AP806 system controller provides
-a number of clocks:
+The Device Tree node representing the AP806/AP807 system controller
+provides a number of clocks:
- - 0: clock of CPU cluster 0
- - 1: clock of CPU cluster 1
+ - 0: reference clock of CPU cluster 0
+ - 1: reference clock of CPU cluster 1
- 2: fixed PLL at 1200 Mhz
- 3: MSS clock, derived from the fixed PLL
Required properties:
- - compatible: must be: "marvell,ap806-clock"
+ - compatible: must be one of:
+ * "marvell,ap806-clock"
+ * "marvell,ap807-clock"
- #clock-cells: must be set to 1
Pinctrl:
@@ -143,3 +145,33 @@ ap_syscon1: system-controller@6f8000 {
#thermal-sensor-cells = <1>;
};
};
+
+Cluster clocks:
+---------------
+
+Device Tree Clock bindings for cluster clock of Marvell
+AP806/AP807. Each cluster contain up to 2 CPUs running at the same
+frequency.
+
+Required properties:
+ - compatible: must be one of:
+ * "marvell,ap806-cpu-clock"
+ * "marvell,ap807-cpu-clock"
+- #clock-cells : should be set to 1.
+
+- clocks : shall be the input parent clock(s) phandle for the clock
+ (one per cluster)
+
+- reg: register range associated with the cluster clocks
+
+ap_syscon1: system-controller@6f8000 {
+ compatible = "marvell,armada-ap806-syscon1", "syscon", "simple-mfd";
+ reg = <0x6f8000 0x1000>;
+
+ cpu_clk: clock-cpu@278 {
+ compatible = "marvell,ap806-cpu-clock";
+ clocks = <&ap_clk 0>, <&ap_clk 1>;
+ #clock-cells = <1>;
+ reg = <0x278 0xa30>;
+ };
+};