diff options
Diffstat (limited to 'dts/Bindings/arm')
| -rw-r--r-- | dts/Bindings/arm/gic-v3.txt | 5 | ||||
| -rw-r--r-- | dts/Bindings/arm/idle-states.txt | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/dts/Bindings/arm/gic-v3.txt b/dts/Bindings/arm/gic-v3.txt index ddfade40ac..7803e77d85 100644 --- a/dts/Bindings/arm/gic-v3.txt +++ b/dts/Bindings/arm/gic-v3.txt @@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs. These nodes must have the following properties: - compatible : Should at least contain "arm,gic-v3-its". - msi-controller : Boolean property. Identifies the node as an MSI controller +- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device + which will generate the MSI. - reg: Specifies the base physical address and size of the ITS registers. @@ -83,6 +85,7 @@ Examples: gic-its@2c200000 { compatible = "arm,gic-v3-its"; msi-controller; + #msi-cells = <1>; reg = <0x0 0x2c200000 0 0x200000>; }; }; @@ -107,12 +110,14 @@ Examples: gic-its@2c200000 { compatible = "arm,gic-v3-its"; msi-controller; + #msi-cells = <1>; reg = <0x0 0x2c200000 0 0x200000>; }; gic-its@2c400000 { compatible = "arm,gic-v3-its"; msi-controller; + #msi-cells = <1>; reg = <0x0 0x2c400000 0 0x200000>; }; }; diff --git a/dts/Bindings/arm/idle-states.txt b/dts/Bindings/arm/idle-states.txt index a8274eabae..b8e41c148a 100644 --- a/dts/Bindings/arm/idle-states.txt +++ b/dts/Bindings/arm/idle-states.txt @@ -497,7 +497,7 @@ cpus { }; idle-states { - entry-method = "arm,psci"; + entry-method = "psci"; CPU_RETENTION_0_0: cpu-retention-0-0 { compatible = "arm,idle-state"; |